%------------------------------------------------------------------------------
% File : Refute---2015
% Problem : NUM437+1 : TPTP v6.4.0. Released v4.0.0.
% Transfm : none
% Format : tptp:raw
% Command : isabelle tptp_refute %d %s
% Computer : n030.star.cs.uiowa.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory : 16091.75MB
% OS : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 01:55:33 EDT 2016
% Result : CounterSatisfiable 42.75s
% Output : Assurance 0s
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03 % Problem : NUM437+1 : TPTP v6.4.0. Released v4.0.0.
% 0.00/0.04 % Command : isabelle tptp_refute %d %s
% 0.03/0.23 % Computer : n030.star.cs.uiowa.edu
% 0.03/0.23 % Model : x86_64 x86_64
% 0.03/0.23 % CPU : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.03/0.23 % Memory : 16091.75MB
% 0.03/0.23 % OS : Linux 3.10.0-327.10.1.el7.x86_64
% 0.03/0.23 % CPULimit : 300
% 0.03/0.23 % DateTime : Wed Apr 6 02:59:54 CDT 2016
% 0.03/0.23 % CPUTime :
% 6.28/5.86 > val it = (): unit
% 6.58/6.10 Trying to find a model that refutes: bnd_isOpen0 (bnd_sbsmnsldt0 bnd_xS)
% 7.68/7.30 Unfolded term: [| ALL W0.
% 7.68/7.30 bnd_aSubsetOf0 W0 bnd_cS1395 -->
% 7.68/7.30 bnd_isClosed0 W0 = bnd_isOpen0 (bnd_stldt0 W0);
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aSubsetOf0 W0 bnd_cS1395 -->
% 7.68/7.30 bnd_isOpen0 W0 =
% 7.68/7.30 (ALL W1.
% 7.68/7.30 bnd_aElementOf0 W1 W0 -->
% 7.68/7.30 (EX W2.
% 7.68/7.30 (bnd_aInteger0 W2 & ~ W2 = bnd_sz00) &
% 7.68/7.30 bnd_aSubsetOf0 (bnd_szAzrzSzezqlpdtcmdtrp0 W1 W2) W0));
% 7.68/7.30 ALL W0 W1.
% 7.68/7.30 (bnd_aInteger0 W0 & bnd_aInteger0 W1) & ~ W1 = bnd_sz00 -->
% 7.68/7.30 (ALL W2.
% 7.68/7.30 (W2 = bnd_szAzrzSzezqlpdtcmdtrp0 W0 W1) =
% 7.68/7.30 (bnd_aSet0 W2 &
% 7.68/7.30 (ALL W3.
% 7.68/7.30 bnd_aElementOf0 W3 W2 =
% 7.68/7.30 (bnd_aInteger0 W3 & bnd_sdteqdtlpzmzozddtrp0 W3 W0 W1))));
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aSubsetOf0 W0 bnd_cS1395 -->
% 7.68/7.30 (ALL W1.
% 7.68/7.30 (W1 = bnd_stldt0 W0) =
% 7.68/7.30 (bnd_aSet0 W1 &
% 7.68/7.30 (ALL W2.
% 7.68/7.30 bnd_aElementOf0 W2 W1 =
% 7.68/7.30 (bnd_aInteger0 W2 & ~ bnd_aElementOf0 W2 W0))));
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aSet0 W0 &
% 7.68/7.30 (ALL W1. bnd_aElementOf0 W1 W0 --> bnd_aSubsetOf0 W1 bnd_cS1395) -->
% 7.68/7.30 (ALL W1.
% 7.68/7.30 (W1 = bnd_sbsmnsldt0 W0) =
% 7.68/7.30 (bnd_aSet0 W1 &
% 7.68/7.30 (ALL W2.
% 7.68/7.30 bnd_aElementOf0 W2 W1 =
% 7.68/7.30 (bnd_aInteger0 W2 &
% 7.68/7.30 (EX W3. bnd_aElementOf0 W3 W0 & bnd_aElementOf0 W2 W3)))));
% 7.68/7.30 ALL W0 W1.
% 7.68/7.30 bnd_aSubsetOf0 W0 bnd_cS1395 & bnd_aSubsetOf0 W1 bnd_cS1395 -->
% 7.68/7.30 (ALL W2.
% 7.68/7.30 (W2 = bnd_sdtslmnbsdt0 W0 W1) =
% 7.68/7.30 (bnd_aSet0 W2 &
% 7.68/7.30 (ALL W3.
% 7.68/7.30 bnd_aElementOf0 W3 W2 =
% 7.68/7.30 ((bnd_aInteger0 W3 & bnd_aElementOf0 W3 W0) &
% 7.68/7.30 bnd_aElementOf0 W3 W1))));
% 7.68/7.30 ALL W0 W1.
% 7.68/7.30 bnd_aSubsetOf0 W0 bnd_cS1395 & bnd_aSubsetOf0 W1 bnd_cS1395 -->
% 7.68/7.30 (ALL W2.
% 7.68/7.30 (W2 = bnd_sdtbsmnsldt0 W0 W1) =
% 7.68/7.30 (bnd_aSet0 W2 &
% 7.68/7.30 (ALL W3.
% 7.68/7.30 bnd_aElementOf0 W3 W2 =
% 7.68/7.30 (bnd_aInteger0 W3 &
% 7.68/7.30 (bnd_aElementOf0 W3 W0 | bnd_aElementOf0 W3 W1)))));
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aSet0 W0 -->
% 7.68/7.30 (ALL W1.
% 7.68/7.30 bnd_aSubsetOf0 W1 W0 =
% 7.68/7.30 (bnd_aSet0 W1 &
% 7.68/7.30 (ALL W2. bnd_aElementOf0 W2 W1 --> bnd_aElementOf0 W2 W0)));
% 7.68/7.30 ALL W0 W1 W2.
% 7.68/7.30 ((bnd_aInteger0 W0 & bnd_aInteger0 W1) & bnd_aInteger0 W2) &
% 7.68/7.30 ~ W2 = bnd_sz00 -->
% 7.68/7.30 bnd_sdteqdtlpzmzozddtrp0 W0 W1 W2 =
% 7.68/7.30 bnd_aDivisorOf0 W2 (bnd_sdtpldt0 W0 (bnd_smndt0 W1));
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aInteger0 W0 -->
% 7.68/7.30 (ALL W1.
% 7.68/7.30 bnd_aDivisorOf0 W1 W0 =
% 7.68/7.30 ((bnd_aInteger0 W1 & ~ W1 = bnd_sz00) &
% 7.68/7.30 (EX W2. bnd_aInteger0 W2 & bnd_sdtasdt0 W1 W2 = W0)));
% 7.68/7.30 bnd_aSet0 bnd_xS &
% 7.68/7.30 (ALL W0.
% 7.68/7.30 bnd_aElementOf0 W0 bnd_xS -->
% 7.68/7.30 bnd_aSubsetOf0 W0 bnd_cS1395 & bnd_isOpen0 W0);
% 7.68/7.30 ALL W0. bnd_aSet0 W0 --> bnd_isFinite0 W0 --> True;
% 7.68/7.30 ALL W0. bnd_aSet0 W0 --> (ALL W1. bnd_aElementOf0 W1 W0 --> True);
% 7.68/7.30 ALL W0. bnd_aSet0 W0 --> True;
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aInteger0 W0 -->
% 7.68/7.30 (EX W1. bnd_aDivisorOf0 W1 W0 & bnd_isPrime0 W1) =
% 7.68/7.30 (~ W0 = bnd_sz10 & ~ W0 = bnd_smndt0 bnd_sz10);
% 7.68/7.30 ALL W0. bnd_aInteger0 W0 & ~ W0 = bnd_sz00 --> bnd_isPrime0 W0 --> True;
% 7.68/7.30 ALL W0 W1 W2 W3.
% 7.68/7.30 ((((bnd_aInteger0 W0 & bnd_aInteger0 W1) & bnd_aInteger0 W2) &
% 7.68/7.30 ~ W2 = bnd_sz00) &
% 7.68/7.30 bnd_aInteger0 W3) &
% 7.68/7.30 ~ W3 = bnd_sz00 -->
% 7.68/7.30 bnd_sdteqdtlpzmzozddtrp0 W0 W1 (bnd_sdtasdt0 W2 W3) -->
% 7.68/7.30 bnd_sdteqdtlpzmzozddtrp0 W0 W1 W2 & bnd_sdteqdtlpzmzozddtrp0 W0 W1 W3;
% 7.68/7.30 ALL W0 W1 W2 W3.
% 7.68/7.30 (((bnd_aInteger0 W0 & bnd_aInteger0 W1) & bnd_aInteger0 W2) &
% 7.68/7.30 ~ W2 = bnd_sz00) &
% 7.68/7.30 bnd_aInteger0 W3 -->
% 7.68/7.30 bnd_sdteqdtlpzmzozddtrp0 W0 W1 W2 &
% 7.68/7.30 bnd_sdteqdtlpzmzozddtrp0 W1 W3 W2 -->
% 7.68/7.30 bnd_sdteqdtlpzmzozddtrp0 W0 W3 W2;
% 7.68/7.30 ALL W0 W1 W2.
% 7.68/7.30 ((bnd_aInteger0 W0 & bnd_aInteger0 W1) & bnd_aInteger0 W2) &
% 7.68/7.30 ~ W2 = bnd_sz00 -->
% 7.68/7.30 bnd_sdteqdtlpzmzozddtrp0 W0 W1 W2 -->
% 7.68/7.30 bnd_sdteqdtlpzmzozddtrp0 W1 W0 W2;
% 7.68/7.30 ALL W0 W1.
% 7.68/7.30 (bnd_aInteger0 W0 & bnd_aInteger0 W1) & ~ W1 = bnd_sz00 -->
% 7.68/7.30 bnd_sdteqdtlpzmzozddtrp0 W0 W0 W1;
% 7.68/7.30 ALL W0 W1.
% 7.68/7.30 bnd_aInteger0 W0 & bnd_aInteger0 W1 -->
% 7.68/7.30 bnd_sdtasdt0 W0 W1 = bnd_sz00 --> W0 = bnd_sz00 | W1 = bnd_sz00;
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aInteger0 W0 -->
% 7.68/7.30 bnd_sdtasdt0 (bnd_smndt0 bnd_sz10) W0 = bnd_smndt0 W0 &
% 7.68/7.30 bnd_smndt0 W0 = bnd_sdtasdt0 W0 (bnd_smndt0 bnd_sz10);
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aInteger0 W0 -->
% 7.68/7.30 bnd_sdtasdt0 W0 bnd_sz00 = bnd_sz00 &
% 7.68/7.30 bnd_sz00 = bnd_sdtasdt0 bnd_sz00 W0;
% 7.68/7.30 ALL W0 W1 W2.
% 7.68/7.30 (bnd_aInteger0 W0 & bnd_aInteger0 W1) & bnd_aInteger0 W2 -->
% 7.68/7.30 bnd_sdtasdt0 W0 (bnd_sdtpldt0 W1 W2) =
% 7.68/7.30 bnd_sdtpldt0 (bnd_sdtasdt0 W0 W1) (bnd_sdtasdt0 W0 W2) &
% 7.68/7.30 bnd_sdtasdt0 (bnd_sdtpldt0 W0 W1) W2 =
% 7.68/7.30 bnd_sdtpldt0 (bnd_sdtasdt0 W0 W2) (bnd_sdtasdt0 W1 W2);
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aInteger0 W0 -->
% 7.68/7.30 bnd_sdtasdt0 W0 bnd_sz10 = W0 & W0 = bnd_sdtasdt0 bnd_sz10 W0;
% 7.68/7.30 ALL W0 W1.
% 7.68/7.30 bnd_aInteger0 W0 & bnd_aInteger0 W1 -->
% 7.68/7.30 bnd_sdtasdt0 W0 W1 = bnd_sdtasdt0 W1 W0;
% 7.68/7.30 ALL W0 W1 W2.
% 7.68/7.30 (bnd_aInteger0 W0 & bnd_aInteger0 W1) & bnd_aInteger0 W2 -->
% 7.68/7.30 bnd_sdtasdt0 W0 (bnd_sdtasdt0 W1 W2) =
% 7.68/7.30 bnd_sdtasdt0 (bnd_sdtasdt0 W0 W1) W2;
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aInteger0 W0 -->
% 7.68/7.30 bnd_sdtpldt0 W0 (bnd_smndt0 W0) = bnd_sz00 &
% 7.68/7.30 bnd_sz00 = bnd_sdtpldt0 (bnd_smndt0 W0) W0;
% 7.68/7.30 ALL W0.
% 7.68/7.30 bnd_aInteger0 W0 -->
% 7.68/7.30 bnd_sdtpldt0 W0 bnd_sz00 = W0 & W0 = bnd_sdtpldt0 bnd_sz00 W0;
% 7.68/7.30 ALL W0 W1.
% 7.68/7.30 bnd_aInteger0 W0 & bnd_aInteger0 W1 -->
% 7.68/7.30 bnd_sdtpldt0 W0 W1 = bnd_sdtpldt0 W1 W0;
% 7.68/7.30 ALL W0 W1 W2.
% 7.68/7.30 (bnd_aInteger0 W0 & bnd_aInteger0 W1) & bnd_aInteger0 W2 -->
% 7.68/7.30 bnd_sdtpldt0 W0 (bnd_sdtpldt0 W1 W2) =
% 7.68/7.30 bnd_sdtpldt0 (bnd_sdtpldt0 W0 W1) W2;
% 7.68/7.30 ALL W0 W1.
% 7.68/7.30 bnd_aInteger0 W0 & bnd_aInteger0 W1 -->
% 7.68/7.30 bnd_aInteger0 (bnd_sdtasdt0 W0 W1);
% 7.68/7.30 ALL W0 W1.
% 7.68/7.30 bnd_aInteger0 W0 & bnd_aInteger0 W1 -->
% 7.68/7.30 bnd_aInteger0 (bnd_sdtpldt0 W0 W1);
% 7.68/7.30 ALL W0. bnd_aInteger0 W0 --> bnd_aInteger0 (bnd_smndt0 W0);
% 7.68/7.30 bnd_aInteger0 bnd_sz10; bnd_aInteger0 bnd_sz00;
% 7.68/7.30 ALL W0. bnd_aInteger0 W0 --> True |]
% 7.68/7.30 ==> bnd_isOpen0 (bnd_sbsmnsldt0 bnd_xS)
% 7.68/7.30 Adding axioms...
% 7.78/7.30 Typedef.type_definition_def
% 13.59/13.12 ...done.
% 13.59/13.13 Ground types: ?'b, TPTP_Interpret.ind
% 13.59/13.13 Translating term (sizes: 1, 1) ...
% 17.40/16.96 Invoking SAT solver...
% 17.40/16.96 No model exists.
% 17.40/16.96 Translating term (sizes: 2, 1) ...
% 22.10/21.60 Invoking SAT solver...
% 22.10/21.60 No model exists.
% 22.10/21.60 Translating term (sizes: 1, 2) ...
% 42.55/42.04 Invoking SAT solver...
% 42.75/42.26 Model found:
% 42.75/42.26 Size of types: ?'b: 1, TPTP_Interpret.ind: 2
% 42.75/42.26 bnd_sz10: ??.TPTP_Interpret.ind1
% 42.75/42.26 bnd_isPrime0: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 42.75/42.26 bnd_isFinite0: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 42.75/42.26 bnd_xS: ??.TPTP_Interpret.ind1
% 42.75/42.26 bnd_sdtasdt0: {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind1)})}
% 42.75/42.26 bnd_smndt0: {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind1)}
% 42.75/42.26 bnd_sdtpldt0: {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind1)})}
% 42.75/42.26 bnd_aDivisorOf0: {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 42.75/42.26 bnd_sdtbsmnsldt0: {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)})}
% 42.75/42.26 bnd_sdtslmnbsdt0: {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)})}
% 42.75/42.26 bnd_sbsmnsldt0: {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind1)}
% 42.75/42.26 bnd_sdteqdtlpzmzozddtrp0: {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})})}
% 42.75/42.26 bnd_aSet0: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 42.75/42.26 bnd_szAzrzSzezqlpdtcmdtrp0: {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)})}
% 42.75/42.26 bnd_sz00: ??.TPTP_Interpret.ind1
% 42.75/42.26 bnd_aInteger0: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 42.75/42.26 bnd_aElementOf0: {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}
% 42.75/42.26 bnd_stldt0: {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 42.75/42.26 (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)}
% 42.75/42.26 bnd_isOpen0: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 42.75/42.26 bnd_isClosed0: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 42.75/42.26 bnd_cS1395: ??.TPTP_Interpret.ind0
% 42.75/42.26 bnd_aSubsetOf0: {(??.TPTP_Interpret.ind0,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 42.75/42.26 (??.TPTP_Interpret.ind1,
% 42.75/42.26 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 42.75/42.26
% 42.75/42.26 % SZS status CounterSatisfiable
%------------------------------------------------------------------------------