%------------------------------------------------------------------------------ % File : ePrincess---1.0 % Problem : NUM925+1 : TPTP v8.1.0. Released v5.3.0. % Transfm : none % Format : tptp:raw % Command : ePrincess-casc -timeout=%d %s % Computer : n029.cluster.edu % Model : x86_64 x86_64 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz % Memory : 8042.1875MB % OS : Linux 3.10.0-693.el7.x86_64 % CPULimit : 300s % WCLimit : 600s % DateTime : Mon Jul 18 08:49:46 EDT 2022 % Result : Theorem 5.13s 1.87s % Output : Proof 7.34s % Verified : % SZS Type : - % Comments : %------------------------------------------------------------------------------ %----WARNING: Could not form TPTP format derivation %------------------------------------------------------------------------------ %----ORIGINAL SYSTEM OUTPUT % 0.03/0.11 % Problem : NUM925+1 : TPTP v8.1.0. Released v5.3.0. % 0.03/0.12 % Command : ePrincess-casc -timeout=%d %s % 0.11/0.32 % Computer : n029.cluster.edu % 0.11/0.32 % Model : x86_64 x86_64 % 0.11/0.32 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz % 0.11/0.32 % Memory : 8042.1875MB % 0.11/0.32 % OS : Linux 3.10.0-693.el7.x86_64 % 0.11/0.32 % CPULimit : 300 % 0.11/0.32 % WCLimit : 600 % 0.11/0.32 % DateTime : Tue Jul 5 06:58:12 EDT 2022 % 0.11/0.32 % CPUTime : % 0.50/0.58 ____ _ % 0.50/0.58 ___ / __ \_____(_)___ ________ __________ % 0.50/0.58 / _ \/ /_/ / ___/ / __ \/ ___/ _ \/ ___/ ___/ % 0.50/0.58 / __/ ____/ / / / / / / /__/ __(__ |__ ) % 0.50/0.58 \___/_/ /_/ /_/_/ /_/\___/\___/____/____/ % 0.50/0.58 % 0.50/0.58 A Theorem Prover for First-Order Logic % 0.50/0.58 (ePrincess v.1.0) % 0.50/0.58 % 0.50/0.58 (c) Philipp Rümmer, 2009-2015 % 0.50/0.58 (c) Peter Backeman, 2014-2015 % 0.50/0.58 (contributions by Angelo Brillout, Peter Baumgartner) % 0.50/0.58 Free software under GNU Lesser General Public License (LGPL). % 0.50/0.58 Bug reports to peter@backeman.se % 0.50/0.59 % 0.50/0.59 For more information, visit http://user.uu.se/~petba168/breu/ % 0.50/0.59 % 0.50/0.59 Loading /export/starexec/sandbox2/benchmark/theBenchmark.p ... % 0.69/0.65 Prover 0: Options: -triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allMaximal -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all % 2.18/1.11 Prover 0: Preprocessing ... % 4.37/1.73 Prover 0: Warning: ignoring some quantifiers % 4.64/1.76 Prover 0: Constructing countermodel ... % 5.13/1.87 Prover 0: proved (1219ms) % 5.13/1.87 % 5.13/1.87 No countermodel exists, formula is valid % 5.13/1.87 % SZS status Theorem for theBenchmark % 5.13/1.87 % 5.13/1.87 Generating proof ... Warning: ignoring some quantifiers % 6.55/2.22 found it (size 6) % 6.55/2.22 % 6.55/2.22 % SZS output start Proof for theBenchmark % 6.55/2.22 Assumed formulas after preprocessing and simplification: % 6.55/2.22 | (0) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : (pls = zero_zero_int & ~ (one_one_int = zero_zero_int) & bit0(v3) = v6 & bit0(v2) = v3 & bit0(zero_zero_int) = zero_zero_int & bit1(zero_zero_int) = v2 & plus_plus_nat(one_one_nat, one_one_nat) = v4 & semiri1621563631at_int(zero_zero_nat) = zero_zero_int & semiri1621563631at_int(one_one_nat) = one_one_int & semiri1621563631at_int(n) = v0 & power_power_nat(zero_zero_nat, v4) = zero_zero_nat & power_power_nat(one_one_nat, v4) = one_one_nat & number_number_of_nat(v6) = v7 & number_number_of_nat(v3) = v4 & number_number_of_nat(v2) = one_one_nat & number_number_of_nat(zero_zero_int) = zero_zero_nat & number_number_of_int(v3) = v5 & number_number_of_int(v2) = one_one_int & number_number_of_int(zero_zero_int) = zero_zero_int & power_power_int(v1, v4) = zero_zero_int & power_power_int(one_one_int, v4) = one_one_int & power_power_int(zero_zero_int, v4) = zero_zero_int & plus_plus_int(one_one_int, v0) = v1 & plus_plus_int(one_one_int, one_one_int) = v5 & ord_less_nat(zero_zero_nat, n) & ord_less_int(one_one_int, t) & ord_less_int(zero_zero_int, v1) & ord_less_int(zero_zero_int, one_one_int) & ~ ord_less_int(zero_zero_int, zero_zero_int) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ! [v13] : ! [v14] : ( ~ (semiri1621563631at_int(v9) = v12) | ~ (semiri1621563631at_int(v8) = v11) | ~ (plus_plus_int(v12, v10) = v13) | ~ (plus_plus_int(v11, v13) = v14) | ? [v15] : ? [v16] : (plus_plus_nat(v8, v9) = v15 & semiri1621563631at_int(v15) = v16 & plus_plus_int(v16, v10) = v14)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ! [v13] : ! [v14] : ( ~ (number_number_of_int(v9) = v12) | ~ (number_number_of_int(v8) = v11) | ~ (plus_plus_int(v12, v10) = v13) | ~ (plus_plus_int(v11, v13) = v14) | ? [v15] : ? [v16] : (number_number_of_int(v15) = v16 & plus_plus_int(v16, v10) = v14 & plus_plus_int(v8, v9) = v15)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ! [v13] : ( ~ (plus_plus_nat(v8, v9) = v11) | ~ (semiri1621563631at_int(v11) = v12) | ~ (plus_plus_int(v12, v10) = v13) | ? [v14] : ? [v15] : ? [v16] : (semiri1621563631at_int(v9) = v15 & semiri1621563631at_int(v8) = v14 & plus_plus_int(v15, v10) = v16 & plus_plus_int(v14, v16) = v13)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ! [v13] : ( ~ (number_number_of_int(v11) = v12) | ~ (plus_plus_int(v12, v10) = v13) | ~ (plus_plus_int(v8, v9) = v11) | ? [v14] : ? [v15] : ? [v16] : (number_number_of_int(v9) = v15 & number_number_of_int(v8) = v14 & plus_plus_int(v15, v10) = v16 & plus_plus_int(v14, v16) = v13)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : (v12 = v11 | ~ (plus_plus_nat(v10, v11) = v12) | ~ (number_number_of_nat(v9) = v10) | ~ (number_number_of_nat(v8) = v11) | ~ ord_less_int(v9, zero_zero_int)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : (v12 = v10 | ~ (plus_plus_nat(v10, v11) = v12) | ~ (number_number_of_nat(v9) = v10) | ~ (number_number_of_nat(v8) = v11) | ~ ord_less_int(v8, zero_zero_int) | ord_less_int(v9, zero_zero_int)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : (v9 = zero_zero_int | ~ (power_power_int(v9, v4) = v11) | ~ (power_power_int(v8, v4) = v10) | ~ (plus_plus_int(v10, v11) = v12) | ord_less_int(zero_zero_int, v12)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : (v8 = zero_zero_int | ~ (power_power_int(v9, v4) = v11) | ~ (power_power_int(v8, v4) = v10) | ~ (plus_plus_int(v10, v11) = v12) | ord_less_int(zero_zero_int, v12)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (bit0(v9) = v11) | ~ (bit0(v8) = v10) | ~ (plus_plus_int(v10, v11) = v12) | ? [v13] : (bit0(v13) = v12 & plus_plus_int(v8, v9) = v13)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (bit0(v9) = v11) | ~ (bit1(v8) = v10) | ~ (plus_plus_int(v10, v11) = v12) | ? [v13] : (bit1(v13) = v12 & plus_plus_int(v8, v9) = v13)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (bit0(v8) = v10) | ~ (bit1(v9) = v11) | ~ (plus_plus_int(v10, v11) = v12) | ? [v13] : (bit1(v13) = v12 & plus_plus_int(v8, v9) = v13)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (plus_plus_nat(v10, v11) = v12) | ~ (number_number_of_nat(v9) = v10) | ~ (number_number_of_nat(v8) = v11) | ord_less_int(v9, zero_zero_int) | ord_less_int(v8, zero_zero_int) | ? [v13] : (number_number_of_nat(v13) = v12 & plus_plus_int(v9, v8) = v13)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (semiri1621563631at_int(v9) = v11) | ~ (semiri1621563631at_int(v8) = v10) | ~ (plus_plus_int(v10, v11) = v12) | ? [v13] : (plus_plus_nat(v8, v9) = v13 & semiri1621563631at_int(v13) = v12)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (number_number_of_int(v9) = v11) | ~ (number_number_of_int(v8) = v10) | ~ (plus_plus_int(v10, v11) = v12) | ? [v13] : (number_number_of_int(v13) = v12 & plus_plus_int(v8, v9) = v13)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (plus_plus_int(v11, v10) = v12) | ~ (plus_plus_int(v8, v9) = v11) | ? [v13] : (plus_plus_int(v9, v10) = v13 & plus_plus_int(v8, v13) = v12)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (plus_plus_int(v10, v8) = v12) | ~ (plus_plus_int(v9, v8) = v11) | ~ ord_less_int(v9, v10) | ord_less_int(v11, v12)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (plus_plus_int(v9, v11) = v12) | ~ (plus_plus_int(v8, v10) = v11) | ? [v13] : (plus_plus_int(v9, v10) = v13 & plus_plus_int(v8, v13) = v12)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (plus_plus_int(v9, v10) = v11) | ~ (plus_plus_int(v8, v11) = v12) | ? [v13] : (plus_plus_int(v13, v10) = v12 & plus_plus_int(v8, v9) = v13)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ! [v12] : ( ~ (plus_plus_int(v9, v10) = v11) | ~ (plus_plus_int(v8, v11) = v12) | ? [v13] : (plus_plus_int(v9, v13) = v12 & plus_plus_int(v8, v10) = v13)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : (v9 = v8 | ~ (plus_plus_nat(v11, v10) = v9) | ~ (plus_plus_nat(v11, v10) = v8)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : (v9 = v8 | ~ (power_power_nat(v11, v10) = v9) | ~ (power_power_nat(v11, v10) = v8)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : (v9 = v8 | ~ (power_power_int(v11, v10) = v9) | ~ (power_power_int(v11, v10) = v8)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : (v9 = v8 | ~ (plus_plus_int(v11, v10) = v9) | ~ (plus_plus_int(v11, v10) = v8)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : (v9 = zero_zero_int | ~ (power_power_int(v9, v4) = v11) | ~ (power_power_int(v8, v4) = v10) | ~ (plus_plus_int(v10, v11) = zero_zero_int)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : (v8 = zero_zero_int | ~ (power_power_int(v9, v4) = v11) | ~ (power_power_int(v8, v4) = v10) | ~ (plus_plus_int(v10, v11) = zero_zero_int)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ( ~ (bit0(v9) = v11) | ~ (bit0(v8) = v10) | ~ ord_less_int(v10, v11) | ord_less_int(v8, v9)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ( ~ (bit0(v9) = v11) | ~ (bit0(v8) = v10) | ~ ord_less_int(v8, v9) | ord_less_int(v10, v11)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ( ~ (bit0(v9) = v11) | ~ (bit1(v8) = v10) | ~ ord_less_int(v10, v11) | ord_less_int(v8, v9)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ( ~ (bit0(v9) = v11) | ~ (bit1(v8) = v10) | ~ ord_less_int(v8, v9) | ord_less_int(v10, v11)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ( ~ (bit1(v9) = v11) | ~ (bit1(v8) = v10) | ~ ord_less_int(v10, v11) | ord_less_int(v8, v9)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ( ~ (bit1(v9) = v11) | ~ (bit1(v8) = v10) | ~ ord_less_int(v8, v9) | ord_less_int(v10, v11)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ( ~ (semiri1621563631at_int(v8) = v10) | ~ (power_power_int(v10, v9) = v11) | ? [v12] : (semiri1621563631at_int(v12) = v11 & power_power_nat(v8, v9) = v12)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ( ~ (number_number_of_int(v9) = v11) | ~ (number_number_of_int(v8) = v10) | ~ ord_less_int(v10, v11) | ord_less_int(v8, v9)) & ! [v8] : ! [v9] : ! [v10] : ! [v11] : ( ~ (number_number_of_int(v9) = v11) | ~ (number_number_of_int(v8) = v10) | ~ ord_less_int(v8, v9) | ord_less_int(v10, v11)) & ! [v8] : ! [v9] : ! [v10] : (v10 = v9 | ~ (bit0(v8) = v10) | ~ (bit0(v8) = v9)) & ! [v8] : ! [v9] : ! [v10] : (v10 = v9 | ~ (bit1(v8) = v10) | ~ (bit1(v8) = v9)) & ! [v8] : ! [v9] : ! [v10] : (v10 = v9 | ~ (semiri1621563631at_int(v8) = v10) | ~ (semiri1621563631at_int(v8) = v9)) & ! [v8] : ! [v9] : ! [v10] : (v10 = v9 | ~ (number_number_of_int(v8) = v10) | ~ (number_number_of_int(v8) = v9)) & ! [v8] : ! [v9] : ! [v10] : (v10 = zero_zero_nat | v9 = zero_zero_nat | ~ (power_power_nat(zero_zero_nat, v9) = v10) | ~ (number_number_of_nat(v8) = v9)) & ! [v8] : ! [v9] : ! [v10] : (v10 = zero_zero_int | v9 = zero_zero_nat | ~ (number_number_of_nat(v8) = v9) | ~ (power_power_int(zero_zero_int, v9) = v10)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (semiri984289939at_nat(v10) = v9) | ~ (semiri984289939at_nat(v10) = v8)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (bit0(v10) = v9) | ~ (bit0(v10) = v8)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (bit0(v9) = v10) | ~ (bit0(v8) = v10)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (bit1(v10) = v9) | ~ (bit1(v10) = v8)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (bit1(v9) = v10) | ~ (bit1(v8) = v10)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (semiri1621563631at_int(v10) = v9) | ~ (semiri1621563631at_int(v10) = v8)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (semiri1621563631at_int(v9) = v10) | ~ (semiri1621563631at_int(v8) = v10)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (number_number_of_nat(v10) = v9) | ~ (number_number_of_nat(v10) = v8)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (number_number_of_int(v10) = v9) | ~ (number_number_of_int(v10) = v8)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (number_number_of_int(v9) = v10) | ~ (number_number_of_int(v8) = v10)) & ! [v8] : ! [v9] : ! [v10] : (v9 = v8 | ~ (plus_plus_int(v9, one_one_int) = v10) | ~ ord_less_int(v8, v10) | ord_less_int(v8, v9)) & ! [v8] : ! [v9] : ! [v10] : (v8 = zero_zero_nat | ~ (power_power_nat(v8, v10) = zero_zero_nat) | ~ (number_number_of_nat(v9) = v10)) & ! [v8] : ! [v9] : ! [v10] : (v8 = zero_zero_int | ~ (number_number_of_nat(v9) = v10) | ~ (power_power_int(v8, v10) = zero_zero_int)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (bit0(v9) = v10) | ~ (bit1(v8) = v10)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (bit0(v8) = v10) | ~ (bit1(v9) = v10)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_nat(v8, v9) = v10) | ? [v11] : ? [v12] : ? [v13] : (semiri1621563631at_int(v10) = v13 & semiri1621563631at_int(v9) = v12 & semiri1621563631at_int(v8) = v11 & plus_plus_int(v11, v12) = v13)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (power_power_nat(v8, v9) = v10) | ? [v11] : ? [v12] : (semiri1621563631at_int(v10) = v12 & semiri1621563631at_int(v8) = v11 & power_power_int(v11, v9) = v12)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (power_power_nat(v8, v9) = v10) | ? [v11] : ? [v12] : (semiri1621563631at_int(v10) = v11 & semiri1621563631at_int(v8) = v12 & power_power_int(v12, v9) = v11)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v9, v8) = v10) | ~ (plus_plus_int(one_one_int, v8) = v9) | ~ ord_less_int(v10, zero_zero_int) | ord_less_int(v8, zero_zero_int)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v9, v8) = v10) | ~ (plus_plus_int(one_one_int, v8) = v9) | ~ ord_less_int(v8, zero_zero_int) | ord_less_int(v10, zero_zero_int)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v9, v8) = v10) | ~ (plus_plus_int(one_one_int, v8) = v9) | bit1(v8) = v10) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v9, v8) = v10) | plus_plus_int(v8, v9) = v10) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v9, v8) = v10) | ord_less_int(v9, zero_zero_int) | ? [v11] : ? [v12] : ? [v13] : ? [v14] : (plus_plus_nat(v11, v12) = v13 & number_number_of_nat(v10) = v14 & number_number_of_nat(v9) = v11 & number_number_of_nat(v8) = v12 & (v14 = v13 | ord_less_int(v8, zero_zero_int)) & (v13 = v11 | ~ ord_less_int(v8, zero_zero_int)))) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v9, one_one_int) = v10) | ~ ord_less_int(v8, v9) | ord_less_int(v8, v10)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v8, v9) = v10) | plus_plus_int(v9, v8) = v10) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v8, v9) = v10) | ? [v11] : ? [v12] : ? [v13] : (bit0(v10) = v13 & bit0(v9) = v12 & bit0(v8) = v11 & plus_plus_int(v11, v12) = v13)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v8, v9) = v10) | ? [v11] : ? [v12] : ? [v13] : (bit0(v9) = v12 & bit1(v10) = v13 & bit1(v8) = v11 & plus_plus_int(v11, v12) = v13)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v8, v9) = v10) | ? [v11] : ? [v12] : ? [v13] : (bit0(v8) = v11 & bit1(v10) = v13 & bit1(v9) = v12 & plus_plus_int(v11, v12) = v13)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v8, v9) = v10) | ? [v11] : ? [v12] : ? [v13] : (number_number_of_int(v10) = v13 & number_number_of_int(v9) = v12 & number_number_of_int(v8) = v11 & plus_plus_int(v11, v12) = v13)) & ! [v8] : ! [v9] : ! [v10] : ( ~ (plus_plus_int(v8, v9) = v10) | ? [v11] : ? [v12] : ? [v13] : (number_number_of_int(v10) = v11 & number_number_of_int(v9) = v13 & number_number_of_int(v8) = v12 & plus_plus_int(v12, v13) = v11)) & ! [v8] : ! [v9] : (v9 = v8 | ~ (plus_plus_int(v8, zero_zero_int) = v9)) & ! [v8] : ! [v9] : (v9 = v8 | ~ (plus_plus_int(zero_zero_int, v8) = v9)) & ! [v8] : ! [v9] : (v9 = zero_zero_nat | ~ (number_number_of_nat(v8) = v9) | power_power_nat(zero_zero_nat, v9) = zero_zero_nat) & ! [v8] : ! [v9] : (v9 = zero_zero_nat | ~ (number_number_of_nat(v8) = v9) | power_power_int(zero_zero_int, v9) = zero_zero_int) & ! [v8] : ! [v9] : (v8 = zero_zero_int | ~ (power_power_int(v8, v4) = v9) | ord_less_int(zero_zero_int, v9)) & ! [v8] : ! [v9] : ( ~ (semiri984289939at_nat(v8) = v9) | ? [v10] : (semiri1621563631at_int(v8) = v10 & number_number_of_nat(v10) = v9)) & ! [v8] : ! [v9] : ( ~ (bit0(v8) = v9) | ~ ord_less_int(v9, zero_zero_int) | ord_less_int(v8, zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (bit0(v8) = v9) | ~ ord_less_int(v8, zero_zero_int) | ord_less_int(v9, zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (bit0(v8) = v9) | ~ ord_less_int(zero_zero_int, v9) | ord_less_int(zero_zero_int, v8)) & ! [v8] : ! [v9] : ( ~ (bit0(v8) = v9) | ~ ord_less_int(zero_zero_int, v8) | ord_less_int(zero_zero_int, v9)) & ! [v8] : ! [v9] : ( ~ (bit0(v8) = v9) | plus_plus_int(v8, v8) = v9) & ! [v8] : ! [v9] : ( ~ (bit1(v8) = v9) | ~ ord_less_int(v9, zero_zero_int) | ord_less_int(v8, zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (bit1(v8) = v9) | ~ ord_less_int(v8, zero_zero_int) | ord_less_int(v9, zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (bit1(v8) = v9) | ? [v10] : (plus_plus_int(v10, v8) = v9 & plus_plus_int(one_one_int, v8) = v10)) & ! [v8] : ! [v9] : ( ~ (semiri1621563631at_int(v8) = v9) | ~ ord_less_int(v9, zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (semiri1621563631at_int(v8) = v9) | number_number_of_int(v9) = v9) & ! [v8] : ! [v9] : ( ~ (semiri1621563631at_int(v8) = v9) | ? [v10] : (semiri984289939at_nat(v8) = v10 & number_number_of_nat(v9) = v10)) & ! [v8] : ! [v9] : ( ~ (power_power_nat(v8, zero_zero_nat) = zero_zero_nat) | ~ (number_number_of_nat(v9) = zero_zero_nat)) & ! [v8] : ! [v9] : ( ~ (number_number_of_nat(v9) = zero_zero_nat) | ~ (power_power_int(v8, zero_zero_nat) = zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (number_number_of_int(v8) = v9) | ~ ord_less_int(v9, one_one_int) | ord_less_int(v8, v2)) & ! [v8] : ! [v9] : ( ~ (number_number_of_int(v8) = v9) | ~ ord_less_int(v9, zero_zero_int) | ord_less_int(v8, zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (number_number_of_int(v8) = v9) | ~ ord_less_int(v8, v2) | ord_less_int(v9, one_one_int)) & ! [v8] : ! [v9] : ( ~ (number_number_of_int(v8) = v9) | ~ ord_less_int(v8, zero_zero_int) | ord_less_int(v9, zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (number_number_of_int(v8) = v9) | ~ ord_less_int(v2, v8) | ord_less_int(one_one_int, v9)) & ! [v8] : ! [v9] : ( ~ (number_number_of_int(v8) = v9) | ~ ord_less_int(one_one_int, v9) | ord_less_int(v2, v8)) & ! [v8] : ! [v9] : ( ~ (number_number_of_int(v8) = v9) | ~ ord_less_int(zero_zero_int, v9) | ord_less_int(zero_zero_int, v8)) & ! [v8] : ! [v9] : ( ~ (number_number_of_int(v8) = v9) | ~ ord_less_int(zero_zero_int, v8) | ord_less_int(zero_zero_int, v9)) & ! [v8] : ! [v9] : ( ~ (number_number_of_int(v8) = v9) | ? [v10] : ? [v11] : (number_number_of_int(v11) = v10 & plus_plus_int(v9, one_one_int) = v10 & plus_plus_int(v8, v2) = v11)) & ! [v8] : ! [v9] : ( ~ (number_number_of_int(v8) = v9) | ? [v10] : ? [v11] : (number_number_of_int(v11) = v10 & plus_plus_int(v2, v8) = v11 & plus_plus_int(one_one_int, v9) = v10)) & ! [v8] : ! [v9] : ( ~ (power_power_int(v8, v7) = v9) | ? [v10] : (power_power_int(v10, v4) = v9 & power_power_int(v8, v4) = v10)) & ! [v8] : ! [v9] : ( ~ (power_power_int(v8, v4) = v9) | ~ ord_less_int(v9, zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (power_power_int(v8, v4) = v9) | ? [v10] : (power_power_int(v9, v4) = v10 & power_power_int(v8, v7) = v10)) & ! [v8] : ! [v9] : ( ~ (plus_plus_int(v9, v8) = zero_zero_int) | ~ (plus_plus_int(one_one_int, v8) = v9)) & ! [v8] : ! [v9] : ( ~ (plus_plus_int(v8, v8) = v9) | ~ ord_less_int(v9, zero_zero_int) | ord_less_int(v8, zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (plus_plus_int(v8, v8) = v9) | ~ ord_less_int(v8, zero_zero_int) | ord_less_int(v9, zero_zero_int)) & ! [v8] : ! [v9] : ( ~ (plus_plus_int(v8, v8) = v9) | bit0(v8) = v9) & ! [v8] : ! [v9] : ( ~ (plus_plus_int(v8, v2) = v9) | ? [v10] : ? [v11] : (number_number_of_int(v9) = v11 & number_number_of_int(v8) = v10 & plus_plus_int(v10, one_one_int) = v11)) & ! [v8] : ! [v9] : ( ~ (plus_plus_int(v8, one_one_int) = v9) | ord_less_int(v8, v9)) & ! [v8] : ! [v9] : ( ~ (plus_plus_int(v2, v8) = v9) | ? [v10] : ? [v11] : (number_number_of_int(v9) = v11 & number_number_of_int(v8) = v10 & plus_plus_int(one_one_int, v10) = v11)) & ! [v8] : (v8 = zero_zero_nat | ~ (semiri1621563631at_int(v8) = zero_zero_int)) & ! [v8] : (v8 = zero_zero_int | ~ (bit0(v8) = zero_zero_int)) & ! [v8] : (v8 = zero_zero_int | ~ (power_power_int(v8, v4) = zero_zero_int)) & ! [v8] : (v8 = zero_zero_int | ~ (plus_plus_int(v8, v8) = zero_zero_int)) & ! [v8] : (v8 = zero_zero_int | ~ (plus_plus_int(zero_zero_int, zero_zero_int) = v8)) & ! [v8] : ~ (bit1(v8) = zero_zero_int) & ! [v8] : ( ~ (number_number_of_nat(v8) = zero_zero_nat) | power_power_nat(zero_zero_nat, zero_zero_nat) = one_one_nat) & ! [v8] : ( ~ (number_number_of_nat(v8) = zero_zero_nat) | power_power_int(zero_zero_int, zero_zero_nat) = one_one_int) & ! [v8] : ( ~ (plus_plus_int(zero_zero_int, zero_zero_int) = v8) | ~ ord_less_int(zero_zero_int, v8)) & ? [v8] : ? [v9] : (v9 = v8 | ord_less_int(v9, v8) | ord_less_int(v8, v9))) % 6.88/2.28 | Instantiating (0) with all_0_0_0, all_0_1_1, all_0_2_2, all_0_3_3, all_0_4_4, all_0_5_5, all_0_6_6, all_0_7_7 yields: % 6.88/2.28 | (1) pls = zero_zero_int & ~ (one_one_int = zero_zero_int) & bit0(all_0_4_4) = all_0_1_1 & bit0(all_0_5_5) = all_0_4_4 & bit0(zero_zero_int) = zero_zero_int & bit1(zero_zero_int) = all_0_5_5 & plus_plus_nat(one_one_nat, one_one_nat) = all_0_3_3 & semiri1621563631at_int(zero_zero_nat) = zero_zero_int & semiri1621563631at_int(one_one_nat) = one_one_int & semiri1621563631at_int(n) = all_0_7_7 & power_power_nat(zero_zero_nat, all_0_3_3) = zero_zero_nat & power_power_nat(one_one_nat, all_0_3_3) = one_one_nat & number_number_of_nat(all_0_1_1) = all_0_0_0 & number_number_of_nat(all_0_4_4) = all_0_3_3 & number_number_of_nat(all_0_5_5) = one_one_nat & number_number_of_nat(zero_zero_int) = zero_zero_nat & number_number_of_int(all_0_4_4) = all_0_2_2 & number_number_of_int(all_0_5_5) = one_one_int & number_number_of_int(zero_zero_int) = zero_zero_int & power_power_int(all_0_6_6, all_0_3_3) = zero_zero_int & power_power_int(one_one_int, all_0_3_3) = one_one_int & power_power_int(zero_zero_int, all_0_3_3) = zero_zero_int & plus_plus_int(one_one_int, all_0_7_7) = all_0_6_6 & plus_plus_int(one_one_int, one_one_int) = all_0_2_2 & ord_less_nat(zero_zero_nat, n) & ord_less_int(one_one_int, t) & ord_less_int(zero_zero_int, all_0_6_6) & ord_less_int(zero_zero_int, one_one_int) & ~ ord_less_int(zero_zero_int, zero_zero_int) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ( ~ (semiri1621563631at_int(v1) = v4) | ~ (semiri1621563631at_int(v0) = v3) | ~ (plus_plus_int(v4, v2) = v5) | ~ (plus_plus_int(v3, v5) = v6) | ? [v7] : ? [v8] : (plus_plus_nat(v0, v1) = v7 & semiri1621563631at_int(v7) = v8 & plus_plus_int(v8, v2) = v6)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ( ~ (number_number_of_int(v1) = v4) | ~ (number_number_of_int(v0) = v3) | ~ (plus_plus_int(v4, v2) = v5) | ~ (plus_plus_int(v3, v5) = v6) | ? [v7] : ? [v8] : (number_number_of_int(v7) = v8 & plus_plus_int(v8, v2) = v6 & plus_plus_int(v0, v1) = v7)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (plus_plus_nat(v0, v1) = v3) | ~ (semiri1621563631at_int(v3) = v4) | ~ (plus_plus_int(v4, v2) = v5) | ? [v6] : ? [v7] : ? [v8] : (semiri1621563631at_int(v1) = v7 & semiri1621563631at_int(v0) = v6 & plus_plus_int(v7, v2) = v8 & plus_plus_int(v6, v8) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (number_number_of_int(v3) = v4) | ~ (plus_plus_int(v4, v2) = v5) | ~ (plus_plus_int(v0, v1) = v3) | ? [v6] : ? [v7] : ? [v8] : (number_number_of_int(v1) = v7 & number_number_of_int(v0) = v6 & plus_plus_int(v7, v2) = v8 & plus_plus_int(v6, v8) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = v3 | ~ (plus_plus_nat(v2, v3) = v4) | ~ (number_number_of_nat(v1) = v2) | ~ (number_number_of_nat(v0) = v3) | ~ ord_less_int(v1, zero_zero_int)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = v2 | ~ (plus_plus_nat(v2, v3) = v4) | ~ (number_number_of_nat(v1) = v2) | ~ (number_number_of_nat(v0) = v3) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v1, zero_zero_int)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v1 = zero_zero_int | ~ (power_power_int(v1, all_0_3_3) = v3) | ~ (power_power_int(v0, all_0_3_3) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ord_less_int(zero_zero_int, v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v0 = zero_zero_int | ~ (power_power_int(v1, all_0_3_3) = v3) | ~ (power_power_int(v0, all_0_3_3) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ord_less_int(zero_zero_int, v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (bit0(v1) = v3) | ~ (bit0(v0) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ? [v5] : (bit0(v5) = v4 & plus_plus_int(v0, v1) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (bit0(v1) = v3) | ~ (bit1(v0) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ? [v5] : (bit1(v5) = v4 & plus_plus_int(v0, v1) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (bit0(v0) = v2) | ~ (bit1(v1) = v3) | ~ (plus_plus_int(v2, v3) = v4) | ? [v5] : (bit1(v5) = v4 & plus_plus_int(v0, v1) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_nat(v2, v3) = v4) | ~ (number_number_of_nat(v1) = v2) | ~ (number_number_of_nat(v0) = v3) | ord_less_int(v1, zero_zero_int) | ord_less_int(v0, zero_zero_int) | ? [v5] : (number_number_of_nat(v5) = v4 & plus_plus_int(v1, v0) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (semiri1621563631at_int(v1) = v3) | ~ (semiri1621563631at_int(v0) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ? [v5] : (plus_plus_nat(v0, v1) = v5 & semiri1621563631at_int(v5) = v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (number_number_of_int(v1) = v3) | ~ (number_number_of_int(v0) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ? [v5] : (number_number_of_int(v5) = v4 & plus_plus_int(v0, v1) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_int(v3, v2) = v4) | ~ (plus_plus_int(v0, v1) = v3) | ? [v5] : (plus_plus_int(v1, v2) = v5 & plus_plus_int(v0, v5) = v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_int(v2, v0) = v4) | ~ (plus_plus_int(v1, v0) = v3) | ~ ord_less_int(v1, v2) | ord_less_int(v3, v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_int(v1, v3) = v4) | ~ (plus_plus_int(v0, v2) = v3) | ? [v5] : (plus_plus_int(v1, v2) = v5 & plus_plus_int(v0, v5) = v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_int(v1, v2) = v3) | ~ (plus_plus_int(v0, v3) = v4) | ? [v5] : (plus_plus_int(v5, v2) = v4 & plus_plus_int(v0, v1) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_int(v1, v2) = v3) | ~ (plus_plus_int(v0, v3) = v4) | ? [v5] : (plus_plus_int(v1, v5) = v4 & plus_plus_int(v0, v2) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (plus_plus_nat(v3, v2) = v1) | ~ (plus_plus_nat(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (power_power_nat(v3, v2) = v1) | ~ (power_power_nat(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (power_power_int(v3, v2) = v1) | ~ (power_power_int(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (plus_plus_int(v3, v2) = v1) | ~ (plus_plus_int(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = zero_zero_int | ~ (power_power_int(v1, all_0_3_3) = v3) | ~ (power_power_int(v0, all_0_3_3) = v2) | ~ (plus_plus_int(v2, v3) = zero_zero_int)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v0 = zero_zero_int | ~ (power_power_int(v1, all_0_3_3) = v3) | ~ (power_power_int(v0, all_0_3_3) = v2) | ~ (plus_plus_int(v2, v3) = zero_zero_int)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit0(v1) = v3) | ~ (bit0(v0) = v2) | ~ ord_less_int(v2, v3) | ord_less_int(v0, v1)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit0(v1) = v3) | ~ (bit0(v0) = v2) | ~ ord_less_int(v0, v1) | ord_less_int(v2, v3)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit0(v1) = v3) | ~ (bit1(v0) = v2) | ~ ord_less_int(v2, v3) | ord_less_int(v0, v1)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit0(v1) = v3) | ~ (bit1(v0) = v2) | ~ ord_less_int(v0, v1) | ord_less_int(v2, v3)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit1(v1) = v3) | ~ (bit1(v0) = v2) | ~ ord_less_int(v2, v3) | ord_less_int(v0, v1)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit1(v1) = v3) | ~ (bit1(v0) = v2) | ~ ord_less_int(v0, v1) | ord_less_int(v2, v3)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (semiri1621563631at_int(v0) = v2) | ~ (power_power_int(v2, v1) = v3) | ? [v4] : (semiri1621563631at_int(v4) = v3 & power_power_nat(v0, v1) = v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (number_number_of_int(v1) = v3) | ~ (number_number_of_int(v0) = v2) | ~ ord_less_int(v2, v3) | ord_less_int(v0, v1)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (number_number_of_int(v1) = v3) | ~ (number_number_of_int(v0) = v2) | ~ ord_less_int(v0, v1) | ord_less_int(v2, v3)) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (bit0(v0) = v2) | ~ (bit0(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (bit1(v0) = v2) | ~ (bit1(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (semiri1621563631at_int(v0) = v2) | ~ (semiri1621563631at_int(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (number_number_of_int(v0) = v2) | ~ (number_number_of_int(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = zero_zero_nat | v1 = zero_zero_nat | ~ (power_power_nat(zero_zero_nat, v1) = v2) | ~ (number_number_of_nat(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = zero_zero_int | v1 = zero_zero_nat | ~ (number_number_of_nat(v0) = v1) | ~ (power_power_int(zero_zero_int, v1) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (semiri984289939at_nat(v2) = v1) | ~ (semiri984289939at_nat(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (bit0(v2) = v1) | ~ (bit0(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (bit0(v1) = v2) | ~ (bit0(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (bit1(v2) = v1) | ~ (bit1(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (bit1(v1) = v2) | ~ (bit1(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (semiri1621563631at_int(v2) = v1) | ~ (semiri1621563631at_int(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (semiri1621563631at_int(v1) = v2) | ~ (semiri1621563631at_int(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (number_number_of_nat(v2) = v1) | ~ (number_number_of_nat(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (number_number_of_int(v2) = v1) | ~ (number_number_of_int(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (number_number_of_int(v1) = v2) | ~ (number_number_of_int(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (plus_plus_int(v1, one_one_int) = v2) | ~ ord_less_int(v0, v2) | ord_less_int(v0, v1)) & ! [v0] : ! [v1] : ! [v2] : (v0 = zero_zero_nat | ~ (power_power_nat(v0, v2) = zero_zero_nat) | ~ (number_number_of_nat(v1) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v0 = zero_zero_int | ~ (number_number_of_nat(v1) = v2) | ~ (power_power_int(v0, v2) = zero_zero_int)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (bit0(v1) = v2) | ~ (bit1(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (bit0(v0) = v2) | ~ (bit1(v1) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_nat(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (semiri1621563631at_int(v2) = v5 & semiri1621563631at_int(v1) = v4 & semiri1621563631at_int(v0) = v3 & plus_plus_int(v3, v4) = v5)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (power_power_nat(v0, v1) = v2) | ? [v3] : ? [v4] : (semiri1621563631at_int(v2) = v4 & semiri1621563631at_int(v0) = v3 & power_power_int(v3, v1) = v4)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (power_power_nat(v0, v1) = v2) | ? [v3] : ? [v4] : (semiri1621563631at_int(v2) = v3 & semiri1621563631at_int(v0) = v4 & power_power_int(v4, v1) = v3)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, v0) = v2) | ~ (plus_plus_int(one_one_int, v0) = v1) | ~ ord_less_int(v2, zero_zero_int) | ord_less_int(v0, zero_zero_int)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, v0) = v2) | ~ (plus_plus_int(one_one_int, v0) = v1) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v2, zero_zero_int)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, v0) = v2) | ~ (plus_plus_int(one_one_int, v0) = v1) | bit1(v0) = v2) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, v0) = v2) | plus_plus_int(v0, v1) = v2) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, v0) = v2) | ord_less_int(v1, zero_zero_int) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : (plus_plus_nat(v3, v4) = v5 & number_number_of_nat(v2) = v6 & number_number_of_nat(v1) = v3 & number_number_of_nat(v0) = v4 & (v6 = v5 | ord_less_int(v0, zero_zero_int)) & (v5 = v3 | ~ ord_less_int(v0, zero_zero_int)))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, one_one_int) = v2) | ~ ord_less_int(v0, v1) | ord_less_int(v0, v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | plus_plus_int(v1, v0) = v2) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (bit0(v2) = v5 & bit0(v1) = v4 & bit0(v0) = v3 & plus_plus_int(v3, v4) = v5)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (bit0(v1) = v4 & bit1(v2) = v5 & bit1(v0) = v3 & plus_plus_int(v3, v4) = v5)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (bit0(v0) = v3 & bit1(v2) = v5 & bit1(v1) = v4 & plus_plus_int(v3, v4) = v5)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (number_number_of_int(v2) = v5 & number_number_of_int(v1) = v4 & number_number_of_int(v0) = v3 & plus_plus_int(v3, v4) = v5)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (number_number_of_int(v2) = v3 & number_number_of_int(v1) = v5 & number_number_of_int(v0) = v4 & plus_plus_int(v4, v5) = v3)) & ! [v0] : ! [v1] : (v1 = v0 | ~ (plus_plus_int(v0, zero_zero_int) = v1)) & ! [v0] : ! [v1] : (v1 = v0 | ~ (plus_plus_int(zero_zero_int, v0) = v1)) & ! [v0] : ! [v1] : (v1 = zero_zero_nat | ~ (number_number_of_nat(v0) = v1) | power_power_nat(zero_zero_nat, v1) = zero_zero_nat) & ! [v0] : ! [v1] : (v1 = zero_zero_nat | ~ (number_number_of_nat(v0) = v1) | power_power_int(zero_zero_int, v1) = zero_zero_int) & ! [v0] : ! [v1] : (v0 = zero_zero_int | ~ (power_power_int(v0, all_0_3_3) = v1) | ord_less_int(zero_zero_int, v1)) & ! [v0] : ! [v1] : ( ~ (semiri984289939at_nat(v0) = v1) | ? [v2] : (semiri1621563631at_int(v0) = v2 & number_number_of_nat(v2) = v1)) & ! [v0] : ! [v1] : ( ~ (bit0(v0) = v1) | ~ ord_less_int(v1, zero_zero_int) | ord_less_int(v0, zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (bit0(v0) = v1) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v1, zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (bit0(v0) = v1) | ~ ord_less_int(zero_zero_int, v1) | ord_less_int(zero_zero_int, v0)) & ! [v0] : ! [v1] : ( ~ (bit0(v0) = v1) | ~ ord_less_int(zero_zero_int, v0) | ord_less_int(zero_zero_int, v1)) & ! [v0] : ! [v1] : ( ~ (bit0(v0) = v1) | plus_plus_int(v0, v0) = v1) & ! [v0] : ! [v1] : ( ~ (bit1(v0) = v1) | ~ ord_less_int(v1, zero_zero_int) | ord_less_int(v0, zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (bit1(v0) = v1) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v1, zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (bit1(v0) = v1) | ? [v2] : (plus_plus_int(v2, v0) = v1 & plus_plus_int(one_one_int, v0) = v2)) & ! [v0] : ! [v1] : ( ~ (semiri1621563631at_int(v0) = v1) | ~ ord_less_int(v1, zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (semiri1621563631at_int(v0) = v1) | number_number_of_int(v1) = v1) & ! [v0] : ! [v1] : ( ~ (semiri1621563631at_int(v0) = v1) | ? [v2] : (semiri984289939at_nat(v0) = v2 & number_number_of_nat(v1) = v2)) & ! [v0] : ! [v1] : ( ~ (power_power_nat(v0, zero_zero_nat) = zero_zero_nat) | ~ (number_number_of_nat(v1) = zero_zero_nat)) & ! [v0] : ! [v1] : ( ~ (number_number_of_nat(v1) = zero_zero_nat) | ~ (power_power_int(v0, zero_zero_nat) = zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(v1, one_one_int) | ord_less_int(v0, all_0_5_5)) & ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(v1, zero_zero_int) | ord_less_int(v0, zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(v0, all_0_5_5) | ord_less_int(v1, one_one_int)) & ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v1, zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(all_0_5_5, v0) | ord_less_int(one_one_int, v1)) & ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(one_one_int, v1) | ord_less_int(all_0_5_5, v0)) & ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(zero_zero_int, v1) | ord_less_int(zero_zero_int, v0)) & ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(zero_zero_int, v0) | ord_less_int(zero_zero_int, v1)) & ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ? [v2] : ? [v3] : (number_number_of_int(v3) = v2 & plus_plus_int(v1, one_one_int) = v2 & plus_plus_int(v0, all_0_5_5) = v3)) & ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ? [v2] : ? [v3] : (number_number_of_int(v3) = v2 & plus_plus_int(all_0_5_5, v0) = v3 & plus_plus_int(one_one_int, v1) = v2)) & ! [v0] : ! [v1] : ( ~ (power_power_int(v0, all_0_0_0) = v1) | ? [v2] : (power_power_int(v2, all_0_3_3) = v1 & power_power_int(v0, all_0_3_3) = v2)) & ! [v0] : ! [v1] : ( ~ (power_power_int(v0, all_0_3_3) = v1) | ~ ord_less_int(v1, zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (power_power_int(v0, all_0_3_3) = v1) | ? [v2] : (power_power_int(v1, all_0_3_3) = v2 & power_power_int(v0, all_0_0_0) = v2)) & ! [v0] : ! [v1] : ( ~ (plus_plus_int(v1, v0) = zero_zero_int) | ~ (plus_plus_int(one_one_int, v0) = v1)) & ! [v0] : ! [v1] : ( ~ (plus_plus_int(v0, v0) = v1) | ~ ord_less_int(v1, zero_zero_int) | ord_less_int(v0, zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (plus_plus_int(v0, v0) = v1) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v1, zero_zero_int)) & ! [v0] : ! [v1] : ( ~ (plus_plus_int(v0, v0) = v1) | bit0(v0) = v1) & ! [v0] : ! [v1] : ( ~ (plus_plus_int(v0, all_0_5_5) = v1) | ? [v2] : ? [v3] : (number_number_of_int(v1) = v3 & number_number_of_int(v0) = v2 & plus_plus_int(v2, one_one_int) = v3)) & ! [v0] : ! [v1] : ( ~ (plus_plus_int(v0, one_one_int) = v1) | ord_less_int(v0, v1)) & ! [v0] : ! [v1] : ( ~ (plus_plus_int(all_0_5_5, v0) = v1) | ? [v2] : ? [v3] : (number_number_of_int(v1) = v3 & number_number_of_int(v0) = v2 & plus_plus_int(one_one_int, v2) = v3)) & ! [v0] : (v0 = zero_zero_nat | ~ (semiri1621563631at_int(v0) = zero_zero_int)) & ! [v0] : (v0 = zero_zero_int | ~ (bit0(v0) = zero_zero_int)) & ! [v0] : (v0 = zero_zero_int | ~ (power_power_int(v0, all_0_3_3) = zero_zero_int)) & ! [v0] : (v0 = zero_zero_int | ~ (plus_plus_int(v0, v0) = zero_zero_int)) & ! [v0] : (v0 = zero_zero_int | ~ (plus_plus_int(zero_zero_int, zero_zero_int) = v0)) & ! [v0] : ~ (bit1(v0) = zero_zero_int) & ! [v0] : ( ~ (number_number_of_nat(v0) = zero_zero_nat) | power_power_nat(zero_zero_nat, zero_zero_nat) = one_one_nat) & ! [v0] : ( ~ (number_number_of_nat(v0) = zero_zero_nat) | power_power_int(zero_zero_int, zero_zero_nat) = one_one_int) & ! [v0] : ( ~ (plus_plus_int(zero_zero_int, zero_zero_int) = v0) | ~ ord_less_int(zero_zero_int, v0)) & ? [v0] : ? [v1] : (v1 = v0 | ord_less_int(v1, v0) | ord_less_int(v0, v1)) % 7.08/2.31 | % 7.08/2.31 | Applying alpha-rule on (1) yields: % 7.08/2.31 | (2) ! [v0] : ! [v1] : ( ~ (bit0(v0) = v1) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v1, zero_zero_int)) % 7.08/2.31 | (3) ! [v0] : ! [v1] : ( ~ (bit0(v0) = v1) | ~ ord_less_int(v1, zero_zero_int) | ord_less_int(v0, zero_zero_int)) % 7.08/2.31 | (4) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, v0) = v2) | ~ (plus_plus_int(one_one_int, v0) = v1) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v2, zero_zero_int)) % 7.08/2.31 | (5) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, v0) = v2) | ~ (plus_plus_int(one_one_int, v0) = v1) | ~ ord_less_int(v2, zero_zero_int) | ord_less_int(v0, zero_zero_int)) % 7.08/2.31 | (6) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (plus_plus_int(v1, one_one_int) = v2) | ~ ord_less_int(v0, v2) | ord_less_int(v0, v1)) % 7.08/2.31 | (7) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (semiri1621563631at_int(v2) = v1) | ~ (semiri1621563631at_int(v2) = v0)) % 7.08/2.31 | (8) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_int(v3, v2) = v4) | ~ (plus_plus_int(v0, v1) = v3) | ? [v5] : (plus_plus_int(v1, v2) = v5 & plus_plus_int(v0, v5) = v4)) % 7.08/2.31 | (9) ! [v0] : ! [v1] : ( ~ (semiri1621563631at_int(v0) = v1) | number_number_of_int(v1) = v1) % 7.08/2.31 | (10) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (number_number_of_int(v1) = v3) | ~ (number_number_of_int(v0) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ? [v5] : (number_number_of_int(v5) = v4 & plus_plus_int(v0, v1) = v5)) % 7.08/2.31 | (11) plus_plus_nat(one_one_nat, one_one_nat) = all_0_3_3 % 7.08/2.31 | (12) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_int(v1, v2) = v3) | ~ (plus_plus_int(v0, v3) = v4) | ? [v5] : (plus_plus_int(v5, v2) = v4 & plus_plus_int(v0, v1) = v5)) % 7.08/2.31 | (13) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (bit0(v1) = v4 & bit1(v2) = v5 & bit1(v0) = v3 & plus_plus_int(v3, v4) = v5)) % 7.08/2.31 | (14) ! [v0] : ! [v1] : (v1 = zero_zero_nat | ~ (number_number_of_nat(v0) = v1) | power_power_int(zero_zero_int, v1) = zero_zero_int) % 7.08/2.31 | (15) ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(zero_zero_int, v0) | ord_less_int(zero_zero_int, v1)) % 7.08/2.32 | (16) ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(zero_zero_int, v1) | ord_less_int(zero_zero_int, v0)) % 7.08/2.32 | (17) ? [v0] : ? [v1] : (v1 = v0 | ord_less_int(v1, v0) | ord_less_int(v0, v1)) % 7.08/2.32 | (18) number_number_of_nat(all_0_4_4) = all_0_3_3 % 7.08/2.32 | (19) ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(one_one_int, v1) | ord_less_int(all_0_5_5, v0)) % 7.08/2.32 | (20) ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(all_0_5_5, v0) | ord_less_int(one_one_int, v1)) % 7.08/2.32 | (21) bit0(all_0_5_5) = all_0_4_4 % 7.08/2.32 | (22) ! [v0] : ! [v1] : ! [v2] : ( ~ (power_power_nat(v0, v1) = v2) | ? [v3] : ? [v4] : (semiri1621563631at_int(v2) = v4 & semiri1621563631at_int(v0) = v3 & power_power_int(v3, v1) = v4)) % 7.08/2.32 | (23) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ( ~ (semiri1621563631at_int(v1) = v4) | ~ (semiri1621563631at_int(v0) = v3) | ~ (plus_plus_int(v4, v2) = v5) | ~ (plus_plus_int(v3, v5) = v6) | ? [v7] : ? [v8] : (plus_plus_nat(v0, v1) = v7 & semiri1621563631at_int(v7) = v8 & plus_plus_int(v8, v2) = v6)) % 7.08/2.32 | (24) ! [v0] : ! [v1] : (v0 = zero_zero_int | ~ (power_power_int(v0, all_0_3_3) = v1) | ord_less_int(zero_zero_int, v1)) % 7.08/2.32 | (25) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (bit0(v1) = v3) | ~ (bit0(v0) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ? [v5] : (bit0(v5) = v4 & plus_plus_int(v0, v1) = v5)) % 7.08/2.32 | (26) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, v0) = v2) | ord_less_int(v1, zero_zero_int) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : (plus_plus_nat(v3, v4) = v5 & number_number_of_nat(v2) = v6 & number_number_of_nat(v1) = v3 & number_number_of_nat(v0) = v4 & (v6 = v5 | ord_less_int(v0, zero_zero_int)) & (v5 = v3 | ~ ord_less_int(v0, zero_zero_int)))) % 7.08/2.32 | (27) ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ? [v2] : ? [v3] : (number_number_of_int(v3) = v2 & plus_plus_int(all_0_5_5, v0) = v3 & plus_plus_int(one_one_int, v1) = v2)) % 7.08/2.32 | (28) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (semiri1621563631at_int(v0) = v2) | ~ (power_power_int(v2, v1) = v3) | ? [v4] : (semiri1621563631at_int(v4) = v3 & power_power_nat(v0, v1) = v4)) % 7.08/2.32 | (29) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (bit0(v1) = v3) | ~ (bit1(v0) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ? [v5] : (bit1(v5) = v4 & plus_plus_int(v0, v1) = v5)) % 7.08/2.32 | (30) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (bit1(v2) = v1) | ~ (bit1(v2) = v0)) % 7.08/2.32 | (31) ! [v0] : ! [v1] : ( ~ (plus_plus_int(v1, v0) = zero_zero_int) | ~ (plus_plus_int(one_one_int, v0) = v1)) % 7.08/2.32 | (32) number_number_of_nat(all_0_1_1) = all_0_0_0 % 7.08/2.32 | (33) ! [v0] : ! [v1] : ( ~ (plus_plus_int(v0, v0) = v1) | bit0(v0) = v1) % 7.08/2.32 | (34) ! [v0] : ! [v1] : ( ~ (bit0(v0) = v1) | plus_plus_int(v0, v0) = v1) % 7.08/2.32 | (35) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (number_number_of_int(v3) = v4) | ~ (plus_plus_int(v4, v2) = v5) | ~ (plus_plus_int(v0, v1) = v3) | ? [v6] : ? [v7] : ? [v8] : (number_number_of_int(v1) = v7 & number_number_of_int(v0) = v6 & plus_plus_int(v7, v2) = v8 & plus_plus_int(v6, v8) = v5)) % 7.08/2.32 | (36) ! [v0] : ! [v1] : ! [v2] : (v2 = zero_zero_int | v1 = zero_zero_nat | ~ (number_number_of_nat(v0) = v1) | ~ (power_power_int(zero_zero_int, v1) = v2)) % 7.08/2.32 | (37) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (semiri1621563631at_int(v0) = v2) | ~ (semiri1621563631at_int(v0) = v1)) % 7.08/2.32 | (38) number_number_of_int(all_0_4_4) = all_0_2_2 % 7.08/2.32 | (39) pls = zero_zero_int % 7.08/2.32 | (40) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (plus_plus_nat(v0, v1) = v3) | ~ (semiri1621563631at_int(v3) = v4) | ~ (plus_plus_int(v4, v2) = v5) | ? [v6] : ? [v7] : ? [v8] : (semiri1621563631at_int(v1) = v7 & semiri1621563631at_int(v0) = v6 & plus_plus_int(v7, v2) = v8 & plus_plus_int(v6, v8) = v5)) % 7.08/2.32 | (41) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_int(v1, v3) = v4) | ~ (plus_plus_int(v0, v2) = v3) | ? [v5] : (plus_plus_int(v1, v2) = v5 & plus_plus_int(v0, v5) = v4)) % 7.08/2.32 | (42) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, one_one_int) = v2) | ~ ord_less_int(v0, v1) | ord_less_int(v0, v2)) % 7.08/2.32 | (43) ! [v0] : (v0 = zero_zero_int | ~ (bit0(v0) = zero_zero_int)) % 7.08/2.32 | (44) ! [v0] : ! [v1] : ! [v2] : ( ~ (power_power_nat(v0, v1) = v2) | ? [v3] : ? [v4] : (semiri1621563631at_int(v2) = v3 & semiri1621563631at_int(v0) = v4 & power_power_int(v4, v1) = v3)) % 7.08/2.32 | (45) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (number_number_of_int(v1) = v3) | ~ (number_number_of_int(v0) = v2) | ~ ord_less_int(v0, v1) | ord_less_int(v2, v3)) % 7.08/2.32 | (46) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (number_number_of_int(v1) = v3) | ~ (number_number_of_int(v0) = v2) | ~ ord_less_int(v2, v3) | ord_less_int(v0, v1)) % 7.08/2.32 | (47) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (plus_plus_int(v3, v2) = v1) | ~ (plus_plus_int(v3, v2) = v0)) % 7.08/2.32 | (48) ! [v0] : ! [v1] : ( ~ (power_power_int(v0, all_0_3_3) = v1) | ? [v2] : (power_power_int(v1, all_0_3_3) = v2 & power_power_int(v0, all_0_0_0) = v2)) % 7.08/2.32 | (49) ! [v0] : ! [v1] : ( ~ (bit1(v0) = v1) | ? [v2] : (plus_plus_int(v2, v0) = v1 & plus_plus_int(one_one_int, v0) = v2)) % 7.08/2.32 | (50) ! [v0] : ! [v1] : ( ~ (number_number_of_nat(v1) = zero_zero_nat) | ~ (power_power_int(v0, zero_zero_nat) = zero_zero_int)) % 7.08/2.32 | (51) ! [v0] : ! [v1] : (v1 = zero_zero_nat | ~ (number_number_of_nat(v0) = v1) | power_power_nat(zero_zero_nat, v1) = zero_zero_nat) % 7.08/2.32 | (52) number_number_of_int(all_0_5_5) = one_one_int % 7.08/2.32 | (53) ! [v0] : ( ~ (number_number_of_nat(v0) = zero_zero_nat) | power_power_nat(zero_zero_nat, zero_zero_nat) = one_one_nat) % 7.08/2.32 | (54) ! [v0] : ~ (bit1(v0) = zero_zero_int) % 7.08/2.32 | (55) ! [v0] : ! [v1] : ( ~ (bit1(v0) = v1) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v1, zero_zero_int)) % 7.08/2.32 | (56) ! [v0] : ! [v1] : ( ~ (bit1(v0) = v1) | ~ ord_less_int(v1, zero_zero_int) | ord_less_int(v0, zero_zero_int)) % 7.08/2.32 | (57) ! [v0] : ! [v1] : ( ~ (plus_plus_int(v0, v0) = v1) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v1, zero_zero_int)) % 7.08/2.33 | (58) ! [v0] : ! [v1] : ( ~ (plus_plus_int(v0, v0) = v1) | ~ ord_less_int(v1, zero_zero_int) | ord_less_int(v0, zero_zero_int)) % 7.08/2.33 | (59) ! [v0] : ! [v1] : ! [v2] : (v0 = zero_zero_nat | ~ (power_power_nat(v0, v2) = zero_zero_nat) | ~ (number_number_of_nat(v1) = v2)) % 7.08/2.33 | (60) ! [v0] : ! [v1] : ( ~ (semiri984289939at_nat(v0) = v1) | ? [v2] : (semiri1621563631at_int(v0) = v2 & number_number_of_nat(v2) = v1)) % 7.08/2.33 | (61) ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(v0, all_0_5_5) | ord_less_int(v1, one_one_int)) % 7.08/2.33 | (62) ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(v1, one_one_int) | ord_less_int(v0, all_0_5_5)) % 7.08/2.33 | (63) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_int(v1, v2) = v3) | ~ (plus_plus_int(v0, v3) = v4) | ? [v5] : (plus_plus_int(v1, v5) = v4 & plus_plus_int(v0, v2) = v5)) % 7.08/2.33 | (64) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v0 = zero_zero_int | ~ (power_power_int(v1, all_0_3_3) = v3) | ~ (power_power_int(v0, all_0_3_3) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ord_less_int(zero_zero_int, v4)) % 7.08/2.33 | (65) power_power_int(one_one_int, all_0_3_3) = one_one_int % 7.08/2.33 | (66) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ( ~ (number_number_of_int(v1) = v4) | ~ (number_number_of_int(v0) = v3) | ~ (plus_plus_int(v4, v2) = v5) | ~ (plus_plus_int(v3, v5) = v6) | ? [v7] : ? [v8] : (number_number_of_int(v7) = v8 & plus_plus_int(v8, v2) = v6 & plus_plus_int(v0, v1) = v7)) % 7.08/2.33 | (67) ! [v0] : ! [v1] : ! [v2] : (v2 = zero_zero_nat | v1 = zero_zero_nat | ~ (power_power_nat(zero_zero_nat, v1) = v2) | ~ (number_number_of_nat(v0) = v1)) % 7.08/2.33 | (68) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (number_number_of_int(v2) = v5 & number_number_of_int(v1) = v4 & number_number_of_int(v0) = v3 & plus_plus_int(v3, v4) = v5)) % 7.08/2.33 | (69) ! [v0] : ! [v1] : ! [v2] : ( ~ (bit0(v1) = v2) | ~ (bit1(v0) = v2)) % 7.08/2.33 | (70) ! [v0] : ( ~ (plus_plus_int(zero_zero_int, zero_zero_int) = v0) | ~ ord_less_int(zero_zero_int, v0)) % 7.08/2.33 | (71) ! [v0] : ! [v1] : ( ~ (plus_plus_int(v0, all_0_5_5) = v1) | ? [v2] : ? [v3] : (number_number_of_int(v1) = v3 & number_number_of_int(v0) = v2 & plus_plus_int(v2, one_one_int) = v3)) % 7.08/2.33 | (72) ! [v0] : (v0 = zero_zero_nat | ~ (semiri1621563631at_int(v0) = zero_zero_int)) % 7.08/2.33 | (73) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (plus_plus_nat(v3, v2) = v1) | ~ (plus_plus_nat(v3, v2) = v0)) % 7.08/2.33 | (74) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (bit1(v0) = v2) | ~ (bit1(v0) = v1)) % 7.08/2.33 | (75) power_power_nat(zero_zero_nat, all_0_3_3) = zero_zero_nat % 7.08/2.33 | (76) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, v0) = v2) | ~ (plus_plus_int(one_one_int, v0) = v1) | bit1(v0) = v2) % 7.08/2.33 | (77) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (bit0(v0) = v2) | ~ (bit0(v0) = v1)) % 7.08/2.33 | (78) ~ (one_one_int = zero_zero_int) % 7.08/2.33 | (79) power_power_int(all_0_6_6, all_0_3_3) = zero_zero_int % 7.08/2.33 | (80) ! [v0] : ! [v1] : ( ~ (power_power_int(v0, all_0_0_0) = v1) | ? [v2] : (power_power_int(v2, all_0_3_3) = v1 & power_power_int(v0, all_0_3_3) = v2)) % 7.08/2.33 | (81) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_int(v2, v0) = v4) | ~ (plus_plus_int(v1, v0) = v3) | ~ ord_less_int(v1, v2) | ord_less_int(v3, v4)) % 7.08/2.33 | (82) ! [v0] : ! [v1] : ! [v2] : (v0 = zero_zero_int | ~ (number_number_of_nat(v1) = v2) | ~ (power_power_int(v0, v2) = zero_zero_int)) % 7.08/2.33 | (83) ! [v0] : ! [v1] : (v1 = v0 | ~ (plus_plus_int(zero_zero_int, v0) = v1)) % 7.08/2.33 | (84) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (semiri1621563631at_int(v1) = v3) | ~ (semiri1621563631at_int(v0) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ? [v5] : (plus_plus_nat(v0, v1) = v5 & semiri1621563631at_int(v5) = v4)) % 7.08/2.33 | (85) plus_plus_int(one_one_int, one_one_int) = all_0_2_2 % 7.08/2.33 | (86) number_number_of_nat(zero_zero_int) = zero_zero_nat % 7.08/2.33 | (87) ! [v0] : (v0 = zero_zero_int | ~ (plus_plus_int(v0, v0) = zero_zero_int)) % 7.08/2.33 | (88) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (bit0(v0) = v2) | ~ (bit1(v1) = v3) | ~ (plus_plus_int(v2, v3) = v4) | ? [v5] : (bit1(v5) = v4 & plus_plus_int(v0, v1) = v5)) % 7.08/2.33 | (89) ! [v0] : ! [v1] : ! [v2] : ( ~ (bit0(v0) = v2) | ~ (bit1(v1) = v2)) % 7.08/2.33 | (90) semiri1621563631at_int(zero_zero_nat) = zero_zero_int % 7.08/2.33 | (91) ! [v0] : ( ~ (number_number_of_nat(v0) = zero_zero_nat) | power_power_int(zero_zero_int, zero_zero_nat) = one_one_int) % 7.08/2.33 | (92) ! [v0] : (v0 = zero_zero_int | ~ (power_power_int(v0, all_0_3_3) = zero_zero_int)) % 7.08/2.33 | (93) ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ? [v2] : ? [v3] : (number_number_of_int(v3) = v2 & plus_plus_int(v1, one_one_int) = v2 & plus_plus_int(v0, all_0_5_5) = v3)) % 7.08/2.33 | (94) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (number_number_of_int(v0) = v2) | ~ (number_number_of_int(v0) = v1)) % 7.08/2.33 | (95) ! [v0] : ! [v1] : ( ~ (semiri1621563631at_int(v0) = v1) | ? [v2] : (semiri984289939at_nat(v0) = v2 & number_number_of_nat(v1) = v2)) % 7.08/2.33 | (96) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (bit0(v0) = v3 & bit1(v2) = v5 & bit1(v1) = v4 & plus_plus_int(v3, v4) = v5)) % 7.08/2.33 | (97) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (number_number_of_int(v2) = v3 & number_number_of_int(v1) = v5 & number_number_of_int(v0) = v4 & plus_plus_int(v4, v5) = v3)) % 7.08/2.33 | (98) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = v2 | ~ (plus_plus_nat(v2, v3) = v4) | ~ (number_number_of_nat(v1) = v2) | ~ (number_number_of_nat(v0) = v3) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v1, zero_zero_int)) % 7.08/2.33 | (99) power_power_nat(one_one_nat, all_0_3_3) = one_one_nat % 7.08/2.33 | (100) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = zero_zero_int | ~ (power_power_int(v1, all_0_3_3) = v3) | ~ (power_power_int(v0, all_0_3_3) = v2) | ~ (plus_plus_int(v2, v3) = zero_zero_int)) % 7.08/2.33 | (101) ord_less_int(zero_zero_int, all_0_6_6) % 7.08/2.33 | (102) ! [v0] : ! [v1] : ( ~ (semiri1621563631at_int(v0) = v1) | ~ ord_less_int(v1, zero_zero_int)) % 7.08/2.33 | (103) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (number_number_of_int(v2) = v1) | ~ (number_number_of_int(v2) = v0)) % 7.08/2.33 | (104) power_power_int(zero_zero_int, all_0_3_3) = zero_zero_int % 7.08/2.33 | (105) plus_plus_int(one_one_int, all_0_7_7) = all_0_6_6 % 7.08/2.33 | (106) number_number_of_int(zero_zero_int) = zero_zero_int % 7.08/2.33 | (107) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit0(v1) = v3) | ~ (bit1(v0) = v2) | ~ ord_less_int(v0, v1) | ord_less_int(v2, v3)) % 7.08/2.33 | (108) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit0(v1) = v3) | ~ (bit1(v0) = v2) | ~ ord_less_int(v2, v3) | ord_less_int(v0, v1)) % 7.08/2.33 | (109) ord_less_nat(zero_zero_nat, n) % 7.08/2.33 | (110) ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(v0, zero_zero_int) | ord_less_int(v1, zero_zero_int)) % 7.08/2.34 | (111) ! [v0] : ! [v1] : ( ~ (number_number_of_int(v0) = v1) | ~ ord_less_int(v1, zero_zero_int) | ord_less_int(v0, zero_zero_int)) % 7.08/2.34 | (112) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (bit0(v2) = v5 & bit0(v1) = v4 & bit0(v0) = v3 & plus_plus_int(v3, v4) = v5)) % 7.08/2.34 | (113) ord_less_int(one_one_int, t) % 7.08/2.34 | (114) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (bit1(v1) = v2) | ~ (bit1(v0) = v2)) % 7.08/2.34 | (115) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_nat(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (semiri1621563631at_int(v2) = v5 & semiri1621563631at_int(v1) = v4 & semiri1621563631at_int(v0) = v3 & plus_plus_int(v3, v4) = v5)) % 7.08/2.34 | (116) ! [v0] : ! [v1] : (v1 = v0 | ~ (plus_plus_int(v0, zero_zero_int) = v1)) % 7.08/2.34 | (117) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (bit0(v1) = v2) | ~ (bit0(v0) = v2)) % 7.08/2.34 | (118) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit0(v1) = v3) | ~ (bit0(v0) = v2) | ~ ord_less_int(v0, v1) | ord_less_int(v2, v3)) % 7.08/2.34 | (119) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit0(v1) = v3) | ~ (bit0(v0) = v2) | ~ ord_less_int(v2, v3) | ord_less_int(v0, v1)) % 7.08/2.34 | (120) ! [v0] : ! [v1] : ( ~ (plus_plus_int(v0, one_one_int) = v1) | ord_less_int(v0, v1)) % 7.08/2.34 | (121) semiri1621563631at_int(one_one_nat) = one_one_int % 7.08/2.34 | (122) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v1 = zero_zero_int | ~ (power_power_int(v1, all_0_3_3) = v3) | ~ (power_power_int(v0, all_0_3_3) = v2) | ~ (plus_plus_int(v2, v3) = v4) | ord_less_int(zero_zero_int, v4)) % 7.08/2.34 | (123) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (power_power_nat(v3, v2) = v1) | ~ (power_power_nat(v3, v2) = v0)) % 7.08/2.34 | (124) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit1(v1) = v3) | ~ (bit1(v0) = v2) | ~ ord_less_int(v0, v1) | ord_less_int(v2, v3)) % 7.08/2.34 | (125) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (bit1(v1) = v3) | ~ (bit1(v0) = v2) | ~ ord_less_int(v2, v3) | ord_less_int(v0, v1)) % 7.08/2.34 | (126) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (semiri984289939at_nat(v2) = v1) | ~ (semiri984289939at_nat(v2) = v0)) % 7.08/2.34 | (127) bit1(zero_zero_int) = all_0_5_5 % 7.08/2.34 | (128) ! [v0] : ! [v1] : ( ~ (power_power_int(v0, all_0_3_3) = v1) | ~ ord_less_int(v1, zero_zero_int)) % 7.08/2.34 | (129) number_number_of_nat(all_0_5_5) = one_one_nat % 7.34/2.34 | (130) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v0, v1) = v2) | plus_plus_int(v1, v0) = v2) % 7.34/2.34 | (131) ! [v0] : ! [v1] : ! [v2] : ( ~ (plus_plus_int(v1, v0) = v2) | plus_plus_int(v0, v1) = v2) % 7.34/2.34 | (132) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (number_number_of_int(v1) = v2) | ~ (number_number_of_int(v0) = v2)) % 7.34/2.34 | (133) ! [v0] : ! [v1] : ( ~ (bit0(v0) = v1) | ~ ord_less_int(zero_zero_int, v0) | ord_less_int(zero_zero_int, v1)) % 7.34/2.34 | (134) ! [v0] : ! [v1] : ( ~ (bit0(v0) = v1) | ~ ord_less_int(zero_zero_int, v1) | ord_less_int(zero_zero_int, v0)) % 7.34/2.34 | (135) bit0(zero_zero_int) = zero_zero_int % 7.34/2.34 | (136) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v0 = zero_zero_int | ~ (power_power_int(v1, all_0_3_3) = v3) | ~ (power_power_int(v0, all_0_3_3) = v2) | ~ (plus_plus_int(v2, v3) = zero_zero_int)) % 7.34/2.34 | (137) ~ ord_less_int(zero_zero_int, zero_zero_int) % 7.34/2.34 | (138) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = v3 | ~ (plus_plus_nat(v2, v3) = v4) | ~ (number_number_of_nat(v1) = v2) | ~ (number_number_of_nat(v0) = v3) | ~ ord_less_int(v1, zero_zero_int)) % 7.34/2.34 | (139) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (power_power_int(v3, v2) = v1) | ~ (power_power_int(v3, v2) = v0)) % 7.34/2.34 | (140) ord_less_int(zero_zero_int, one_one_int) % 7.34/2.34 | (141) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (plus_plus_nat(v2, v3) = v4) | ~ (number_number_of_nat(v1) = v2) | ~ (number_number_of_nat(v0) = v3) | ord_less_int(v1, zero_zero_int) | ord_less_int(v0, zero_zero_int) | ? [v5] : (number_number_of_nat(v5) = v4 & plus_plus_int(v1, v0) = v5)) % 7.34/2.34 | (142) semiri1621563631at_int(n) = all_0_7_7 % 7.34/2.34 | (143) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (number_number_of_nat(v2) = v1) | ~ (number_number_of_nat(v2) = v0)) % 7.34/2.34 | (144) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (bit0(v2) = v1) | ~ (bit0(v2) = v0)) % 7.34/2.34 | (145) ! [v0] : ! [v1] : ( ~ (plus_plus_int(all_0_5_5, v0) = v1) | ? [v2] : ? [v3] : (number_number_of_int(v1) = v3 & number_number_of_int(v0) = v2 & plus_plus_int(one_one_int, v2) = v3)) % 7.34/2.34 | (146) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (semiri1621563631at_int(v1) = v2) | ~ (semiri1621563631at_int(v0) = v2)) % 7.34/2.34 | (147) ! [v0] : (v0 = zero_zero_int | ~ (plus_plus_int(zero_zero_int, zero_zero_int) = v0)) % 7.34/2.34 | (148) ! [v0] : ! [v1] : ( ~ (power_power_nat(v0, zero_zero_nat) = zero_zero_nat) | ~ (number_number_of_nat(v1) = zero_zero_nat)) % 7.34/2.34 | (149) bit0(all_0_4_4) = all_0_1_1 % 7.34/2.34 | % 7.34/2.34 | Instantiating formula (82) with all_0_3_3, all_0_4_4, all_0_6_6 and discharging atoms number_number_of_nat(all_0_4_4) = all_0_3_3, power_power_int(all_0_6_6, all_0_3_3) = zero_zero_int, yields: % 7.34/2.34 | (150) all_0_6_6 = zero_zero_int % 7.34/2.34 | % 7.34/2.34 | From (150) and (101) follows: % 7.34/2.34 | (151) ord_less_int(zero_zero_int, zero_zero_int) % 7.34/2.35 | % 7.34/2.35 | Using (151) and (137) yields: % 7.34/2.35 | (152) $false % 7.34/2.35 | % 7.34/2.35 |-The branch is then unsatisfiable % 7.34/2.35 % SZS output end Proof for theBenchmark % 7.34/2.35 % 7.34/2.35 1748ms %------------------------------------------------------------------------------