%------------------------------------------------------------------------------ % File : SuperZenon---0.0.1 % Problem : SWV180+1 : TPTP v8.1.0. Bugfixed v3.3.0. % Transfm : none % Format : tptp:raw % Command : run_super_zenon -p0 -itptp -om -max-time %d %s % Computer : n032.cluster.edu % Model : x86_64 x86_64 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz % Memory : 8042.1875MB % OS : Linux 3.10.0-693.el7.x86_64 % CPULimit : 300s % WCLimit : 600s % DateTime : Wed Jul 20 21:50:16 EDT 2022 % Result : Theorem 10.36s 10.58s % Output : Proof 10.36s % Verified : % SZS Type : - % Comments : %------------------------------------------------------------------------------ %----WARNING: Could not form TPTP format derivation %------------------------------------------------------------------------------ %----ORIGINAL SYSTEM OUTPUT % 0.01/0.10 % Problem : SWV180+1 : TPTP v8.1.0. Bugfixed v3.3.0. % 0.01/0.10 % Command : run_super_zenon -p0 -itptp -om -max-time %d %s % 0.10/0.29 % Computer : n032.cluster.edu % 0.10/0.29 % Model : x86_64 x86_64 % 0.10/0.29 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz % 0.10/0.29 % Memory : 8042.1875MB % 0.10/0.29 % OS : Linux 3.10.0-693.el7.x86_64 % 0.10/0.29 % CPULimit : 300 % 0.10/0.29 % WCLimit : 600 % 0.10/0.29 % DateTime : Wed Jun 15 01:11:58 EDT 2022 % 0.10/0.30 % CPUTime : % 10.36/10.58 % SZS status Theorem % 10.36/10.58 (* PROOF-FOUND *) % 10.36/10.58 (* BEGIN-PROOF *) % 10.36/10.58 % SZS output start Proof % 10.36/10.58 1. (gt (succ (pv86)) (n0)) (-. (gt (succ (pv86)) (n0))) ### Axiom % 10.36/10.58 2. (-. (leq (n0) (pv86))) (gt (succ (pv86)) (n0)) ### Definition-Pseudo(leq) 1 % 10.36/10.58 3. (gt (succ (n4)) (pv86)) (-. (gt (succ (n4)) (pv86))) ### Axiom % 10.36/10.58 4. (-. (leq (pv86) (n4))) (gt (succ (n4)) (pv86)) ### Definition-Pseudo(leq) 3 % 10.36/10.58 5. ((a_select2 (muold_init) (pv86)) != (init)) ((a_select2 (muold_init) (pv86)) = (init)) ### Axiom % 10.36/10.58 6. (((leq (n0) (pv86)) /\ (leq (pv86) (n4))) => ((a_select2 (muold_init) (pv86)) = (init))) ((a_select2 (muold_init) (pv86)) != (init)) (gt (succ (n4)) (pv86)) (gt (succ (pv86)) (n0)) ### DisjTree 2 4 5 % 10.36/10.58 7. (All G, (((leq (n0) G) /\ (leq G (n4))) => ((a_select2 (muold_init) G) = (init)))) (gt (succ (pv86)) (n0)) (gt (succ (n4)) (pv86)) ((a_select2 (muold_init) (pv86)) != (init)) ### All 6 % 10.36/10.58 8. (leq (pv86) (n4)) ((a_select2 (muold_init) (pv86)) != (init)) (gt (succ (pv86)) (n0)) (All G, (((leq (n0) G) /\ (leq G (n4))) => ((a_select2 (muold_init) G) = (init)))) ### Definition-Pseudo(leq) 7 % 10.36/10.58 9. (leq (n0) (pv86)) (All G, (((leq (n0) G) /\ (leq G (n4))) => ((a_select2 (muold_init) G) = (init)))) ((a_select2 (muold_init) (pv86)) != (init)) (leq (pv86) (n4)) ### Definition-Pseudo(leq) 8 % 10.36/10.58 10. (-. (((leq (n0) (pv86)) /\ ((leq (pv86) (n4)) /\ ((All A, (((leq (n0) A) /\ (leq A (n135299))) => (All B, (((leq (n0) B) /\ (leq B (n4))) => ((a_select3 (q_init) A B) = (init)))))) /\ ((All C, (((leq (n0) C) /\ (leq C (n4))) => ((a_select2 (rho_init) C) = (init)))) /\ ((All D, (((leq (n0) D) /\ (leq D (n4))) => ((a_select2 (mu_init) D) = (init)))) /\ ((All E, (((leq (n0) E) /\ (leq E (n4))) => ((a_select2 (sigma_init) E) = (init)))) /\ ((All F, (((leq (n0) F) /\ (leq F (n4))) => ((a_select3 (center_init) F (n0)) = (init)))) /\ (((gt (loopcounter) (n1)) => (All G, (((leq (n0) G) /\ (leq G (n4))) => ((a_select2 (muold_init) G) = (init))))) /\ (((gt (loopcounter) (n1)) => (All H, (((leq (n0) H) /\ (leq H (n4))) => ((a_select2 (rhoold_init) H) = (init))))) /\ (((gt (loopcounter) (n1)) => (All I, (((leq (n0) I) /\ (leq I (n4))) => ((a_select2 (sigmaold_init) I) = (init))))) /\ ((All G, (((leq (n0) G) /\ (leq G (n4))) => ((a_select2 (muold_init) G) = (init)))) /\ ((All H, (((leq (n0) H) /\ (leq H (n4))) => ((a_select2 (rhoold_init) H) = (init)))) /\ (All I, (((leq (n0) I) /\ (leq I (n4))) => ((a_select2 (sigmaold_init) I) = (init)))))))))))))))) => ((a_select2 (muold_init) (pv86)) = (init)))) ### ConjTree 9 % 10.36/10.58 % SZS output end Proof % 10.36/10.58 (* END-PROOF *) %------------------------------------------------------------------------------