%------------------------------------------------------------------------------ % File : cvc5---1.3.4 % Problem : SWV424-1.100 : TPTP v9.2.1. Released v3.5.0. % Transfm : none % Format : tptp:raw % Command : /export/starexec/sandbox2/solver/bin/do_cvc5 /export/starexec/sandbox2/benchmark/theBenchmark.p 300 THM % Computer : n011.cluster.edu % Model : x86_64 x86_64 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz % Memory : 8042.1875MB % OS : Linux 3.10.0-693.el7.x86_64 % CPULimit : 300s % WCLimit : 300s % DateTime : Wed Jun 3 09:01:29 AM UTC 2026 % Result : Unsatisfiable 39.74s 39.95s % Output : Proof 40.01s % Verified : % SZS Type : - % Comments : %------------------------------------------------------------------------------ %----WARNING: Could not form TPTP format derivation %------------------------------------------------------------------------------ %----ORIGINAL SYSTEM OUTPUT % 0.12/0.13 % Problem : SWV424-1.100 : TPTP v9.2.1. Released v3.5.0. % 0.12/0.14 % Command : /export/starexec/sandbox2/solver/bin/do_cvc5 /export/starexec/sandbox2/benchmark/theBenchmark.p 300 THM % 0.16/0.35 % Computer : n011.cluster.edu % 0.16/0.35 % Model : x86_64 x86_64 % 0.16/0.35 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz % 0.16/0.35 % Memory : 8042.1875MB % 0.16/0.35 % OS : Linux 3.10.0-693.el7.x86_64 % 0.16/0.35 % CPULimit : 300 % 0.16/0.35 % WCLimit : 300 % 0.16/0.35 % DateTime : Tue Jun 2 20:15:05 EDT 2026 % 0.16/0.35 % CPUTime : % 0.27/0.52 %----Proving TF0_NAR, FOF, or CNF % 0.27/0.53 --- Run --decision=internal --simplification=none --no-inst-no-entail --no-cbqi --full-saturate-quant at 15... % 15.40/15.65 --- Run --no-e-matching --full-saturate-quant at 6... % 21.41/21.69 --- Run --no-e-matching --enum-inst-sum --full-saturate-quant at 6... % 27.51/27.74 --- Run --finite-model-find --uf-ss=no-minimal at 6... % 33.52/33.78 --- Run --multi-trigger-when-single --full-saturate-quant at 30... % 39.74/39.95 % SZS status Unsatisfiable % 39.74/39.95 % SZS output start Proof % 39.97/40.17 ( % 39.97/40.17 (declare-sort $$unsorted 0) % 39.97/40.17 (declare-const tptp.xuntil6 (-> $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.node1 (-> $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s98 $$unsorted) % 39.97/40.17 (declare-const tptp.s97 $$unsorted) % 39.97/40.17 (declare-const tptp.s96 $$unsorted) % 39.97/40.17 (declare-const tptp.m_main_v_state (-> $$unsorted $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s95 $$unsorted) % 39.97/40.17 (declare-const tptp.s94 $$unsorted) % 39.97/40.17 (declare-const tptp.s93 $$unsorted) % 39.97/40.17 (declare-const tptp.s92 $$unsorted) % 39.97/40.17 (declare-const tptp.s91 $$unsorted) % 39.97/40.17 (declare-const tptp.s90 $$unsorted) % 39.97/40.17 (declare-const tptp.s89 $$unsorted) % 39.97/40.17 (declare-const tptp.s88 $$unsorted) % 39.97/40.17 (declare-const tptp.s87 $$unsorted) % 39.97/40.17 (declare-const tptp.s86 $$unsorted) % 39.97/40.17 (declare-const tptp.s85 $$unsorted) % 39.97/40.17 (declare-const tptp.s84 $$unsorted) % 39.97/40.17 (declare-const tptp.s83 $$unsorted) % 39.97/40.17 (declare-const tptp.s82 $$unsorted) % 39.97/40.17 (declare-const tptp.s81 $$unsorted) % 39.97/40.17 (declare-const tptp.s80 $$unsorted) % 39.97/40.17 (declare-const tptp.s79 $$unsorted) % 39.97/40.17 (declare-const tptp.s78 $$unsorted) % 39.97/40.17 (declare-const tptp.s77 $$unsorted) % 39.97/40.17 (declare-const tptp.s76 $$unsorted) % 39.97/40.17 (declare-const tptp.s75 $$unsorted) % 39.97/40.17 (declare-const tptp.s74 $$unsorted) % 39.97/40.17 (declare-const tptp.s73 $$unsorted) % 39.97/40.17 (declare-const tptp.s72 $$unsorted) % 39.97/40.17 (declare-const tptp.s71 $$unsorted) % 39.97/40.17 (declare-const tptp.s70 $$unsorted) % 39.97/40.17 (declare-const tptp.s69 $$unsorted) % 39.97/40.17 (declare-const tptp.s68 $$unsorted) % 39.97/40.17 (declare-const tptp.xuntil2p8 (-> $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s67 $$unsorted) % 39.97/40.17 (declare-const tptp.s66 $$unsorted) % 39.97/40.17 (declare-const tptp.until2p7 (-> $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s65 $$unsorted) % 39.97/40.17 (declare-const tptp.s64 $$unsorted) % 39.97/40.17 (declare-const tptp.s63 $$unsorted) % 39.97/40.17 (declare-const tptp.s62 $$unsorted) % 39.97/40.17 (declare-const tptp.s61 $$unsorted) % 39.97/40.17 (declare-const tptp.s60 $$unsorted) % 39.97/40.17 (declare-const tptp.until5 (-> $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s59 $$unsorted) % 39.97/40.17 (declare-const tptp.s58 $$unsorted) % 39.97/40.17 (declare-const tptp.s27 $$unsorted) % 39.97/40.17 (declare-const tptp.s26 $$unsorted) % 39.97/40.17 (declare-const tptp.s25 $$unsorted) % 39.97/40.17 (declare-const tptp.s24 $$unsorted) % 39.97/40.17 (declare-const tptp.s23 $$unsorted) % 39.97/40.17 (declare-const tptp.s22 $$unsorted) % 39.97/40.17 (declare-const tptp.s21 $$unsorted) % 39.97/40.17 (declare-const tptp.s20 $$unsorted) % 39.97/40.17 (declare-const tptp.s17 $$unsorted) % 39.97/40.17 (declare-const tptp.s16 $$unsorted) % 39.97/40.17 (declare-const tptp.s15 $$unsorted) % 39.97/40.17 (declare-const tptp.s14 $$unsorted) % 39.97/40.17 (declare-const tptp.s13 $$unsorted) % 39.97/40.17 (declare-const tptp.s12 $$unsorted) % 39.97/40.17 (declare-const tptp.s18 $$unsorted) % 39.97/40.17 (declare-const tptp.s3 $$unsorted) % 39.97/40.17 (declare-const tptp.s99 $$unsorted) % 39.97/40.17 (declare-const tptp.s0 $$unsorted) % 39.97/40.17 (declare-const tptp.always3 (-> $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s49 $$unsorted) % 39.97/40.17 (declare-const tptp.s9 $$unsorted) % 39.97/40.17 (declare-const tptp.s19 $$unsorted) % 39.97/40.17 (declare-const tptp.s4 $$unsorted) % 39.97/40.17 (declare-const tptp.s2 $$unsorted) % 39.97/40.17 (declare-const tptp.s5 $$unsorted) % 39.97/40.17 (declare-const tptp.s6 $$unsorted) % 39.97/40.17 (declare-const tptp.s7 $$unsorted) % 39.97/40.17 (declare-const tptp.s8 $$unsorted) % 39.97/40.17 (declare-const tptp.s10 $$unsorted) % 39.97/40.17 (declare-const tptp.s11 $$unsorted) % 39.97/40.17 (declare-const tptp.s28 $$unsorted) % 39.97/40.17 (declare-const tptp.s29 $$unsorted) % 39.97/40.17 (declare-const tptp.s30 $$unsorted) % 39.97/40.17 (declare-const tptp.c_ready $$unsorted) % 39.97/40.17 (declare-const tptp.s31 $$unsorted) % 39.97/40.17 (declare-const tptp.c_busy $$unsorted) % 39.97/40.17 (declare-const tptp.s32 $$unsorted) % 39.97/40.17 (declare-const tptp.s33 $$unsorted) % 39.97/40.17 (declare-const tptp.s34 $$unsorted) % 39.97/40.17 (declare-const tptp.s35 $$unsorted) % 39.97/40.17 (declare-const tptp.s1 $$unsorted) % 39.97/40.17 (declare-const tptp.s36 $$unsorted) % 39.97/40.17 (declare-const tptp.last (-> $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.succ (-> $$unsorted $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s37 $$unsorted) % 39.97/40.17 (declare-const tptp.trans (-> $$unsorted $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s38 $$unsorted) % 39.97/40.17 (declare-const tptp.s39 $$unsorted) % 39.97/40.17 (declare-const tptp.m_main_v_request (-> $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s40 $$unsorted) % 39.97/40.17 (declare-const tptp.s41 $$unsorted) % 39.97/40.17 (declare-const tptp.node2 (-> $$unsorted $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s42 $$unsorted) % 39.97/40.17 (declare-const tptp.loop Bool) % 39.97/40.17 (declare-const tptp.s43 $$unsorted) % 39.97/40.17 (declare-const tptp.s44 $$unsorted) % 39.97/40.17 (declare-const tptp.s45 $$unsorted) % 39.97/40.17 (declare-const tptp.s46 $$unsorted) % 39.97/40.17 (declare-const tptp.s47 $$unsorted) % 39.97/40.17 (declare-const tptp.s48 $$unsorted) % 39.97/40.17 (declare-const tptp.s50 $$unsorted) % 39.97/40.17 (declare-const tptp.s51 $$unsorted) % 39.97/40.17 (declare-const tptp.s52 $$unsorted) % 39.97/40.17 (declare-const tptp.s53 $$unsorted) % 39.97/40.17 (declare-const tptp.s54 $$unsorted) % 39.97/40.17 (declare-const tptp.node4 (-> $$unsorted Bool)) % 39.97/40.17 (declare-const tptp.s55 $$unsorted) % 39.97/40.17 (declare-const tptp.s56 $$unsorted) % 39.97/40.17 (declare-const tptp.s57 $$unsorted) % 39.97/40.17 (define @t1 () (tptp.succ tptp.s0 tptp.s1)) % 39.97/40.17 (define @t2 () (tptp.succ tptp.s1 tptp.s2)) % 39.97/40.17 (define @t3 () (tptp.succ tptp.s2 tptp.s3)) % 39.97/40.17 (define @t4 () (tptp.succ tptp.s3 tptp.s4)) % 39.97/40.17 (define @t5 () (tptp.succ tptp.s4 tptp.s5)) % 39.97/40.17 (define @t6 () (tptp.succ tptp.s5 tptp.s6)) % 39.97/40.17 (define @t7 () (tptp.succ tptp.s6 tptp.s7)) % 39.97/40.17 (define @t8 () (tptp.succ tptp.s7 tptp.s8)) % 39.97/40.17 (define @t9 () (tptp.succ tptp.s8 tptp.s9)) % 39.97/40.17 (define @t10 () (tptp.succ tptp.s9 tptp.s10)) % 39.97/40.17 (define @t11 () (tptp.succ tptp.s10 tptp.s11)) % 39.97/40.17 (define @t12 () (tptp.succ tptp.s11 tptp.s12)) % 39.97/40.17 (define @t13 () (tptp.succ tptp.s12 tptp.s13)) % 39.97/40.17 (define @t14 () (tptp.succ tptp.s13 tptp.s14)) % 39.97/40.17 (define @t15 () (tptp.succ tptp.s14 tptp.s15)) % 39.97/40.17 (define @t16 () (tptp.succ tptp.s15 tptp.s16)) % 39.97/40.17 (define @t17 () (tptp.succ tptp.s16 tptp.s17)) % 39.97/40.17 (define @t18 () (tptp.succ tptp.s17 tptp.s18)) % 39.97/40.17 (define @t19 () (tptp.succ tptp.s18 tptp.s19)) % 39.97/40.17 (define @t20 () (tptp.succ tptp.s19 tptp.s20)) % 39.97/40.17 (define @t21 () (tptp.succ tptp.s20 tptp.s21)) % 39.97/40.17 (define @t22 () (tptp.succ tptp.s21 tptp.s22)) % 39.97/40.17 (define @t23 () (tptp.succ tptp.s22 tptp.s23)) % 39.97/40.17 (define @t24 () (tptp.succ tptp.s23 tptp.s24)) % 39.97/40.17 (define @t25 () (tptp.succ tptp.s24 tptp.s25)) % 39.97/40.17 (define @t26 () (tptp.succ tptp.s25 tptp.s26)) % 39.97/40.17 (define @t27 () (tptp.succ tptp.s26 tptp.s27)) % 39.97/40.17 (define @t28 () (tptp.succ tptp.s27 tptp.s28)) % 39.97/40.17 (define @t29 () (tptp.succ tptp.s28 tptp.s29)) % 39.97/40.17 (define @t30 () (tptp.succ tptp.s29 tptp.s30)) % 39.97/40.17 (define @t31 () (tptp.succ tptp.s30 tptp.s31)) % 39.97/40.17 (define @t32 () (tptp.succ tptp.s31 tptp.s32)) % 39.97/40.17 (define @t33 () (tptp.succ tptp.s32 tptp.s33)) % 39.97/40.17 (define @t34 () (tptp.succ tptp.s33 tptp.s34)) % 39.97/40.17 (define @t35 () (tptp.succ tptp.s34 tptp.s35)) % 39.97/40.17 (define @t36 () (tptp.succ tptp.s35 tptp.s36)) % 39.97/40.17 (define @t37 () (tptp.succ tptp.s36 tptp.s37)) % 39.97/40.17 (define @t38 () (tptp.succ tptp.s37 tptp.s38)) % 39.97/40.17 (define @t39 () (tptp.succ tptp.s38 tptp.s39)) % 39.97/40.17 (define @t40 () (tptp.succ tptp.s39 tptp.s40)) % 39.97/40.17 (define @t41 () (tptp.succ tptp.s40 tptp.s41)) % 39.97/40.17 (define @t42 () (tptp.succ tptp.s41 tptp.s42)) % 39.97/40.17 (define @t43 () (tptp.succ tptp.s42 tptp.s43)) % 39.97/40.17 (define @t44 () (tptp.succ tptp.s43 tptp.s44)) % 39.97/40.17 (define @t45 () (tptp.succ tptp.s44 tptp.s45)) % 39.97/40.17 (define @t46 () (tptp.succ tptp.s45 tptp.s46)) % 39.97/40.17 (define @t47 () (tptp.succ tptp.s46 tptp.s47)) % 39.97/40.17 (define @t48 () (tptp.succ tptp.s47 tptp.s48)) % 39.97/40.17 (define @t49 () (tptp.succ tptp.s48 tptp.s49)) % 39.97/40.17 (define @t50 () (tptp.succ tptp.s49 tptp.s50)) % 39.97/40.17 (define @t51 () (tptp.succ tptp.s50 tptp.s51)) % 39.97/40.17 (define @t52 () (tptp.succ tptp.s51 tptp.s52)) % 39.97/40.17 (define @t53 () (tptp.succ tptp.s52 tptp.s53)) % 39.97/40.17 (define @t54 () (tptp.succ tptp.s53 tptp.s54)) % 39.97/40.17 (define @t55 () (tptp.succ tptp.s54 tptp.s55)) % 39.97/40.17 (define @t56 () (tptp.succ tptp.s55 tptp.s56)) % 39.97/40.17 (define @t57 () (tptp.succ tptp.s56 tptp.s57)) % 39.97/40.17 (define @t58 () (tptp.succ tptp.s57 tptp.s58)) % 39.97/40.17 (define @t59 () (tptp.succ tptp.s58 tptp.s59)) % 39.97/40.17 (define @t60 () (tptp.succ tptp.s59 tptp.s60)) % 39.97/40.17 (define @t61 () (tptp.succ tptp.s60 tptp.s61)) % 39.97/40.17 (define @t62 () (tptp.succ tptp.s61 tptp.s62)) % 39.97/40.17 (define @t63 () (tptp.succ tptp.s62 tptp.s63)) % 39.97/40.17 (define @t64 () (tptp.succ tptp.s63 tptp.s64)) % 39.97/40.17 (define @t65 () (tptp.succ tptp.s64 tptp.s65)) % 39.97/40.17 (define @t66 () (tptp.succ tptp.s65 tptp.s66)) % 39.97/40.17 (define @t67 () (tptp.succ tptp.s66 tptp.s67)) % 39.97/40.17 (define @t68 () (tptp.succ tptp.s67 tptp.s68)) % 39.97/40.17 (define @t69 () (tptp.succ tptp.s68 tptp.s69)) % 39.97/40.17 (define @t70 () (tptp.succ tptp.s69 tptp.s70)) % 39.97/40.17 (define @t71 () (tptp.succ tptp.s70 tptp.s71)) % 39.97/40.17 (define @t72 () (tptp.succ tptp.s71 tptp.s72)) % 39.97/40.17 (define @t73 () (tptp.succ tptp.s72 tptp.s73)) % 39.97/40.17 (define @t74 () (tptp.succ tptp.s73 tptp.s74)) % 39.97/40.17 (define @t75 () (tptp.succ tptp.s74 tptp.s75)) % 39.97/40.17 (define @t76 () (tptp.succ tptp.s75 tptp.s76)) % 39.97/40.17 (define @t77 () (tptp.succ tptp.s76 tptp.s77)) % 39.97/40.17 (define @t78 () (tptp.succ tptp.s77 tptp.s78)) % 39.97/40.17 (define @t79 () (tptp.succ tptp.s78 tptp.s79)) % 39.97/40.17 (define @t80 () (tptp.succ tptp.s79 tptp.s80)) % 39.97/40.17 (define @t81 () (tptp.succ tptp.s80 tptp.s81)) % 39.97/40.17 (define @t82 () (tptp.succ tptp.s81 tptp.s82)) % 39.97/40.17 (define @t83 () (tptp.succ tptp.s82 tptp.s83)) % 39.97/40.17 (define @t84 () (tptp.succ tptp.s83 tptp.s84)) % 39.97/40.17 (define @t85 () (tptp.succ tptp.s84 tptp.s85)) % 39.97/40.17 (define @t86 () (tptp.succ tptp.s85 tptp.s86)) % 39.97/40.17 (define @t87 () (tptp.succ tptp.s86 tptp.s87)) % 39.97/40.17 (define @t88 () (tptp.succ tptp.s87 tptp.s88)) % 39.97/40.17 (define @t89 () (tptp.succ tptp.s88 tptp.s89)) % 39.97/40.17 (define @t90 () (tptp.succ tptp.s89 tptp.s90)) % 39.97/40.17 (define @t91 () (tptp.succ tptp.s90 tptp.s91)) % 39.97/40.17 (define @t92 () (tptp.succ tptp.s91 tptp.s92)) % 39.97/40.17 (define @t93 () (tptp.succ tptp.s92 tptp.s93)) % 39.97/40.17 (define @t94 () (tptp.succ tptp.s93 tptp.s94)) % 39.97/40.17 (define @t95 () (tptp.succ tptp.s94 tptp.s95)) % 39.97/40.17 (define @t96 () (tptp.succ tptp.s95 tptp.s96)) % 39.97/40.17 (define @t97 () (tptp.succ tptp.s96 tptp.s97)) % 39.97/40.17 (define @t98 () (tptp.succ tptp.s97 tptp.s98)) % 39.97/40.17 (define @t99 () (tptp.succ tptp.s98 tptp.s99)) % 39.97/40.17 (define @t100 () (tptp.last tptp.s99)) % 39.97/40.17 (define @t101 () (@var "Y" $$unsorted)) % 39.97/40.17 (define @t102 () (@var "X" $$unsorted)) % 39.97/40.17 (define @t103 () (tptp.trans @t102 @t101)) % 39.97/40.17 (define @t104 () (not (tptp.succ @t102 @t101))) % 39.97/40.17 (define @t105 () (@list @t102 @t101)) % 39.97/40.17 (define @t106 () (tptp.trans tptp.s99 tptp.s99)) % 39.97/40.17 (define @t107 () (tptp.trans tptp.s99 tptp.s98)) % 39.97/40.17 (define @t108 () (tptp.trans tptp.s99 tptp.s97)) % 39.97/40.17 (define @t109 () (tptp.trans tptp.s99 tptp.s96)) % 39.97/40.17 (define @t110 () (tptp.trans tptp.s99 tptp.s95)) % 39.97/40.17 (define @t111 () (tptp.trans tptp.s99 tptp.s94)) % 39.97/40.17 (define @t112 () (tptp.trans tptp.s99 tptp.s93)) % 39.97/40.17 (define @t113 () (tptp.trans tptp.s99 tptp.s92)) % 39.97/40.17 (define @t114 () (tptp.trans tptp.s99 tptp.s91)) % 39.97/40.17 (define @t115 () (tptp.trans tptp.s99 tptp.s90)) % 39.97/40.17 (define @t116 () (tptp.trans tptp.s99 tptp.s89)) % 39.97/40.17 (define @t117 () (tptp.trans tptp.s99 tptp.s88)) % 39.97/40.17 (define @t118 () (tptp.trans tptp.s99 tptp.s87)) % 39.97/40.17 (define @t119 () (tptp.trans tptp.s99 tptp.s86)) % 39.97/40.17 (define @t120 () (tptp.trans tptp.s99 tptp.s85)) % 39.97/40.17 (define @t121 () (tptp.trans tptp.s99 tptp.s84)) % 39.97/40.17 (define @t122 () (tptp.trans tptp.s99 tptp.s83)) % 39.97/40.17 (define @t123 () (tptp.trans tptp.s99 tptp.s82)) % 39.97/40.17 (define @t124 () (tptp.trans tptp.s99 tptp.s81)) % 39.97/40.17 (define @t125 () (tptp.trans tptp.s99 tptp.s80)) % 39.97/40.17 (define @t126 () (tptp.trans tptp.s99 tptp.s79)) % 39.97/40.17 (define @t127 () (tptp.trans tptp.s99 tptp.s78)) % 39.97/40.17 (define @t128 () (tptp.trans tptp.s99 tptp.s77)) % 39.97/40.17 (define @t129 () (tptp.trans tptp.s99 tptp.s76)) % 39.97/40.17 (define @t130 () (tptp.trans tptp.s99 tptp.s75)) % 39.97/40.17 (define @t131 () (tptp.trans tptp.s99 tptp.s74)) % 39.97/40.17 (define @t132 () (tptp.trans tptp.s99 tptp.s73)) % 39.97/40.17 (define @t133 () (tptp.trans tptp.s99 tptp.s72)) % 39.97/40.17 (define @t134 () (tptp.trans tptp.s99 tptp.s71)) % 39.97/40.17 (define @t135 () (tptp.trans tptp.s99 tptp.s70)) % 39.97/40.17 (define @t136 () (tptp.trans tptp.s99 tptp.s69)) % 39.97/40.17 (define @t137 () (tptp.trans tptp.s99 tptp.s68)) % 39.97/40.17 (define @t138 () (tptp.trans tptp.s99 tptp.s67)) % 39.97/40.17 (define @t139 () (tptp.trans tptp.s99 tptp.s66)) % 39.97/40.17 (define @t140 () (tptp.trans tptp.s99 tptp.s65)) % 39.97/40.17 (define @t141 () (tptp.trans tptp.s99 tptp.s64)) % 39.97/40.17 (define @t142 () (tptp.trans tptp.s99 tptp.s63)) % 39.97/40.17 (define @t143 () (tptp.trans tptp.s99 tptp.s62)) % 39.97/40.17 (define @t144 () (tptp.trans tptp.s99 tptp.s61)) % 39.97/40.17 (define @t145 () (tptp.trans tptp.s99 tptp.s60)) % 39.97/40.17 (define @t146 () (tptp.trans tptp.s99 tptp.s59)) % 39.97/40.17 (define @t147 () (tptp.trans tptp.s99 tptp.s58)) % 39.97/40.17 (define @t148 () (tptp.trans tptp.s99 tptp.s57)) % 39.97/40.17 (define @t149 () (tptp.trans tptp.s99 tptp.s56)) % 39.97/40.17 (define @t150 () (tptp.trans tptp.s99 tptp.s55)) % 39.97/40.17 (define @t151 () (tptp.trans tptp.s99 tptp.s54)) % 39.97/40.17 (define @t152 () (tptp.trans tptp.s99 tptp.s53)) % 39.97/40.17 (define @t153 () (tptp.trans tptp.s99 tptp.s52)) % 39.97/40.17 (define @t154 () (tptp.trans tptp.s99 tptp.s51)) % 39.97/40.17 (define @t155 () (tptp.trans tptp.s99 tptp.s50)) % 39.97/40.17 (define @t156 () (tptp.trans tptp.s99 tptp.s49)) % 39.97/40.17 (define @t157 () (tptp.trans tptp.s99 tptp.s48)) % 39.97/40.17 (define @t158 () (tptp.trans tptp.s99 tptp.s47)) % 39.97/40.17 (define @t159 () (tptp.trans tptp.s99 tptp.s46)) % 39.97/40.17 (define @t160 () (tptp.trans tptp.s99 tptp.s45)) % 39.97/40.17 (define @t161 () (tptp.trans tptp.s99 tptp.s44)) % 39.97/40.17 (define @t162 () (tptp.trans tptp.s99 tptp.s43)) % 39.97/40.17 (define @t163 () (tptp.trans tptp.s99 tptp.s42)) % 39.97/40.17 (define @t164 () (tptp.trans tptp.s99 tptp.s41)) % 39.97/40.17 (define @t165 () (tptp.trans tptp.s99 tptp.s40)) % 39.97/40.17 (define @t166 () (tptp.trans tptp.s99 tptp.s39)) % 39.97/40.17 (define @t167 () (tptp.trans tptp.s99 tptp.s38)) % 39.97/40.17 (define @t168 () (tptp.trans tptp.s99 tptp.s37)) % 39.97/40.17 (define @t169 () (tptp.trans tptp.s99 tptp.s36)) % 39.97/40.17 (define @t170 () (tptp.trans tptp.s99 tptp.s35)) % 39.97/40.17 (define @t171 () (tptp.trans tptp.s99 tptp.s34)) % 39.97/40.17 (define @t172 () (tptp.trans tptp.s99 tptp.s33)) % 39.97/40.17 (define @t173 () (tptp.trans tptp.s99 tptp.s32)) % 39.97/40.17 (define @t174 () (tptp.trans tptp.s99 tptp.s31)) % 39.97/40.17 (define @t175 () (tptp.trans tptp.s99 tptp.s30)) % 39.97/40.17 (define @t176 () (tptp.trans tptp.s99 tptp.s29)) % 39.97/40.17 (define @t177 () (tptp.trans tptp.s99 tptp.s28)) % 39.97/40.17 (define @t178 () (tptp.trans tptp.s99 tptp.s27)) % 39.97/40.17 (define @t179 () (tptp.trans tptp.s99 tptp.s26)) % 39.97/40.17 (define @t180 () (tptp.trans tptp.s99 tptp.s25)) % 39.97/40.17 (define @t181 () (tptp.trans tptp.s99 tptp.s24)) % 39.97/40.17 (define @t182 () (tptp.trans tptp.s99 tptp.s23)) % 39.97/40.17 (define @t183 () (tptp.trans tptp.s99 tptp.s22)) % 39.97/40.17 (define @t184 () (tptp.trans tptp.s99 tptp.s21)) % 39.97/40.17 (define @t185 () (tptp.trans tptp.s99 tptp.s20)) % 39.97/40.17 (define @t186 () (tptp.trans tptp.s99 tptp.s19)) % 39.97/40.17 (define @t187 () (tptp.trans tptp.s99 tptp.s18)) % 39.97/40.17 (define @t188 () (tptp.trans tptp.s99 tptp.s17)) % 39.97/40.17 (define @t189 () (tptp.trans tptp.s99 tptp.s16)) % 39.97/40.17 (define @t190 () (tptp.trans tptp.s99 tptp.s15)) % 39.97/40.17 (define @t191 () (tptp.trans tptp.s99 tptp.s14)) % 39.97/40.17 (define @t192 () (tptp.trans tptp.s99 tptp.s13)) % 39.97/40.17 (define @t193 () (tptp.trans tptp.s99 tptp.s12)) % 39.97/40.17 (define @t194 () (tptp.trans tptp.s99 tptp.s11)) % 39.97/40.17 (define @t195 () (tptp.trans tptp.s99 tptp.s10)) % 39.97/40.17 (define @t196 () (tptp.trans tptp.s99 tptp.s9)) % 39.97/40.17 (define @t197 () (tptp.trans tptp.s99 tptp.s8)) % 39.97/40.17 (define @t198 () (tptp.trans tptp.s99 tptp.s7)) % 39.97/40.17 (define @t199 () (tptp.trans tptp.s99 tptp.s6)) % 39.97/40.17 (define @t200 () (tptp.trans tptp.s99 tptp.s5)) % 39.97/40.17 (define @t201 () (tptp.trans tptp.s99 tptp.s4)) % 39.97/40.17 (define @t202 () (tptp.trans tptp.s99 tptp.s3)) % 39.97/40.17 (define @t203 () (tptp.trans tptp.s99 tptp.s2)) % 39.97/40.17 (define @t204 () (tptp.trans tptp.s99 tptp.s1)) % 39.97/40.17 (define @t205 () (tptp.trans tptp.s99 tptp.s0)) % 39.97/40.17 (define @t206 () (tptp.m_main_v_state @t102 tptp.c_busy)) % 39.97/40.17 (define @t207 () (tptp.m_main_v_state @t102 tptp.c_ready)) % 39.97/40.17 (define @t208 () (@list @t102)) % 39.97/40.17 (define @t209 () (not @t206)) % 39.97/40.17 (define @t210 () (not @t207)) % 39.97/40.17 (define @t211 () (tptp.m_main_v_state tptp.s0 tptp.c_ready)) % 39.97/40.17 (define @t212 () (tptp.node1 @t102)) % 39.97/40.17 (define @t213 () (not @t212)) % 39.97/40.17 (define @t214 () (tptp.m_main_v_request @t102)) % 39.97/40.17 (define @t215 () (tptp.node2 @t102 @t101)) % 39.97/40.17 (define @t216 () (not @t215)) % 39.97/40.17 (define @t217 () (tptp.m_main_v_state @t101 tptp.c_busy)) % 39.97/40.17 (define @t218 () (@list @t101 @t102)) % 39.97/40.17 (define @t219 () (not @t103)) % 39.97/40.17 (define @t220 () (forall @t105 (or @t219 @t215))) % 39.97/40.17 (define @t221 () (tptp.always3 @t102)) % 39.97/40.17 (define @t222 () (not @t221)) % 39.97/40.17 (define @t223 () (not (tptp.last @t102))) % 39.97/40.17 (define @t224 () (or tptp.loop @t222 @t223)) % 39.97/40.17 (define @t225 () (forall @t208 @t224)) % 39.97/40.17 (define @t226 () (tptp.node4 @t102)) % 39.97/40.17 (define @t227 () (not @t226)) % 39.97/40.17 (define @t228 () (tptp.xuntil6 @t102)) % 39.97/40.17 (define @t229 () (not @t228)) % 39.97/40.17 (define @t230 () (or tptp.loop @t223 @t229)) % 39.97/40.17 (define @t231 () (forall @t208 @t230)) % 39.97/40.17 (define @t232 () (tptp.until2p7 @t101)) % 39.97/40.17 (define @t233 () (forall @t218 (or @t232 @t219 @t223 @t229))) % 39.97/40.17 (define @t234 () (tptp.xuntil2p8 @t102)) % 39.97/40.17 (define @t235 () (not @t234)) % 39.97/40.17 (define @t236 () (tptp.until5 tptp.s0)) % 39.97/40.17 (define @t237 () (@list tptp.s99)) % 39.97/40.17 (define @t238 () (tptp.node4 tptp.s99)) % 39.97/40.17 (define @t239 () (not @t238)) % 39.97/40.17 (define @t240 () (tptp.always3 tptp.s99)) % 39.97/40.17 (define @t241 () (or @t240 @t239)) % 39.97/40.17 (define @t242 () (tptp.m_main_v_request tptp.s99)) % 39.97/40.17 (define @t243 () (or @t242 @t239)) % 39.97/40.17 (define @t244 () (not @t240)) % 39.97/40.17 (define @t245 () (tptp.m_main_v_state tptp.s99 tptp.c_busy)) % 39.97/40.17 (define @t246 () (not @t245)) % 39.97/40.17 (define @t247 () (or @t246 @t244)) % 39.97/40.17 (define @t248 () (tptp.m_main_v_state tptp.s99 tptp.c_ready)) % 39.97/40.17 (define @t249 () (or @t248 @t245)) % 39.97/40.17 (define @t250 () (@list tptp.s99 tptp.s99)) % 39.97/40.17 (define @t251 () (@list tptp.s99 tptp.s98)) % 39.97/40.17 (define @t252 () (tptp.node2 tptp.s99 tptp.s98)) % 39.97/40.17 (define @t253 () (not @t107)) % 39.97/40.17 (define @t254 () (or @t253 @t252)) % 39.97/40.17 (define @t255 () (@list tptp.s98 tptp.s99)) % 39.97/40.17 (define @t256 () (tptp.always3 tptp.s98)) % 39.97/40.17 (define @t257 () (or @t256 @t253 @t244)) % 39.97/40.17 (define @t258 () (@list tptp.s98)) % 39.97/40.17 (define @t259 () (not @t256)) % 39.97/40.17 (define @t260 () (tptp.m_main_v_state tptp.s98 tptp.c_busy)) % 39.97/40.17 (define @t261 () (not @t260)) % 39.97/40.17 (define @t262 () (or @t261 @t259)) % 39.97/40.17 (define @t263 () (not @t252)) % 39.97/40.17 (define @t264 () (not @t242)) % 39.97/40.17 (define @t265 () (not @t248)) % 39.97/40.17 (define @t266 () (or @t265 @t264 @t260 @t263)) % 39.97/40.17 (define @t267 () (@list false true false false false false false true false false false false false false false false)) % 39.97/40.17 (define @t268 () (tptp.xuntil2p8 tptp.s99)) % 39.97/40.17 (define @t269 () (not @t268)) % 39.97/40.17 (define @t270 () (not @t100)) % 39.97/40.17 (define @t271 () (or @t270 @t269)) % 39.97/40.17 (define @t272 () (@list false false)) % 39.97/40.17 (define @t273 () (tptp.until2p7 tptp.s99)) % 39.97/40.17 (define @t274 () (not @t273)) % 39.97/40.17 (define @t275 () (or @t238 @t268 @t274)) % 39.97/40.17 (define @t276 () (tptp.node4 tptp.s98)) % 39.97/40.17 (define @t277 () (not @t276)) % 39.97/40.17 (define @t278 () (or @t256 @t277)) % 39.97/40.17 (define @t279 () (tptp.m_main_v_request tptp.s98)) % 39.97/40.17 (define @t280 () (or @t279 @t277)) % 39.97/40.17 (define @t281 () (tptp.trans tptp.s98 tptp.s99)) % 39.97/40.17 (define @t282 () (not @t99)) % 39.97/40.17 (define @t283 () (or @t282 @t281)) % 39.97/40.17 (define @t284 () (not @t281)) % 39.97/40.17 (define @t285 () (or @t240 @t284 @t259)) % 39.97/40.17 (define @t286 () (tptp.m_main_v_state tptp.s98 tptp.c_ready)) % 39.97/40.17 (define @t287 () (or @t286 @t260)) % 39.97/40.17 (define @t288 () (tptp.node2 tptp.s98 tptp.s99)) % 39.97/40.17 (define @t289 () (or @t284 @t288)) % 39.97/40.17 (define @t290 () (not @t288)) % 39.97/40.17 (define @t291 () (not @t279)) % 39.97/40.17 (define @t292 () (not @t286)) % 39.97/40.17 (define @t293 () (or @t292 @t291 @t245 @t290)) % 39.97/40.17 (define @t294 () (@list false false false false true false true false false false false false false false false)) % 39.97/40.17 (define @t295 () (@list tptp.s98 tptp.s97)) % 39.97/40.17 (define @t296 () (@list tptp.s97)) % 39.97/40.17 (define @t297 () (tptp.node4 tptp.s97)) % 39.97/40.17 (define @t298 () (not @t297)) % 39.97/40.17 (define @t299 () (tptp.always3 tptp.s97)) % 39.97/40.17 (define @t300 () (or @t299 @t298)) % 39.97/40.17 (define @t301 () (tptp.m_main_v_request tptp.s97)) % 39.97/40.17 (define @t302 () (or @t301 @t298)) % 39.97/40.17 (define @t303 () (@list tptp.s97 tptp.s98)) % 39.97/40.17 (define @t304 () (tptp.trans tptp.s97 tptp.s98)) % 39.97/40.17 (define @t305 () (not @t98)) % 39.97/40.17 (define @t306 () (or @t305 @t304)) % 39.97/40.17 (define @t307 () (not @t299)) % 39.97/40.17 (define @t308 () (not @t304)) % 39.97/40.17 (define @t309 () (or @t256 @t308 @t307)) % 39.97/40.17 (define @t310 () (tptp.m_main_v_state tptp.s97 tptp.c_busy)) % 39.97/40.17 (define @t311 () (not @t310)) % 39.97/40.17 (define @t312 () (or @t311 @t307)) % 39.97/40.17 (define @t313 () (tptp.m_main_v_state tptp.s97 tptp.c_ready)) % 39.97/40.17 (define @t314 () (or @t313 @t310)) % 39.97/40.17 (define @t315 () (tptp.node2 tptp.s97 tptp.s98)) % 39.97/40.17 (define @t316 () (or @t308 @t315)) % 39.97/40.17 (define @t317 () (not @t315)) % 39.97/40.17 (define @t318 () (not @t301)) % 39.97/40.17 (define @t319 () (not @t313)) % 39.97/40.17 (define @t320 () (or @t319 @t318 @t260 @t317)) % 39.97/40.17 (define @t321 () (@list tptp.s97 tptp.s96)) % 39.97/40.17 (define @t322 () (@list tptp.s96)) % 39.97/40.17 (define @t323 () (tptp.node4 tptp.s96)) % 39.97/40.17 (define @t324 () (not @t323)) % 39.97/40.17 (define @t325 () (tptp.always3 tptp.s96)) % 39.97/40.17 (define @t326 () (or @t325 @t324)) % 39.97/40.17 (define @t327 () (tptp.m_main_v_request tptp.s96)) % 39.97/40.17 (define @t328 () (or @t327 @t324)) % 39.97/40.17 (define @t329 () (@list tptp.s96 tptp.s97)) % 39.97/40.17 (define @t330 () (tptp.trans tptp.s96 tptp.s97)) % 39.97/40.17 (define @t331 () (not @t97)) % 39.97/40.17 (define @t332 () (or @t331 @t330)) % 39.97/40.17 (define @t333 () (not @t325)) % 39.97/40.17 (define @t334 () (not @t330)) % 39.97/40.17 (define @t335 () (or @t299 @t334 @t333)) % 39.97/40.17 (define @t336 () (tptp.m_main_v_state tptp.s96 tptp.c_busy)) % 39.97/40.17 (define @t337 () (not @t336)) % 39.97/40.17 (define @t338 () (or @t337 @t333)) % 39.97/40.17 (define @t339 () (tptp.m_main_v_state tptp.s96 tptp.c_ready)) % 39.97/40.17 (define @t340 () (or @t339 @t336)) % 39.97/40.17 (define @t341 () (tptp.node2 tptp.s96 tptp.s97)) % 39.97/40.17 (define @t342 () (or @t334 @t341)) % 39.97/40.17 (define @t343 () (not @t341)) % 39.97/40.17 (define @t344 () (not @t327)) % 39.97/40.17 (define @t345 () (not @t339)) % 39.97/40.17 (define @t346 () (or @t345 @t344 @t310 @t343)) % 39.97/40.17 (define @t347 () (@list tptp.s96 tptp.s95)) % 39.97/40.17 (define @t348 () (@list tptp.s95)) % 39.97/40.17 (define @t349 () (tptp.node4 tptp.s95)) % 39.97/40.17 (define @t350 () (not @t349)) % 39.97/40.17 (define @t351 () (tptp.always3 tptp.s95)) % 39.97/40.17 (define @t352 () (or @t351 @t350)) % 39.97/40.17 (define @t353 () (tptp.m_main_v_request tptp.s95)) % 39.97/40.17 (define @t354 () (or @t353 @t350)) % 39.97/40.17 (define @t355 () (@list tptp.s95 tptp.s96)) % 39.97/40.17 (define @t356 () (tptp.trans tptp.s95 tptp.s96)) % 39.97/40.17 (define @t357 () (not @t96)) % 39.97/40.17 (define @t358 () (or @t357 @t356)) % 39.97/40.17 (define @t359 () (not @t351)) % 39.97/40.17 (define @t360 () (not @t356)) % 39.97/40.17 (define @t361 () (or @t325 @t360 @t359)) % 39.97/40.17 (define @t362 () (tptp.m_main_v_state tptp.s95 tptp.c_busy)) % 39.97/40.17 (define @t363 () (not @t362)) % 39.97/40.17 (define @t364 () (or @t363 @t359)) % 39.97/40.17 (define @t365 () (tptp.m_main_v_state tptp.s95 tptp.c_ready)) % 39.97/40.17 (define @t366 () (or @t365 @t362)) % 39.97/40.17 (define @t367 () (tptp.node2 tptp.s95 tptp.s96)) % 39.97/40.17 (define @t368 () (or @t360 @t367)) % 39.97/40.17 (define @t369 () (not @t367)) % 39.97/40.17 (define @t370 () (not @t353)) % 39.97/40.17 (define @t371 () (not @t365)) % 39.97/40.17 (define @t372 () (or @t371 @t370 @t336 @t369)) % 39.97/40.17 (define @t373 () (@list tptp.s95 tptp.s94)) % 39.97/40.17 (define @t374 () (@list tptp.s94)) % 39.97/40.17 (define @t375 () (tptp.node4 tptp.s94)) % 39.97/40.17 (define @t376 () (not @t375)) % 39.97/40.17 (define @t377 () (tptp.always3 tptp.s94)) % 39.97/40.17 (define @t378 () (or @t377 @t376)) % 39.97/40.17 (define @t379 () (tptp.m_main_v_request tptp.s94)) % 39.97/40.17 (define @t380 () (or @t379 @t376)) % 39.97/40.17 (define @t381 () (@list tptp.s94 tptp.s95)) % 39.97/40.17 (define @t382 () (tptp.trans tptp.s94 tptp.s95)) % 39.97/40.17 (define @t383 () (not @t95)) % 39.97/40.17 (define @t384 () (or @t383 @t382)) % 39.97/40.17 (define @t385 () (not @t377)) % 39.97/40.17 (define @t386 () (not @t382)) % 39.97/40.17 (define @t387 () (or @t351 @t386 @t385)) % 39.97/40.17 (define @t388 () (tptp.m_main_v_state tptp.s94 tptp.c_busy)) % 39.97/40.17 (define @t389 () (not @t388)) % 39.97/40.17 (define @t390 () (or @t389 @t385)) % 39.97/40.17 (define @t391 () (tptp.m_main_v_state tptp.s94 tptp.c_ready)) % 39.97/40.17 (define @t392 () (or @t391 @t388)) % 39.97/40.17 (define @t393 () (tptp.node2 tptp.s94 tptp.s95)) % 39.97/40.17 (define @t394 () (or @t386 @t393)) % 39.97/40.17 (define @t395 () (not @t393)) % 39.97/40.17 (define @t396 () (not @t379)) % 39.97/40.17 (define @t397 () (not @t391)) % 39.97/40.17 (define @t398 () (or @t397 @t396 @t362 @t395)) % 39.97/40.17 (define @t399 () (@list tptp.s94 tptp.s93)) % 39.97/40.17 (define @t400 () (@list tptp.s93)) % 39.97/40.17 (define @t401 () (tptp.node4 tptp.s93)) % 39.97/40.17 (define @t402 () (not @t401)) % 39.97/40.17 (define @t403 () (tptp.always3 tptp.s93)) % 39.97/40.17 (define @t404 () (or @t403 @t402)) % 39.97/40.17 (define @t405 () (tptp.m_main_v_request tptp.s93)) % 39.97/40.17 (define @t406 () (or @t405 @t402)) % 39.97/40.17 (define @t407 () (@list tptp.s93 tptp.s94)) % 39.97/40.17 (define @t408 () (tptp.trans tptp.s93 tptp.s94)) % 39.97/40.17 (define @t409 () (not @t94)) % 39.97/40.17 (define @t410 () (or @t409 @t408)) % 39.97/40.17 (define @t411 () (not @t403)) % 39.97/40.17 (define @t412 () (not @t408)) % 39.97/40.17 (define @t413 () (or @t377 @t412 @t411)) % 39.97/40.17 (define @t414 () (tptp.m_main_v_state tptp.s93 tptp.c_busy)) % 39.97/40.17 (define @t415 () (not @t414)) % 39.97/40.17 (define @t416 () (or @t415 @t411)) % 39.97/40.17 (define @t417 () (tptp.m_main_v_state tptp.s93 tptp.c_ready)) % 39.97/40.17 (define @t418 () (or @t417 @t414)) % 39.97/40.17 (define @t419 () (tptp.node2 tptp.s93 tptp.s94)) % 39.97/40.17 (define @t420 () (or @t412 @t419)) % 39.97/40.17 (define @t421 () (not @t419)) % 39.97/40.17 (define @t422 () (not @t405)) % 39.97/40.17 (define @t423 () (not @t417)) % 39.97/40.17 (define @t424 () (or @t423 @t422 @t388 @t421)) % 39.97/40.17 (define @t425 () (@list tptp.s93 tptp.s92)) % 39.97/40.17 (define @t426 () (@list tptp.s92)) % 39.97/40.17 (define @t427 () (tptp.node4 tptp.s92)) % 39.97/40.17 (define @t428 () (not @t427)) % 39.97/40.17 (define @t429 () (tptp.always3 tptp.s92)) % 39.97/40.17 (define @t430 () (or @t429 @t428)) % 39.97/40.17 (define @t431 () (tptp.m_main_v_request tptp.s92)) % 39.97/40.17 (define @t432 () (or @t431 @t428)) % 39.97/40.17 (define @t433 () (@list tptp.s92 tptp.s93)) % 39.97/40.17 (define @t434 () (tptp.trans tptp.s92 tptp.s93)) % 39.97/40.17 (define @t435 () (not @t93)) % 39.97/40.17 (define @t436 () (or @t435 @t434)) % 39.97/40.17 (define @t437 () (not @t429)) % 39.97/40.17 (define @t438 () (not @t434)) % 39.97/40.17 (define @t439 () (or @t403 @t438 @t437)) % 39.97/40.17 (define @t440 () (tptp.m_main_v_state tptp.s92 tptp.c_busy)) % 39.97/40.17 (define @t441 () (not @t440)) % 39.97/40.17 (define @t442 () (or @t441 @t437)) % 39.97/40.17 (define @t443 () (tptp.m_main_v_state tptp.s92 tptp.c_ready)) % 39.97/40.17 (define @t444 () (or @t443 @t440)) % 39.97/40.17 (define @t445 () (tptp.node2 tptp.s92 tptp.s93)) % 39.97/40.17 (define @t446 () (or @t438 @t445)) % 39.97/40.17 (define @t447 () (not @t445)) % 39.97/40.17 (define @t448 () (not @t431)) % 39.97/40.17 (define @t449 () (not @t443)) % 39.97/40.17 (define @t450 () (or @t449 @t448 @t414 @t447)) % 39.97/40.17 (define @t451 () (@list tptp.s92 tptp.s91)) % 39.97/40.17 (define @t452 () (@list tptp.s91)) % 39.97/40.17 (define @t453 () (tptp.node4 tptp.s91)) % 39.97/40.17 (define @t454 () (not @t453)) % 39.97/40.17 (define @t455 () (tptp.always3 tptp.s91)) % 39.97/40.17 (define @t456 () (or @t455 @t454)) % 39.97/40.17 (define @t457 () (tptp.m_main_v_request tptp.s91)) % 39.97/40.17 (define @t458 () (or @t457 @t454)) % 39.97/40.17 (define @t459 () (@list tptp.s91 tptp.s92)) % 39.97/40.17 (define @t460 () (tptp.trans tptp.s91 tptp.s92)) % 39.97/40.17 (define @t461 () (not @t92)) % 39.97/40.17 (define @t462 () (or @t461 @t460)) % 39.97/40.17 (define @t463 () (not @t455)) % 39.97/40.17 (define @t464 () (not @t460)) % 39.97/40.17 (define @t465 () (or @t429 @t464 @t463)) % 39.97/40.17 (define @t466 () (tptp.m_main_v_state tptp.s91 tptp.c_busy)) % 39.97/40.17 (define @t467 () (not @t466)) % 39.97/40.17 (define @t468 () (or @t467 @t463)) % 39.97/40.17 (define @t469 () (tptp.m_main_v_state tptp.s91 tptp.c_ready)) % 39.97/40.17 (define @t470 () (or @t469 @t466)) % 39.97/40.17 (define @t471 () (tptp.node2 tptp.s91 tptp.s92)) % 39.97/40.17 (define @t472 () (or @t464 @t471)) % 39.97/40.17 (define @t473 () (not @t471)) % 39.97/40.17 (define @t474 () (not @t457)) % 39.97/40.17 (define @t475 () (not @t469)) % 39.97/40.17 (define @t476 () (or @t475 @t474 @t440 @t473)) % 39.97/40.17 (define @t477 () (@list tptp.s91 tptp.s90)) % 39.97/40.17 (define @t478 () (@list tptp.s90)) % 39.97/40.17 (define @t479 () (tptp.node4 tptp.s90)) % 39.97/40.17 (define @t480 () (not @t479)) % 39.97/40.17 (define @t481 () (tptp.always3 tptp.s90)) % 39.97/40.17 (define @t482 () (or @t481 @t480)) % 39.97/40.17 (define @t483 () (tptp.m_main_v_request tptp.s90)) % 39.97/40.17 (define @t484 () (or @t483 @t480)) % 39.97/40.17 (define @t485 () (@list tptp.s90 tptp.s91)) % 39.97/40.17 (define @t486 () (tptp.trans tptp.s90 tptp.s91)) % 39.97/40.17 (define @t487 () (not @t91)) % 39.97/40.17 (define @t488 () (or @t487 @t486)) % 39.97/40.17 (define @t489 () (not @t481)) % 39.97/40.17 (define @t490 () (not @t486)) % 39.97/40.17 (define @t491 () (or @t455 @t490 @t489)) % 39.97/40.17 (define @t492 () (tptp.m_main_v_state tptp.s90 tptp.c_busy)) % 39.97/40.17 (define @t493 () (not @t492)) % 39.97/40.17 (define @t494 () (or @t493 @t489)) % 39.97/40.17 (define @t495 () (tptp.m_main_v_state tptp.s90 tptp.c_ready)) % 39.97/40.17 (define @t496 () (or @t495 @t492)) % 39.97/40.17 (define @t497 () (tptp.node2 tptp.s90 tptp.s91)) % 39.97/40.17 (define @t498 () (or @t490 @t497)) % 39.97/40.17 (define @t499 () (not @t497)) % 39.97/40.17 (define @t500 () (not @t483)) % 39.97/40.17 (define @t501 () (not @t495)) % 39.97/40.17 (define @t502 () (or @t501 @t500 @t466 @t499)) % 39.97/40.17 (define @t503 () (@list tptp.s90 tptp.s89)) % 39.97/40.17 (define @t504 () (@list tptp.s89)) % 39.97/40.17 (define @t505 () (tptp.node4 tptp.s89)) % 39.97/40.17 (define @t506 () (not @t505)) % 39.97/40.17 (define @t507 () (tptp.always3 tptp.s89)) % 39.97/40.17 (define @t508 () (or @t507 @t506)) % 39.97/40.17 (define @t509 () (tptp.m_main_v_request tptp.s89)) % 39.97/40.17 (define @t510 () (or @t509 @t506)) % 39.97/40.17 (define @t511 () (@list tptp.s89 tptp.s90)) % 39.97/40.17 (define @t512 () (tptp.trans tptp.s89 tptp.s90)) % 39.97/40.17 (define @t513 () (not @t90)) % 39.97/40.17 (define @t514 () (or @t513 @t512)) % 39.97/40.17 (define @t515 () (not @t507)) % 39.97/40.17 (define @t516 () (not @t512)) % 39.97/40.17 (define @t517 () (or @t481 @t516 @t515)) % 39.97/40.17 (define @t518 () (tptp.m_main_v_state tptp.s89 tptp.c_busy)) % 39.97/40.17 (define @t519 () (not @t518)) % 39.97/40.17 (define @t520 () (or @t519 @t515)) % 39.97/40.17 (define @t521 () (tptp.m_main_v_state tptp.s89 tptp.c_ready)) % 39.97/40.17 (define @t522 () (or @t521 @t518)) % 39.97/40.17 (define @t523 () (tptp.node2 tptp.s89 tptp.s90)) % 39.97/40.17 (define @t524 () (or @t516 @t523)) % 39.97/40.17 (define @t525 () (not @t523)) % 39.97/40.17 (define @t526 () (not @t509)) % 39.97/40.17 (define @t527 () (not @t521)) % 39.97/40.17 (define @t528 () (or @t527 @t526 @t492 @t525)) % 39.97/40.17 (define @t529 () (@list tptp.s89 tptp.s88)) % 39.97/40.17 (define @t530 () (@list tptp.s88)) % 39.97/40.17 (define @t531 () (tptp.node4 tptp.s88)) % 39.97/40.17 (define @t532 () (not @t531)) % 39.97/40.17 (define @t533 () (tptp.always3 tptp.s88)) % 39.97/40.17 (define @t534 () (or @t533 @t532)) % 39.97/40.17 (define @t535 () (tptp.m_main_v_request tptp.s88)) % 39.97/40.17 (define @t536 () (or @t535 @t532)) % 39.97/40.17 (define @t537 () (@list tptp.s88 tptp.s89)) % 39.97/40.17 (define @t538 () (tptp.trans tptp.s88 tptp.s89)) % 39.97/40.17 (define @t539 () (not @t89)) % 39.97/40.17 (define @t540 () (or @t539 @t538)) % 39.97/40.17 (define @t541 () (not @t533)) % 39.97/40.17 (define @t542 () (not @t538)) % 39.97/40.17 (define @t543 () (or @t507 @t542 @t541)) % 39.97/40.17 (define @t544 () (tptp.m_main_v_state tptp.s88 tptp.c_busy)) % 39.97/40.17 (define @t545 () (not @t544)) % 39.97/40.17 (define @t546 () (or @t545 @t541)) % 39.97/40.17 (define @t547 () (tptp.m_main_v_state tptp.s88 tptp.c_ready)) % 39.97/40.17 (define @t548 () (or @t547 @t544)) % 39.97/40.17 (define @t549 () (tptp.node2 tptp.s88 tptp.s89)) % 39.97/40.17 (define @t550 () (or @t542 @t549)) % 39.97/40.17 (define @t551 () (not @t549)) % 39.97/40.17 (define @t552 () (not @t535)) % 39.97/40.17 (define @t553 () (not @t547)) % 39.97/40.17 (define @t554 () (or @t553 @t552 @t518 @t551)) % 39.97/40.17 (define @t555 () (@list tptp.s88 tptp.s87)) % 39.97/40.17 (define @t556 () (@list tptp.s87)) % 39.97/40.17 (define @t557 () (tptp.node4 tptp.s87)) % 39.97/40.17 (define @t558 () (not @t557)) % 39.97/40.17 (define @t559 () (tptp.always3 tptp.s87)) % 39.97/40.17 (define @t560 () (or @t559 @t558)) % 39.97/40.17 (define @t561 () (tptp.m_main_v_request tptp.s87)) % 39.97/40.17 (define @t562 () (or @t561 @t558)) % 39.97/40.17 (define @t563 () (@list tptp.s87 tptp.s88)) % 39.97/40.17 (define @t564 () (tptp.trans tptp.s87 tptp.s88)) % 39.97/40.17 (define @t565 () (not @t88)) % 39.97/40.17 (define @t566 () (or @t565 @t564)) % 39.97/40.17 (define @t567 () (not @t559)) % 39.97/40.17 (define @t568 () (not @t564)) % 39.97/40.17 (define @t569 () (or @t533 @t568 @t567)) % 39.97/40.17 (define @t570 () (tptp.m_main_v_state tptp.s87 tptp.c_busy)) % 39.97/40.17 (define @t571 () (not @t570)) % 39.97/40.17 (define @t572 () (or @t571 @t567)) % 39.97/40.17 (define @t573 () (tptp.m_main_v_state tptp.s87 tptp.c_ready)) % 39.97/40.17 (define @t574 () (or @t573 @t570)) % 39.97/40.17 (define @t575 () (tptp.node2 tptp.s87 tptp.s88)) % 39.97/40.17 (define @t576 () (or @t568 @t575)) % 39.97/40.17 (define @t577 () (not @t575)) % 39.97/40.17 (define @t578 () (not @t561)) % 39.97/40.17 (define @t579 () (not @t573)) % 39.97/40.17 (define @t580 () (or @t579 @t578 @t544 @t577)) % 39.97/40.17 (define @t581 () (@list tptp.s87 tptp.s86)) % 39.97/40.17 (define @t582 () (@list tptp.s86)) % 39.97/40.17 (define @t583 () (tptp.node4 tptp.s86)) % 39.97/40.17 (define @t584 () (not @t583)) % 39.97/40.17 (define @t585 () (tptp.always3 tptp.s86)) % 39.97/40.17 (define @t586 () (or @t585 @t584)) % 39.97/40.17 (define @t587 () (tptp.m_main_v_request tptp.s86)) % 39.97/40.17 (define @t588 () (or @t587 @t584)) % 39.97/40.17 (define @t589 () (@list tptp.s86 tptp.s87)) % 39.97/40.17 (define @t590 () (tptp.trans tptp.s86 tptp.s87)) % 39.97/40.17 (define @t591 () (not @t87)) % 39.97/40.17 (define @t592 () (or @t591 @t590)) % 39.97/40.17 (define @t593 () (not @t585)) % 39.97/40.17 (define @t594 () (not @t590)) % 39.97/40.17 (define @t595 () (or @t559 @t594 @t593)) % 39.97/40.17 (define @t596 () (tptp.m_main_v_state tptp.s86 tptp.c_busy)) % 39.97/40.17 (define @t597 () (not @t596)) % 39.97/40.17 (define @t598 () (or @t597 @t593)) % 39.97/40.17 (define @t599 () (tptp.m_main_v_state tptp.s86 tptp.c_ready)) % 39.97/40.17 (define @t600 () (or @t599 @t596)) % 39.97/40.17 (define @t601 () (tptp.node2 tptp.s86 tptp.s87)) % 39.97/40.17 (define @t602 () (or @t594 @t601)) % 39.97/40.17 (define @t603 () (not @t601)) % 39.97/40.17 (define @t604 () (not @t587)) % 39.97/40.17 (define @t605 () (not @t599)) % 39.97/40.17 (define @t606 () (or @t605 @t604 @t570 @t603)) % 39.97/40.17 (define @t607 () (@list tptp.s86 tptp.s85)) % 39.97/40.17 (define @t608 () (@list tptp.s85)) % 39.97/40.17 (define @t609 () (tptp.node4 tptp.s85)) % 39.97/40.17 (define @t610 () (not @t609)) % 39.97/40.17 (define @t611 () (tptp.always3 tptp.s85)) % 39.97/40.17 (define @t612 () (or @t611 @t610)) % 39.97/40.17 (define @t613 () (tptp.m_main_v_request tptp.s85)) % 39.97/40.17 (define @t614 () (or @t613 @t610)) % 39.97/40.17 (define @t615 () (@list tptp.s85 tptp.s86)) % 39.97/40.17 (define @t616 () (tptp.trans tptp.s85 tptp.s86)) % 39.97/40.17 (define @t617 () (not @t86)) % 39.97/40.17 (define @t618 () (or @t617 @t616)) % 39.97/40.17 (define @t619 () (not @t611)) % 39.97/40.17 (define @t620 () (not @t616)) % 39.97/40.17 (define @t621 () (or @t585 @t620 @t619)) % 39.97/40.17 (define @t622 () (tptp.m_main_v_state tptp.s85 tptp.c_busy)) % 39.97/40.17 (define @t623 () (not @t622)) % 39.97/40.17 (define @t624 () (or @t623 @t619)) % 39.97/40.17 (define @t625 () (tptp.m_main_v_state tptp.s85 tptp.c_ready)) % 39.97/40.17 (define @t626 () (or @t625 @t622)) % 39.97/40.17 (define @t627 () (tptp.node2 tptp.s85 tptp.s86)) % 39.97/40.17 (define @t628 () (or @t620 @t627)) % 39.97/40.17 (define @t629 () (not @t627)) % 39.97/40.17 (define @t630 () (not @t613)) % 39.97/40.17 (define @t631 () (not @t625)) % 39.97/40.17 (define @t632 () (or @t631 @t630 @t596 @t629)) % 39.97/40.17 (define @t633 () (@list tptp.s85 tptp.s84)) % 39.97/40.17 (define @t634 () (@list tptp.s84)) % 39.97/40.17 (define @t635 () (tptp.node4 tptp.s84)) % 39.97/40.17 (define @t636 () (not @t635)) % 39.97/40.17 (define @t637 () (tptp.always3 tptp.s84)) % 39.97/40.17 (define @t638 () (or @t637 @t636)) % 39.97/40.17 (define @t639 () (tptp.m_main_v_request tptp.s84)) % 39.97/40.17 (define @t640 () (or @t639 @t636)) % 39.97/40.17 (define @t641 () (@list tptp.s84 tptp.s85)) % 39.97/40.17 (define @t642 () (tptp.trans tptp.s84 tptp.s85)) % 39.97/40.17 (define @t643 () (not @t85)) % 39.97/40.17 (define @t644 () (or @t643 @t642)) % 39.97/40.17 (define @t645 () (not @t637)) % 39.97/40.17 (define @t646 () (not @t642)) % 39.97/40.17 (define @t647 () (or @t611 @t646 @t645)) % 39.97/40.17 (define @t648 () (tptp.m_main_v_state tptp.s84 tptp.c_busy)) % 39.97/40.17 (define @t649 () (not @t648)) % 39.97/40.17 (define @t650 () (or @t649 @t645)) % 39.97/40.17 (define @t651 () (tptp.m_main_v_state tptp.s84 tptp.c_ready)) % 39.97/40.17 (define @t652 () (or @t651 @t648)) % 39.97/40.17 (define @t653 () (tptp.node2 tptp.s84 tptp.s85)) % 39.97/40.17 (define @t654 () (or @t646 @t653)) % 39.97/40.17 (define @t655 () (not @t653)) % 39.97/40.17 (define @t656 () (not @t639)) % 39.97/40.17 (define @t657 () (not @t651)) % 39.97/40.17 (define @t658 () (or @t657 @t656 @t622 @t655)) % 39.97/40.17 (define @t659 () (@list tptp.s84 tptp.s83)) % 39.97/40.17 (define @t660 () (@list tptp.s83)) % 39.97/40.17 (define @t661 () (tptp.node4 tptp.s83)) % 39.97/40.17 (define @t662 () (not @t661)) % 39.97/40.17 (define @t663 () (tptp.always3 tptp.s83)) % 39.97/40.17 (define @t664 () (or @t663 @t662)) % 39.97/40.17 (define @t665 () (tptp.m_main_v_request tptp.s83)) % 39.97/40.17 (define @t666 () (or @t665 @t662)) % 39.97/40.17 (define @t667 () (@list tptp.s83 tptp.s84)) % 39.97/40.17 (define @t668 () (tptp.trans tptp.s83 tptp.s84)) % 39.97/40.17 (define @t669 () (not @t84)) % 39.97/40.17 (define @t670 () (or @t669 @t668)) % 39.97/40.17 (define @t671 () (not @t663)) % 39.97/40.17 (define @t672 () (not @t668)) % 39.97/40.17 (define @t673 () (or @t637 @t672 @t671)) % 39.97/40.17 (define @t674 () (tptp.m_main_v_state tptp.s83 tptp.c_busy)) % 39.97/40.17 (define @t675 () (not @t674)) % 39.97/40.17 (define @t676 () (or @t675 @t671)) % 39.97/40.17 (define @t677 () (tptp.m_main_v_state tptp.s83 tptp.c_ready)) % 39.97/40.17 (define @t678 () (or @t677 @t674)) % 39.97/40.17 (define @t679 () (tptp.node2 tptp.s83 tptp.s84)) % 39.97/40.17 (define @t680 () (or @t672 @t679)) % 39.97/40.17 (define @t681 () (not @t679)) % 39.97/40.17 (define @t682 () (not @t665)) % 39.97/40.17 (define @t683 () (not @t677)) % 39.97/40.17 (define @t684 () (or @t683 @t682 @t648 @t681)) % 39.97/40.17 (define @t685 () (@list tptp.s83 tptp.s82)) % 39.97/40.17 (define @t686 () (@list tptp.s82)) % 39.97/40.17 (define @t687 () (tptp.node4 tptp.s82)) % 39.97/40.17 (define @t688 () (not @t687)) % 39.97/40.17 (define @t689 () (tptp.always3 tptp.s82)) % 39.97/40.17 (define @t690 () (or @t689 @t688)) % 39.97/40.17 (define @t691 () (tptp.m_main_v_request tptp.s82)) % 39.97/40.17 (define @t692 () (or @t691 @t688)) % 39.97/40.17 (define @t693 () (@list tptp.s82 tptp.s83)) % 39.97/40.17 (define @t694 () (tptp.trans tptp.s82 tptp.s83)) % 39.97/40.17 (define @t695 () (not @t83)) % 39.97/40.17 (define @t696 () (or @t695 @t694)) % 39.97/40.17 (define @t697 () (not @t689)) % 39.97/40.17 (define @t698 () (not @t694)) % 39.97/40.17 (define @t699 () (or @t663 @t698 @t697)) % 39.97/40.17 (define @t700 () (tptp.m_main_v_state tptp.s82 tptp.c_busy)) % 39.97/40.17 (define @t701 () (not @t700)) % 39.97/40.17 (define @t702 () (or @t701 @t697)) % 39.97/40.17 (define @t703 () (tptp.m_main_v_state tptp.s82 tptp.c_ready)) % 39.97/40.17 (define @t704 () (or @t703 @t700)) % 39.97/40.17 (define @t705 () (tptp.node2 tptp.s82 tptp.s83)) % 39.97/40.17 (define @t706 () (or @t698 @t705)) % 39.97/40.17 (define @t707 () (not @t705)) % 39.97/40.17 (define @t708 () (not @t691)) % 39.97/40.17 (define @t709 () (not @t703)) % 39.97/40.17 (define @t710 () (or @t709 @t708 @t674 @t707)) % 39.97/40.17 (define @t711 () (@list tptp.s82 tptp.s81)) % 39.97/40.17 (define @t712 () (@list tptp.s81)) % 39.97/40.17 (define @t713 () (tptp.node4 tptp.s81)) % 39.97/40.17 (define @t714 () (not @t713)) % 39.97/40.17 (define @t715 () (tptp.always3 tptp.s81)) % 39.97/40.17 (define @t716 () (or @t715 @t714)) % 39.97/40.17 (define @t717 () (tptp.m_main_v_request tptp.s81)) % 39.97/40.17 (define @t718 () (or @t717 @t714)) % 39.97/40.17 (define @t719 () (@list tptp.s81 tptp.s82)) % 39.97/40.17 (define @t720 () (tptp.trans tptp.s81 tptp.s82)) % 39.97/40.17 (define @t721 () (not @t82)) % 39.97/40.17 (define @t722 () (or @t721 @t720)) % 39.97/40.17 (define @t723 () (not @t715)) % 39.97/40.17 (define @t724 () (not @t720)) % 39.97/40.17 (define @t725 () (or @t689 @t724 @t723)) % 39.97/40.17 (define @t726 () (tptp.m_main_v_state tptp.s81 tptp.c_busy)) % 39.97/40.17 (define @t727 () (not @t726)) % 39.97/40.17 (define @t728 () (or @t727 @t723)) % 39.97/40.17 (define @t729 () (tptp.m_main_v_state tptp.s81 tptp.c_ready)) % 39.97/40.17 (define @t730 () (or @t729 @t726)) % 39.97/40.17 (define @t731 () (tptp.node2 tptp.s81 tptp.s82)) % 39.97/40.17 (define @t732 () (or @t724 @t731)) % 39.97/40.17 (define @t733 () (not @t731)) % 39.97/40.17 (define @t734 () (not @t717)) % 39.97/40.17 (define @t735 () (not @t729)) % 39.97/40.17 (define @t736 () (or @t735 @t734 @t700 @t733)) % 39.97/40.17 (define @t737 () (@list tptp.s81 tptp.s80)) % 39.97/40.17 (define @t738 () (@list tptp.s80)) % 39.97/40.17 (define @t739 () (tptp.node4 tptp.s80)) % 39.97/40.17 (define @t740 () (not @t739)) % 39.97/40.17 (define @t741 () (tptp.always3 tptp.s80)) % 39.97/40.17 (define @t742 () (or @t741 @t740)) % 39.97/40.17 (define @t743 () (tptp.m_main_v_request tptp.s80)) % 39.97/40.17 (define @t744 () (or @t743 @t740)) % 39.97/40.17 (define @t745 () (@list tptp.s80 tptp.s81)) % 39.97/40.17 (define @t746 () (tptp.trans tptp.s80 tptp.s81)) % 39.97/40.17 (define @t747 () (not @t81)) % 39.97/40.17 (define @t748 () (or @t747 @t746)) % 39.97/40.17 (define @t749 () (not @t741)) % 39.97/40.17 (define @t750 () (not @t746)) % 39.97/40.17 (define @t751 () (or @t715 @t750 @t749)) % 39.97/40.17 (define @t752 () (tptp.m_main_v_state tptp.s80 tptp.c_busy)) % 39.97/40.17 (define @t753 () (not @t752)) % 39.97/40.17 (define @t754 () (or @t753 @t749)) % 39.97/40.17 (define @t755 () (tptp.m_main_v_state tptp.s80 tptp.c_ready)) % 39.97/40.17 (define @t756 () (or @t755 @t752)) % 39.97/40.17 (define @t757 () (tptp.node2 tptp.s80 tptp.s81)) % 39.97/40.17 (define @t758 () (or @t750 @t757)) % 39.97/40.17 (define @t759 () (not @t757)) % 39.97/40.17 (define @t760 () (not @t743)) % 39.97/40.17 (define @t761 () (not @t755)) % 39.97/40.17 (define @t762 () (or @t761 @t760 @t726 @t759)) % 39.97/40.17 (define @t763 () (@list tptp.s80 tptp.s79)) % 39.97/40.17 (define @t764 () (@list tptp.s79)) % 39.97/40.17 (define @t765 () (tptp.node4 tptp.s79)) % 39.97/40.17 (define @t766 () (not @t765)) % 39.97/40.17 (define @t767 () (tptp.always3 tptp.s79)) % 39.97/40.17 (define @t768 () (or @t767 @t766)) % 39.97/40.17 (define @t769 () (tptp.m_main_v_request tptp.s79)) % 39.97/40.17 (define @t770 () (or @t769 @t766)) % 39.97/40.17 (define @t771 () (@list tptp.s79 tptp.s80)) % 39.97/40.17 (define @t772 () (tptp.trans tptp.s79 tptp.s80)) % 39.97/40.17 (define @t773 () (not @t80)) % 39.97/40.17 (define @t774 () (or @t773 @t772)) % 39.97/40.17 (define @t775 () (not @t767)) % 39.97/40.17 (define @t776 () (not @t772)) % 39.97/40.17 (define @t777 () (or @t741 @t776 @t775)) % 39.97/40.17 (define @t778 () (tptp.m_main_v_state tptp.s79 tptp.c_busy)) % 39.97/40.17 (define @t779 () (not @t778)) % 39.97/40.17 (define @t780 () (or @t779 @t775)) % 39.97/40.17 (define @t781 () (tptp.m_main_v_state tptp.s79 tptp.c_ready)) % 39.97/40.17 (define @t782 () (or @t781 @t778)) % 39.97/40.17 (define @t783 () (tptp.node2 tptp.s79 tptp.s80)) % 39.97/40.17 (define @t784 () (or @t776 @t783)) % 39.97/40.17 (define @t785 () (not @t783)) % 39.97/40.17 (define @t786 () (not @t769)) % 39.97/40.17 (define @t787 () (not @t781)) % 39.97/40.17 (define @t788 () (or @t787 @t786 @t752 @t785)) % 39.97/40.17 (define @t789 () (@list tptp.s79 tptp.s78)) % 39.97/40.17 (define @t790 () (@list tptp.s78)) % 39.97/40.17 (define @t791 () (tptp.node4 tptp.s78)) % 39.97/40.17 (define @t792 () (not @t791)) % 39.97/40.17 (define @t793 () (tptp.always3 tptp.s78)) % 39.97/40.17 (define @t794 () (or @t793 @t792)) % 39.97/40.17 (define @t795 () (tptp.m_main_v_request tptp.s78)) % 39.97/40.17 (define @t796 () (or @t795 @t792)) % 39.97/40.17 (define @t797 () (@list tptp.s78 tptp.s79)) % 39.97/40.17 (define @t798 () (tptp.trans tptp.s78 tptp.s79)) % 39.97/40.17 (define @t799 () (not @t79)) % 39.97/40.17 (define @t800 () (or @t799 @t798)) % 39.97/40.17 (define @t801 () (not @t793)) % 39.97/40.17 (define @t802 () (not @t798)) % 39.97/40.17 (define @t803 () (or @t767 @t802 @t801)) % 39.97/40.17 (define @t804 () (tptp.m_main_v_state tptp.s78 tptp.c_busy)) % 39.97/40.17 (define @t805 () (not @t804)) % 39.97/40.17 (define @t806 () (or @t805 @t801)) % 39.97/40.17 (define @t807 () (tptp.m_main_v_state tptp.s78 tptp.c_ready)) % 39.97/40.17 (define @t808 () (or @t807 @t804)) % 39.97/40.17 (define @t809 () (tptp.node2 tptp.s78 tptp.s79)) % 39.97/40.17 (define @t810 () (or @t802 @t809)) % 39.97/40.17 (define @t811 () (not @t809)) % 39.97/40.17 (define @t812 () (not @t795)) % 39.97/40.17 (define @t813 () (not @t807)) % 39.97/40.17 (define @t814 () (or @t813 @t812 @t778 @t811)) % 39.97/40.17 (define @t815 () (@list tptp.s78 tptp.s77)) % 39.97/40.17 (define @t816 () (@list tptp.s77)) % 39.97/40.17 (define @t817 () (tptp.node4 tptp.s77)) % 39.97/40.17 (define @t818 () (not @t817)) % 39.97/40.17 (define @t819 () (tptp.always3 tptp.s77)) % 39.97/40.17 (define @t820 () (or @t819 @t818)) % 39.97/40.17 (define @t821 () (tptp.m_main_v_request tptp.s77)) % 39.97/40.17 (define @t822 () (or @t821 @t818)) % 39.97/40.17 (define @t823 () (@list tptp.s77 tptp.s78)) % 39.97/40.17 (define @t824 () (tptp.trans tptp.s77 tptp.s78)) % 39.97/40.17 (define @t825 () (not @t78)) % 39.97/40.17 (define @t826 () (or @t825 @t824)) % 39.97/40.17 (define @t827 () (not @t819)) % 39.97/40.17 (define @t828 () (not @t824)) % 39.97/40.17 (define @t829 () (or @t793 @t828 @t827)) % 39.97/40.17 (define @t830 () (tptp.m_main_v_state tptp.s77 tptp.c_busy)) % 39.97/40.17 (define @t831 () (not @t830)) % 39.97/40.17 (define @t832 () (or @t831 @t827)) % 39.97/40.17 (define @t833 () (tptp.m_main_v_state tptp.s77 tptp.c_ready)) % 39.97/40.17 (define @t834 () (or @t833 @t830)) % 39.97/40.17 (define @t835 () (tptp.node2 tptp.s77 tptp.s78)) % 39.97/40.17 (define @t836 () (or @t828 @t835)) % 39.97/40.17 (define @t837 () (not @t835)) % 39.97/40.17 (define @t838 () (not @t821)) % 39.97/40.17 (define @t839 () (not @t833)) % 39.97/40.17 (define @t840 () (or @t839 @t838 @t804 @t837)) % 39.97/40.17 (define @t841 () (@list tptp.s77 tptp.s76)) % 39.97/40.17 (define @t842 () (@list tptp.s76)) % 39.97/40.17 (define @t843 () (tptp.node4 tptp.s76)) % 39.97/40.17 (define @t844 () (not @t843)) % 39.97/40.17 (define @t845 () (tptp.always3 tptp.s76)) % 39.97/40.17 (define @t846 () (or @t845 @t844)) % 39.97/40.17 (define @t847 () (tptp.m_main_v_request tptp.s76)) % 39.97/40.17 (define @t848 () (or @t847 @t844)) % 39.97/40.17 (define @t849 () (@list tptp.s76 tptp.s77)) % 39.97/40.17 (define @t850 () (tptp.trans tptp.s76 tptp.s77)) % 39.97/40.17 (define @t851 () (not @t77)) % 39.97/40.17 (define @t852 () (or @t851 @t850)) % 39.97/40.17 (define @t853 () (not @t845)) % 39.97/40.17 (define @t854 () (not @t850)) % 39.97/40.17 (define @t855 () (or @t819 @t854 @t853)) % 39.97/40.17 (define @t856 () (tptp.m_main_v_state tptp.s76 tptp.c_busy)) % 39.97/40.17 (define @t857 () (not @t856)) % 39.97/40.17 (define @t858 () (or @t857 @t853)) % 39.97/40.17 (define @t859 () (tptp.m_main_v_state tptp.s76 tptp.c_ready)) % 39.97/40.17 (define @t860 () (or @t859 @t856)) % 39.97/40.17 (define @t861 () (tptp.node2 tptp.s76 tptp.s77)) % 39.97/40.17 (define @t862 () (or @t854 @t861)) % 39.97/40.17 (define @t863 () (not @t861)) % 39.97/40.17 (define @t864 () (not @t847)) % 39.97/40.17 (define @t865 () (not @t859)) % 39.97/40.17 (define @t866 () (or @t865 @t864 @t830 @t863)) % 39.97/40.17 (define @t867 () (@list tptp.s76 tptp.s75)) % 39.97/40.17 (define @t868 () (@list tptp.s75)) % 39.97/40.17 (define @t869 () (tptp.node4 tptp.s75)) % 39.97/40.17 (define @t870 () (not @t869)) % 39.97/40.17 (define @t871 () (tptp.always3 tptp.s75)) % 39.97/40.17 (define @t872 () (or @t871 @t870)) % 39.97/40.17 (define @t873 () (tptp.m_main_v_request tptp.s75)) % 39.97/40.17 (define @t874 () (or @t873 @t870)) % 39.97/40.17 (define @t875 () (@list tptp.s75 tptp.s76)) % 39.97/40.17 (define @t876 () (tptp.trans tptp.s75 tptp.s76)) % 39.97/40.17 (define @t877 () (not @t76)) % 39.97/40.17 (define @t878 () (or @t877 @t876)) % 39.97/40.17 (define @t879 () (not @t871)) % 39.97/40.17 (define @t880 () (not @t876)) % 39.97/40.17 (define @t881 () (or @t845 @t880 @t879)) % 39.97/40.17 (define @t882 () (tptp.m_main_v_state tptp.s75 tptp.c_busy)) % 39.97/40.17 (define @t883 () (not @t882)) % 39.97/40.17 (define @t884 () (or @t883 @t879)) % 39.97/40.17 (define @t885 () (tptp.m_main_v_state tptp.s75 tptp.c_ready)) % 39.97/40.17 (define @t886 () (or @t885 @t882)) % 39.97/40.17 (define @t887 () (tptp.node2 tptp.s75 tptp.s76)) % 39.97/40.17 (define @t888 () (or @t880 @t887)) % 39.97/40.17 (define @t889 () (not @t887)) % 39.97/40.17 (define @t890 () (not @t873)) % 39.97/40.17 (define @t891 () (not @t885)) % 39.97/40.17 (define @t892 () (or @t891 @t890 @t856 @t889)) % 39.97/40.17 (define @t893 () (@list tptp.s75 tptp.s74)) % 39.97/40.17 (define @t894 () (@list tptp.s74)) % 39.97/40.17 (define @t895 () (tptp.node4 tptp.s74)) % 39.97/40.17 (define @t896 () (not @t895)) % 39.97/40.17 (define @t897 () (tptp.always3 tptp.s74)) % 39.97/40.17 (define @t898 () (or @t897 @t896)) % 39.97/40.17 (define @t899 () (tptp.m_main_v_request tptp.s74)) % 39.97/40.17 (define @t900 () (or @t899 @t896)) % 39.97/40.17 (define @t901 () (@list tptp.s74 tptp.s75)) % 39.97/40.17 (define @t902 () (tptp.trans tptp.s74 tptp.s75)) % 39.97/40.17 (define @t903 () (not @t75)) % 39.97/40.17 (define @t904 () (or @t903 @t902)) % 39.97/40.17 (define @t905 () (not @t897)) % 39.97/40.17 (define @t906 () (not @t902)) % 39.97/40.17 (define @t907 () (or @t871 @t906 @t905)) % 39.97/40.17 (define @t908 () (tptp.m_main_v_state tptp.s74 tptp.c_busy)) % 39.97/40.17 (define @t909 () (not @t908)) % 39.97/40.17 (define @t910 () (or @t909 @t905)) % 39.97/40.17 (define @t911 () (tptp.m_main_v_state tptp.s74 tptp.c_ready)) % 39.97/40.17 (define @t912 () (or @t911 @t908)) % 39.97/40.17 (define @t913 () (tptp.node2 tptp.s74 tptp.s75)) % 39.97/40.17 (define @t914 () (or @t906 @t913)) % 39.97/40.17 (define @t915 () (not @t913)) % 39.97/40.17 (define @t916 () (not @t899)) % 39.97/40.17 (define @t917 () (not @t911)) % 39.97/40.17 (define @t918 () (or @t917 @t916 @t882 @t915)) % 39.97/40.17 (define @t919 () (@list tptp.s74 tptp.s73)) % 39.97/40.17 (define @t920 () (@list tptp.s73)) % 39.97/40.17 (define @t921 () (tptp.node4 tptp.s73)) % 39.97/40.17 (define @t922 () (not @t921)) % 39.97/40.17 (define @t923 () (tptp.always3 tptp.s73)) % 39.97/40.17 (define @t924 () (or @t923 @t922)) % 39.97/40.17 (define @t925 () (tptp.m_main_v_request tptp.s73)) % 39.97/40.17 (define @t926 () (or @t925 @t922)) % 39.97/40.17 (define @t927 () (@list tptp.s73 tptp.s74)) % 39.97/40.17 (define @t928 () (tptp.trans tptp.s73 tptp.s74)) % 39.97/40.17 (define @t929 () (not @t74)) % 39.97/40.17 (define @t930 () (or @t929 @t928)) % 39.97/40.17 (define @t931 () (not @t923)) % 39.97/40.17 (define @t932 () (not @t928)) % 39.97/40.17 (define @t933 () (or @t897 @t932 @t931)) % 39.97/40.17 (define @t934 () (tptp.m_main_v_state tptp.s73 tptp.c_busy)) % 39.97/40.17 (define @t935 () (not @t934)) % 39.97/40.17 (define @t936 () (or @t935 @t931)) % 39.97/40.17 (define @t937 () (tptp.m_main_v_state tptp.s73 tptp.c_ready)) % 39.97/40.17 (define @t938 () (or @t937 @t934)) % 39.97/40.17 (define @t939 () (tptp.node2 tptp.s73 tptp.s74)) % 39.97/40.17 (define @t940 () (or @t932 @t939)) % 39.97/40.17 (define @t941 () (not @t939)) % 39.97/40.17 (define @t942 () (not @t925)) % 39.97/40.17 (define @t943 () (not @t937)) % 39.97/40.17 (define @t944 () (or @t943 @t942 @t908 @t941)) % 39.97/40.17 (define @t945 () (@list tptp.s73 tptp.s72)) % 39.97/40.17 (define @t946 () (@list tptp.s72)) % 39.97/40.17 (define @t947 () (tptp.node4 tptp.s72)) % 39.97/40.17 (define @t948 () (not @t947)) % 39.97/40.17 (define @t949 () (tptp.always3 tptp.s72)) % 39.97/40.17 (define @t950 () (or @t949 @t948)) % 39.97/40.17 (define @t951 () (tptp.m_main_v_request tptp.s72)) % 39.97/40.17 (define @t952 () (or @t951 @t948)) % 39.97/40.17 (define @t953 () (@list tptp.s72 tptp.s73)) % 39.97/40.17 (define @t954 () (tptp.trans tptp.s72 tptp.s73)) % 39.97/40.17 (define @t955 () (not @t73)) % 39.97/40.17 (define @t956 () (or @t955 @t954)) % 39.97/40.17 (define @t957 () (not @t949)) % 39.97/40.17 (define @t958 () (not @t954)) % 39.97/40.17 (define @t959 () (or @t923 @t958 @t957)) % 39.97/40.17 (define @t960 () (tptp.m_main_v_state tptp.s72 tptp.c_busy)) % 39.97/40.17 (define @t961 () (not @t960)) % 39.97/40.17 (define @t962 () (or @t961 @t957)) % 39.97/40.17 (define @t963 () (tptp.m_main_v_state tptp.s72 tptp.c_ready)) % 39.97/40.17 (define @t964 () (or @t963 @t960)) % 39.97/40.17 (define @t965 () (tptp.node2 tptp.s72 tptp.s73)) % 39.97/40.17 (define @t966 () (or @t958 @t965)) % 39.97/40.17 (define @t967 () (not @t965)) % 39.97/40.17 (define @t968 () (not @t951)) % 39.97/40.17 (define @t969 () (not @t963)) % 39.97/40.17 (define @t970 () (or @t969 @t968 @t934 @t967)) % 39.97/40.17 (define @t971 () (@list tptp.s72 tptp.s71)) % 39.97/40.17 (define @t972 () (@list tptp.s71)) % 39.97/40.17 (define @t973 () (tptp.node4 tptp.s71)) % 39.97/40.17 (define @t974 () (not @t973)) % 39.97/40.17 (define @t975 () (tptp.always3 tptp.s71)) % 39.97/40.17 (define @t976 () (or @t975 @t974)) % 39.97/40.17 (define @t977 () (tptp.m_main_v_request tptp.s71)) % 39.97/40.17 (define @t978 () (or @t977 @t974)) % 39.97/40.17 (define @t979 () (@list tptp.s71 tptp.s72)) % 39.97/40.17 (define @t980 () (tptp.trans tptp.s71 tptp.s72)) % 39.97/40.17 (define @t981 () (not @t72)) % 39.97/40.17 (define @t982 () (or @t981 @t980)) % 39.97/40.17 (define @t983 () (not @t975)) % 39.97/40.17 (define @t984 () (not @t980)) % 39.97/40.17 (define @t985 () (or @t949 @t984 @t983)) % 39.97/40.17 (define @t986 () (tptp.m_main_v_state tptp.s71 tptp.c_busy)) % 39.97/40.17 (define @t987 () (not @t986)) % 39.97/40.17 (define @t988 () (or @t987 @t983)) % 39.97/40.17 (define @t989 () (tptp.m_main_v_state tptp.s71 tptp.c_ready)) % 39.97/40.17 (define @t990 () (or @t989 @t986)) % 39.97/40.17 (define @t991 () (tptp.node2 tptp.s71 tptp.s72)) % 39.97/40.17 (define @t992 () (or @t984 @t991)) % 39.97/40.17 (define @t993 () (not @t991)) % 39.97/40.17 (define @t994 () (not @t977)) % 39.97/40.17 (define @t995 () (not @t989)) % 39.97/40.17 (define @t996 () (or @t995 @t994 @t960 @t993)) % 39.97/40.17 (define @t997 () (@list tptp.s71 tptp.s70)) % 39.97/40.17 (define @t998 () (@list tptp.s70)) % 39.97/40.17 (define @t999 () (tptp.node4 tptp.s70)) % 39.97/40.17 (define @t1000 () (not @t999)) % 39.97/40.17 (define @t1001 () (tptp.always3 tptp.s70)) % 39.97/40.17 (define @t1002 () (or @t1001 @t1000)) % 39.97/40.17 (define @t1003 () (tptp.m_main_v_request tptp.s70)) % 39.97/40.17 (define @t1004 () (or @t1003 @t1000)) % 39.97/40.17 (define @t1005 () (@list tptp.s70 tptp.s71)) % 39.97/40.17 (define @t1006 () (tptp.trans tptp.s70 tptp.s71)) % 39.97/40.17 (define @t1007 () (not @t71)) % 39.97/40.17 (define @t1008 () (or @t1007 @t1006)) % 39.97/40.17 (define @t1009 () (not @t1001)) % 39.97/40.17 (define @t1010 () (not @t1006)) % 39.97/40.17 (define @t1011 () (or @t975 @t1010 @t1009)) % 39.97/40.17 (define @t1012 () (tptp.m_main_v_state tptp.s70 tptp.c_busy)) % 39.97/40.17 (define @t1013 () (not @t1012)) % 39.97/40.17 (define @t1014 () (or @t1013 @t1009)) % 39.97/40.17 (define @t1015 () (tptp.m_main_v_state tptp.s70 tptp.c_ready)) % 39.97/40.17 (define @t1016 () (or @t1015 @t1012)) % 39.97/40.17 (define @t1017 () (tptp.node2 tptp.s70 tptp.s71)) % 39.97/40.17 (define @t1018 () (or @t1010 @t1017)) % 39.97/40.17 (define @t1019 () (not @t1017)) % 39.97/40.17 (define @t1020 () (not @t1003)) % 39.97/40.17 (define @t1021 () (not @t1015)) % 39.97/40.17 (define @t1022 () (or @t1021 @t1020 @t986 @t1019)) % 39.97/40.17 (define @t1023 () (@list tptp.s70 tptp.s69)) % 39.97/40.17 (define @t1024 () (@list tptp.s69)) % 39.97/40.17 (define @t1025 () (tptp.node4 tptp.s69)) % 39.97/40.17 (define @t1026 () (not @t1025)) % 39.97/40.17 (define @t1027 () (tptp.always3 tptp.s69)) % 39.97/40.17 (define @t1028 () (or @t1027 @t1026)) % 39.97/40.17 (define @t1029 () (tptp.m_main_v_request tptp.s69)) % 39.97/40.17 (define @t1030 () (or @t1029 @t1026)) % 39.97/40.17 (define @t1031 () (@list tptp.s69 tptp.s70)) % 39.97/40.17 (define @t1032 () (tptp.trans tptp.s69 tptp.s70)) % 39.97/40.17 (define @t1033 () (not @t70)) % 39.97/40.17 (define @t1034 () (or @t1033 @t1032)) % 39.97/40.17 (define @t1035 () (not @t1027)) % 39.97/40.17 (define @t1036 () (not @t1032)) % 39.97/40.17 (define @t1037 () (or @t1001 @t1036 @t1035)) % 39.97/40.17 (define @t1038 () (tptp.m_main_v_state tptp.s69 tptp.c_busy)) % 39.97/40.17 (define @t1039 () (not @t1038)) % 39.97/40.17 (define @t1040 () (or @t1039 @t1035)) % 39.97/40.17 (define @t1041 () (tptp.m_main_v_state tptp.s69 tptp.c_ready)) % 39.97/40.17 (define @t1042 () (or @t1041 @t1038)) % 39.97/40.17 (define @t1043 () (tptp.node2 tptp.s69 tptp.s70)) % 39.97/40.17 (define @t1044 () (or @t1036 @t1043)) % 39.97/40.17 (define @t1045 () (not @t1043)) % 39.97/40.17 (define @t1046 () (not @t1029)) % 39.97/40.17 (define @t1047 () (not @t1041)) % 39.97/40.17 (define @t1048 () (or @t1047 @t1046 @t1012 @t1045)) % 39.97/40.17 (define @t1049 () (@list tptp.s69 tptp.s68)) % 39.97/40.17 (define @t1050 () (@list tptp.s68)) % 39.97/40.17 (define @t1051 () (tptp.node4 tptp.s68)) % 39.97/40.17 (define @t1052 () (not @t1051)) % 39.97/40.17 (define @t1053 () (tptp.always3 tptp.s68)) % 39.97/40.17 (define @t1054 () (or @t1053 @t1052)) % 39.97/40.17 (define @t1055 () (tptp.m_main_v_request tptp.s68)) % 39.97/40.17 (define @t1056 () (or @t1055 @t1052)) % 39.97/40.17 (define @t1057 () (@list tptp.s68 tptp.s69)) % 39.97/40.17 (define @t1058 () (tptp.trans tptp.s68 tptp.s69)) % 39.97/40.17 (define @t1059 () (not @t69)) % 39.97/40.17 (define @t1060 () (or @t1059 @t1058)) % 39.97/40.17 (define @t1061 () (not @t1053)) % 39.97/40.17 (define @t1062 () (not @t1058)) % 39.97/40.17 (define @t1063 () (or @t1027 @t1062 @t1061)) % 39.97/40.17 (define @t1064 () (tptp.m_main_v_state tptp.s68 tptp.c_busy)) % 39.97/40.17 (define @t1065 () (not @t1064)) % 39.97/40.17 (define @t1066 () (or @t1065 @t1061)) % 39.97/40.17 (define @t1067 () (tptp.m_main_v_state tptp.s68 tptp.c_ready)) % 39.97/40.17 (define @t1068 () (or @t1067 @t1064)) % 39.97/40.17 (define @t1069 () (tptp.node2 tptp.s68 tptp.s69)) % 39.97/40.17 (define @t1070 () (or @t1062 @t1069)) % 39.97/40.17 (define @t1071 () (not @t1069)) % 39.97/40.17 (define @t1072 () (not @t1055)) % 39.97/40.17 (define @t1073 () (not @t1067)) % 39.97/40.17 (define @t1074 () (or @t1073 @t1072 @t1038 @t1071)) % 39.97/40.17 (define @t1075 () (@list tptp.s68 tptp.s67)) % 39.97/40.17 (define @t1076 () (@list tptp.s67)) % 39.97/40.17 (define @t1077 () (tptp.node4 tptp.s67)) % 39.97/40.17 (define @t1078 () (not @t1077)) % 39.97/40.17 (define @t1079 () (tptp.always3 tptp.s67)) % 39.97/40.17 (define @t1080 () (or @t1079 @t1078)) % 39.97/40.17 (define @t1081 () (tptp.m_main_v_request tptp.s67)) % 39.97/40.17 (define @t1082 () (or @t1081 @t1078)) % 39.97/40.17 (define @t1083 () (@list tptp.s67 tptp.s68)) % 39.97/40.17 (define @t1084 () (tptp.trans tptp.s67 tptp.s68)) % 39.97/40.17 (define @t1085 () (not @t68)) % 39.97/40.17 (define @t1086 () (or @t1085 @t1084)) % 39.97/40.17 (define @t1087 () (not @t1079)) % 39.97/40.17 (define @t1088 () (not @t1084)) % 39.97/40.17 (define @t1089 () (or @t1053 @t1088 @t1087)) % 39.97/40.17 (define @t1090 () (tptp.m_main_v_state tptp.s67 tptp.c_busy)) % 39.97/40.17 (define @t1091 () (not @t1090)) % 39.97/40.17 (define @t1092 () (or @t1091 @t1087)) % 39.97/40.17 (define @t1093 () (tptp.m_main_v_state tptp.s67 tptp.c_ready)) % 39.97/40.17 (define @t1094 () (or @t1093 @t1090)) % 39.97/40.17 (define @t1095 () (tptp.node2 tptp.s67 tptp.s68)) % 39.97/40.17 (define @t1096 () (or @t1088 @t1095)) % 39.97/40.17 (define @t1097 () (not @t1095)) % 39.97/40.17 (define @t1098 () (not @t1081)) % 39.97/40.17 (define @t1099 () (not @t1093)) % 39.97/40.17 (define @t1100 () (or @t1099 @t1098 @t1064 @t1097)) % 39.97/40.17 (define @t1101 () (@list tptp.s67 tptp.s66)) % 39.97/40.17 (define @t1102 () (@list tptp.s66)) % 39.97/40.17 (define @t1103 () (tptp.node4 tptp.s66)) % 39.97/40.17 (define @t1104 () (not @t1103)) % 39.97/40.17 (define @t1105 () (tptp.always3 tptp.s66)) % 39.97/40.17 (define @t1106 () (or @t1105 @t1104)) % 39.97/40.17 (define @t1107 () (tptp.m_main_v_request tptp.s66)) % 39.97/40.17 (define @t1108 () (or @t1107 @t1104)) % 39.97/40.17 (define @t1109 () (@list tptp.s66 tptp.s67)) % 39.97/40.17 (define @t1110 () (tptp.trans tptp.s66 tptp.s67)) % 39.97/40.17 (define @t1111 () (not @t67)) % 39.97/40.17 (define @t1112 () (or @t1111 @t1110)) % 39.97/40.17 (define @t1113 () (not @t1105)) % 39.97/40.17 (define @t1114 () (not @t1110)) % 39.97/40.17 (define @t1115 () (or @t1079 @t1114 @t1113)) % 39.97/40.17 (define @t1116 () (tptp.m_main_v_state tptp.s66 tptp.c_busy)) % 39.97/40.17 (define @t1117 () (not @t1116)) % 39.97/40.17 (define @t1118 () (or @t1117 @t1113)) % 39.97/40.17 (define @t1119 () (tptp.m_main_v_state tptp.s66 tptp.c_ready)) % 39.97/40.17 (define @t1120 () (or @t1119 @t1116)) % 39.97/40.17 (define @t1121 () (tptp.node2 tptp.s66 tptp.s67)) % 39.97/40.17 (define @t1122 () (or @t1114 @t1121)) % 39.97/40.17 (define @t1123 () (not @t1121)) % 39.97/40.17 (define @t1124 () (not @t1107)) % 39.97/40.17 (define @t1125 () (not @t1119)) % 39.97/40.17 (define @t1126 () (or @t1125 @t1124 @t1090 @t1123)) % 39.97/40.17 (define @t1127 () (@list tptp.s66 tptp.s65)) % 39.97/40.17 (define @t1128 () (@list tptp.s65)) % 39.97/40.17 (define @t1129 () (tptp.node4 tptp.s65)) % 39.97/40.17 (define @t1130 () (not @t1129)) % 39.97/40.17 (define @t1131 () (tptp.always3 tptp.s65)) % 39.97/40.17 (define @t1132 () (or @t1131 @t1130)) % 39.97/40.17 (define @t1133 () (tptp.m_main_v_request tptp.s65)) % 39.97/40.17 (define @t1134 () (or @t1133 @t1130)) % 39.97/40.17 (define @t1135 () (@list tptp.s65 tptp.s66)) % 39.97/40.17 (define @t1136 () (tptp.trans tptp.s65 tptp.s66)) % 39.97/40.17 (define @t1137 () (not @t66)) % 39.97/40.17 (define @t1138 () (or @t1137 @t1136)) % 39.97/40.17 (define @t1139 () (not @t1131)) % 39.97/40.17 (define @t1140 () (not @t1136)) % 39.97/40.17 (define @t1141 () (or @t1105 @t1140 @t1139)) % 39.97/40.17 (define @t1142 () (tptp.m_main_v_state tptp.s65 tptp.c_busy)) % 39.97/40.17 (define @t1143 () (not @t1142)) % 39.97/40.17 (define @t1144 () (or @t1143 @t1139)) % 39.97/40.17 (define @t1145 () (tptp.m_main_v_state tptp.s65 tptp.c_ready)) % 39.97/40.17 (define @t1146 () (or @t1145 @t1142)) % 39.97/40.17 (define @t1147 () (tptp.node2 tptp.s65 tptp.s66)) % 39.97/40.17 (define @t1148 () (or @t1140 @t1147)) % 39.97/40.17 (define @t1149 () (not @t1147)) % 39.97/40.17 (define @t1150 () (not @t1133)) % 39.97/40.17 (define @t1151 () (not @t1145)) % 39.97/40.17 (define @t1152 () (or @t1151 @t1150 @t1116 @t1149)) % 39.97/40.17 (define @t1153 () (@list tptp.s65 tptp.s64)) % 39.97/40.17 (define @t1154 () (@list tptp.s64)) % 39.97/40.17 (define @t1155 () (tptp.node4 tptp.s64)) % 39.97/40.17 (define @t1156 () (not @t1155)) % 39.97/40.17 (define @t1157 () (tptp.always3 tptp.s64)) % 39.97/40.17 (define @t1158 () (or @t1157 @t1156)) % 39.97/40.17 (define @t1159 () (tptp.m_main_v_request tptp.s64)) % 39.97/40.17 (define @t1160 () (or @t1159 @t1156)) % 39.97/40.17 (define @t1161 () (@list tptp.s64 tptp.s65)) % 39.97/40.17 (define @t1162 () (tptp.trans tptp.s64 tptp.s65)) % 39.97/40.17 (define @t1163 () (not @t65)) % 39.97/40.17 (define @t1164 () (or @t1163 @t1162)) % 39.97/40.17 (define @t1165 () (not @t1157)) % 39.97/40.17 (define @t1166 () (not @t1162)) % 39.97/40.17 (define @t1167 () (or @t1131 @t1166 @t1165)) % 39.97/40.17 (define @t1168 () (tptp.m_main_v_state tptp.s64 tptp.c_busy)) % 39.97/40.17 (define @t1169 () (not @t1168)) % 39.97/40.17 (define @t1170 () (or @t1169 @t1165)) % 39.97/40.17 (define @t1171 () (tptp.m_main_v_state tptp.s64 tptp.c_ready)) % 39.97/40.17 (define @t1172 () (or @t1171 @t1168)) % 39.97/40.17 (define @t1173 () (tptp.node2 tptp.s64 tptp.s65)) % 39.97/40.17 (define @t1174 () (or @t1166 @t1173)) % 39.97/40.17 (define @t1175 () (not @t1173)) % 39.97/40.17 (define @t1176 () (not @t1159)) % 39.97/40.17 (define @t1177 () (not @t1171)) % 39.97/40.17 (define @t1178 () (or @t1177 @t1176 @t1142 @t1175)) % 39.97/40.17 (define @t1179 () (@list tptp.s64 tptp.s63)) % 39.97/40.17 (define @t1180 () (@list tptp.s63)) % 39.97/40.17 (define @t1181 () (tptp.node4 tptp.s63)) % 39.97/40.17 (define @t1182 () (not @t1181)) % 39.97/40.17 (define @t1183 () (tptp.always3 tptp.s63)) % 39.97/40.17 (define @t1184 () (or @t1183 @t1182)) % 39.97/40.17 (define @t1185 () (tptp.m_main_v_request tptp.s63)) % 39.97/40.17 (define @t1186 () (or @t1185 @t1182)) % 39.97/40.17 (define @t1187 () (@list tptp.s63 tptp.s64)) % 39.97/40.17 (define @t1188 () (tptp.trans tptp.s63 tptp.s64)) % 39.97/40.17 (define @t1189 () (not @t64)) % 39.97/40.17 (define @t1190 () (or @t1189 @t1188)) % 39.97/40.17 (define @t1191 () (not @t1183)) % 39.97/40.17 (define @t1192 () (not @t1188)) % 39.97/40.17 (define @t1193 () (or @t1157 @t1192 @t1191)) % 39.97/40.17 (define @t1194 () (tptp.m_main_v_state tptp.s63 tptp.c_busy)) % 39.97/40.17 (define @t1195 () (not @t1194)) % 39.97/40.17 (define @t1196 () (or @t1195 @t1191)) % 39.97/40.17 (define @t1197 () (tptp.m_main_v_state tptp.s63 tptp.c_ready)) % 39.97/40.17 (define @t1198 () (or @t1197 @t1194)) % 39.97/40.17 (define @t1199 () (tptp.node2 tptp.s63 tptp.s64)) % 39.97/40.17 (define @t1200 () (or @t1192 @t1199)) % 39.97/40.17 (define @t1201 () (not @t1199)) % 39.97/40.17 (define @t1202 () (not @t1185)) % 39.97/40.17 (define @t1203 () (not @t1197)) % 39.97/40.17 (define @t1204 () (or @t1203 @t1202 @t1168 @t1201)) % 39.97/40.17 (define @t1205 () (@list tptp.s63 tptp.s62)) % 39.97/40.17 (define @t1206 () (@list tptp.s62)) % 39.97/40.17 (define @t1207 () (tptp.node4 tptp.s62)) % 39.97/40.17 (define @t1208 () (not @t1207)) % 39.97/40.17 (define @t1209 () (tptp.always3 tptp.s62)) % 39.97/40.17 (define @t1210 () (or @t1209 @t1208)) % 39.97/40.17 (define @t1211 () (tptp.m_main_v_request tptp.s62)) % 39.97/40.17 (define @t1212 () (or @t1211 @t1208)) % 39.97/40.17 (define @t1213 () (@list tptp.s62 tptp.s63)) % 39.97/40.17 (define @t1214 () (tptp.trans tptp.s62 tptp.s63)) % 39.97/40.17 (define @t1215 () (not @t63)) % 39.97/40.17 (define @t1216 () (or @t1215 @t1214)) % 39.97/40.17 (define @t1217 () (not @t1209)) % 39.97/40.17 (define @t1218 () (not @t1214)) % 39.97/40.17 (define @t1219 () (or @t1183 @t1218 @t1217)) % 39.97/40.17 (define @t1220 () (tptp.m_main_v_state tptp.s62 tptp.c_busy)) % 39.97/40.17 (define @t1221 () (not @t1220)) % 39.97/40.17 (define @t1222 () (or @t1221 @t1217)) % 39.97/40.17 (define @t1223 () (tptp.m_main_v_state tptp.s62 tptp.c_ready)) % 39.97/40.17 (define @t1224 () (or @t1223 @t1220)) % 39.97/40.17 (define @t1225 () (tptp.node2 tptp.s62 tptp.s63)) % 39.97/40.17 (define @t1226 () (or @t1218 @t1225)) % 39.97/40.17 (define @t1227 () (not @t1225)) % 39.97/40.17 (define @t1228 () (not @t1211)) % 39.97/40.17 (define @t1229 () (not @t1223)) % 39.97/40.17 (define @t1230 () (or @t1229 @t1228 @t1194 @t1227)) % 39.97/40.17 (define @t1231 () (@list tptp.s62 tptp.s61)) % 39.97/40.17 (define @t1232 () (@list tptp.s61)) % 39.97/40.17 (define @t1233 () (tptp.node4 tptp.s61)) % 39.97/40.17 (define @t1234 () (not @t1233)) % 39.97/40.17 (define @t1235 () (tptp.always3 tptp.s61)) % 39.97/40.17 (define @t1236 () (or @t1235 @t1234)) % 39.97/40.17 (define @t1237 () (tptp.m_main_v_request tptp.s61)) % 39.97/40.17 (define @t1238 () (or @t1237 @t1234)) % 39.97/40.17 (define @t1239 () (@list tptp.s61 tptp.s62)) % 39.97/40.17 (define @t1240 () (tptp.trans tptp.s61 tptp.s62)) % 39.97/40.17 (define @t1241 () (not @t62)) % 39.97/40.17 (define @t1242 () (or @t1241 @t1240)) % 39.97/40.17 (define @t1243 () (not @t1235)) % 39.97/40.17 (define @t1244 () (not @t1240)) % 39.97/40.17 (define @t1245 () (or @t1209 @t1244 @t1243)) % 39.97/40.17 (define @t1246 () (tptp.m_main_v_state tptp.s61 tptp.c_busy)) % 39.97/40.17 (define @t1247 () (not @t1246)) % 39.97/40.17 (define @t1248 () (or @t1247 @t1243)) % 39.97/40.17 (define @t1249 () (tptp.m_main_v_state tptp.s61 tptp.c_ready)) % 39.97/40.17 (define @t1250 () (or @t1249 @t1246)) % 39.97/40.17 (define @t1251 () (tptp.node2 tptp.s61 tptp.s62)) % 39.97/40.17 (define @t1252 () (or @t1244 @t1251)) % 39.97/40.17 (define @t1253 () (not @t1251)) % 39.97/40.17 (define @t1254 () (not @t1237)) % 39.97/40.17 (define @t1255 () (not @t1249)) % 39.97/40.17 (define @t1256 () (or @t1255 @t1254 @t1220 @t1253)) % 39.97/40.17 (define @t1257 () (@list tptp.s61 tptp.s60)) % 39.97/40.17 (define @t1258 () (@list tptp.s60)) % 39.97/40.17 (define @t1259 () (tptp.node4 tptp.s60)) % 39.97/40.17 (define @t1260 () (not @t1259)) % 39.97/40.17 (define @t1261 () (tptp.always3 tptp.s60)) % 39.97/40.17 (define @t1262 () (or @t1261 @t1260)) % 39.97/40.17 (define @t1263 () (tptp.m_main_v_request tptp.s60)) % 39.97/40.17 (define @t1264 () (or @t1263 @t1260)) % 39.97/40.17 (define @t1265 () (@list tptp.s60 tptp.s61)) % 39.97/40.17 (define @t1266 () (tptp.trans tptp.s60 tptp.s61)) % 39.97/40.17 (define @t1267 () (not @t61)) % 39.97/40.17 (define @t1268 () (or @t1267 @t1266)) % 39.97/40.17 (define @t1269 () (not @t1261)) % 39.97/40.17 (define @t1270 () (not @t1266)) % 39.97/40.17 (define @t1271 () (or @t1235 @t1270 @t1269)) % 39.97/40.17 (define @t1272 () (tptp.m_main_v_state tptp.s60 tptp.c_busy)) % 39.97/40.17 (define @t1273 () (not @t1272)) % 39.97/40.17 (define @t1274 () (or @t1273 @t1269)) % 39.97/40.17 (define @t1275 () (tptp.m_main_v_state tptp.s60 tptp.c_ready)) % 39.97/40.17 (define @t1276 () (or @t1275 @t1272)) % 39.97/40.17 (define @t1277 () (tptp.node2 tptp.s60 tptp.s61)) % 39.97/40.17 (define @t1278 () (or @t1270 @t1277)) % 39.97/40.17 (define @t1279 () (not @t1277)) % 39.97/40.17 (define @t1280 () (not @t1263)) % 39.97/40.17 (define @t1281 () (not @t1275)) % 39.97/40.17 (define @t1282 () (or @t1281 @t1280 @t1246 @t1279)) % 39.97/40.17 (define @t1283 () (@list tptp.s60 tptp.s59)) % 39.97/40.17 (define @t1284 () (@list tptp.s59)) % 39.97/40.17 (define @t1285 () (tptp.node4 tptp.s59)) % 39.97/40.17 (define @t1286 () (not @t1285)) % 39.97/40.17 (define @t1287 () (tptp.always3 tptp.s59)) % 39.97/40.17 (define @t1288 () (or @t1287 @t1286)) % 39.97/40.17 (define @t1289 () (tptp.m_main_v_request tptp.s59)) % 39.97/40.17 (define @t1290 () (or @t1289 @t1286)) % 39.97/40.17 (define @t1291 () (@list tptp.s59 tptp.s60)) % 39.97/40.17 (define @t1292 () (tptp.trans tptp.s59 tptp.s60)) % 39.97/40.17 (define @t1293 () (not @t60)) % 39.97/40.17 (define @t1294 () (or @t1293 @t1292)) % 39.97/40.17 (define @t1295 () (not @t1287)) % 39.97/40.17 (define @t1296 () (not @t1292)) % 39.97/40.17 (define @t1297 () (or @t1261 @t1296 @t1295)) % 39.97/40.17 (define @t1298 () (tptp.m_main_v_state tptp.s59 tptp.c_busy)) % 39.97/40.17 (define @t1299 () (not @t1298)) % 39.97/40.17 (define @t1300 () (or @t1299 @t1295)) % 39.97/40.17 (define @t1301 () (tptp.m_main_v_state tptp.s59 tptp.c_ready)) % 39.97/40.17 (define @t1302 () (or @t1301 @t1298)) % 39.97/40.17 (define @t1303 () (tptp.node2 tptp.s59 tptp.s60)) % 39.97/40.17 (define @t1304 () (or @t1296 @t1303)) % 39.97/40.17 (define @t1305 () (not @t1303)) % 39.97/40.17 (define @t1306 () (not @t1289)) % 39.97/40.17 (define @t1307 () (not @t1301)) % 39.97/40.17 (define @t1308 () (or @t1307 @t1306 @t1272 @t1305)) % 39.97/40.17 (define @t1309 () (@list tptp.s59 tptp.s58)) % 39.97/40.17 (define @t1310 () (@list tptp.s58)) % 39.97/40.17 (define @t1311 () (tptp.node4 tptp.s58)) % 39.97/40.17 (define @t1312 () (not @t1311)) % 39.97/40.17 (define @t1313 () (tptp.always3 tptp.s58)) % 39.97/40.17 (define @t1314 () (or @t1313 @t1312)) % 39.97/40.17 (define @t1315 () (tptp.m_main_v_request tptp.s58)) % 39.97/40.17 (define @t1316 () (or @t1315 @t1312)) % 39.97/40.17 (define @t1317 () (@list tptp.s58 tptp.s59)) % 39.97/40.17 (define @t1318 () (tptp.trans tptp.s58 tptp.s59)) % 39.97/40.17 (define @t1319 () (not @t59)) % 39.97/40.17 (define @t1320 () (or @t1319 @t1318)) % 39.97/40.17 (define @t1321 () (not @t1313)) % 39.97/40.17 (define @t1322 () (not @t1318)) % 39.97/40.17 (define @t1323 () (or @t1287 @t1322 @t1321)) % 39.97/40.17 (define @t1324 () (tptp.m_main_v_state tptp.s58 tptp.c_busy)) % 39.97/40.17 (define @t1325 () (not @t1324)) % 39.97/40.17 (define @t1326 () (or @t1325 @t1321)) % 39.97/40.17 (define @t1327 () (tptp.m_main_v_state tptp.s58 tptp.c_ready)) % 39.97/40.17 (define @t1328 () (or @t1327 @t1324)) % 39.97/40.17 (define @t1329 () (tptp.node2 tptp.s58 tptp.s59)) % 39.97/40.17 (define @t1330 () (or @t1322 @t1329)) % 39.97/40.17 (define @t1331 () (not @t1329)) % 39.97/40.17 (define @t1332 () (not @t1315)) % 39.97/40.17 (define @t1333 () (not @t1327)) % 39.97/40.17 (define @t1334 () (or @t1333 @t1332 @t1298 @t1331)) % 39.97/40.17 (define @t1335 () (@list tptp.s58 tptp.s57)) % 39.97/40.17 (define @t1336 () (@list tptp.s57)) % 39.97/40.17 (define @t1337 () (tptp.node4 tptp.s57)) % 39.97/40.17 (define @t1338 () (not @t1337)) % 39.97/40.17 (define @t1339 () (tptp.always3 tptp.s57)) % 39.97/40.17 (define @t1340 () (or @t1339 @t1338)) % 39.97/40.17 (define @t1341 () (tptp.m_main_v_request tptp.s57)) % 39.97/40.17 (define @t1342 () (or @t1341 @t1338)) % 39.97/40.17 (define @t1343 () (@list tptp.s57 tptp.s58)) % 39.97/40.17 (define @t1344 () (tptp.trans tptp.s57 tptp.s58)) % 39.97/40.17 (define @t1345 () (not @t58)) % 39.97/40.17 (define @t1346 () (or @t1345 @t1344)) % 39.97/40.17 (define @t1347 () (not @t1339)) % 39.97/40.17 (define @t1348 () (not @t1344)) % 39.97/40.17 (define @t1349 () (or @t1313 @t1348 @t1347)) % 39.97/40.17 (define @t1350 () (tptp.m_main_v_state tptp.s57 tptp.c_busy)) % 39.97/40.17 (define @t1351 () (not @t1350)) % 39.97/40.17 (define @t1352 () (or @t1351 @t1347)) % 39.97/40.17 (define @t1353 () (tptp.m_main_v_state tptp.s57 tptp.c_ready)) % 39.97/40.17 (define @t1354 () (or @t1353 @t1350)) % 39.97/40.17 (define @t1355 () (tptp.node2 tptp.s57 tptp.s58)) % 39.97/40.17 (define @t1356 () (or @t1348 @t1355)) % 39.97/40.17 (define @t1357 () (not @t1355)) % 39.97/40.17 (define @t1358 () (not @t1341)) % 39.97/40.17 (define @t1359 () (not @t1353)) % 39.97/40.17 (define @t1360 () (or @t1359 @t1358 @t1324 @t1357)) % 39.97/40.17 (define @t1361 () (@list tptp.s57 tptp.s56)) % 39.97/40.17 (define @t1362 () (@list tptp.s56)) % 39.97/40.17 (define @t1363 () (tptp.node4 tptp.s56)) % 39.97/40.17 (define @t1364 () (not @t1363)) % 39.97/40.17 (define @t1365 () (tptp.always3 tptp.s56)) % 39.97/40.17 (define @t1366 () (or @t1365 @t1364)) % 39.97/40.17 (define @t1367 () (tptp.m_main_v_request tptp.s56)) % 39.97/40.17 (define @t1368 () (or @t1367 @t1364)) % 39.97/40.17 (define @t1369 () (@list tptp.s56 tptp.s57)) % 39.97/40.17 (define @t1370 () (tptp.trans tptp.s56 tptp.s57)) % 39.97/40.17 (define @t1371 () (not @t57)) % 39.97/40.17 (define @t1372 () (or @t1371 @t1370)) % 39.97/40.17 (define @t1373 () (not @t1365)) % 39.97/40.17 (define @t1374 () (not @t1370)) % 39.97/40.17 (define @t1375 () (or @t1339 @t1374 @t1373)) % 39.97/40.17 (define @t1376 () (tptp.m_main_v_state tptp.s56 tptp.c_busy)) % 39.97/40.17 (define @t1377 () (not @t1376)) % 39.97/40.17 (define @t1378 () (or @t1377 @t1373)) % 39.97/40.17 (define @t1379 () (tptp.m_main_v_state tptp.s56 tptp.c_ready)) % 39.97/40.17 (define @t1380 () (or @t1379 @t1376)) % 39.97/40.17 (define @t1381 () (tptp.node2 tptp.s56 tptp.s57)) % 39.97/40.17 (define @t1382 () (or @t1374 @t1381)) % 39.97/40.17 (define @t1383 () (not @t1381)) % 39.97/40.17 (define @t1384 () (not @t1367)) % 39.97/40.17 (define @t1385 () (not @t1379)) % 39.97/40.17 (define @t1386 () (or @t1385 @t1384 @t1350 @t1383)) % 39.97/40.17 (define @t1387 () (@list tptp.s56 tptp.s55)) % 39.97/40.17 (define @t1388 () (@list tptp.s55)) % 39.97/40.17 (define @t1389 () (tptp.node4 tptp.s55)) % 39.97/40.17 (define @t1390 () (not @t1389)) % 39.97/40.17 (define @t1391 () (tptp.always3 tptp.s55)) % 39.97/40.17 (define @t1392 () (or @t1391 @t1390)) % 39.97/40.17 (define @t1393 () (tptp.m_main_v_request tptp.s55)) % 39.97/40.17 (define @t1394 () (or @t1393 @t1390)) % 39.97/40.17 (define @t1395 () (@list tptp.s55 tptp.s56)) % 39.97/40.17 (define @t1396 () (tptp.trans tptp.s55 tptp.s56)) % 39.97/40.17 (define @t1397 () (not @t56)) % 39.97/40.17 (define @t1398 () (or @t1397 @t1396)) % 39.97/40.17 (define @t1399 () (not @t1391)) % 39.97/40.17 (define @t1400 () (not @t1396)) % 39.97/40.17 (define @t1401 () (or @t1365 @t1400 @t1399)) % 39.97/40.17 (define @t1402 () (tptp.m_main_v_state tptp.s55 tptp.c_busy)) % 39.97/40.17 (define @t1403 () (not @t1402)) % 39.97/40.17 (define @t1404 () (or @t1403 @t1399)) % 39.97/40.17 (define @t1405 () (tptp.m_main_v_state tptp.s55 tptp.c_ready)) % 39.97/40.17 (define @t1406 () (or @t1405 @t1402)) % 39.97/40.17 (define @t1407 () (tptp.node2 tptp.s55 tptp.s56)) % 39.97/40.17 (define @t1408 () (or @t1400 @t1407)) % 39.97/40.17 (define @t1409 () (not @t1407)) % 39.97/40.17 (define @t1410 () (not @t1393)) % 39.97/40.17 (define @t1411 () (not @t1405)) % 39.97/40.17 (define @t1412 () (or @t1411 @t1410 @t1376 @t1409)) % 39.97/40.17 (define @t1413 () (@list tptp.s55 tptp.s54)) % 39.97/40.17 (define @t1414 () (@list tptp.s54)) % 39.97/40.17 (define @t1415 () (tptp.node4 tptp.s54)) % 39.97/40.17 (define @t1416 () (not @t1415)) % 39.97/40.17 (define @t1417 () (tptp.always3 tptp.s54)) % 39.97/40.17 (define @t1418 () (or @t1417 @t1416)) % 39.97/40.17 (define @t1419 () (tptp.m_main_v_request tptp.s54)) % 39.97/40.17 (define @t1420 () (or @t1419 @t1416)) % 39.97/40.17 (define @t1421 () (@list tptp.s54 tptp.s55)) % 39.97/40.17 (define @t1422 () (tptp.trans tptp.s54 tptp.s55)) % 39.97/40.17 (define @t1423 () (not @t55)) % 39.97/40.17 (define @t1424 () (or @t1423 @t1422)) % 39.97/40.17 (define @t1425 () (not @t1417)) % 39.97/40.17 (define @t1426 () (not @t1422)) % 39.97/40.17 (define @t1427 () (or @t1391 @t1426 @t1425)) % 39.97/40.17 (define @t1428 () (tptp.m_main_v_state tptp.s54 tptp.c_busy)) % 39.97/40.17 (define @t1429 () (not @t1428)) % 39.97/40.17 (define @t1430 () (or @t1429 @t1425)) % 39.97/40.17 (define @t1431 () (tptp.m_main_v_state tptp.s54 tptp.c_ready)) % 39.97/40.17 (define @t1432 () (or @t1431 @t1428)) % 39.97/40.17 (define @t1433 () (tptp.node2 tptp.s54 tptp.s55)) % 39.97/40.17 (define @t1434 () (or @t1426 @t1433)) % 39.97/40.17 (define @t1435 () (not @t1433)) % 39.97/40.17 (define @t1436 () (not @t1419)) % 39.97/40.17 (define @t1437 () (not @t1431)) % 39.97/40.17 (define @t1438 () (or @t1437 @t1436 @t1402 @t1435)) % 39.97/40.17 (define @t1439 () (@list tptp.s54 tptp.s53)) % 39.97/40.17 (define @t1440 () (@list tptp.s53)) % 39.97/40.17 (define @t1441 () (tptp.node4 tptp.s53)) % 39.97/40.17 (define @t1442 () (not @t1441)) % 39.97/40.17 (define @t1443 () (tptp.always3 tptp.s53)) % 39.97/40.17 (define @t1444 () (or @t1443 @t1442)) % 39.97/40.17 (define @t1445 () (tptp.m_main_v_request tptp.s53)) % 39.97/40.17 (define @t1446 () (or @t1445 @t1442)) % 39.97/40.17 (define @t1447 () (@list tptp.s53 tptp.s54)) % 39.97/40.17 (define @t1448 () (tptp.trans tptp.s53 tptp.s54)) % 39.97/40.17 (define @t1449 () (not @t54)) % 39.97/40.17 (define @t1450 () (or @t1449 @t1448)) % 39.97/40.17 (define @t1451 () (not @t1443)) % 39.97/40.17 (define @t1452 () (not @t1448)) % 39.97/40.17 (define @t1453 () (or @t1417 @t1452 @t1451)) % 39.97/40.17 (define @t1454 () (tptp.m_main_v_state tptp.s53 tptp.c_busy)) % 39.97/40.17 (define @t1455 () (not @t1454)) % 39.97/40.17 (define @t1456 () (or @t1455 @t1451)) % 39.97/40.17 (define @t1457 () (tptp.m_main_v_state tptp.s53 tptp.c_ready)) % 39.97/40.17 (define @t1458 () (or @t1457 @t1454)) % 39.97/40.17 (define @t1459 () (tptp.node2 tptp.s53 tptp.s54)) % 39.97/40.17 (define @t1460 () (or @t1452 @t1459)) % 39.97/40.17 (define @t1461 () (not @t1459)) % 39.97/40.17 (define @t1462 () (not @t1445)) % 39.97/40.17 (define @t1463 () (not @t1457)) % 39.97/40.17 (define @t1464 () (or @t1463 @t1462 @t1428 @t1461)) % 39.97/40.17 (define @t1465 () (@list tptp.s53 tptp.s52)) % 39.97/40.17 (define @t1466 () (@list tptp.s52)) % 39.97/40.17 (define @t1467 () (tptp.node4 tptp.s52)) % 39.97/40.17 (define @t1468 () (not @t1467)) % 39.97/40.17 (define @t1469 () (tptp.always3 tptp.s52)) % 39.97/40.17 (define @t1470 () (or @t1469 @t1468)) % 39.97/40.17 (define @t1471 () (tptp.m_main_v_request tptp.s52)) % 39.97/40.17 (define @t1472 () (or @t1471 @t1468)) % 39.97/40.17 (define @t1473 () (@list tptp.s52 tptp.s53)) % 39.97/40.17 (define @t1474 () (tptp.trans tptp.s52 tptp.s53)) % 39.97/40.17 (define @t1475 () (not @t53)) % 39.97/40.17 (define @t1476 () (or @t1475 @t1474)) % 39.97/40.17 (define @t1477 () (not @t1469)) % 39.97/40.17 (define @t1478 () (not @t1474)) % 39.97/40.17 (define @t1479 () (or @t1443 @t1478 @t1477)) % 39.97/40.17 (define @t1480 () (tptp.m_main_v_state tptp.s52 tptp.c_busy)) % 39.97/40.17 (define @t1481 () (not @t1480)) % 39.97/40.17 (define @t1482 () (or @t1481 @t1477)) % 39.97/40.17 (define @t1483 () (tptp.m_main_v_state tptp.s52 tptp.c_ready)) % 39.97/40.17 (define @t1484 () (or @t1483 @t1480)) % 39.97/40.17 (define @t1485 () (tptp.node2 tptp.s52 tptp.s53)) % 39.97/40.17 (define @t1486 () (or @t1478 @t1485)) % 39.97/40.17 (define @t1487 () (not @t1485)) % 39.97/40.17 (define @t1488 () (not @t1471)) % 39.97/40.17 (define @t1489 () (not @t1483)) % 39.97/40.17 (define @t1490 () (or @t1489 @t1488 @t1454 @t1487)) % 39.97/40.17 (define @t1491 () (@list tptp.s52 tptp.s51)) % 39.97/40.17 (define @t1492 () (@list tptp.s51)) % 39.97/40.17 (define @t1493 () (tptp.node4 tptp.s51)) % 39.97/40.17 (define @t1494 () (not @t1493)) % 39.97/40.17 (define @t1495 () (tptp.always3 tptp.s51)) % 39.97/40.17 (define @t1496 () (or @t1495 @t1494)) % 39.97/40.17 (define @t1497 () (tptp.m_main_v_request tptp.s51)) % 39.97/40.17 (define @t1498 () (or @t1497 @t1494)) % 39.97/40.17 (define @t1499 () (@list tptp.s51 tptp.s52)) % 39.97/40.17 (define @t1500 () (tptp.trans tptp.s51 tptp.s52)) % 39.97/40.17 (define @t1501 () (not @t52)) % 39.97/40.17 (define @t1502 () (or @t1501 @t1500)) % 39.97/40.17 (define @t1503 () (not @t1495)) % 39.97/40.17 (define @t1504 () (not @t1500)) % 39.97/40.17 (define @t1505 () (or @t1469 @t1504 @t1503)) % 39.97/40.17 (define @t1506 () (tptp.m_main_v_state tptp.s51 tptp.c_busy)) % 39.97/40.17 (define @t1507 () (not @t1506)) % 39.97/40.17 (define @t1508 () (or @t1507 @t1503)) % 39.97/40.17 (define @t1509 () (tptp.m_main_v_state tptp.s51 tptp.c_ready)) % 39.97/40.17 (define @t1510 () (or @t1509 @t1506)) % 39.97/40.17 (define @t1511 () (tptp.node2 tptp.s51 tptp.s52)) % 39.97/40.17 (define @t1512 () (or @t1504 @t1511)) % 39.97/40.17 (define @t1513 () (not @t1511)) % 39.97/40.17 (define @t1514 () (not @t1497)) % 39.97/40.17 (define @t1515 () (not @t1509)) % 39.97/40.17 (define @t1516 () (or @t1515 @t1514 @t1480 @t1513)) % 39.97/40.17 (define @t1517 () (@list tptp.s51 tptp.s50)) % 39.97/40.17 (define @t1518 () (@list tptp.s50)) % 39.97/40.17 (define @t1519 () (tptp.node4 tptp.s50)) % 39.97/40.17 (define @t1520 () (not @t1519)) % 39.97/40.17 (define @t1521 () (tptp.always3 tptp.s50)) % 39.97/40.17 (define @t1522 () (or @t1521 @t1520)) % 39.97/40.17 (define @t1523 () (tptp.m_main_v_request tptp.s50)) % 39.97/40.17 (define @t1524 () (or @t1523 @t1520)) % 39.97/40.17 (define @t1525 () (@list tptp.s50 tptp.s51)) % 39.97/40.17 (define @t1526 () (tptp.trans tptp.s50 tptp.s51)) % 39.97/40.17 (define @t1527 () (not @t51)) % 39.97/40.17 (define @t1528 () (or @t1527 @t1526)) % 39.97/40.17 (define @t1529 () (not @t1521)) % 39.97/40.17 (define @t1530 () (not @t1526)) % 39.97/40.17 (define @t1531 () (or @t1495 @t1530 @t1529)) % 39.97/40.17 (define @t1532 () (tptp.m_main_v_state tptp.s50 tptp.c_busy)) % 39.97/40.17 (define @t1533 () (not @t1532)) % 39.97/40.17 (define @t1534 () (or @t1533 @t1529)) % 39.97/40.17 (define @t1535 () (tptp.m_main_v_state tptp.s50 tptp.c_ready)) % 39.97/40.17 (define @t1536 () (or @t1535 @t1532)) % 39.97/40.17 (define @t1537 () (tptp.node2 tptp.s50 tptp.s51)) % 39.97/40.17 (define @t1538 () (or @t1530 @t1537)) % 39.97/40.17 (define @t1539 () (not @t1537)) % 39.97/40.17 (define @t1540 () (not @t1523)) % 39.97/40.17 (define @t1541 () (not @t1535)) % 39.97/40.17 (define @t1542 () (or @t1541 @t1540 @t1506 @t1539)) % 39.97/40.17 (define @t1543 () (@list tptp.s50 tptp.s49)) % 39.97/40.17 (define @t1544 () (@list tptp.s49)) % 39.97/40.17 (define @t1545 () (tptp.node4 tptp.s49)) % 39.97/40.17 (define @t1546 () (not @t1545)) % 39.97/40.17 (define @t1547 () (tptp.always3 tptp.s49)) % 39.97/40.17 (define @t1548 () (or @t1547 @t1546)) % 39.97/40.17 (define @t1549 () (tptp.m_main_v_request tptp.s49)) % 39.97/40.17 (define @t1550 () (or @t1549 @t1546)) % 39.97/40.17 (define @t1551 () (@list tptp.s49 tptp.s50)) % 39.97/40.17 (define @t1552 () (tptp.trans tptp.s49 tptp.s50)) % 39.97/40.17 (define @t1553 () (not @t50)) % 39.97/40.17 (define @t1554 () (or @t1553 @t1552)) % 39.97/40.17 (define @t1555 () (not @t1547)) % 39.97/40.17 (define @t1556 () (not @t1552)) % 39.97/40.17 (define @t1557 () (or @t1521 @t1556 @t1555)) % 39.97/40.17 (define @t1558 () (tptp.m_main_v_state tptp.s49 tptp.c_busy)) % 39.97/40.17 (define @t1559 () (not @t1558)) % 39.97/40.17 (define @t1560 () (or @t1559 @t1555)) % 39.97/40.17 (define @t1561 () (tptp.m_main_v_state tptp.s49 tptp.c_ready)) % 39.97/40.17 (define @t1562 () (or @t1561 @t1558)) % 39.97/40.17 (define @t1563 () (tptp.node2 tptp.s49 tptp.s50)) % 39.97/40.17 (define @t1564 () (or @t1556 @t1563)) % 39.97/40.17 (define @t1565 () (not @t1563)) % 39.97/40.17 (define @t1566 () (not @t1549)) % 39.97/40.17 (define @t1567 () (not @t1561)) % 39.97/40.17 (define @t1568 () (or @t1567 @t1566 @t1532 @t1565)) % 39.97/40.17 (define @t1569 () (@list tptp.s49 tptp.s48)) % 39.97/40.17 (define @t1570 () (@list tptp.s48)) % 39.97/40.17 (define @t1571 () (tptp.node4 tptp.s48)) % 39.97/40.17 (define @t1572 () (not @t1571)) % 39.97/40.17 (define @t1573 () (tptp.always3 tptp.s48)) % 39.97/40.17 (define @t1574 () (or @t1573 @t1572)) % 39.97/40.17 (define @t1575 () (tptp.m_main_v_request tptp.s48)) % 39.97/40.17 (define @t1576 () (or @t1575 @t1572)) % 39.97/40.17 (define @t1577 () (@list tptp.s48 tptp.s49)) % 39.97/40.17 (define @t1578 () (tptp.trans tptp.s48 tptp.s49)) % 39.97/40.17 (define @t1579 () (not @t49)) % 39.97/40.17 (define @t1580 () (or @t1579 @t1578)) % 39.97/40.17 (define @t1581 () (not @t1573)) % 39.97/40.17 (define @t1582 () (not @t1578)) % 39.97/40.17 (define @t1583 () (or @t1547 @t1582 @t1581)) % 39.97/40.17 (define @t1584 () (tptp.m_main_v_state tptp.s48 tptp.c_busy)) % 39.97/40.17 (define @t1585 () (not @t1584)) % 39.97/40.17 (define @t1586 () (or @t1585 @t1581)) % 39.97/40.17 (define @t1587 () (tptp.m_main_v_state tptp.s48 tptp.c_ready)) % 39.97/40.17 (define @t1588 () (or @t1587 @t1584)) % 39.97/40.17 (define @t1589 () (tptp.node2 tptp.s48 tptp.s49)) % 39.97/40.17 (define @t1590 () (or @t1582 @t1589)) % 39.97/40.17 (define @t1591 () (not @t1589)) % 39.97/40.17 (define @t1592 () (not @t1575)) % 39.97/40.17 (define @t1593 () (not @t1587)) % 39.97/40.17 (define @t1594 () (or @t1593 @t1592 @t1558 @t1591)) % 39.97/40.17 (define @t1595 () (@list tptp.s48 tptp.s47)) % 39.97/40.17 (define @t1596 () (@list tptp.s47)) % 39.97/40.17 (define @t1597 () (tptp.node4 tptp.s47)) % 39.97/40.17 (define @t1598 () (not @t1597)) % 39.97/40.17 (define @t1599 () (tptp.always3 tptp.s47)) % 39.97/40.17 (define @t1600 () (or @t1599 @t1598)) % 39.97/40.17 (define @t1601 () (tptp.m_main_v_request tptp.s47)) % 39.97/40.17 (define @t1602 () (or @t1601 @t1598)) % 39.97/40.17 (define @t1603 () (@list tptp.s47 tptp.s48)) % 39.97/40.17 (define @t1604 () (tptp.trans tptp.s47 tptp.s48)) % 39.97/40.17 (define @t1605 () (not @t48)) % 39.97/40.17 (define @t1606 () (or @t1605 @t1604)) % 39.97/40.17 (define @t1607 () (not @t1599)) % 39.97/40.17 (define @t1608 () (not @t1604)) % 39.97/40.17 (define @t1609 () (or @t1573 @t1608 @t1607)) % 39.97/40.17 (define @t1610 () (tptp.m_main_v_state tptp.s47 tptp.c_busy)) % 39.97/40.17 (define @t1611 () (not @t1610)) % 39.97/40.17 (define @t1612 () (or @t1611 @t1607)) % 39.97/40.17 (define @t1613 () (tptp.m_main_v_state tptp.s47 tptp.c_ready)) % 39.97/40.17 (define @t1614 () (or @t1613 @t1610)) % 39.97/40.17 (define @t1615 () (tptp.node2 tptp.s47 tptp.s48)) % 39.97/40.17 (define @t1616 () (or @t1608 @t1615)) % 39.97/40.17 (define @t1617 () (not @t1615)) % 39.97/40.17 (define @t1618 () (not @t1601)) % 39.97/40.17 (define @t1619 () (not @t1613)) % 39.97/40.17 (define @t1620 () (or @t1619 @t1618 @t1584 @t1617)) % 39.97/40.17 (define @t1621 () (@list tptp.s47 tptp.s46)) % 39.97/40.17 (define @t1622 () (@list tptp.s46)) % 39.97/40.17 (define @t1623 () (tptp.node4 tptp.s46)) % 39.97/40.17 (define @t1624 () (not @t1623)) % 39.97/40.17 (define @t1625 () (tptp.always3 tptp.s46)) % 39.97/40.17 (define @t1626 () (or @t1625 @t1624)) % 39.97/40.17 (define @t1627 () (tptp.m_main_v_request tptp.s46)) % 39.97/40.17 (define @t1628 () (or @t1627 @t1624)) % 39.97/40.17 (define @t1629 () (@list tptp.s46 tptp.s47)) % 39.97/40.17 (define @t1630 () (tptp.trans tptp.s46 tptp.s47)) % 39.97/40.17 (define @t1631 () (not @t47)) % 39.97/40.17 (define @t1632 () (or @t1631 @t1630)) % 39.97/40.17 (define @t1633 () (not @t1625)) % 39.97/40.17 (define @t1634 () (not @t1630)) % 39.97/40.17 (define @t1635 () (or @t1599 @t1634 @t1633)) % 39.97/40.17 (define @t1636 () (tptp.m_main_v_state tptp.s46 tptp.c_busy)) % 39.97/40.17 (define @t1637 () (not @t1636)) % 39.97/40.17 (define @t1638 () (or @t1637 @t1633)) % 39.97/40.17 (define @t1639 () (tptp.m_main_v_state tptp.s46 tptp.c_ready)) % 39.97/40.17 (define @t1640 () (or @t1639 @t1636)) % 39.97/40.17 (define @t1641 () (tptp.node2 tptp.s46 tptp.s47)) % 39.97/40.17 (define @t1642 () (or @t1634 @t1641)) % 39.97/40.17 (define @t1643 () (not @t1641)) % 39.97/40.17 (define @t1644 () (not @t1627)) % 39.97/40.17 (define @t1645 () (not @t1639)) % 39.97/40.17 (define @t1646 () (or @t1645 @t1644 @t1610 @t1643)) % 39.97/40.17 (define @t1647 () (@list tptp.s46 tptp.s45)) % 39.97/40.17 (define @t1648 () (@list tptp.s45)) % 39.97/40.17 (define @t1649 () (tptp.node4 tptp.s45)) % 39.97/40.17 (define @t1650 () (not @t1649)) % 39.97/40.17 (define @t1651 () (tptp.always3 tptp.s45)) % 39.97/40.17 (define @t1652 () (or @t1651 @t1650)) % 39.97/40.17 (define @t1653 () (tptp.m_main_v_request tptp.s45)) % 39.97/40.17 (define @t1654 () (or @t1653 @t1650)) % 39.97/40.17 (define @t1655 () (@list tptp.s45 tptp.s46)) % 39.97/40.17 (define @t1656 () (tptp.trans tptp.s45 tptp.s46)) % 39.97/40.17 (define @t1657 () (not @t46)) % 39.97/40.17 (define @t1658 () (or @t1657 @t1656)) % 39.97/40.17 (define @t1659 () (not @t1651)) % 39.97/40.17 (define @t1660 () (not @t1656)) % 39.97/40.17 (define @t1661 () (or @t1625 @t1660 @t1659)) % 39.97/40.17 (define @t1662 () (tptp.m_main_v_state tptp.s45 tptp.c_busy)) % 39.97/40.17 (define @t1663 () (not @t1662)) % 39.97/40.17 (define @t1664 () (or @t1663 @t1659)) % 39.97/40.17 (define @t1665 () (tptp.m_main_v_state tptp.s45 tptp.c_ready)) % 39.97/40.17 (define @t1666 () (or @t1665 @t1662)) % 39.97/40.17 (define @t1667 () (tptp.node2 tptp.s45 tptp.s46)) % 39.97/40.17 (define @t1668 () (or @t1660 @t1667)) % 39.97/40.17 (define @t1669 () (not @t1667)) % 39.97/40.17 (define @t1670 () (not @t1653)) % 39.97/40.17 (define @t1671 () (not @t1665)) % 39.97/40.17 (define @t1672 () (or @t1671 @t1670 @t1636 @t1669)) % 39.97/40.17 (define @t1673 () (@list tptp.s45 tptp.s44)) % 39.97/40.17 (define @t1674 () (@list tptp.s44)) % 39.97/40.17 (define @t1675 () (tptp.node4 tptp.s44)) % 39.97/40.17 (define @t1676 () (not @t1675)) % 39.97/40.17 (define @t1677 () (tptp.always3 tptp.s44)) % 39.97/40.17 (define @t1678 () (or @t1677 @t1676)) % 39.97/40.17 (define @t1679 () (tptp.m_main_v_request tptp.s44)) % 39.97/40.17 (define @t1680 () (or @t1679 @t1676)) % 39.97/40.17 (define @t1681 () (@list tptp.s44 tptp.s45)) % 39.97/40.17 (define @t1682 () (tptp.trans tptp.s44 tptp.s45)) % 39.97/40.17 (define @t1683 () (not @t45)) % 39.97/40.17 (define @t1684 () (or @t1683 @t1682)) % 39.97/40.17 (define @t1685 () (not @t1677)) % 39.97/40.17 (define @t1686 () (not @t1682)) % 39.97/40.17 (define @t1687 () (or @t1651 @t1686 @t1685)) % 39.97/40.17 (define @t1688 () (tptp.m_main_v_state tptp.s44 tptp.c_busy)) % 39.97/40.17 (define @t1689 () (not @t1688)) % 39.97/40.17 (define @t1690 () (or @t1689 @t1685)) % 39.97/40.17 (define @t1691 () (tptp.m_main_v_state tptp.s44 tptp.c_ready)) % 39.97/40.17 (define @t1692 () (or @t1691 @t1688)) % 39.97/40.17 (define @t1693 () (tptp.node2 tptp.s44 tptp.s45)) % 39.97/40.17 (define @t1694 () (or @t1686 @t1693)) % 39.97/40.17 (define @t1695 () (not @t1693)) % 39.97/40.17 (define @t1696 () (not @t1679)) % 39.97/40.17 (define @t1697 () (not @t1691)) % 39.97/40.17 (define @t1698 () (or @t1697 @t1696 @t1662 @t1695)) % 39.97/40.17 (define @t1699 () (@list tptp.s44 tptp.s43)) % 39.97/40.17 (define @t1700 () (@list tptp.s43)) % 39.97/40.17 (define @t1701 () (tptp.node4 tptp.s43)) % 39.97/40.17 (define @t1702 () (not @t1701)) % 39.97/40.17 (define @t1703 () (tptp.always3 tptp.s43)) % 39.97/40.17 (define @t1704 () (or @t1703 @t1702)) % 39.97/40.17 (define @t1705 () (tptp.m_main_v_request tptp.s43)) % 39.97/40.17 (define @t1706 () (or @t1705 @t1702)) % 39.97/40.17 (define @t1707 () (@list tptp.s43 tptp.s44)) % 39.97/40.17 (define @t1708 () (tptp.trans tptp.s43 tptp.s44)) % 39.97/40.17 (define @t1709 () (not @t44)) % 39.97/40.17 (define @t1710 () (or @t1709 @t1708)) % 39.97/40.17 (define @t1711 () (not @t1703)) % 39.97/40.17 (define @t1712 () (not @t1708)) % 39.97/40.17 (define @t1713 () (or @t1677 @t1712 @t1711)) % 39.97/40.17 (define @t1714 () (tptp.m_main_v_state tptp.s43 tptp.c_busy)) % 39.97/40.17 (define @t1715 () (not @t1714)) % 39.97/40.17 (define @t1716 () (or @t1715 @t1711)) % 39.97/40.17 (define @t1717 () (tptp.m_main_v_state tptp.s43 tptp.c_ready)) % 39.97/40.17 (define @t1718 () (or @t1717 @t1714)) % 39.97/40.17 (define @t1719 () (tptp.node2 tptp.s43 tptp.s44)) % 39.97/40.17 (define @t1720 () (or @t1712 @t1719)) % 39.97/40.17 (define @t1721 () (not @t1719)) % 39.97/40.17 (define @t1722 () (not @t1705)) % 39.97/40.17 (define @t1723 () (not @t1717)) % 39.97/40.17 (define @t1724 () (or @t1723 @t1722 @t1688 @t1721)) % 39.97/40.17 (define @t1725 () (@list tptp.s43 tptp.s42)) % 39.97/40.17 (define @t1726 () (@list tptp.s42)) % 39.97/40.17 (define @t1727 () (tptp.node4 tptp.s42)) % 39.97/40.17 (define @t1728 () (not @t1727)) % 39.97/40.17 (define @t1729 () (tptp.always3 tptp.s42)) % 39.97/40.17 (define @t1730 () (or @t1729 @t1728)) % 39.97/40.17 (define @t1731 () (tptp.m_main_v_request tptp.s42)) % 39.97/40.17 (define @t1732 () (or @t1731 @t1728)) % 39.97/40.17 (define @t1733 () (@list tptp.s42 tptp.s43)) % 39.97/40.17 (define @t1734 () (tptp.trans tptp.s42 tptp.s43)) % 39.97/40.17 (define @t1735 () (not @t43)) % 39.97/40.17 (define @t1736 () (or @t1735 @t1734)) % 39.97/40.17 (define @t1737 () (not @t1729)) % 39.97/40.17 (define @t1738 () (not @t1734)) % 39.97/40.17 (define @t1739 () (or @t1703 @t1738 @t1737)) % 39.97/40.17 (define @t1740 () (tptp.m_main_v_state tptp.s42 tptp.c_busy)) % 39.97/40.17 (define @t1741 () (not @t1740)) % 39.97/40.17 (define @t1742 () (or @t1741 @t1737)) % 39.97/40.17 (define @t1743 () (tptp.m_main_v_state tptp.s42 tptp.c_ready)) % 39.97/40.17 (define @t1744 () (or @t1743 @t1740)) % 39.97/40.17 (define @t1745 () (tptp.node2 tptp.s42 tptp.s43)) % 39.97/40.17 (define @t1746 () (or @t1738 @t1745)) % 39.97/40.17 (define @t1747 () (not @t1745)) % 39.97/40.17 (define @t1748 () (not @t1731)) % 39.97/40.17 (define @t1749 () (not @t1743)) % 39.97/40.17 (define @t1750 () (or @t1749 @t1748 @t1714 @t1747)) % 39.97/40.17 (define @t1751 () (@list tptp.s42 tptp.s41)) % 39.97/40.17 (define @t1752 () (@list tptp.s41)) % 39.97/40.17 (define @t1753 () (tptp.node4 tptp.s41)) % 39.97/40.17 (define @t1754 () (not @t1753)) % 39.97/40.17 (define @t1755 () (tptp.always3 tptp.s41)) % 39.97/40.17 (define @t1756 () (or @t1755 @t1754)) % 39.97/40.17 (define @t1757 () (tptp.m_main_v_request tptp.s41)) % 39.97/40.17 (define @t1758 () (or @t1757 @t1754)) % 39.97/40.17 (define @t1759 () (@list tptp.s41 tptp.s42)) % 39.97/40.17 (define @t1760 () (tptp.trans tptp.s41 tptp.s42)) % 39.97/40.17 (define @t1761 () (not @t42)) % 39.97/40.17 (define @t1762 () (or @t1761 @t1760)) % 39.97/40.17 (define @t1763 () (not @t1755)) % 39.97/40.17 (define @t1764 () (not @t1760)) % 39.97/40.17 (define @t1765 () (or @t1729 @t1764 @t1763)) % 39.97/40.17 (define @t1766 () (tptp.m_main_v_state tptp.s41 tptp.c_busy)) % 39.97/40.17 (define @t1767 () (not @t1766)) % 39.97/40.17 (define @t1768 () (or @t1767 @t1763)) % 39.97/40.17 (define @t1769 () (tptp.m_main_v_state tptp.s41 tptp.c_ready)) % 39.97/40.17 (define @t1770 () (or @t1769 @t1766)) % 39.97/40.17 (define @t1771 () (tptp.node2 tptp.s41 tptp.s42)) % 39.97/40.17 (define @t1772 () (or @t1764 @t1771)) % 39.97/40.17 (define @t1773 () (not @t1771)) % 39.97/40.17 (define @t1774 () (not @t1757)) % 39.97/40.17 (define @t1775 () (not @t1769)) % 39.97/40.17 (define @t1776 () (or @t1775 @t1774 @t1740 @t1773)) % 39.97/40.17 (define @t1777 () (@list tptp.s41 tptp.s40)) % 39.97/40.17 (define @t1778 () (@list tptp.s40)) % 39.97/40.17 (define @t1779 () (tptp.node4 tptp.s40)) % 39.97/40.17 (define @t1780 () (not @t1779)) % 39.97/40.17 (define @t1781 () (tptp.always3 tptp.s40)) % 39.97/40.17 (define @t1782 () (or @t1781 @t1780)) % 39.97/40.17 (define @t1783 () (tptp.m_main_v_request tptp.s40)) % 39.97/40.17 (define @t1784 () (or @t1783 @t1780)) % 39.97/40.17 (define @t1785 () (@list tptp.s40 tptp.s41)) % 39.97/40.17 (define @t1786 () (tptp.trans tptp.s40 tptp.s41)) % 39.97/40.17 (define @t1787 () (not @t41)) % 39.97/40.17 (define @t1788 () (or @t1787 @t1786)) % 39.97/40.17 (define @t1789 () (not @t1781)) % 39.97/40.17 (define @t1790 () (not @t1786)) % 39.97/40.17 (define @t1791 () (or @t1755 @t1790 @t1789)) % 39.97/40.17 (define @t1792 () (tptp.m_main_v_state tptp.s40 tptp.c_busy)) % 39.97/40.17 (define @t1793 () (not @t1792)) % 39.97/40.17 (define @t1794 () (or @t1793 @t1789)) % 39.97/40.17 (define @t1795 () (tptp.m_main_v_state tptp.s40 tptp.c_ready)) % 39.97/40.17 (define @t1796 () (or @t1795 @t1792)) % 39.97/40.17 (define @t1797 () (tptp.node2 tptp.s40 tptp.s41)) % 39.97/40.17 (define @t1798 () (or @t1790 @t1797)) % 39.97/40.17 (define @t1799 () (not @t1797)) % 39.97/40.17 (define @t1800 () (not @t1783)) % 39.97/40.17 (define @t1801 () (not @t1795)) % 39.97/40.17 (define @t1802 () (or @t1801 @t1800 @t1766 @t1799)) % 39.97/40.17 (define @t1803 () (@list tptp.s40 tptp.s39)) % 39.97/40.17 (define @t1804 () (@list tptp.s39)) % 39.97/40.17 (define @t1805 () (tptp.node4 tptp.s39)) % 39.97/40.17 (define @t1806 () (not @t1805)) % 39.97/40.17 (define @t1807 () (tptp.always3 tptp.s39)) % 39.97/40.17 (define @t1808 () (or @t1807 @t1806)) % 39.97/40.17 (define @t1809 () (tptp.m_main_v_request tptp.s39)) % 39.97/40.17 (define @t1810 () (or @t1809 @t1806)) % 39.97/40.17 (define @t1811 () (@list tptp.s39 tptp.s40)) % 39.97/40.17 (define @t1812 () (tptp.trans tptp.s39 tptp.s40)) % 39.97/40.17 (define @t1813 () (not @t40)) % 39.97/40.17 (define @t1814 () (or @t1813 @t1812)) % 39.97/40.17 (define @t1815 () (not @t1807)) % 39.97/40.17 (define @t1816 () (not @t1812)) % 39.97/40.17 (define @t1817 () (or @t1781 @t1816 @t1815)) % 39.97/40.17 (define @t1818 () (tptp.m_main_v_state tptp.s39 tptp.c_busy)) % 39.97/40.17 (define @t1819 () (not @t1818)) % 39.97/40.17 (define @t1820 () (or @t1819 @t1815)) % 39.97/40.17 (define @t1821 () (tptp.m_main_v_state tptp.s39 tptp.c_ready)) % 39.97/40.17 (define @t1822 () (or @t1821 @t1818)) % 39.97/40.17 (define @t1823 () (tptp.node2 tptp.s39 tptp.s40)) % 39.97/40.17 (define @t1824 () (or @t1816 @t1823)) % 39.97/40.17 (define @t1825 () (not @t1823)) % 39.97/40.17 (define @t1826 () (not @t1809)) % 39.97/40.17 (define @t1827 () (not @t1821)) % 39.97/40.17 (define @t1828 () (or @t1827 @t1826 @t1792 @t1825)) % 39.97/40.17 (define @t1829 () (@list tptp.s39 tptp.s38)) % 39.97/40.17 (define @t1830 () (@list tptp.s38)) % 39.97/40.17 (define @t1831 () (tptp.node4 tptp.s38)) % 39.97/40.17 (define @t1832 () (not @t1831)) % 39.97/40.17 (define @t1833 () (tptp.always3 tptp.s38)) % 39.97/40.17 (define @t1834 () (or @t1833 @t1832)) % 39.97/40.17 (define @t1835 () (tptp.m_main_v_request tptp.s38)) % 39.97/40.17 (define @t1836 () (or @t1835 @t1832)) % 39.97/40.17 (define @t1837 () (@list tptp.s38 tptp.s39)) % 39.97/40.17 (define @t1838 () (tptp.trans tptp.s38 tptp.s39)) % 39.97/40.17 (define @t1839 () (not @t39)) % 39.97/40.17 (define @t1840 () (or @t1839 @t1838)) % 39.97/40.17 (define @t1841 () (not @t1833)) % 39.97/40.17 (define @t1842 () (not @t1838)) % 39.97/40.17 (define @t1843 () (or @t1807 @t1842 @t1841)) % 39.97/40.17 (define @t1844 () (tptp.m_main_v_state tptp.s38 tptp.c_busy)) % 39.97/40.17 (define @t1845 () (not @t1844)) % 39.97/40.17 (define @t1846 () (or @t1845 @t1841)) % 39.97/40.17 (define @t1847 () (tptp.m_main_v_state tptp.s38 tptp.c_ready)) % 39.97/40.17 (define @t1848 () (or @t1847 @t1844)) % 39.97/40.17 (define @t1849 () (tptp.node2 tptp.s38 tptp.s39)) % 39.97/40.17 (define @t1850 () (or @t1842 @t1849)) % 39.97/40.17 (define @t1851 () (not @t1849)) % 39.97/40.17 (define @t1852 () (not @t1835)) % 39.97/40.17 (define @t1853 () (not @t1847)) % 39.97/40.17 (define @t1854 () (or @t1853 @t1852 @t1818 @t1851)) % 39.97/40.17 (define @t1855 () (@list tptp.s38 tptp.s37)) % 39.97/40.17 (define @t1856 () (@list tptp.s37)) % 39.97/40.17 (define @t1857 () (tptp.node4 tptp.s37)) % 39.97/40.17 (define @t1858 () (not @t1857)) % 39.97/40.17 (define @t1859 () (tptp.always3 tptp.s37)) % 39.97/40.17 (define @t1860 () (or @t1859 @t1858)) % 39.97/40.17 (define @t1861 () (tptp.m_main_v_request tptp.s37)) % 39.97/40.17 (define @t1862 () (or @t1861 @t1858)) % 39.97/40.17 (define @t1863 () (@list tptp.s37 tptp.s38)) % 39.97/40.17 (define @t1864 () (tptp.trans tptp.s37 tptp.s38)) % 39.97/40.17 (define @t1865 () (not @t38)) % 39.97/40.17 (define @t1866 () (or @t1865 @t1864)) % 39.97/40.17 (define @t1867 () (not @t1859)) % 39.97/40.17 (define @t1868 () (not @t1864)) % 39.97/40.17 (define @t1869 () (or @t1833 @t1868 @t1867)) % 39.97/40.17 (define @t1870 () (tptp.m_main_v_state tptp.s37 tptp.c_busy)) % 39.97/40.17 (define @t1871 () (not @t1870)) % 39.97/40.17 (define @t1872 () (or @t1871 @t1867)) % 39.97/40.17 (define @t1873 () (tptp.m_main_v_state tptp.s37 tptp.c_ready)) % 39.97/40.17 (define @t1874 () (or @t1873 @t1870)) % 39.97/40.17 (define @t1875 () (tptp.node2 tptp.s37 tptp.s38)) % 39.97/40.17 (define @t1876 () (or @t1868 @t1875)) % 39.97/40.17 (define @t1877 () (not @t1875)) % 39.97/40.17 (define @t1878 () (not @t1861)) % 39.97/40.17 (define @t1879 () (not @t1873)) % 39.97/40.17 (define @t1880 () (or @t1879 @t1878 @t1844 @t1877)) % 39.97/40.17 (define @t1881 () (@list tptp.s37 tptp.s36)) % 39.97/40.17 (define @t1882 () (@list tptp.s36)) % 39.97/40.17 (define @t1883 () (tptp.node4 tptp.s36)) % 39.97/40.17 (define @t1884 () (not @t1883)) % 39.97/40.17 (define @t1885 () (tptp.always3 tptp.s36)) % 39.97/40.17 (define @t1886 () (or @t1885 @t1884)) % 39.97/40.17 (define @t1887 () (tptp.m_main_v_request tptp.s36)) % 39.97/40.17 (define @t1888 () (or @t1887 @t1884)) % 39.97/40.17 (define @t1889 () (@list tptp.s36 tptp.s37)) % 39.97/40.17 (define @t1890 () (tptp.trans tptp.s36 tptp.s37)) % 39.97/40.17 (define @t1891 () (not @t37)) % 39.97/40.17 (define @t1892 () (or @t1891 @t1890)) % 39.97/40.17 (define @t1893 () (not @t1885)) % 39.97/40.17 (define @t1894 () (not @t1890)) % 39.97/40.17 (define @t1895 () (or @t1859 @t1894 @t1893)) % 39.97/40.17 (define @t1896 () (tptp.m_main_v_state tptp.s36 tptp.c_busy)) % 39.97/40.17 (define @t1897 () (not @t1896)) % 39.97/40.17 (define @t1898 () (or @t1897 @t1893)) % 39.97/40.17 (define @t1899 () (tptp.m_main_v_state tptp.s36 tptp.c_ready)) % 39.97/40.17 (define @t1900 () (or @t1899 @t1896)) % 39.97/40.17 (define @t1901 () (tptp.node2 tptp.s36 tptp.s37)) % 39.97/40.17 (define @t1902 () (or @t1894 @t1901)) % 39.97/40.17 (define @t1903 () (not @t1901)) % 39.97/40.17 (define @t1904 () (not @t1887)) % 39.97/40.17 (define @t1905 () (not @t1899)) % 39.97/40.17 (define @t1906 () (or @t1905 @t1904 @t1870 @t1903)) % 39.97/40.17 (define @t1907 () (@list tptp.s36 tptp.s35)) % 39.97/40.17 (define @t1908 () (@list tptp.s35)) % 39.97/40.17 (define @t1909 () (tptp.node4 tptp.s35)) % 39.97/40.17 (define @t1910 () (not @t1909)) % 39.97/40.17 (define @t1911 () (tptp.always3 tptp.s35)) % 39.97/40.17 (define @t1912 () (or @t1911 @t1910)) % 39.97/40.17 (define @t1913 () (tptp.m_main_v_request tptp.s35)) % 39.97/40.17 (define @t1914 () (or @t1913 @t1910)) % 39.97/40.17 (define @t1915 () (@list tptp.s35 tptp.s36)) % 39.97/40.17 (define @t1916 () (tptp.trans tptp.s35 tptp.s36)) % 39.97/40.17 (define @t1917 () (not @t36)) % 39.97/40.17 (define @t1918 () (or @t1917 @t1916)) % 39.97/40.17 (define @t1919 () (not @t1911)) % 39.97/40.17 (define @t1920 () (not @t1916)) % 39.97/40.17 (define @t1921 () (or @t1885 @t1920 @t1919)) % 39.97/40.17 (define @t1922 () (tptp.m_main_v_state tptp.s35 tptp.c_busy)) % 39.97/40.17 (define @t1923 () (not @t1922)) % 39.97/40.17 (define @t1924 () (or @t1923 @t1919)) % 39.97/40.17 (define @t1925 () (tptp.m_main_v_state tptp.s35 tptp.c_ready)) % 39.97/40.17 (define @t1926 () (or @t1925 @t1922)) % 39.97/40.17 (define @t1927 () (tptp.node2 tptp.s35 tptp.s36)) % 39.97/40.17 (define @t1928 () (or @t1920 @t1927)) % 39.97/40.17 (define @t1929 () (not @t1927)) % 39.97/40.17 (define @t1930 () (not @t1913)) % 39.97/40.17 (define @t1931 () (not @t1925)) % 39.97/40.17 (define @t1932 () (or @t1931 @t1930 @t1896 @t1929)) % 39.97/40.17 (define @t1933 () (@list tptp.s35 tptp.s34)) % 39.97/40.17 (define @t1934 () (@list tptp.s34)) % 39.97/40.17 (define @t1935 () (tptp.node4 tptp.s34)) % 39.97/40.17 (define @t1936 () (not @t1935)) % 39.97/40.17 (define @t1937 () (tptp.always3 tptp.s34)) % 39.97/40.17 (define @t1938 () (or @t1937 @t1936)) % 39.97/40.17 (define @t1939 () (tptp.m_main_v_request tptp.s34)) % 39.97/40.17 (define @t1940 () (or @t1939 @t1936)) % 39.97/40.17 (define @t1941 () (@list tptp.s34 tptp.s35)) % 39.97/40.17 (define @t1942 () (tptp.trans tptp.s34 tptp.s35)) % 39.97/40.17 (define @t1943 () (not @t35)) % 39.97/40.17 (define @t1944 () (or @t1943 @t1942)) % 39.97/40.17 (define @t1945 () (not @t1937)) % 39.97/40.17 (define @t1946 () (not @t1942)) % 39.97/40.17 (define @t1947 () (or @t1911 @t1946 @t1945)) % 39.97/40.17 (define @t1948 () (tptp.m_main_v_state tptp.s34 tptp.c_busy)) % 39.97/40.17 (define @t1949 () (not @t1948)) % 39.97/40.17 (define @t1950 () (or @t1949 @t1945)) % 39.97/40.17 (define @t1951 () (tptp.m_main_v_state tptp.s34 tptp.c_ready)) % 39.97/40.17 (define @t1952 () (or @t1951 @t1948)) % 39.97/40.17 (define @t1953 () (tptp.node2 tptp.s34 tptp.s35)) % 39.97/40.17 (define @t1954 () (or @t1946 @t1953)) % 39.97/40.17 (define @t1955 () (not @t1953)) % 39.97/40.17 (define @t1956 () (not @t1939)) % 39.97/40.17 (define @t1957 () (not @t1951)) % 39.97/40.17 (define @t1958 () (or @t1957 @t1956 @t1922 @t1955)) % 39.97/40.17 (define @t1959 () (@list tptp.s34 tptp.s33)) % 39.97/40.17 (define @t1960 () (@list tptp.s33)) % 39.97/40.17 (define @t1961 () (tptp.node4 tptp.s33)) % 39.97/40.17 (define @t1962 () (not @t1961)) % 39.97/40.17 (define @t1963 () (tptp.always3 tptp.s33)) % 39.97/40.17 (define @t1964 () (or @t1963 @t1962)) % 39.97/40.17 (define @t1965 () (tptp.m_main_v_request tptp.s33)) % 39.97/40.17 (define @t1966 () (or @t1965 @t1962)) % 39.97/40.17 (define @t1967 () (@list tptp.s33 tptp.s34)) % 39.97/40.17 (define @t1968 () (tptp.trans tptp.s33 tptp.s34)) % 39.97/40.17 (define @t1969 () (not @t34)) % 39.97/40.17 (define @t1970 () (or @t1969 @t1968)) % 39.97/40.17 (define @t1971 () (not @t1963)) % 39.97/40.17 (define @t1972 () (not @t1968)) % 39.97/40.17 (define @t1973 () (or @t1937 @t1972 @t1971)) % 39.97/40.17 (define @t1974 () (tptp.m_main_v_state tptp.s33 tptp.c_busy)) % 39.97/40.17 (define @t1975 () (not @t1974)) % 39.97/40.17 (define @t1976 () (or @t1975 @t1971)) % 39.97/40.17 (define @t1977 () (tptp.m_main_v_state tptp.s33 tptp.c_ready)) % 39.97/40.17 (define @t1978 () (or @t1977 @t1974)) % 39.97/40.17 (define @t1979 () (tptp.node2 tptp.s33 tptp.s34)) % 39.97/40.17 (define @t1980 () (or @t1972 @t1979)) % 39.97/40.17 (define @t1981 () (not @t1979)) % 39.97/40.17 (define @t1982 () (not @t1965)) % 39.97/40.17 (define @t1983 () (not @t1977)) % 39.97/40.17 (define @t1984 () (or @t1983 @t1982 @t1948 @t1981)) % 39.97/40.17 (define @t1985 () (@list tptp.s33 tptp.s32)) % 39.97/40.17 (define @t1986 () (@list tptp.s32)) % 39.97/40.17 (define @t1987 () (tptp.node4 tptp.s32)) % 39.97/40.17 (define @t1988 () (not @t1987)) % 39.97/40.17 (define @t1989 () (tptp.always3 tptp.s32)) % 39.97/40.17 (define @t1990 () (or @t1989 @t1988)) % 39.97/40.17 (define @t1991 () (tptp.m_main_v_request tptp.s32)) % 39.97/40.17 (define @t1992 () (or @t1991 @t1988)) % 39.97/40.17 (define @t1993 () (@list tptp.s32 tptp.s33)) % 39.97/40.17 (define @t1994 () (tptp.trans tptp.s32 tptp.s33)) % 39.97/40.17 (define @t1995 () (not @t33)) % 39.97/40.17 (define @t1996 () (or @t1995 @t1994)) % 39.97/40.17 (define @t1997 () (not @t1989)) % 39.97/40.17 (define @t1998 () (not @t1994)) % 39.97/40.17 (define @t1999 () (or @t1963 @t1998 @t1997)) % 39.97/40.17 (define @t2000 () (tptp.m_main_v_state tptp.s32 tptp.c_busy)) % 39.97/40.17 (define @t2001 () (not @t2000)) % 39.97/40.17 (define @t2002 () (or @t2001 @t1997)) % 39.97/40.17 (define @t2003 () (tptp.m_main_v_state tptp.s32 tptp.c_ready)) % 39.97/40.17 (define @t2004 () (or @t2003 @t2000)) % 39.97/40.17 (define @t2005 () (tptp.node2 tptp.s32 tptp.s33)) % 39.97/40.17 (define @t2006 () (or @t1998 @t2005)) % 39.97/40.17 (define @t2007 () (not @t2005)) % 39.97/40.17 (define @t2008 () (not @t1991)) % 39.97/40.17 (define @t2009 () (not @t2003)) % 39.97/40.17 (define @t2010 () (or @t2009 @t2008 @t1974 @t2007)) % 39.97/40.17 (define @t2011 () (@list tptp.s32 tptp.s31)) % 39.97/40.17 (define @t2012 () (@list tptp.s31)) % 39.97/40.17 (define @t2013 () (tptp.node4 tptp.s31)) % 39.97/40.17 (define @t2014 () (not @t2013)) % 39.97/40.17 (define @t2015 () (tptp.always3 tptp.s31)) % 39.97/40.17 (define @t2016 () (or @t2015 @t2014)) % 39.97/40.17 (define @t2017 () (tptp.m_main_v_request tptp.s31)) % 39.97/40.17 (define @t2018 () (or @t2017 @t2014)) % 39.97/40.17 (define @t2019 () (@list tptp.s31 tptp.s32)) % 39.97/40.17 (define @t2020 () (tptp.trans tptp.s31 tptp.s32)) % 39.97/40.17 (define @t2021 () (not @t32)) % 39.97/40.17 (define @t2022 () (or @t2021 @t2020)) % 39.97/40.17 (define @t2023 () (not @t2015)) % 39.97/40.17 (define @t2024 () (not @t2020)) % 39.97/40.17 (define @t2025 () (or @t1989 @t2024 @t2023)) % 39.97/40.17 (define @t2026 () (tptp.m_main_v_state tptp.s31 tptp.c_busy)) % 39.97/40.17 (define @t2027 () (not @t2026)) % 39.97/40.17 (define @t2028 () (or @t2027 @t2023)) % 39.97/40.17 (define @t2029 () (tptp.m_main_v_state tptp.s31 tptp.c_ready)) % 39.97/40.17 (define @t2030 () (or @t2029 @t2026)) % 39.97/40.17 (define @t2031 () (tptp.node2 tptp.s31 tptp.s32)) % 39.97/40.17 (define @t2032 () (or @t2024 @t2031)) % 39.97/40.17 (define @t2033 () (not @t2031)) % 39.97/40.17 (define @t2034 () (not @t2017)) % 39.97/40.17 (define @t2035 () (not @t2029)) % 39.97/40.17 (define @t2036 () (or @t2035 @t2034 @t2000 @t2033)) % 39.97/40.17 (define @t2037 () (@list tptp.s31 tptp.s30)) % 39.97/40.17 (define @t2038 () (@list tptp.s30)) % 39.97/40.17 (define @t2039 () (tptp.node4 tptp.s30)) % 39.97/40.17 (define @t2040 () (not @t2039)) % 39.97/40.17 (define @t2041 () (tptp.always3 tptp.s30)) % 39.97/40.17 (define @t2042 () (or @t2041 @t2040)) % 39.97/40.17 (define @t2043 () (tptp.m_main_v_request tptp.s30)) % 39.97/40.17 (define @t2044 () (or @t2043 @t2040)) % 39.97/40.17 (define @t2045 () (@list tptp.s30 tptp.s31)) % 39.97/40.17 (define @t2046 () (tptp.trans tptp.s30 tptp.s31)) % 39.97/40.17 (define @t2047 () (not @t31)) % 39.97/40.17 (define @t2048 () (or @t2047 @t2046)) % 39.97/40.17 (define @t2049 () (not @t2041)) % 39.97/40.17 (define @t2050 () (not @t2046)) % 39.97/40.17 (define @t2051 () (or @t2015 @t2050 @t2049)) % 39.97/40.17 (define @t2052 () (tptp.m_main_v_state tptp.s30 tptp.c_busy)) % 39.97/40.17 (define @t2053 () (not @t2052)) % 39.97/40.17 (define @t2054 () (or @t2053 @t2049)) % 39.97/40.17 (define @t2055 () (tptp.m_main_v_state tptp.s30 tptp.c_ready)) % 39.97/40.17 (define @t2056 () (or @t2055 @t2052)) % 39.97/40.17 (define @t2057 () (tptp.node2 tptp.s30 tptp.s31)) % 39.97/40.17 (define @t2058 () (or @t2050 @t2057)) % 39.97/40.17 (define @t2059 () (not @t2057)) % 39.97/40.17 (define @t2060 () (not @t2043)) % 39.97/40.17 (define @t2061 () (not @t2055)) % 39.97/40.17 (define @t2062 () (or @t2061 @t2060 @t2026 @t2059)) % 39.97/40.17 (define @t2063 () (@list tptp.s30 tptp.s29)) % 39.97/40.17 (define @t2064 () (@list tptp.s29)) % 39.97/40.17 (define @t2065 () (tptp.node4 tptp.s29)) % 39.97/40.17 (define @t2066 () (not @t2065)) % 39.97/40.17 (define @t2067 () (tptp.always3 tptp.s29)) % 39.97/40.17 (define @t2068 () (or @t2067 @t2066)) % 39.97/40.17 (define @t2069 () (tptp.m_main_v_request tptp.s29)) % 39.97/40.17 (define @t2070 () (or @t2069 @t2066)) % 39.97/40.17 (define @t2071 () (@list tptp.s29 tptp.s30)) % 39.97/40.17 (define @t2072 () (tptp.trans tptp.s29 tptp.s30)) % 39.97/40.17 (define @t2073 () (not @t30)) % 39.97/40.17 (define @t2074 () (or @t2073 @t2072)) % 39.97/40.17 (define @t2075 () (not @t2067)) % 39.97/40.17 (define @t2076 () (not @t2072)) % 39.97/40.17 (define @t2077 () (or @t2041 @t2076 @t2075)) % 39.97/40.17 (define @t2078 () (tptp.m_main_v_state tptp.s29 tptp.c_busy)) % 39.97/40.17 (define @t2079 () (not @t2078)) % 39.97/40.17 (define @t2080 () (or @t2079 @t2075)) % 39.97/40.17 (define @t2081 () (tptp.m_main_v_state tptp.s29 tptp.c_ready)) % 39.97/40.17 (define @t2082 () (or @t2081 @t2078)) % 39.97/40.17 (define @t2083 () (tptp.node2 tptp.s29 tptp.s30)) % 39.97/40.17 (define @t2084 () (or @t2076 @t2083)) % 39.97/40.17 (define @t2085 () (not @t2083)) % 39.97/40.17 (define @t2086 () (not @t2069)) % 39.97/40.17 (define @t2087 () (not @t2081)) % 39.97/40.17 (define @t2088 () (or @t2087 @t2086 @t2052 @t2085)) % 39.97/40.17 (define @t2089 () (@list tptp.s29 tptp.s28)) % 39.97/40.17 (define @t2090 () (@list tptp.s28)) % 39.97/40.17 (define @t2091 () (tptp.node4 tptp.s28)) % 39.97/40.17 (define @t2092 () (not @t2091)) % 39.97/40.17 (define @t2093 () (tptp.always3 tptp.s28)) % 39.97/40.17 (define @t2094 () (or @t2093 @t2092)) % 39.97/40.17 (define @t2095 () (tptp.m_main_v_request tptp.s28)) % 39.97/40.17 (define @t2096 () (or @t2095 @t2092)) % 39.97/40.17 (define @t2097 () (@list tptp.s28 tptp.s29)) % 39.97/40.17 (define @t2098 () (tptp.trans tptp.s28 tptp.s29)) % 39.97/40.17 (define @t2099 () (not @t29)) % 39.97/40.17 (define @t2100 () (or @t2099 @t2098)) % 39.97/40.17 (define @t2101 () (not @t2093)) % 39.97/40.17 (define @t2102 () (not @t2098)) % 39.97/40.17 (define @t2103 () (or @t2067 @t2102 @t2101)) % 39.97/40.17 (define @t2104 () (tptp.m_main_v_state tptp.s28 tptp.c_busy)) % 39.97/40.17 (define @t2105 () (not @t2104)) % 39.97/40.17 (define @t2106 () (or @t2105 @t2101)) % 39.97/40.17 (define @t2107 () (tptp.m_main_v_state tptp.s28 tptp.c_ready)) % 39.97/40.17 (define @t2108 () (or @t2107 @t2104)) % 39.97/40.17 (define @t2109 () (tptp.node2 tptp.s28 tptp.s29)) % 39.97/40.17 (define @t2110 () (or @t2102 @t2109)) % 39.97/40.17 (define @t2111 () (not @t2109)) % 39.97/40.17 (define @t2112 () (not @t2095)) % 39.97/40.17 (define @t2113 () (not @t2107)) % 39.97/40.17 (define @t2114 () (or @t2113 @t2112 @t2078 @t2111)) % 39.97/40.17 (define @t2115 () (@list tptp.s28 tptp.s27)) % 39.97/40.17 (define @t2116 () (@list tptp.s27)) % 39.97/40.18 (define @t2117 () (tptp.node4 tptp.s27)) % 39.97/40.18 (define @t2118 () (not @t2117)) % 39.97/40.18 (define @t2119 () (tptp.always3 tptp.s27)) % 39.97/40.18 (define @t2120 () (or @t2119 @t2118)) % 39.97/40.18 (define @t2121 () (tptp.m_main_v_request tptp.s27)) % 39.97/40.18 (define @t2122 () (or @t2121 @t2118)) % 39.97/40.18 (define @t2123 () (@list tptp.s27 tptp.s28)) % 39.97/40.18 (define @t2124 () (tptp.trans tptp.s27 tptp.s28)) % 39.97/40.18 (define @t2125 () (not @t28)) % 39.97/40.18 (define @t2126 () (or @t2125 @t2124)) % 39.97/40.18 (define @t2127 () (not @t2119)) % 39.97/40.18 (define @t2128 () (not @t2124)) % 39.97/40.18 (define @t2129 () (or @t2093 @t2128 @t2127)) % 39.97/40.18 (define @t2130 () (tptp.m_main_v_state tptp.s27 tptp.c_busy)) % 39.97/40.18 (define @t2131 () (not @t2130)) % 39.97/40.18 (define @t2132 () (or @t2131 @t2127)) % 39.97/40.18 (define @t2133 () (tptp.m_main_v_state tptp.s27 tptp.c_ready)) % 39.97/40.18 (define @t2134 () (or @t2133 @t2130)) % 39.97/40.18 (define @t2135 () (tptp.node2 tptp.s27 tptp.s28)) % 39.97/40.18 (define @t2136 () (or @t2128 @t2135)) % 39.97/40.18 (define @t2137 () (not @t2135)) % 39.97/40.18 (define @t2138 () (not @t2121)) % 39.97/40.18 (define @t2139 () (not @t2133)) % 39.97/40.18 (define @t2140 () (or @t2139 @t2138 @t2104 @t2137)) % 39.97/40.18 (define @t2141 () (@list tptp.s27 tptp.s26)) % 39.97/40.18 (define @t2142 () (@list tptp.s26)) % 39.97/40.18 (define @t2143 () (tptp.node4 tptp.s26)) % 39.97/40.18 (define @t2144 () (not @t2143)) % 39.97/40.18 (define @t2145 () (tptp.always3 tptp.s26)) % 39.97/40.18 (define @t2146 () (or @t2145 @t2144)) % 39.97/40.18 (define @t2147 () (tptp.m_main_v_request tptp.s26)) % 39.97/40.18 (define @t2148 () (or @t2147 @t2144)) % 39.97/40.18 (define @t2149 () (@list tptp.s26 tptp.s27)) % 39.97/40.18 (define @t2150 () (tptp.trans tptp.s26 tptp.s27)) % 39.97/40.18 (define @t2151 () (not @t27)) % 39.97/40.18 (define @t2152 () (or @t2151 @t2150)) % 39.97/40.18 (define @t2153 () (not @t2145)) % 39.97/40.18 (define @t2154 () (not @t2150)) % 39.97/40.18 (define @t2155 () (or @t2119 @t2154 @t2153)) % 39.97/40.18 (define @t2156 () (tptp.m_main_v_state tptp.s26 tptp.c_busy)) % 39.97/40.18 (define @t2157 () (not @t2156)) % 39.97/40.18 (define @t2158 () (or @t2157 @t2153)) % 39.97/40.18 (define @t2159 () (tptp.m_main_v_state tptp.s26 tptp.c_ready)) % 39.97/40.18 (define @t2160 () (or @t2159 @t2156)) % 39.97/40.18 (define @t2161 () (tptp.node2 tptp.s26 tptp.s27)) % 39.97/40.18 (define @t2162 () (or @t2154 @t2161)) % 39.97/40.18 (define @t2163 () (not @t2161)) % 39.97/40.18 (define @t2164 () (not @t2147)) % 39.97/40.18 (define @t2165 () (not @t2159)) % 39.97/40.18 (define @t2166 () (or @t2165 @t2164 @t2130 @t2163)) % 39.97/40.18 (define @t2167 () (@list tptp.s26 tptp.s25)) % 39.97/40.18 (define @t2168 () (@list tptp.s25)) % 39.97/40.18 (define @t2169 () (tptp.node4 tptp.s25)) % 39.97/40.18 (define @t2170 () (not @t2169)) % 39.97/40.18 (define @t2171 () (tptp.always3 tptp.s25)) % 39.97/40.18 (define @t2172 () (or @t2171 @t2170)) % 39.97/40.18 (define @t2173 () (tptp.m_main_v_request tptp.s25)) % 39.97/40.18 (define @t2174 () (or @t2173 @t2170)) % 39.97/40.18 (define @t2175 () (@list tptp.s25 tptp.s26)) % 39.97/40.18 (define @t2176 () (tptp.trans tptp.s25 tptp.s26)) % 39.97/40.18 (define @t2177 () (not @t26)) % 39.97/40.18 (define @t2178 () (or @t2177 @t2176)) % 39.97/40.18 (define @t2179 () (not @t2171)) % 39.97/40.18 (define @t2180 () (not @t2176)) % 39.97/40.18 (define @t2181 () (or @t2145 @t2180 @t2179)) % 39.97/40.18 (define @t2182 () (tptp.m_main_v_state tptp.s25 tptp.c_busy)) % 39.97/40.18 (define @t2183 () (not @t2182)) % 39.97/40.18 (define @t2184 () (or @t2183 @t2179)) % 39.97/40.18 (define @t2185 () (tptp.m_main_v_state tptp.s25 tptp.c_ready)) % 39.97/40.18 (define @t2186 () (or @t2185 @t2182)) % 39.97/40.18 (define @t2187 () (tptp.node2 tptp.s25 tptp.s26)) % 39.97/40.18 (define @t2188 () (or @t2180 @t2187)) % 39.97/40.18 (define @t2189 () (not @t2187)) % 39.97/40.18 (define @t2190 () (not @t2173)) % 39.97/40.18 (define @t2191 () (not @t2185)) % 39.97/40.18 (define @t2192 () (or @t2191 @t2190 @t2156 @t2189)) % 39.97/40.18 (define @t2193 () (@list tptp.s25 tptp.s24)) % 39.97/40.18 (define @t2194 () (@list tptp.s24)) % 39.97/40.18 (define @t2195 () (tptp.node4 tptp.s24)) % 39.97/40.18 (define @t2196 () (not @t2195)) % 39.97/40.18 (define @t2197 () (tptp.always3 tptp.s24)) % 39.97/40.18 (define @t2198 () (or @t2197 @t2196)) % 39.97/40.18 (define @t2199 () (tptp.m_main_v_request tptp.s24)) % 39.97/40.18 (define @t2200 () (or @t2199 @t2196)) % 39.97/40.18 (define @t2201 () (@list tptp.s24 tptp.s25)) % 39.97/40.18 (define @t2202 () (tptp.trans tptp.s24 tptp.s25)) % 39.97/40.18 (define @t2203 () (not @t25)) % 39.97/40.18 (define @t2204 () (or @t2203 @t2202)) % 39.97/40.18 (define @t2205 () (not @t2197)) % 39.97/40.18 (define @t2206 () (not @t2202)) % 39.97/40.18 (define @t2207 () (or @t2171 @t2206 @t2205)) % 39.97/40.18 (define @t2208 () (tptp.m_main_v_state tptp.s24 tptp.c_busy)) % 39.97/40.18 (define @t2209 () (not @t2208)) % 39.97/40.18 (define @t2210 () (or @t2209 @t2205)) % 39.97/40.18 (define @t2211 () (tptp.m_main_v_state tptp.s24 tptp.c_ready)) % 39.97/40.18 (define @t2212 () (or @t2211 @t2208)) % 39.97/40.18 (define @t2213 () (tptp.node2 tptp.s24 tptp.s25)) % 39.97/40.18 (define @t2214 () (or @t2206 @t2213)) % 39.97/40.18 (define @t2215 () (not @t2213)) % 39.97/40.18 (define @t2216 () (not @t2199)) % 39.97/40.18 (define @t2217 () (not @t2211)) % 39.97/40.18 (define @t2218 () (or @t2217 @t2216 @t2182 @t2215)) % 39.97/40.18 (define @t2219 () (@list tptp.s24 tptp.s23)) % 39.97/40.18 (define @t2220 () (@list tptp.s23)) % 39.97/40.18 (define @t2221 () (tptp.node4 tptp.s23)) % 39.97/40.18 (define @t2222 () (not @t2221)) % 39.97/40.18 (define @t2223 () (tptp.always3 tptp.s23)) % 39.97/40.18 (define @t2224 () (or @t2223 @t2222)) % 39.97/40.18 (define @t2225 () (tptp.m_main_v_request tptp.s23)) % 39.97/40.18 (define @t2226 () (or @t2225 @t2222)) % 39.97/40.18 (define @t2227 () (@list tptp.s23 tptp.s24)) % 39.97/40.18 (define @t2228 () (tptp.trans tptp.s23 tptp.s24)) % 39.97/40.18 (define @t2229 () (not @t24)) % 39.97/40.18 (define @t2230 () (or @t2229 @t2228)) % 39.97/40.18 (define @t2231 () (not @t2223)) % 39.97/40.18 (define @t2232 () (not @t2228)) % 39.97/40.18 (define @t2233 () (or @t2197 @t2232 @t2231)) % 39.97/40.18 (define @t2234 () (tptp.m_main_v_state tptp.s23 tptp.c_busy)) % 39.97/40.18 (define @t2235 () (not @t2234)) % 39.97/40.18 (define @t2236 () (or @t2235 @t2231)) % 39.97/40.18 (define @t2237 () (tptp.m_main_v_state tptp.s23 tptp.c_ready)) % 39.97/40.18 (define @t2238 () (or @t2237 @t2234)) % 39.97/40.18 (define @t2239 () (tptp.node2 tptp.s23 tptp.s24)) % 39.97/40.18 (define @t2240 () (or @t2232 @t2239)) % 39.97/40.18 (define @t2241 () (not @t2239)) % 39.97/40.18 (define @t2242 () (not @t2225)) % 39.97/40.18 (define @t2243 () (not @t2237)) % 39.97/40.18 (define @t2244 () (or @t2243 @t2242 @t2208 @t2241)) % 39.97/40.18 (define @t2245 () (@list tptp.s23 tptp.s22)) % 39.97/40.18 (define @t2246 () (@list tptp.s22)) % 39.97/40.18 (define @t2247 () (tptp.node4 tptp.s22)) % 39.97/40.18 (define @t2248 () (not @t2247)) % 39.97/40.18 (define @t2249 () (tptp.always3 tptp.s22)) % 39.97/40.18 (define @t2250 () (or @t2249 @t2248)) % 39.97/40.18 (define @t2251 () (tptp.m_main_v_request tptp.s22)) % 39.97/40.18 (define @t2252 () (or @t2251 @t2248)) % 39.97/40.18 (define @t2253 () (@list tptp.s22 tptp.s23)) % 39.97/40.18 (define @t2254 () (tptp.trans tptp.s22 tptp.s23)) % 39.97/40.18 (define @t2255 () (not @t23)) % 39.97/40.18 (define @t2256 () (or @t2255 @t2254)) % 39.97/40.18 (define @t2257 () (not @t2249)) % 39.97/40.18 (define @t2258 () (not @t2254)) % 39.97/40.18 (define @t2259 () (or @t2223 @t2258 @t2257)) % 39.97/40.18 (define @t2260 () (tptp.m_main_v_state tptp.s22 tptp.c_busy)) % 39.97/40.18 (define @t2261 () (not @t2260)) % 39.97/40.18 (define @t2262 () (or @t2261 @t2257)) % 39.97/40.18 (define @t2263 () (tptp.m_main_v_state tptp.s22 tptp.c_ready)) % 39.97/40.18 (define @t2264 () (or @t2263 @t2260)) % 39.97/40.18 (define @t2265 () (tptp.node2 tptp.s22 tptp.s23)) % 39.97/40.18 (define @t2266 () (or @t2258 @t2265)) % 39.97/40.18 (define @t2267 () (not @t2265)) % 39.97/40.18 (define @t2268 () (not @t2251)) % 39.97/40.18 (define @t2269 () (not @t2263)) % 39.97/40.18 (define @t2270 () (or @t2269 @t2268 @t2234 @t2267)) % 39.97/40.18 (define @t2271 () (@list tptp.s22 tptp.s21)) % 39.97/40.18 (define @t2272 () (@list tptp.s21)) % 39.97/40.18 (define @t2273 () (tptp.node4 tptp.s21)) % 39.97/40.18 (define @t2274 () (not @t2273)) % 39.97/40.18 (define @t2275 () (tptp.always3 tptp.s21)) % 39.97/40.18 (define @t2276 () (or @t2275 @t2274)) % 39.97/40.18 (define @t2277 () (tptp.m_main_v_request tptp.s21)) % 39.97/40.18 (define @t2278 () (or @t2277 @t2274)) % 39.97/40.18 (define @t2279 () (@list tptp.s21 tptp.s22)) % 39.97/40.18 (define @t2280 () (tptp.trans tptp.s21 tptp.s22)) % 39.97/40.18 (define @t2281 () (not @t22)) % 39.97/40.18 (define @t2282 () (or @t2281 @t2280)) % 39.97/40.18 (define @t2283 () (not @t2275)) % 39.97/40.18 (define @t2284 () (not @t2280)) % 39.97/40.18 (define @t2285 () (or @t2249 @t2284 @t2283)) % 39.97/40.18 (define @t2286 () (tptp.m_main_v_state tptp.s21 tptp.c_busy)) % 39.97/40.18 (define @t2287 () (not @t2286)) % 39.97/40.18 (define @t2288 () (or @t2287 @t2283)) % 39.97/40.18 (define @t2289 () (tptp.m_main_v_state tptp.s21 tptp.c_ready)) % 39.97/40.18 (define @t2290 () (or @t2289 @t2286)) % 39.97/40.18 (define @t2291 () (tptp.node2 tptp.s21 tptp.s22)) % 39.97/40.18 (define @t2292 () (or @t2284 @t2291)) % 39.97/40.18 (define @t2293 () (not @t2291)) % 39.97/40.18 (define @t2294 () (not @t2277)) % 39.97/40.18 (define @t2295 () (not @t2289)) % 39.97/40.18 (define @t2296 () (or @t2295 @t2294 @t2260 @t2293)) % 39.97/40.18 (define @t2297 () (@list tptp.s21 tptp.s20)) % 39.97/40.18 (define @t2298 () (@list tptp.s20)) % 39.97/40.18 (define @t2299 () (tptp.node4 tptp.s20)) % 39.97/40.18 (define @t2300 () (not @t2299)) % 39.97/40.18 (define @t2301 () (tptp.always3 tptp.s20)) % 39.97/40.18 (define @t2302 () (or @t2301 @t2300)) % 39.97/40.18 (define @t2303 () (tptp.m_main_v_request tptp.s20)) % 39.97/40.18 (define @t2304 () (or @t2303 @t2300)) % 39.97/40.18 (define @t2305 () (@list tptp.s20 tptp.s21)) % 39.97/40.18 (define @t2306 () (tptp.trans tptp.s20 tptp.s21)) % 39.97/40.18 (define @t2307 () (not @t21)) % 39.97/40.18 (define @t2308 () (or @t2307 @t2306)) % 39.97/40.18 (define @t2309 () (not @t2301)) % 39.97/40.18 (define @t2310 () (not @t2306)) % 39.97/40.18 (define @t2311 () (or @t2275 @t2310 @t2309)) % 39.97/40.18 (define @t2312 () (tptp.m_main_v_state tptp.s20 tptp.c_busy)) % 39.97/40.18 (define @t2313 () (not @t2312)) % 39.97/40.18 (define @t2314 () (or @t2313 @t2309)) % 39.97/40.18 (define @t2315 () (tptp.m_main_v_state tptp.s20 tptp.c_ready)) % 39.97/40.18 (define @t2316 () (or @t2315 @t2312)) % 39.97/40.18 (define @t2317 () (tptp.node2 tptp.s20 tptp.s21)) % 39.97/40.18 (define @t2318 () (or @t2310 @t2317)) % 39.97/40.18 (define @t2319 () (not @t2317)) % 39.97/40.18 (define @t2320 () (not @t2303)) % 39.97/40.18 (define @t2321 () (not @t2315)) % 39.97/40.18 (define @t2322 () (or @t2321 @t2320 @t2286 @t2319)) % 39.97/40.18 (define @t2323 () (@list tptp.s20 tptp.s19)) % 39.97/40.18 (define @t2324 () (@list tptp.s19)) % 39.97/40.18 (define @t2325 () (tptp.node4 tptp.s19)) % 39.97/40.18 (define @t2326 () (not @t2325)) % 39.97/40.18 (define @t2327 () (tptp.always3 tptp.s19)) % 39.97/40.18 (define @t2328 () (or @t2327 @t2326)) % 39.97/40.18 (define @t2329 () (tptp.m_main_v_request tptp.s19)) % 39.97/40.18 (define @t2330 () (or @t2329 @t2326)) % 39.97/40.18 (define @t2331 () (@list tptp.s19 tptp.s20)) % 39.97/40.18 (define @t2332 () (tptp.trans tptp.s19 tptp.s20)) % 39.97/40.18 (define @t2333 () (not @t20)) % 39.97/40.18 (define @t2334 () (or @t2333 @t2332)) % 39.97/40.18 (define @t2335 () (not @t2327)) % 39.97/40.18 (define @t2336 () (not @t2332)) % 39.97/40.18 (define @t2337 () (or @t2301 @t2336 @t2335)) % 39.97/40.18 (define @t2338 () (tptp.m_main_v_state tptp.s19 tptp.c_busy)) % 39.97/40.18 (define @t2339 () (not @t2338)) % 39.97/40.18 (define @t2340 () (or @t2339 @t2335)) % 39.97/40.18 (define @t2341 () (tptp.m_main_v_state tptp.s19 tptp.c_ready)) % 39.97/40.18 (define @t2342 () (or @t2341 @t2338)) % 39.97/40.18 (define @t2343 () (tptp.node2 tptp.s19 tptp.s20)) % 39.97/40.18 (define @t2344 () (or @t2336 @t2343)) % 39.97/40.18 (define @t2345 () (not @t2343)) % 39.97/40.18 (define @t2346 () (not @t2329)) % 39.97/40.18 (define @t2347 () (not @t2341)) % 39.97/40.18 (define @t2348 () (or @t2347 @t2346 @t2312 @t2345)) % 39.97/40.18 (define @t2349 () (@list tptp.s19 tptp.s18)) % 39.97/40.18 (define @t2350 () (@list tptp.s18)) % 39.97/40.18 (define @t2351 () (tptp.node4 tptp.s18)) % 39.97/40.18 (define @t2352 () (not @t2351)) % 39.97/40.18 (define @t2353 () (tptp.always3 tptp.s18)) % 39.97/40.18 (define @t2354 () (or @t2353 @t2352)) % 39.97/40.18 (define @t2355 () (tptp.m_main_v_request tptp.s18)) % 39.97/40.18 (define @t2356 () (or @t2355 @t2352)) % 39.97/40.18 (define @t2357 () (@list tptp.s18 tptp.s19)) % 39.97/40.18 (define @t2358 () (tptp.trans tptp.s18 tptp.s19)) % 39.97/40.18 (define @t2359 () (not @t19)) % 39.97/40.18 (define @t2360 () (or @t2359 @t2358)) % 39.97/40.18 (define @t2361 () (not @t2353)) % 39.97/40.18 (define @t2362 () (not @t2358)) % 39.97/40.18 (define @t2363 () (or @t2327 @t2362 @t2361)) % 39.97/40.18 (define @t2364 () (tptp.m_main_v_state tptp.s18 tptp.c_busy)) % 39.97/40.18 (define @t2365 () (not @t2364)) % 39.97/40.18 (define @t2366 () (or @t2365 @t2361)) % 39.97/40.18 (define @t2367 () (tptp.m_main_v_state tptp.s18 tptp.c_ready)) % 39.97/40.18 (define @t2368 () (or @t2367 @t2364)) % 39.97/40.18 (define @t2369 () (tptp.node2 tptp.s18 tptp.s19)) % 39.97/40.18 (define @t2370 () (or @t2362 @t2369)) % 39.97/40.18 (define @t2371 () (not @t2369)) % 39.97/40.18 (define @t2372 () (not @t2355)) % 39.97/40.18 (define @t2373 () (not @t2367)) % 39.97/40.18 (define @t2374 () (or @t2373 @t2372 @t2338 @t2371)) % 39.97/40.18 (define @t2375 () (@list tptp.s18 tptp.s17)) % 39.97/40.18 (define @t2376 () (@list tptp.s17)) % 39.97/40.18 (define @t2377 () (tptp.node4 tptp.s17)) % 39.97/40.18 (define @t2378 () (not @t2377)) % 39.97/40.18 (define @t2379 () (tptp.always3 tptp.s17)) % 39.97/40.18 (define @t2380 () (or @t2379 @t2378)) % 39.97/40.18 (define @t2381 () (tptp.m_main_v_request tptp.s17)) % 39.97/40.18 (define @t2382 () (or @t2381 @t2378)) % 39.97/40.18 (define @t2383 () (@list tptp.s17 tptp.s18)) % 39.97/40.18 (define @t2384 () (tptp.trans tptp.s17 tptp.s18)) % 39.97/40.18 (define @t2385 () (not @t18)) % 39.97/40.18 (define @t2386 () (or @t2385 @t2384)) % 39.97/40.18 (define @t2387 () (not @t2379)) % 39.97/40.18 (define @t2388 () (not @t2384)) % 39.97/40.18 (define @t2389 () (or @t2353 @t2388 @t2387)) % 39.97/40.18 (define @t2390 () (tptp.m_main_v_state tptp.s17 tptp.c_busy)) % 39.97/40.18 (define @t2391 () (not @t2390)) % 39.97/40.18 (define @t2392 () (or @t2391 @t2387)) % 39.97/40.18 (define @t2393 () (tptp.m_main_v_state tptp.s17 tptp.c_ready)) % 39.97/40.18 (define @t2394 () (or @t2393 @t2390)) % 39.97/40.18 (define @t2395 () (tptp.node2 tptp.s17 tptp.s18)) % 39.97/40.18 (define @t2396 () (or @t2388 @t2395)) % 39.97/40.18 (define @t2397 () (not @t2395)) % 39.97/40.18 (define @t2398 () (not @t2381)) % 39.97/40.18 (define @t2399 () (not @t2393)) % 39.97/40.18 (define @t2400 () (or @t2399 @t2398 @t2364 @t2397)) % 39.97/40.18 (define @t2401 () (@list tptp.s17 tptp.s16)) % 39.97/40.18 (define @t2402 () (@list tptp.s16)) % 39.97/40.18 (define @t2403 () (tptp.node4 tptp.s16)) % 39.97/40.18 (define @t2404 () (not @t2403)) % 39.97/40.18 (define @t2405 () (tptp.always3 tptp.s16)) % 39.97/40.18 (define @t2406 () (or @t2405 @t2404)) % 39.97/40.18 (define @t2407 () (tptp.m_main_v_request tptp.s16)) % 39.97/40.18 (define @t2408 () (or @t2407 @t2404)) % 39.97/40.18 (define @t2409 () (@list tptp.s16 tptp.s17)) % 39.97/40.18 (define @t2410 () (tptp.trans tptp.s16 tptp.s17)) % 39.97/40.18 (define @t2411 () (not @t17)) % 39.97/40.18 (define @t2412 () (or @t2411 @t2410)) % 39.97/40.18 (define @t2413 () (not @t2405)) % 39.97/40.18 (define @t2414 () (not @t2410)) % 39.97/40.18 (define @t2415 () (or @t2379 @t2414 @t2413)) % 39.97/40.18 (define @t2416 () (tptp.m_main_v_state tptp.s16 tptp.c_busy)) % 39.97/40.18 (define @t2417 () (not @t2416)) % 39.97/40.18 (define @t2418 () (or @t2417 @t2413)) % 39.97/40.18 (define @t2419 () (tptp.m_main_v_state tptp.s16 tptp.c_ready)) % 39.97/40.18 (define @t2420 () (or @t2419 @t2416)) % 39.97/40.18 (define @t2421 () (tptp.node2 tptp.s16 tptp.s17)) % 39.97/40.18 (define @t2422 () (or @t2414 @t2421)) % 39.97/40.18 (define @t2423 () (not @t2421)) % 39.97/40.18 (define @t2424 () (not @t2407)) % 39.97/40.18 (define @t2425 () (not @t2419)) % 39.97/40.18 (define @t2426 () (or @t2425 @t2424 @t2390 @t2423)) % 39.97/40.18 (define @t2427 () (@list tptp.s16 tptp.s15)) % 39.97/40.18 (define @t2428 () (@list tptp.s15)) % 39.97/40.18 (define @t2429 () (tptp.node4 tptp.s15)) % 39.97/40.18 (define @t2430 () (not @t2429)) % 39.97/40.18 (define @t2431 () (tptp.always3 tptp.s15)) % 39.97/40.18 (define @t2432 () (or @t2431 @t2430)) % 39.97/40.18 (define @t2433 () (tptp.m_main_v_request tptp.s15)) % 39.97/40.18 (define @t2434 () (or @t2433 @t2430)) % 39.97/40.18 (define @t2435 () (@list tptp.s15 tptp.s16)) % 39.97/40.18 (define @t2436 () (tptp.trans tptp.s15 tptp.s16)) % 39.97/40.18 (define @t2437 () (not @t16)) % 39.97/40.18 (define @t2438 () (or @t2437 @t2436)) % 39.97/40.18 (define @t2439 () (not @t2431)) % 39.97/40.18 (define @t2440 () (not @t2436)) % 39.97/40.18 (define @t2441 () (or @t2405 @t2440 @t2439)) % 39.97/40.18 (define @t2442 () (tptp.m_main_v_state tptp.s15 tptp.c_busy)) % 39.97/40.18 (define @t2443 () (not @t2442)) % 39.97/40.18 (define @t2444 () (or @t2443 @t2439)) % 39.97/40.18 (define @t2445 () (tptp.m_main_v_state tptp.s15 tptp.c_ready)) % 39.97/40.18 (define @t2446 () (or @t2445 @t2442)) % 39.97/40.18 (define @t2447 () (tptp.node2 tptp.s15 tptp.s16)) % 39.97/40.18 (define @t2448 () (or @t2440 @t2447)) % 39.97/40.18 (define @t2449 () (not @t2447)) % 39.97/40.18 (define @t2450 () (not @t2433)) % 39.97/40.18 (define @t2451 () (not @t2445)) % 39.97/40.18 (define @t2452 () (or @t2451 @t2450 @t2416 @t2449)) % 39.97/40.18 (define @t2453 () (@list tptp.s15 tptp.s14)) % 39.97/40.18 (define @t2454 () (@list tptp.s14)) % 39.97/40.18 (define @t2455 () (tptp.node4 tptp.s14)) % 39.97/40.18 (define @t2456 () (not @t2455)) % 39.97/40.18 (define @t2457 () (tptp.always3 tptp.s14)) % 39.97/40.18 (define @t2458 () (or @t2457 @t2456)) % 39.97/40.18 (define @t2459 () (tptp.m_main_v_request tptp.s14)) % 39.97/40.18 (define @t2460 () (or @t2459 @t2456)) % 39.97/40.18 (define @t2461 () (@list tptp.s14 tptp.s15)) % 39.97/40.18 (define @t2462 () (tptp.trans tptp.s14 tptp.s15)) % 39.97/40.18 (define @t2463 () (not @t15)) % 39.97/40.18 (define @t2464 () (or @t2463 @t2462)) % 39.97/40.18 (define @t2465 () (not @t2457)) % 39.97/40.18 (define @t2466 () (not @t2462)) % 39.97/40.18 (define @t2467 () (or @t2431 @t2466 @t2465)) % 39.97/40.18 (define @t2468 () (tptp.m_main_v_state tptp.s14 tptp.c_busy)) % 39.97/40.18 (define @t2469 () (not @t2468)) % 39.97/40.18 (define @t2470 () (or @t2469 @t2465)) % 39.97/40.18 (define @t2471 () (tptp.m_main_v_state tptp.s14 tptp.c_ready)) % 39.97/40.18 (define @t2472 () (or @t2471 @t2468)) % 39.97/40.18 (define @t2473 () (tptp.node2 tptp.s14 tptp.s15)) % 39.97/40.18 (define @t2474 () (or @t2466 @t2473)) % 39.97/40.18 (define @t2475 () (not @t2473)) % 39.97/40.18 (define @t2476 () (not @t2459)) % 39.97/40.18 (define @t2477 () (not @t2471)) % 39.97/40.18 (define @t2478 () (or @t2477 @t2476 @t2442 @t2475)) % 39.97/40.18 (define @t2479 () (@list tptp.s14 tptp.s13)) % 39.97/40.18 (define @t2480 () (@list tptp.s13)) % 39.97/40.18 (define @t2481 () (tptp.node4 tptp.s13)) % 39.97/40.18 (define @t2482 () (not @t2481)) % 39.97/40.18 (define @t2483 () (tptp.always3 tptp.s13)) % 39.97/40.18 (define @t2484 () (or @t2483 @t2482)) % 39.97/40.18 (define @t2485 () (tptp.m_main_v_request tptp.s13)) % 39.97/40.18 (define @t2486 () (or @t2485 @t2482)) % 39.97/40.18 (define @t2487 () (@list tptp.s13 tptp.s14)) % 39.97/40.18 (define @t2488 () (tptp.trans tptp.s13 tptp.s14)) % 39.97/40.18 (define @t2489 () (not @t14)) % 39.97/40.18 (define @t2490 () (or @t2489 @t2488)) % 39.97/40.18 (define @t2491 () (not @t2483)) % 39.97/40.18 (define @t2492 () (not @t2488)) % 39.97/40.18 (define @t2493 () (or @t2457 @t2492 @t2491)) % 39.97/40.18 (define @t2494 () (tptp.m_main_v_state tptp.s13 tptp.c_busy)) % 39.97/40.18 (define @t2495 () (not @t2494)) % 39.97/40.18 (define @t2496 () (or @t2495 @t2491)) % 39.97/40.18 (define @t2497 () (tptp.m_main_v_state tptp.s13 tptp.c_ready)) % 39.97/40.18 (define @t2498 () (or @t2497 @t2494)) % 39.97/40.18 (define @t2499 () (tptp.node2 tptp.s13 tptp.s14)) % 39.97/40.18 (define @t2500 () (or @t2492 @t2499)) % 39.97/40.18 (define @t2501 () (not @t2499)) % 39.97/40.18 (define @t2502 () (not @t2485)) % 39.97/40.18 (define @t2503 () (not @t2497)) % 39.97/40.18 (define @t2504 () (or @t2503 @t2502 @t2468 @t2501)) % 39.97/40.18 (define @t2505 () (@list tptp.s13 tptp.s12)) % 39.97/40.18 (define @t2506 () (@list tptp.s12)) % 39.97/40.18 (define @t2507 () (tptp.node4 tptp.s12)) % 39.97/40.18 (define @t2508 () (not @t2507)) % 39.97/40.18 (define @t2509 () (tptp.always3 tptp.s12)) % 39.97/40.18 (define @t2510 () (or @t2509 @t2508)) % 39.97/40.18 (define @t2511 () (tptp.m_main_v_request tptp.s12)) % 39.97/40.18 (define @t2512 () (or @t2511 @t2508)) % 39.97/40.18 (define @t2513 () (@list tptp.s12 tptp.s13)) % 39.97/40.18 (define @t2514 () (tptp.trans tptp.s12 tptp.s13)) % 39.97/40.18 (define @t2515 () (not @t13)) % 39.97/40.18 (define @t2516 () (or @t2515 @t2514)) % 39.97/40.18 (define @t2517 () (not @t2509)) % 39.97/40.18 (define @t2518 () (not @t2514)) % 39.97/40.18 (define @t2519 () (or @t2483 @t2518 @t2517)) % 39.97/40.18 (define @t2520 () (tptp.m_main_v_state tptp.s12 tptp.c_busy)) % 39.97/40.18 (define @t2521 () (not @t2520)) % 39.97/40.18 (define @t2522 () (or @t2521 @t2517)) % 39.97/40.18 (define @t2523 () (tptp.m_main_v_state tptp.s12 tptp.c_ready)) % 39.97/40.18 (define @t2524 () (or @t2523 @t2520)) % 39.97/40.18 (define @t2525 () (tptp.node2 tptp.s12 tptp.s13)) % 39.97/40.18 (define @t2526 () (or @t2518 @t2525)) % 39.97/40.18 (define @t2527 () (not @t2525)) % 39.97/40.18 (define @t2528 () (not @t2511)) % 39.97/40.18 (define @t2529 () (not @t2523)) % 39.97/40.18 (define @t2530 () (or @t2529 @t2528 @t2494 @t2527)) % 39.97/40.18 (define @t2531 () (@list tptp.s12 tptp.s11)) % 39.97/40.18 (define @t2532 () (@list tptp.s11)) % 39.97/40.18 (define @t2533 () (tptp.node4 tptp.s11)) % 39.97/40.18 (define @t2534 () (not @t2533)) % 39.97/40.18 (define @t2535 () (tptp.always3 tptp.s11)) % 39.97/40.18 (define @t2536 () (or @t2535 @t2534)) % 39.97/40.18 (define @t2537 () (tptp.m_main_v_request tptp.s11)) % 39.97/40.18 (define @t2538 () (or @t2537 @t2534)) % 39.97/40.18 (define @t2539 () (@list tptp.s11 tptp.s12)) % 39.97/40.18 (define @t2540 () (tptp.trans tptp.s11 tptp.s12)) % 39.97/40.18 (define @t2541 () (not @t12)) % 39.97/40.18 (define @t2542 () (or @t2541 @t2540)) % 39.97/40.18 (define @t2543 () (not @t2535)) % 39.97/40.18 (define @t2544 () (not @t2540)) % 39.97/40.18 (define @t2545 () (or @t2509 @t2544 @t2543)) % 39.97/40.18 (define @t2546 () (tptp.m_main_v_state tptp.s11 tptp.c_busy)) % 39.97/40.18 (define @t2547 () (not @t2546)) % 39.97/40.18 (define @t2548 () (or @t2547 @t2543)) % 39.97/40.18 (define @t2549 () (tptp.m_main_v_state tptp.s11 tptp.c_ready)) % 39.97/40.18 (define @t2550 () (or @t2549 @t2546)) % 39.97/40.18 (define @t2551 () (tptp.node2 tptp.s11 tptp.s12)) % 39.97/40.18 (define @t2552 () (or @t2544 @t2551)) % 39.97/40.18 (define @t2553 () (not @t2551)) % 39.97/40.18 (define @t2554 () (not @t2537)) % 39.97/40.18 (define @t2555 () (not @t2549)) % 39.97/40.18 (define @t2556 () (or @t2555 @t2554 @t2520 @t2553)) % 39.97/40.18 (define @t2557 () (@list tptp.s11 tptp.s10)) % 39.97/40.18 (define @t2558 () (@list tptp.s10)) % 39.97/40.18 (define @t2559 () (tptp.node4 tptp.s10)) % 39.97/40.18 (define @t2560 () (not @t2559)) % 39.97/40.18 (define @t2561 () (tptp.always3 tptp.s10)) % 39.97/40.18 (define @t2562 () (or @t2561 @t2560)) % 39.97/40.18 (define @t2563 () (tptp.m_main_v_request tptp.s10)) % 39.97/40.18 (define @t2564 () (or @t2563 @t2560)) % 39.97/40.18 (define @t2565 () (@list tptp.s10 tptp.s11)) % 39.97/40.18 (define @t2566 () (tptp.trans tptp.s10 tptp.s11)) % 39.97/40.18 (define @t2567 () (not @t11)) % 39.97/40.18 (define @t2568 () (or @t2567 @t2566)) % 39.97/40.18 (define @t2569 () (not @t2561)) % 39.97/40.18 (define @t2570 () (not @t2566)) % 39.97/40.18 (define @t2571 () (or @t2535 @t2570 @t2569)) % 39.97/40.18 (define @t2572 () (tptp.m_main_v_state tptp.s10 tptp.c_busy)) % 39.97/40.18 (define @t2573 () (not @t2572)) % 39.97/40.18 (define @t2574 () (or @t2573 @t2569)) % 39.97/40.18 (define @t2575 () (tptp.m_main_v_state tptp.s10 tptp.c_ready)) % 39.97/40.18 (define @t2576 () (or @t2575 @t2572)) % 39.97/40.18 (define @t2577 () (tptp.node2 tptp.s10 tptp.s11)) % 39.97/40.18 (define @t2578 () (or @t2570 @t2577)) % 39.97/40.18 (define @t2579 () (not @t2577)) % 39.97/40.18 (define @t2580 () (not @t2563)) % 39.97/40.18 (define @t2581 () (not @t2575)) % 39.97/40.18 (define @t2582 () (or @t2581 @t2580 @t2546 @t2579)) % 39.97/40.18 (define @t2583 () (@list tptp.s10 tptp.s9)) % 39.97/40.18 (define @t2584 () (@list tptp.s9)) % 39.97/40.18 (define @t2585 () (tptp.node4 tptp.s9)) % 39.97/40.18 (define @t2586 () (not @t2585)) % 39.97/40.18 (define @t2587 () (tptp.always3 tptp.s9)) % 39.97/40.18 (define @t2588 () (or @t2587 @t2586)) % 39.97/40.18 (define @t2589 () (tptp.m_main_v_request tptp.s9)) % 39.97/40.18 (define @t2590 () (or @t2589 @t2586)) % 39.97/40.18 (define @t2591 () (@list tptp.s9 tptp.s10)) % 39.97/40.18 (define @t2592 () (tptp.trans tptp.s9 tptp.s10)) % 39.97/40.18 (define @t2593 () (not @t10)) % 39.97/40.18 (define @t2594 () (or @t2593 @t2592)) % 39.97/40.18 (define @t2595 () (not @t2587)) % 39.97/40.18 (define @t2596 () (not @t2592)) % 39.97/40.18 (define @t2597 () (or @t2561 @t2596 @t2595)) % 39.97/40.18 (define @t2598 () (tptp.m_main_v_state tptp.s9 tptp.c_busy)) % 39.97/40.18 (define @t2599 () (not @t2598)) % 39.97/40.18 (define @t2600 () (or @t2599 @t2595)) % 39.97/40.18 (define @t2601 () (tptp.m_main_v_state tptp.s9 tptp.c_ready)) % 39.97/40.18 (define @t2602 () (or @t2601 @t2598)) % 39.97/40.18 (define @t2603 () (tptp.node2 tptp.s9 tptp.s10)) % 39.97/40.18 (define @t2604 () (or @t2596 @t2603)) % 39.97/40.18 (define @t2605 () (not @t2603)) % 39.97/40.18 (define @t2606 () (not @t2589)) % 39.97/40.18 (define @t2607 () (not @t2601)) % 39.97/40.18 (define @t2608 () (or @t2607 @t2606 @t2572 @t2605)) % 39.97/40.18 (define @t2609 () (@list tptp.s9 tptp.s8)) % 39.97/40.18 (define @t2610 () (@list tptp.s8)) % 39.97/40.18 (define @t2611 () (tptp.node4 tptp.s8)) % 39.97/40.18 (define @t2612 () (not @t2611)) % 39.97/40.18 (define @t2613 () (tptp.always3 tptp.s8)) % 39.97/40.18 (define @t2614 () (or @t2613 @t2612)) % 39.97/40.18 (define @t2615 () (tptp.m_main_v_request tptp.s8)) % 39.97/40.18 (define @t2616 () (or @t2615 @t2612)) % 39.97/40.18 (define @t2617 () (@list tptp.s8 tptp.s9)) % 39.97/40.18 (define @t2618 () (tptp.trans tptp.s8 tptp.s9)) % 39.97/40.18 (define @t2619 () (not @t9)) % 39.97/40.18 (define @t2620 () (or @t2619 @t2618)) % 39.97/40.18 (define @t2621 () (not @t2613)) % 39.97/40.18 (define @t2622 () (not @t2618)) % 39.97/40.18 (define @t2623 () (or @t2587 @t2622 @t2621)) % 39.97/40.18 (define @t2624 () (tptp.m_main_v_state tptp.s8 tptp.c_busy)) % 39.97/40.18 (define @t2625 () (not @t2624)) % 39.97/40.18 (define @t2626 () (or @t2625 @t2621)) % 39.97/40.18 (define @t2627 () (tptp.m_main_v_state tptp.s8 tptp.c_ready)) % 39.97/40.18 (define @t2628 () (or @t2627 @t2624)) % 39.97/40.18 (define @t2629 () (tptp.node2 tptp.s8 tptp.s9)) % 39.97/40.18 (define @t2630 () (or @t2622 @t2629)) % 39.97/40.18 (define @t2631 () (not @t2629)) % 39.97/40.18 (define @t2632 () (not @t2615)) % 39.97/40.18 (define @t2633 () (not @t2627)) % 39.97/40.18 (define @t2634 () (or @t2633 @t2632 @t2598 @t2631)) % 39.97/40.18 (define @t2635 () (@list tptp.s8 tptp.s7)) % 39.97/40.18 (define @t2636 () (@list tptp.s7)) % 39.97/40.18 (define @t2637 () (tptp.node4 tptp.s7)) % 39.97/40.18 (define @t2638 () (not @t2637)) % 39.97/40.18 (define @t2639 () (tptp.always3 tptp.s7)) % 39.97/40.18 (define @t2640 () (or @t2639 @t2638)) % 39.97/40.18 (define @t2641 () (tptp.m_main_v_request tptp.s7)) % 39.97/40.18 (define @t2642 () (or @t2641 @t2638)) % 39.97/40.18 (define @t2643 () (@list tptp.s7 tptp.s8)) % 39.97/40.18 (define @t2644 () (tptp.trans tptp.s7 tptp.s8)) % 39.97/40.18 (define @t2645 () (not @t8)) % 39.97/40.18 (define @t2646 () (or @t2645 @t2644)) % 39.97/40.18 (define @t2647 () (not @t2639)) % 39.97/40.18 (define @t2648 () (not @t2644)) % 39.97/40.18 (define @t2649 () (or @t2613 @t2648 @t2647)) % 39.97/40.18 (define @t2650 () (tptp.m_main_v_state tptp.s7 tptp.c_busy)) % 39.97/40.18 (define @t2651 () (not @t2650)) % 39.97/40.18 (define @t2652 () (or @t2651 @t2647)) % 39.97/40.18 (define @t2653 () (tptp.m_main_v_state tptp.s7 tptp.c_ready)) % 39.97/40.18 (define @t2654 () (or @t2653 @t2650)) % 39.97/40.18 (define @t2655 () (tptp.node2 tptp.s7 tptp.s8)) % 39.97/40.18 (define @t2656 () (or @t2648 @t2655)) % 39.97/40.18 (define @t2657 () (not @t2655)) % 39.97/40.18 (define @t2658 () (not @t2641)) % 39.97/40.18 (define @t2659 () (not @t2653)) % 39.97/40.18 (define @t2660 () (or @t2659 @t2658 @t2624 @t2657)) % 39.97/40.18 (define @t2661 () (@list tptp.s7 tptp.s6)) % 39.97/40.18 (define @t2662 () (@list tptp.s6)) % 39.97/40.18 (define @t2663 () (tptp.node4 tptp.s6)) % 39.97/40.18 (define @t2664 () (not @t2663)) % 39.97/40.18 (define @t2665 () (tptp.always3 tptp.s6)) % 39.97/40.18 (define @t2666 () (or @t2665 @t2664)) % 39.97/40.18 (define @t2667 () (tptp.m_main_v_request tptp.s6)) % 39.97/40.18 (define @t2668 () (or @t2667 @t2664)) % 39.97/40.18 (define @t2669 () (@list tptp.s6 tptp.s7)) % 39.97/40.18 (define @t2670 () (tptp.trans tptp.s6 tptp.s7)) % 39.97/40.18 (define @t2671 () (not @t7)) % 39.97/40.18 (define @t2672 () (or @t2671 @t2670)) % 39.97/40.18 (define @t2673 () (not @t2665)) % 39.97/40.18 (define @t2674 () (not @t2670)) % 39.97/40.18 (define @t2675 () (or @t2639 @t2674 @t2673)) % 39.97/40.18 (define @t2676 () (tptp.m_main_v_state tptp.s6 tptp.c_busy)) % 39.97/40.18 (define @t2677 () (not @t2676)) % 39.97/40.18 (define @t2678 () (or @t2677 @t2673)) % 39.97/40.18 (define @t2679 () (tptp.m_main_v_state tptp.s6 tptp.c_ready)) % 39.97/40.18 (define @t2680 () (or @t2679 @t2676)) % 39.97/40.18 (define @t2681 () (tptp.node2 tptp.s6 tptp.s7)) % 39.97/40.18 (define @t2682 () (or @t2674 @t2681)) % 39.97/40.18 (define @t2683 () (not @t2681)) % 39.97/40.18 (define @t2684 () (not @t2667)) % 39.97/40.18 (define @t2685 () (not @t2679)) % 39.97/40.18 (define @t2686 () (or @t2685 @t2684 @t2650 @t2683)) % 39.97/40.18 (define @t2687 () (@list tptp.s6 tptp.s5)) % 39.97/40.18 (define @t2688 () (@list tptp.s5)) % 39.97/40.18 (define @t2689 () (tptp.node4 tptp.s5)) % 39.97/40.18 (define @t2690 () (not @t2689)) % 39.97/40.18 (define @t2691 () (tptp.always3 tptp.s5)) % 39.97/40.18 (define @t2692 () (or @t2691 @t2690)) % 39.97/40.18 (define @t2693 () (tptp.m_main_v_request tptp.s5)) % 39.97/40.18 (define @t2694 () (or @t2693 @t2690)) % 39.97/40.18 (define @t2695 () (@list tptp.s5 tptp.s6)) % 39.97/40.18 (define @t2696 () (tptp.trans tptp.s5 tptp.s6)) % 39.97/40.18 (define @t2697 () (not @t6)) % 39.97/40.18 (define @t2698 () (or @t2697 @t2696)) % 39.97/40.18 (define @t2699 () (not @t2691)) % 39.97/40.18 (define @t2700 () (not @t2696)) % 39.97/40.18 (define @t2701 () (or @t2665 @t2700 @t2699)) % 39.97/40.18 (define @t2702 () (tptp.m_main_v_state tptp.s5 tptp.c_busy)) % 39.97/40.18 (define @t2703 () (not @t2702)) % 39.97/40.18 (define @t2704 () (or @t2703 @t2699)) % 39.97/40.18 (define @t2705 () (tptp.m_main_v_state tptp.s5 tptp.c_ready)) % 39.97/40.18 (define @t2706 () (or @t2705 @t2702)) % 39.97/40.18 (define @t2707 () (tptp.node2 tptp.s5 tptp.s6)) % 39.97/40.18 (define @t2708 () (or @t2700 @t2707)) % 39.97/40.18 (define @t2709 () (not @t2707)) % 39.97/40.18 (define @t2710 () (not @t2693)) % 39.97/40.18 (define @t2711 () (not @t2705)) % 39.97/40.18 (define @t2712 () (or @t2711 @t2710 @t2676 @t2709)) % 39.97/40.18 (define @t2713 () (@list tptp.s5 tptp.s4)) % 39.97/40.18 (define @t2714 () (@list tptp.s4)) % 39.97/40.18 (define @t2715 () (tptp.node4 tptp.s4)) % 39.97/40.18 (define @t2716 () (not @t2715)) % 39.97/40.18 (define @t2717 () (tptp.always3 tptp.s4)) % 39.97/40.18 (define @t2718 () (or @t2717 @t2716)) % 39.97/40.18 (define @t2719 () (tptp.m_main_v_request tptp.s4)) % 39.97/40.18 (define @t2720 () (or @t2719 @t2716)) % 39.97/40.18 (define @t2721 () (@list tptp.s4 tptp.s5)) % 39.97/40.18 (define @t2722 () (tptp.trans tptp.s4 tptp.s5)) % 39.97/40.18 (define @t2723 () (not @t5)) % 39.97/40.18 (define @t2724 () (or @t2723 @t2722)) % 39.97/40.18 (define @t2725 () (not @t2717)) % 39.97/40.18 (define @t2726 () (not @t2722)) % 39.97/40.18 (define @t2727 () (or @t2691 @t2726 @t2725)) % 39.97/40.18 (define @t2728 () (tptp.m_main_v_state tptp.s4 tptp.c_busy)) % 39.97/40.18 (define @t2729 () (not @t2728)) % 39.97/40.18 (define @t2730 () (or @t2729 @t2725)) % 39.97/40.18 (define @t2731 () (tptp.m_main_v_state tptp.s4 tptp.c_ready)) % 39.97/40.18 (define @t2732 () (or @t2731 @t2728)) % 39.97/40.18 (define @t2733 () (tptp.node2 tptp.s4 tptp.s5)) % 39.97/40.18 (define @t2734 () (or @t2726 @t2733)) % 39.97/40.18 (define @t2735 () (not @t2733)) % 39.97/40.18 (define @t2736 () (not @t2719)) % 39.97/40.18 (define @t2737 () (not @t2731)) % 39.97/40.18 (define @t2738 () (or @t2737 @t2736 @t2702 @t2735)) % 39.97/40.18 (define @t2739 () (@list tptp.s4 tptp.s3)) % 39.97/40.18 (define @t2740 () (@list tptp.s3)) % 39.97/40.18 (define @t2741 () (tptp.node4 tptp.s3)) % 39.97/40.18 (define @t2742 () (not @t2741)) % 39.97/40.18 (define @t2743 () (tptp.always3 tptp.s3)) % 39.97/40.18 (define @t2744 () (or @t2743 @t2742)) % 39.97/40.18 (define @t2745 () (tptp.m_main_v_request tptp.s3)) % 39.97/40.18 (define @t2746 () (or @t2745 @t2742)) % 39.97/40.18 (define @t2747 () (@list tptp.s3 tptp.s4)) % 39.97/40.18 (define @t2748 () (tptp.trans tptp.s3 tptp.s4)) % 39.97/40.18 (define @t2749 () (not @t4)) % 39.97/40.18 (define @t2750 () (or @t2749 @t2748)) % 39.97/40.18 (define @t2751 () (not @t2743)) % 39.97/40.18 (define @t2752 () (not @t2748)) % 39.97/40.18 (define @t2753 () (or @t2717 @t2752 @t2751)) % 39.97/40.18 (define @t2754 () (tptp.m_main_v_state tptp.s3 tptp.c_busy)) % 39.97/40.18 (define @t2755 () (not @t2754)) % 39.97/40.18 (define @t2756 () (or @t2755 @t2751)) % 39.97/40.18 (define @t2757 () (tptp.m_main_v_state tptp.s3 tptp.c_ready)) % 39.97/40.18 (define @t2758 () (or @t2757 @t2754)) % 39.97/40.18 (define @t2759 () (tptp.node2 tptp.s3 tptp.s4)) % 39.97/40.18 (define @t2760 () (or @t2752 @t2759)) % 39.97/40.18 (define @t2761 () (not @t2759)) % 39.97/40.18 (define @t2762 () (not @t2745)) % 39.97/40.18 (define @t2763 () (not @t2757)) % 39.97/40.18 (define @t2764 () (or @t2763 @t2762 @t2728 @t2761)) % 39.97/40.18 (define @t2765 () (@list tptp.s3 tptp.s2)) % 39.97/40.18 (define @t2766 () (@list tptp.s2)) % 39.97/40.18 (define @t2767 () (tptp.node4 tptp.s2)) % 39.97/40.18 (define @t2768 () (not @t2767)) % 39.97/40.18 (define @t2769 () (tptp.always3 tptp.s2)) % 39.97/40.18 (define @t2770 () (or @t2769 @t2768)) % 39.97/40.18 (define @t2771 () (tptp.m_main_v_request tptp.s2)) % 39.97/40.18 (define @t2772 () (or @t2771 @t2768)) % 39.97/40.18 (define @t2773 () (@list tptp.s2 tptp.s3)) % 39.97/40.18 (define @t2774 () (tptp.trans tptp.s2 tptp.s3)) % 39.97/40.18 (define @t2775 () (not @t3)) % 39.97/40.18 (define @t2776 () (or @t2775 @t2774)) % 39.97/40.18 (define @t2777 () (not @t2769)) % 39.97/40.18 (define @t2778 () (not @t2774)) % 39.97/40.18 (define @t2779 () (or @t2743 @t2778 @t2777)) % 39.97/40.18 (define @t2780 () (tptp.m_main_v_state tptp.s2 tptp.c_busy)) % 39.97/40.18 (define @t2781 () (not @t2780)) % 39.97/40.18 (define @t2782 () (or @t2781 @t2777)) % 39.97/40.18 (define @t2783 () (tptp.m_main_v_state tptp.s2 tptp.c_ready)) % 39.97/40.18 (define @t2784 () (or @t2783 @t2780)) % 39.97/40.18 (define @t2785 () (tptp.node2 tptp.s2 tptp.s3)) % 39.97/40.18 (define @t2786 () (or @t2778 @t2785)) % 39.97/40.18 (define @t2787 () (not @t2785)) % 39.97/40.18 (define @t2788 () (not @t2771)) % 39.97/40.18 (define @t2789 () (not @t2783)) % 39.97/40.18 (define @t2790 () (or @t2789 @t2788 @t2754 @t2787)) % 39.97/40.18 (define @t2791 () (@list tptp.s2 tptp.s1)) % 39.97/40.18 (define @t2792 () (@list tptp.s1)) % 39.97/40.18 (define @t2793 () (tptp.node4 tptp.s1)) % 39.97/40.18 (define @t2794 () (not @t2793)) % 39.97/40.18 (define @t2795 () (tptp.always3 tptp.s1)) % 39.97/40.18 (define @t2796 () (or @t2795 @t2794)) % 39.97/40.18 (define @t2797 () (tptp.m_main_v_request tptp.s1)) % 39.97/40.18 (define @t2798 () (or @t2797 @t2794)) % 39.97/40.18 (define @t2799 () (@list tptp.s1 tptp.s2)) % 39.97/40.18 (define @t2800 () (tptp.trans tptp.s1 tptp.s2)) % 39.97/40.18 (define @t2801 () (not @t2)) % 39.97/40.18 (define @t2802 () (or @t2801 @t2800)) % 39.97/40.18 (define @t2803 () (not @t2795)) % 39.97/40.18 (define @t2804 () (not @t2800)) % 39.97/40.18 (define @t2805 () (or @t2769 @t2804 @t2803)) % 39.97/40.18 (define @t2806 () (tptp.m_main_v_state tptp.s1 tptp.c_busy)) % 39.97/40.18 (define @t2807 () (not @t2806)) % 39.97/40.18 (define @t2808 () (or @t2807 @t2803)) % 39.97/40.18 (define @t2809 () (tptp.m_main_v_state tptp.s1 tptp.c_ready)) % 39.97/40.18 (define @t2810 () (or @t2809 @t2806)) % 39.97/40.18 (define @t2811 () (tptp.node2 tptp.s1 tptp.s2)) % 39.97/40.18 (define @t2812 () (or @t2804 @t2811)) % 39.97/40.18 (define @t2813 () (not @t2811)) % 39.97/40.18 (define @t2814 () (not @t2797)) % 39.97/40.18 (define @t2815 () (not @t2809)) % 39.97/40.18 (define @t2816 () (or @t2815 @t2814 @t2780 @t2813)) % 39.97/40.18 (define @t2817 () (@list tptp.s1 tptp.s0)) % 39.97/40.18 (define @t2818 () (@list tptp.s0)) % 39.97/40.18 (define @t2819 () (tptp.node4 tptp.s0)) % 39.97/40.18 (define @t2820 () (not @t2819)) % 39.97/40.18 (define @t2821 () (tptp.m_main_v_request tptp.s0)) % 39.97/40.18 (define @t2822 () (or @t2821 @t2820)) % 39.97/40.18 (define @t2823 () (tptp.always3 tptp.s0)) % 39.97/40.18 (define @t2824 () (or @t2823 @t2820)) % 39.97/40.18 (define @t2825 () (@list tptp.s0 tptp.s1)) % 39.97/40.18 (define @t2826 () (tptp.trans tptp.s0 tptp.s1)) % 39.97/40.18 (define @t2827 () (not @t1)) % 39.97/40.18 (define @t2828 () (or @t2827 @t2826)) % 39.97/40.18 (define @t2829 () (tptp.node2 tptp.s0 tptp.s1)) % 39.97/40.18 (define @t2830 () (not @t2826)) % 39.97/40.18 (define @t2831 () (or @t2830 @t2829)) % 39.97/40.18 (define @t2832 () (not @t2829)) % 39.97/40.18 (define @t2833 () (not @t2821)) % 39.97/40.18 (define @t2834 () (not @t211)) % 39.97/40.18 (define @t2835 () (or @t2834 @t2833 @t2806 @t2832)) % 39.97/40.18 (define @t2836 () (not @t2823)) % 39.97/40.18 (define @t2837 () (or @t2795 @t2830 @t2836)) % 39.97/40.18 (define @t2838 () (not @t236)) % 39.97/40.18 (define @t2839 () (tptp.xuntil6 tptp.s0)) % 39.97/40.18 (define @t2840 () (or @t2819 @t2839 @t2838)) % 39.97/40.18 (define @t2841 () (@list false true false)) % 39.97/40.18 (define @t2842 () (not @t2839)) % 39.97/40.18 (define @t2843 () (tptp.until5 tptp.s1)) % 39.97/40.18 (define @t2844 () (or @t2843 @t2827 @t2842)) % 39.97/40.18 (define @t2845 () (@list false false false)) % 39.97/40.18 (define @t2846 () (not @t2843)) % 39.97/40.18 (define @t2847 () (tptp.xuntil6 tptp.s1)) % 39.97/40.18 (define @t2848 () (or @t2793 @t2847 @t2846)) % 39.97/40.18 (define @t2849 () (not @t2847)) % 39.97/40.18 (define @t2850 () (tptp.until5 tptp.s2)) % 39.97/40.18 (define @t2851 () (or @t2850 @t2801 @t2849)) % 39.97/40.18 (define @t2852 () (not @t2850)) % 39.97/40.18 (define @t2853 () (tptp.xuntil6 tptp.s2)) % 39.97/40.18 (define @t2854 () (or @t2767 @t2853 @t2852)) % 39.97/40.18 (define @t2855 () (not @t2853)) % 39.97/40.18 (define @t2856 () (tptp.until5 tptp.s3)) % 39.97/40.18 (define @t2857 () (or @t2856 @t2775 @t2855)) % 39.97/40.18 (define @t2858 () (not @t2856)) % 39.97/40.18 (define @t2859 () (tptp.xuntil6 tptp.s3)) % 39.97/40.18 (define @t2860 () (or @t2741 @t2859 @t2858)) % 39.97/40.18 (define @t2861 () (not @t2859)) % 39.97/40.18 (define @t2862 () (tptp.until5 tptp.s4)) % 39.97/40.18 (define @t2863 () (or @t2862 @t2749 @t2861)) % 39.97/40.18 (define @t2864 () (not @t2862)) % 39.97/40.18 (define @t2865 () (tptp.xuntil6 tptp.s4)) % 39.97/40.18 (define @t2866 () (or @t2715 @t2865 @t2864)) % 39.97/40.18 (define @t2867 () (not @t2865)) % 39.97/40.18 (define @t2868 () (tptp.until5 tptp.s5)) % 39.97/40.18 (define @t2869 () (or @t2868 @t2723 @t2867)) % 39.97/40.18 (define @t2870 () (not @t2868)) % 39.97/40.18 (define @t2871 () (tptp.xuntil6 tptp.s5)) % 39.97/40.18 (define @t2872 () (or @t2689 @t2871 @t2870)) % 39.97/40.18 (define @t2873 () (not @t2871)) % 39.97/40.18 (define @t2874 () (tptp.until5 tptp.s6)) % 39.97/40.18 (define @t2875 () (or @t2874 @t2697 @t2873)) % 39.97/40.18 (define @t2876 () (not @t2874)) % 39.97/40.18 (define @t2877 () (tptp.xuntil6 tptp.s6)) % 39.97/40.18 (define @t2878 () (or @t2663 @t2877 @t2876)) % 39.97/40.18 (define @t2879 () (not @t2877)) % 39.97/40.18 (define @t2880 () (tptp.until5 tptp.s7)) % 39.97/40.18 (define @t2881 () (or @t2880 @t2671 @t2879)) % 39.97/40.18 (define @t2882 () (not @t2880)) % 39.97/40.18 (define @t2883 () (tptp.xuntil6 tptp.s7)) % 39.97/40.18 (define @t2884 () (or @t2637 @t2883 @t2882)) % 39.97/40.18 (define @t2885 () (not @t2883)) % 39.97/40.18 (define @t2886 () (tptp.until5 tptp.s8)) % 39.97/40.18 (define @t2887 () (or @t2886 @t2645 @t2885)) % 39.97/40.18 (define @t2888 () (not @t2886)) % 39.97/40.18 (define @t2889 () (tptp.xuntil6 tptp.s8)) % 39.97/40.18 (define @t2890 () (or @t2611 @t2889 @t2888)) % 39.97/40.18 (define @t2891 () (not @t2889)) % 39.97/40.18 (define @t2892 () (tptp.until5 tptp.s9)) % 39.97/40.18 (define @t2893 () (or @t2892 @t2619 @t2891)) % 39.97/40.18 (define @t2894 () (not @t2892)) % 39.97/40.18 (define @t2895 () (tptp.xuntil6 tptp.s9)) % 39.97/40.18 (define @t2896 () (or @t2585 @t2895 @t2894)) % 39.97/40.18 (define @t2897 () (not @t2895)) % 39.97/40.18 (define @t2898 () (tptp.until5 tptp.s10)) % 39.97/40.18 (define @t2899 () (or @t2898 @t2593 @t2897)) % 39.97/40.18 (define @t2900 () (not @t2898)) % 39.97/40.18 (define @t2901 () (tptp.xuntil6 tptp.s10)) % 39.97/40.18 (define @t2902 () (or @t2559 @t2901 @t2900)) % 39.97/40.18 (define @t2903 () (not @t2901)) % 39.97/40.18 (define @t2904 () (tptp.until5 tptp.s11)) % 39.97/40.18 (define @t2905 () (or @t2904 @t2567 @t2903)) % 39.97/40.18 (define @t2906 () (not @t2904)) % 39.97/40.18 (define @t2907 () (tptp.xuntil6 tptp.s11)) % 39.97/40.18 (define @t2908 () (or @t2533 @t2907 @t2906)) % 39.97/40.18 (define @t2909 () (not @t2907)) % 39.97/40.18 (define @t2910 () (tptp.until5 tptp.s12)) % 39.97/40.18 (define @t2911 () (or @t2910 @t2541 @t2909)) % 39.97/40.18 (define @t2912 () (not @t2910)) % 39.97/40.18 (define @t2913 () (tptp.xuntil6 tptp.s12)) % 39.97/40.18 (define @t2914 () (or @t2507 @t2913 @t2912)) % 39.97/40.18 (define @t2915 () (not @t2913)) % 39.97/40.18 (define @t2916 () (tptp.until5 tptp.s13)) % 39.97/40.18 (define @t2917 () (or @t2916 @t2515 @t2915)) % 39.97/40.18 (define @t2918 () (not @t2916)) % 39.97/40.18 (define @t2919 () (tptp.xuntil6 tptp.s13)) % 39.97/40.18 (define @t2920 () (or @t2481 @t2919 @t2918)) % 39.97/40.18 (define @t2921 () (not @t2919)) % 39.97/40.18 (define @t2922 () (tptp.until5 tptp.s14)) % 39.97/40.18 (define @t2923 () (or @t2922 @t2489 @t2921)) % 39.97/40.18 (define @t2924 () (not @t2922)) % 39.97/40.18 (define @t2925 () (tptp.xuntil6 tptp.s14)) % 39.97/40.18 (define @t2926 () (or @t2455 @t2925 @t2924)) % 39.97/40.18 (define @t2927 () (not @t2925)) % 39.97/40.18 (define @t2928 () (tptp.until5 tptp.s15)) % 39.97/40.18 (define @t2929 () (or @t2928 @t2463 @t2927)) % 39.97/40.18 (define @t2930 () (not @t2928)) % 39.97/40.18 (define @t2931 () (tptp.xuntil6 tptp.s15)) % 39.97/40.18 (define @t2932 () (or @t2429 @t2931 @t2930)) % 39.97/40.18 (define @t2933 () (not @t2931)) % 39.97/40.18 (define @t2934 () (tptp.until5 tptp.s16)) % 39.97/40.18 (define @t2935 () (or @t2934 @t2437 @t2933)) % 39.97/40.18 (define @t2936 () (not @t2934)) % 39.97/40.18 (define @t2937 () (tptp.xuntil6 tptp.s16)) % 39.97/40.18 (define @t2938 () (or @t2403 @t2937 @t2936)) % 39.97/40.18 (define @t2939 () (not @t2937)) % 39.97/40.18 (define @t2940 () (tptp.until5 tptp.s17)) % 39.97/40.18 (define @t2941 () (or @t2940 @t2411 @t2939)) % 39.97/40.18 (define @t2942 () (not @t2940)) % 39.97/40.18 (define @t2943 () (tptp.xuntil6 tptp.s17)) % 39.97/40.18 (define @t2944 () (or @t2377 @t2943 @t2942)) % 39.97/40.18 (define @t2945 () (not @t2943)) % 39.97/40.18 (define @t2946 () (tptp.until5 tptp.s18)) % 39.97/40.18 (define @t2947 () (or @t2946 @t2385 @t2945)) % 39.97/40.18 (define @t2948 () (not @t2946)) % 39.97/40.18 (define @t2949 () (tptp.xuntil6 tptp.s18)) % 39.97/40.18 (define @t2950 () (or @t2351 @t2949 @t2948)) % 39.97/40.18 (define @t2951 () (not @t2949)) % 39.97/40.18 (define @t2952 () (tptp.until5 tptp.s19)) % 39.97/40.18 (define @t2953 () (or @t2952 @t2359 @t2951)) % 39.97/40.18 (define @t2954 () (not @t2952)) % 39.97/40.18 (define @t2955 () (tptp.xuntil6 tptp.s19)) % 39.97/40.18 (define @t2956 () (or @t2325 @t2955 @t2954)) % 39.97/40.18 (define @t2957 () (not @t2955)) % 39.97/40.18 (define @t2958 () (tptp.until5 tptp.s20)) % 39.97/40.18 (define @t2959 () (or @t2958 @t2333 @t2957)) % 39.97/40.18 (define @t2960 () (not @t2958)) % 39.97/40.18 (define @t2961 () (tptp.xuntil6 tptp.s20)) % 39.97/40.18 (define @t2962 () (or @t2299 @t2961 @t2960)) % 39.97/40.18 (define @t2963 () (not @t2961)) % 39.97/40.18 (define @t2964 () (tptp.until5 tptp.s21)) % 39.97/40.18 (define @t2965 () (or @t2964 @t2307 @t2963)) % 39.97/40.18 (define @t2966 () (not @t2964)) % 39.97/40.18 (define @t2967 () (tptp.xuntil6 tptp.s21)) % 39.97/40.18 (define @t2968 () (or @t2273 @t2967 @t2966)) % 39.97/40.18 (define @t2969 () (not @t2967)) % 39.97/40.18 (define @t2970 () (tptp.until5 tptp.s22)) % 39.97/40.18 (define @t2971 () (or @t2970 @t2281 @t2969)) % 39.97/40.18 (define @t2972 () (not @t2970)) % 39.97/40.18 (define @t2973 () (tptp.xuntil6 tptp.s22)) % 39.97/40.18 (define @t2974 () (or @t2247 @t2973 @t2972)) % 39.97/40.18 (define @t2975 () (not @t2973)) % 39.97/40.18 (define @t2976 () (tptp.until5 tptp.s23)) % 39.97/40.18 (define @t2977 () (or @t2976 @t2255 @t2975)) % 39.97/40.18 (define @t2978 () (not @t2976)) % 39.97/40.18 (define @t2979 () (tptp.xuntil6 tptp.s23)) % 39.97/40.18 (define @t2980 () (or @t2221 @t2979 @t2978)) % 39.97/40.18 (define @t2981 () (not @t2979)) % 39.97/40.18 (define @t2982 () (tptp.until5 tptp.s24)) % 39.97/40.18 (define @t2983 () (or @t2982 @t2229 @t2981)) % 39.97/40.18 (define @t2984 () (not @t2982)) % 39.97/40.18 (define @t2985 () (tptp.xuntil6 tptp.s24)) % 39.97/40.18 (define @t2986 () (or @t2195 @t2985 @t2984)) % 39.97/40.18 (define @t2987 () (not @t2985)) % 39.97/40.18 (define @t2988 () (tptp.until5 tptp.s25)) % 39.97/40.18 (define @t2989 () (or @t2988 @t2203 @t2987)) % 39.97/40.18 (define @t2990 () (not @t2988)) % 39.97/40.18 (define @t2991 () (tptp.xuntil6 tptp.s25)) % 39.97/40.18 (define @t2992 () (or @t2169 @t2991 @t2990)) % 39.97/40.18 (define @t2993 () (not @t2991)) % 39.97/40.18 (define @t2994 () (tptp.until5 tptp.s26)) % 39.97/40.18 (define @t2995 () (or @t2994 @t2177 @t2993)) % 39.97/40.18 (define @t2996 () (not @t2994)) % 39.97/40.18 (define @t2997 () (tptp.xuntil6 tptp.s26)) % 39.97/40.18 (define @t2998 () (or @t2143 @t2997 @t2996)) % 39.97/40.18 (define @t2999 () (not @t2997)) % 39.97/40.18 (define @t3000 () (tptp.until5 tptp.s27)) % 39.97/40.18 (define @t3001 () (or @t3000 @t2151 @t2999)) % 39.97/40.18 (define @t3002 () (not @t3000)) % 39.97/40.18 (define @t3003 () (tptp.xuntil6 tptp.s27)) % 39.97/40.18 (define @t3004 () (or @t2117 @t3003 @t3002)) % 39.97/40.18 (define @t3005 () (not @t3003)) % 39.97/40.18 (define @t3006 () (tptp.until5 tptp.s28)) % 39.97/40.18 (define @t3007 () (or @t3006 @t2125 @t3005)) % 39.97/40.18 (define @t3008 () (not @t3006)) % 39.97/40.18 (define @t3009 () (tptp.xuntil6 tptp.s28)) % 39.97/40.18 (define @t3010 () (or @t2091 @t3009 @t3008)) % 39.97/40.18 (define @t3011 () (not @t3009)) % 39.97/40.18 (define @t3012 () (tptp.until5 tptp.s29)) % 39.97/40.18 (define @t3013 () (or @t3012 @t2099 @t3011)) % 39.97/40.18 (define @t3014 () (not @t3012)) % 39.97/40.18 (define @t3015 () (tptp.xuntil6 tptp.s29)) % 39.97/40.18 (define @t3016 () (or @t2065 @t3015 @t3014)) % 39.97/40.18 (define @t3017 () (not @t3015)) % 39.97/40.18 (define @t3018 () (tptp.until5 tptp.s30)) % 39.97/40.18 (define @t3019 () (or @t3018 @t2073 @t3017)) % 39.97/40.18 (define @t3020 () (not @t3018)) % 39.97/40.18 (define @t3021 () (tptp.xuntil6 tptp.s30)) % 39.97/40.18 (define @t3022 () (or @t2039 @t3021 @t3020)) % 39.97/40.18 (define @t3023 () (not @t3021)) % 39.97/40.18 (define @t3024 () (tptp.until5 tptp.s31)) % 39.97/40.18 (define @t3025 () (or @t3024 @t2047 @t3023)) % 39.97/40.18 (define @t3026 () (not @t3024)) % 39.97/40.18 (define @t3027 () (tptp.xuntil6 tptp.s31)) % 39.97/40.18 (define @t3028 () (or @t2013 @t3027 @t3026)) % 39.97/40.18 (define @t3029 () (not @t3027)) % 39.97/40.18 (define @t3030 () (tptp.until5 tptp.s32)) % 39.97/40.18 (define @t3031 () (or @t3030 @t2021 @t3029)) % 39.97/40.18 (define @t3032 () (not @t3030)) % 39.97/40.18 (define @t3033 () (tptp.xuntil6 tptp.s32)) % 39.97/40.18 (define @t3034 () (or @t1987 @t3033 @t3032)) % 39.97/40.18 (define @t3035 () (not @t3033)) % 39.97/40.18 (define @t3036 () (tptp.until5 tptp.s33)) % 39.97/40.18 (define @t3037 () (or @t3036 @t1995 @t3035)) % 39.97/40.18 (define @t3038 () (not @t3036)) % 39.97/40.18 (define @t3039 () (tptp.xuntil6 tptp.s33)) % 39.97/40.18 (define @t3040 () (or @t1961 @t3039 @t3038)) % 39.97/40.18 (define @t3041 () (not @t3039)) % 39.97/40.18 (define @t3042 () (tptp.until5 tptp.s34)) % 39.97/40.18 (define @t3043 () (or @t3042 @t1969 @t3041)) % 39.97/40.18 (define @t3044 () (not @t3042)) % 39.97/40.18 (define @t3045 () (tptp.xuntil6 tptp.s34)) % 39.97/40.18 (define @t3046 () (or @t1935 @t3045 @t3044)) % 39.97/40.18 (define @t3047 () (not @t3045)) % 39.97/40.18 (define @t3048 () (tptp.until5 tptp.s35)) % 39.97/40.18 (define @t3049 () (or @t3048 @t1943 @t3047)) % 39.97/40.18 (define @t3050 () (not @t3048)) % 39.97/40.18 (define @t3051 () (tptp.xuntil6 tptp.s35)) % 39.97/40.18 (define @t3052 () (or @t1909 @t3051 @t3050)) % 39.97/40.18 (define @t3053 () (not @t3051)) % 39.97/40.18 (define @t3054 () (tptp.until5 tptp.s36)) % 39.97/40.18 (define @t3055 () (or @t3054 @t1917 @t3053)) % 39.97/40.18 (define @t3056 () (not @t3054)) % 39.97/40.18 (define @t3057 () (tptp.xuntil6 tptp.s36)) % 39.97/40.18 (define @t3058 () (or @t1883 @t3057 @t3056)) % 39.97/40.18 (define @t3059 () (not @t3057)) % 39.97/40.18 (define @t3060 () (tptp.until5 tptp.s37)) % 39.97/40.18 (define @t3061 () (or @t3060 @t1891 @t3059)) % 39.97/40.18 (define @t3062 () (not @t3060)) % 39.97/40.18 (define @t3063 () (tptp.xuntil6 tptp.s37)) % 39.97/40.18 (define @t3064 () (or @t1857 @t3063 @t3062)) % 39.97/40.18 (define @t3065 () (not @t3063)) % 39.97/40.18 (define @t3066 () (tptp.until5 tptp.s38)) % 39.97/40.18 (define @t3067 () (or @t3066 @t1865 @t3065)) % 39.97/40.18 (define @t3068 () (not @t3066)) % 39.97/40.18 (define @t3069 () (tptp.xuntil6 tptp.s38)) % 39.97/40.18 (define @t3070 () (or @t1831 @t3069 @t3068)) % 39.97/40.18 (define @t3071 () (not @t3069)) % 39.97/40.18 (define @t3072 () (tptp.until5 tptp.s39)) % 39.97/40.18 (define @t3073 () (or @t3072 @t1839 @t3071)) % 39.97/40.18 (define @t3074 () (not @t3072)) % 39.97/40.18 (define @t3075 () (tptp.xuntil6 tptp.s39)) % 39.97/40.18 (define @t3076 () (or @t1805 @t3075 @t3074)) % 39.97/40.18 (define @t3077 () (not @t3075)) % 39.97/40.18 (define @t3078 () (tptp.until5 tptp.s40)) % 39.97/40.18 (define @t3079 () (or @t3078 @t1813 @t3077)) % 39.97/40.18 (define @t3080 () (not @t3078)) % 39.97/40.18 (define @t3081 () (tptp.xuntil6 tptp.s40)) % 39.97/40.18 (define @t3082 () (or @t1779 @t3081 @t3080)) % 39.97/40.18 (define @t3083 () (not @t3081)) % 39.97/40.18 (define @t3084 () (tptp.until5 tptp.s41)) % 39.97/40.18 (define @t3085 () (or @t3084 @t1787 @t3083)) % 39.97/40.18 (define @t3086 () (not @t3084)) % 39.97/40.18 (define @t3087 () (tptp.xuntil6 tptp.s41)) % 39.97/40.18 (define @t3088 () (or @t1753 @t3087 @t3086)) % 39.97/40.18 (define @t3089 () (not @t3087)) % 39.97/40.18 (define @t3090 () (tptp.until5 tptp.s42)) % 39.97/40.18 (define @t3091 () (or @t3090 @t1761 @t3089)) % 39.97/40.18 (define @t3092 () (not @t3090)) % 39.97/40.18 (define @t3093 () (tptp.xuntil6 tptp.s42)) % 39.97/40.18 (define @t3094 () (or @t1727 @t3093 @t3092)) % 39.97/40.18 (define @t3095 () (not @t3093)) % 39.97/40.18 (define @t3096 () (tptp.until5 tptp.s43)) % 39.97/40.18 (define @t3097 () (or @t3096 @t1735 @t3095)) % 39.97/40.18 (define @t3098 () (not @t3096)) % 39.97/40.18 (define @t3099 () (tptp.xuntil6 tptp.s43)) % 39.97/40.18 (define @t3100 () (or @t1701 @t3099 @t3098)) % 39.97/40.18 (define @t3101 () (not @t3099)) % 39.97/40.18 (define @t3102 () (tptp.until5 tptp.s44)) % 39.97/40.18 (define @t3103 () (or @t3102 @t1709 @t3101)) % 39.97/40.18 (define @t3104 () (not @t3102)) % 39.97/40.18 (define @t3105 () (tptp.xuntil6 tptp.s44)) % 39.97/40.18 (define @t3106 () (or @t1675 @t3105 @t3104)) % 39.97/40.18 (define @t3107 () (not @t3105)) % 39.97/40.18 (define @t3108 () (tptp.until5 tptp.s45)) % 39.97/40.18 (define @t3109 () (or @t3108 @t1683 @t3107)) % 39.97/40.18 (define @t3110 () (not @t3108)) % 39.97/40.18 (define @t3111 () (tptp.xuntil6 tptp.s45)) % 39.97/40.18 (define @t3112 () (or @t1649 @t3111 @t3110)) % 39.97/40.18 (define @t3113 () (not @t3111)) % 39.97/40.18 (define @t3114 () (tptp.until5 tptp.s46)) % 39.97/40.18 (define @t3115 () (or @t3114 @t1657 @t3113)) % 39.97/40.18 (define @t3116 () (not @t3114)) % 39.97/40.18 (define @t3117 () (tptp.xuntil6 tptp.s46)) % 39.97/40.18 (define @t3118 () (or @t1623 @t3117 @t3116)) % 39.97/40.18 (define @t3119 () (not @t3117)) % 39.97/40.18 (define @t3120 () (tptp.until5 tptp.s47)) % 39.97/40.18 (define @t3121 () (or @t3120 @t1631 @t3119)) % 39.97/40.18 (define @t3122 () (not @t3120)) % 39.97/40.18 (define @t3123 () (tptp.xuntil6 tptp.s47)) % 39.97/40.18 (define @t3124 () (or @t1597 @t3123 @t3122)) % 39.97/40.18 (define @t3125 () (not @t3123)) % 39.97/40.18 (define @t3126 () (tptp.until5 tptp.s48)) % 39.97/40.18 (define @t3127 () (or @t3126 @t1605 @t3125)) % 39.97/40.18 (define @t3128 () (not @t3126)) % 39.97/40.18 (define @t3129 () (tptp.xuntil6 tptp.s48)) % 39.97/40.18 (define @t3130 () (or @t1571 @t3129 @t3128)) % 39.97/40.18 (define @t3131 () (not @t3129)) % 39.97/40.18 (define @t3132 () (tptp.until5 tptp.s49)) % 39.97/40.18 (define @t3133 () (or @t3132 @t1579 @t3131)) % 39.97/40.18 (define @t3134 () (not @t3132)) % 39.97/40.18 (define @t3135 () (tptp.xuntil6 tptp.s49)) % 39.97/40.18 (define @t3136 () (or @t1545 @t3135 @t3134)) % 39.97/40.18 (define @t3137 () (not @t3135)) % 39.97/40.18 (define @t3138 () (tptp.until5 tptp.s50)) % 39.97/40.18 (define @t3139 () (or @t3138 @t1553 @t3137)) % 39.97/40.18 (define @t3140 () (not @t3138)) % 39.97/40.18 (define @t3141 () (tptp.xuntil6 tptp.s50)) % 39.97/40.18 (define @t3142 () (or @t1519 @t3141 @t3140)) % 39.97/40.18 (define @t3143 () (not @t3141)) % 39.97/40.18 (define @t3144 () (tptp.until5 tptp.s51)) % 39.97/40.18 (define @t3145 () (or @t3144 @t1527 @t3143)) % 39.97/40.18 (define @t3146 () (not @t3144)) % 39.97/40.18 (define @t3147 () (tptp.xuntil6 tptp.s51)) % 39.97/40.18 (define @t3148 () (or @t1493 @t3147 @t3146)) % 39.97/40.18 (define @t3149 () (not @t3147)) % 39.97/40.18 (define @t3150 () (tptp.until5 tptp.s52)) % 39.97/40.18 (define @t3151 () (or @t3150 @t1501 @t3149)) % 39.97/40.18 (define @t3152 () (not @t3150)) % 39.97/40.18 (define @t3153 () (tptp.xuntil6 tptp.s52)) % 39.97/40.18 (define @t3154 () (or @t1467 @t3153 @t3152)) % 39.97/40.18 (define @t3155 () (not @t3153)) % 39.97/40.18 (define @t3156 () (tptp.until5 tptp.s53)) % 39.97/40.18 (define @t3157 () (or @t3156 @t1475 @t3155)) % 39.97/40.18 (define @t3158 () (not @t3156)) % 39.97/40.18 (define @t3159 () (tptp.xuntil6 tptp.s53)) % 39.97/40.18 (define @t3160 () (or @t1441 @t3159 @t3158)) % 39.97/40.18 (define @t3161 () (not @t3159)) % 39.97/40.18 (define @t3162 () (tptp.until5 tptp.s54)) % 39.97/40.18 (define @t3163 () (or @t3162 @t1449 @t3161)) % 39.97/40.18 (define @t3164 () (not @t3162)) % 39.97/40.18 (define @t3165 () (tptp.xuntil6 tptp.s54)) % 39.97/40.18 (define @t3166 () (or @t1415 @t3165 @t3164)) % 39.97/40.18 (define @t3167 () (not @t3165)) % 39.97/40.18 (define @t3168 () (tptp.until5 tptp.s55)) % 39.97/40.18 (define @t3169 () (or @t3168 @t1423 @t3167)) % 39.97/40.18 (define @t3170 () (not @t3168)) % 39.97/40.18 (define @t3171 () (tptp.xuntil6 tptp.s55)) % 39.97/40.18 (define @t3172 () (or @t1389 @t3171 @t3170)) % 39.97/40.18 (define @t3173 () (not @t3171)) % 39.97/40.18 (define @t3174 () (tptp.until5 tptp.s56)) % 39.97/40.18 (define @t3175 () (or @t3174 @t1397 @t3173)) % 39.97/40.18 (define @t3176 () (not @t3174)) % 39.97/40.18 (define @t3177 () (tptp.xuntil6 tptp.s56)) % 39.97/40.18 (define @t3178 () (or @t1363 @t3177 @t3176)) % 39.97/40.18 (define @t3179 () (not @t3177)) % 39.97/40.18 (define @t3180 () (tptp.until5 tptp.s57)) % 39.97/40.18 (define @t3181 () (or @t3180 @t1371 @t3179)) % 39.97/40.18 (define @t3182 () (not @t3180)) % 39.97/40.18 (define @t3183 () (tptp.xuntil6 tptp.s57)) % 39.97/40.18 (define @t3184 () (or @t1337 @t3183 @t3182)) % 39.97/40.18 (define @t3185 () (not @t3183)) % 39.97/40.18 (define @t3186 () (tptp.until5 tptp.s58)) % 39.97/40.18 (define @t3187 () (or @t3186 @t1345 @t3185)) % 39.97/40.18 (define @t3188 () (not @t3186)) % 39.97/40.18 (define @t3189 () (tptp.xuntil6 tptp.s58)) % 39.97/40.18 (define @t3190 () (or @t1311 @t3189 @t3188)) % 39.97/40.18 (define @t3191 () (not @t3189)) % 39.97/40.18 (define @t3192 () (tptp.until5 tptp.s59)) % 39.97/40.18 (define @t3193 () (or @t3192 @t1319 @t3191)) % 39.97/40.18 (define @t3194 () (not @t3192)) % 39.97/40.18 (define @t3195 () (tptp.xuntil6 tptp.s59)) % 39.97/40.18 (define @t3196 () (or @t1285 @t3195 @t3194)) % 39.97/40.18 (define @t3197 () (not @t3195)) % 39.97/40.18 (define @t3198 () (tptp.until5 tptp.s60)) % 39.97/40.18 (define @t3199 () (or @t3198 @t1293 @t3197)) % 39.97/40.18 (define @t3200 () (not @t3198)) % 39.97/40.18 (define @t3201 () (tptp.xuntil6 tptp.s60)) % 39.97/40.18 (define @t3202 () (or @t1259 @t3201 @t3200)) % 39.97/40.18 (define @t3203 () (not @t3201)) % 39.97/40.18 (define @t3204 () (tptp.until5 tptp.s61)) % 39.97/40.18 (define @t3205 () (or @t3204 @t1267 @t3203)) % 39.97/40.18 (define @t3206 () (not @t3204)) % 39.97/40.18 (define @t3207 () (tptp.xuntil6 tptp.s61)) % 39.97/40.18 (define @t3208 () (or @t1233 @t3207 @t3206)) % 39.97/40.18 (define @t3209 () (not @t3207)) % 39.97/40.18 (define @t3210 () (tptp.until5 tptp.s62)) % 39.97/40.18 (define @t3211 () (or @t3210 @t1241 @t3209)) % 39.97/40.18 (define @t3212 () (not @t3210)) % 39.97/40.18 (define @t3213 () (tptp.xuntil6 tptp.s62)) % 39.97/40.18 (define @t3214 () (or @t1207 @t3213 @t3212)) % 39.97/40.18 (define @t3215 () (not @t3213)) % 39.97/40.18 (define @t3216 () (tptp.until5 tptp.s63)) % 39.97/40.18 (define @t3217 () (or @t3216 @t1215 @t3215)) % 39.97/40.18 (define @t3218 () (not @t3216)) % 39.97/40.18 (define @t3219 () (tptp.xuntil6 tptp.s63)) % 39.97/40.18 (define @t3220 () (or @t1181 @t3219 @t3218)) % 39.97/40.18 (define @t3221 () (not @t3219)) % 39.97/40.18 (define @t3222 () (tptp.until5 tptp.s64)) % 39.97/40.18 (define @t3223 () (or @t3222 @t1189 @t3221)) % 39.97/40.18 (define @t3224 () (not @t3222)) % 39.97/40.18 (define @t3225 () (tptp.xuntil6 tptp.s64)) % 39.97/40.18 (define @t3226 () (or @t1155 @t3225 @t3224)) % 39.97/40.18 (define @t3227 () (not @t3225)) % 39.97/40.18 (define @t3228 () (tptp.until5 tptp.s65)) % 39.97/40.18 (define @t3229 () (or @t3228 @t1163 @t3227)) % 39.97/40.18 (define @t3230 () (not @t3228)) % 39.97/40.18 (define @t3231 () (tptp.xuntil6 tptp.s65)) % 39.97/40.18 (define @t3232 () (or @t1129 @t3231 @t3230)) % 39.97/40.18 (define @t3233 () (not @t3231)) % 39.97/40.18 (define @t3234 () (tptp.until5 tptp.s66)) % 39.97/40.18 (define @t3235 () (or @t3234 @t1137 @t3233)) % 39.97/40.18 (define @t3236 () (not @t3234)) % 39.97/40.18 (define @t3237 () (tptp.xuntil6 tptp.s66)) % 39.97/40.18 (define @t3238 () (or @t1103 @t3237 @t3236)) % 39.97/40.18 (define @t3239 () (not @t3237)) % 39.97/40.18 (define @t3240 () (tptp.until5 tptp.s67)) % 39.97/40.18 (define @t3241 () (or @t3240 @t1111 @t3239)) % 39.97/40.18 (define @t3242 () (not @t3240)) % 39.97/40.18 (define @t3243 () (tptp.xuntil6 tptp.s67)) % 39.97/40.18 (define @t3244 () (or @t1077 @t3243 @t3242)) % 39.97/40.18 (define @t3245 () (not @t3243)) % 39.97/40.18 (define @t3246 () (tptp.until5 tptp.s68)) % 39.97/40.18 (define @t3247 () (or @t3246 @t1085 @t3245)) % 39.97/40.18 (define @t3248 () (not @t3246)) % 39.97/40.18 (define @t3249 () (tptp.xuntil6 tptp.s68)) % 39.97/40.18 (define @t3250 () (or @t1051 @t3249 @t3248)) % 39.97/40.18 (define @t3251 () (not @t3249)) % 39.97/40.18 (define @t3252 () (tptp.until5 tptp.s69)) % 39.97/40.18 (define @t3253 () (or @t3252 @t1059 @t3251)) % 39.97/40.18 (define @t3254 () (not @t3252)) % 39.97/40.18 (define @t3255 () (tptp.xuntil6 tptp.s69)) % 39.97/40.18 (define @t3256 () (or @t1025 @t3255 @t3254)) % 39.97/40.18 (define @t3257 () (not @t3255)) % 39.97/40.18 (define @t3258 () (tptp.until5 tptp.s70)) % 39.97/40.18 (define @t3259 () (or @t3258 @t1033 @t3257)) % 39.97/40.18 (define @t3260 () (not @t3258)) % 39.97/40.18 (define @t3261 () (tptp.xuntil6 tptp.s70)) % 39.97/40.18 (define @t3262 () (or @t999 @t3261 @t3260)) % 39.97/40.18 (define @t3263 () (not @t3261)) % 39.97/40.18 (define @t3264 () (tptp.until5 tptp.s71)) % 39.97/40.18 (define @t3265 () (or @t3264 @t1007 @t3263)) % 39.97/40.18 (define @t3266 () (not @t3264)) % 39.97/40.18 (define @t3267 () (tptp.xuntil6 tptp.s71)) % 39.97/40.18 (define @t3268 () (or @t973 @t3267 @t3266)) % 39.97/40.18 (define @t3269 () (not @t3267)) % 39.97/40.18 (define @t3270 () (tptp.until5 tptp.s72)) % 39.97/40.18 (define @t3271 () (or @t3270 @t981 @t3269)) % 39.97/40.18 (define @t3272 () (not @t3270)) % 39.97/40.18 (define @t3273 () (tptp.xuntil6 tptp.s72)) % 39.97/40.18 (define @t3274 () (or @t947 @t3273 @t3272)) % 39.97/40.18 (define @t3275 () (not @t3273)) % 39.97/40.18 (define @t3276 () (tptp.until5 tptp.s73)) % 39.97/40.18 (define @t3277 () (or @t3276 @t955 @t3275)) % 39.97/40.18 (define @t3278 () (not @t3276)) % 39.97/40.18 (define @t3279 () (tptp.xuntil6 tptp.s73)) % 39.97/40.18 (define @t3280 () (or @t921 @t3279 @t3278)) % 39.97/40.18 (define @t3281 () (not @t3279)) % 39.97/40.18 (define @t3282 () (tptp.until5 tptp.s74)) % 39.97/40.18 (define @t3283 () (or @t3282 @t929 @t3281)) % 39.97/40.18 (define @t3284 () (not @t3282)) % 39.97/40.18 (define @t3285 () (tptp.xuntil6 tptp.s74)) % 39.97/40.18 (define @t3286 () (or @t895 @t3285 @t3284)) % 39.97/40.18 (define @t3287 () (not @t3285)) % 39.97/40.18 (define @t3288 () (tptp.until5 tptp.s75)) % 39.97/40.18 (define @t3289 () (or @t3288 @t903 @t3287)) % 39.97/40.18 (define @t3290 () (not @t3288)) % 39.97/40.18 (define @t3291 () (tptp.xuntil6 tptp.s75)) % 39.97/40.18 (define @t3292 () (or @t869 @t3291 @t3290)) % 39.97/40.18 (define @t3293 () (not @t3291)) % 39.97/40.18 (define @t3294 () (tptp.until5 tptp.s76)) % 39.97/40.18 (define @t3295 () (or @t3294 @t877 @t3293)) % 39.97/40.18 (define @t3296 () (not @t3294)) % 39.97/40.18 (define @t3297 () (tptp.xuntil6 tptp.s76)) % 39.97/40.18 (define @t3298 () (or @t843 @t3297 @t3296)) % 39.97/40.18 (define @t3299 () (not @t3297)) % 39.97/40.18 (define @t3300 () (tptp.until5 tptp.s77)) % 39.97/40.18 (define @t3301 () (or @t3300 @t851 @t3299)) % 39.97/40.18 (define @t3302 () (not @t3300)) % 39.97/40.18 (define @t3303 () (tptp.xuntil6 tptp.s77)) % 39.97/40.18 (define @t3304 () (or @t817 @t3303 @t3302)) % 39.97/40.18 (define @t3305 () (not @t3303)) % 39.97/40.18 (define @t3306 () (tptp.until5 tptp.s78)) % 39.97/40.18 (define @t3307 () (or @t3306 @t825 @t3305)) % 39.97/40.18 (define @t3308 () (not @t3306)) % 39.97/40.18 (define @t3309 () (tptp.xuntil6 tptp.s78)) % 39.97/40.18 (define @t3310 () (or @t791 @t3309 @t3308)) % 39.97/40.18 (define @t3311 () (not @t3309)) % 39.97/40.18 (define @t3312 () (tptp.until5 tptp.s79)) % 39.97/40.18 (define @t3313 () (or @t3312 @t799 @t3311)) % 39.97/40.18 (define @t3314 () (not @t3312)) % 39.97/40.18 (define @t3315 () (tptp.xuntil6 tptp.s79)) % 39.97/40.18 (define @t3316 () (or @t765 @t3315 @t3314)) % 39.97/40.18 (define @t3317 () (not @t3315)) % 39.97/40.18 (define @t3318 () (tptp.until5 tptp.s80)) % 39.97/40.18 (define @t3319 () (or @t3318 @t773 @t3317)) % 39.97/40.18 (define @t3320 () (not @t3318)) % 39.97/40.18 (define @t3321 () (tptp.xuntil6 tptp.s80)) % 39.97/40.18 (define @t3322 () (or @t739 @t3321 @t3320)) % 39.97/40.18 (define @t3323 () (not @t3321)) % 39.97/40.18 (define @t3324 () (tptp.until5 tptp.s81)) % 39.97/40.18 (define @t3325 () (or @t3324 @t747 @t3323)) % 39.97/40.18 (define @t3326 () (not @t3324)) % 39.97/40.18 (define @t3327 () (tptp.xuntil6 tptp.s81)) % 39.97/40.18 (define @t3328 () (or @t713 @t3327 @t3326)) % 39.97/40.18 (define @t3329 () (not @t3327)) % 39.97/40.18 (define @t3330 () (tptp.until5 tptp.s82)) % 39.97/40.18 (define @t3331 () (or @t3330 @t721 @t3329)) % 39.97/40.18 (define @t3332 () (not @t3330)) % 39.97/40.18 (define @t3333 () (tptp.xuntil6 tptp.s82)) % 39.97/40.18 (define @t3334 () (or @t687 @t3333 @t3332)) % 39.97/40.18 (define @t3335 () (not @t3333)) % 39.97/40.18 (define @t3336 () (tptp.until5 tptp.s83)) % 39.97/40.18 (define @t3337 () (or @t3336 @t695 @t3335)) % 39.97/40.18 (define @t3338 () (not @t3336)) % 39.97/40.18 (define @t3339 () (tptp.xuntil6 tptp.s83)) % 39.97/40.18 (define @t3340 () (or @t661 @t3339 @t3338)) % 39.97/40.18 (define @t3341 () (not @t3339)) % 39.97/40.18 (define @t3342 () (tptp.until5 tptp.s84)) % 39.97/40.18 (define @t3343 () (or @t3342 @t669 @t3341)) % 39.97/40.18 (define @t3344 () (not @t3342)) % 39.97/40.18 (define @t3345 () (tptp.xuntil6 tptp.s84)) % 39.97/40.18 (define @t3346 () (or @t635 @t3345 @t3344)) % 39.97/40.18 (define @t3347 () (not @t3345)) % 39.97/40.18 (define @t3348 () (tptp.until5 tptp.s85)) % 39.97/40.18 (define @t3349 () (or @t3348 @t643 @t3347)) % 39.97/40.18 (define @t3350 () (not @t3348)) % 39.97/40.18 (define @t3351 () (tptp.xuntil6 tptp.s85)) % 39.97/40.18 (define @t3352 () (or @t609 @t3351 @t3350)) % 39.97/40.18 (define @t3353 () (not @t3351)) % 39.97/40.18 (define @t3354 () (tptp.until5 tptp.s86)) % 39.97/40.18 (define @t3355 () (or @t3354 @t617 @t3353)) % 39.97/40.18 (define @t3356 () (not @t3354)) % 39.97/40.18 (define @t3357 () (tptp.xuntil6 tptp.s86)) % 39.97/40.18 (define @t3358 () (or @t583 @t3357 @t3356)) % 39.97/40.18 (define @t3359 () (not @t3357)) % 39.97/40.18 (define @t3360 () (tptp.until5 tptp.s87)) % 39.97/40.18 (define @t3361 () (or @t3360 @t591 @t3359)) % 39.97/40.18 (define @t3362 () (not @t3360)) % 39.97/40.18 (define @t3363 () (tptp.xuntil6 tptp.s87)) % 39.97/40.18 (define @t3364 () (or @t557 @t3363 @t3362)) % 39.97/40.18 (define @t3365 () (not @t3363)) % 39.97/40.18 (define @t3366 () (tptp.until5 tptp.s88)) % 39.97/40.18 (define @t3367 () (or @t3366 @t565 @t3365)) % 39.97/40.18 (define @t3368 () (not @t3366)) % 39.97/40.18 (define @t3369 () (tptp.xuntil6 tptp.s88)) % 39.97/40.18 (define @t3370 () (or @t531 @t3369 @t3368)) % 39.97/40.18 (define @t3371 () (not @t3369)) % 39.97/40.18 (define @t3372 () (tptp.until5 tptp.s89)) % 39.97/40.18 (define @t3373 () (or @t3372 @t539 @t3371)) % 39.97/40.18 (define @t3374 () (not @t3372)) % 39.97/40.18 (define @t3375 () (tptp.xuntil6 tptp.s89)) % 39.97/40.18 (define @t3376 () (or @t505 @t3375 @t3374)) % 39.97/40.18 (define @t3377 () (not @t3375)) % 39.97/40.18 (define @t3378 () (tptp.until5 tptp.s90)) % 39.97/40.18 (define @t3379 () (or @t3378 @t513 @t3377)) % 39.97/40.18 (define @t3380 () (not @t3378)) % 39.97/40.18 (define @t3381 () (tptp.xuntil6 tptp.s90)) % 39.97/40.18 (define @t3382 () (or @t479 @t3381 @t3380)) % 39.97/40.18 (define @t3383 () (not @t3381)) % 39.97/40.18 (define @t3384 () (tptp.until5 tptp.s91)) % 39.97/40.18 (define @t3385 () (or @t3384 @t487 @t3383)) % 39.97/40.18 (define @t3386 () (not @t3384)) % 39.97/40.18 (define @t3387 () (tptp.xuntil6 tptp.s91)) % 39.97/40.18 (define @t3388 () (or @t453 @t3387 @t3386)) % 39.97/40.18 (define @t3389 () (not @t3387)) % 39.97/40.18 (define @t3390 () (tptp.until5 tptp.s92)) % 39.97/40.18 (define @t3391 () (or @t3390 @t461 @t3389)) % 39.97/40.18 (define @t3392 () (not @t3390)) % 39.97/40.18 (define @t3393 () (tptp.xuntil6 tptp.s92)) % 39.97/40.18 (define @t3394 () (or @t427 @t3393 @t3392)) % 39.97/40.18 (define @t3395 () (not @t3393)) % 39.97/40.18 (define @t3396 () (tptp.until5 tptp.s93)) % 39.97/40.18 (define @t3397 () (or @t3396 @t435 @t3395)) % 39.97/40.18 (define @t3398 () (not @t3396)) % 39.97/40.18 (define @t3399 () (tptp.xuntil6 tptp.s93)) % 39.97/40.18 (define @t3400 () (or @t401 @t3399 @t3398)) % 39.97/40.18 (define @t3401 () (not @t3399)) % 39.97/40.18 (define @t3402 () (tptp.until5 tptp.s94)) % 39.97/40.18 (define @t3403 () (or @t3402 @t409 @t3401)) % 39.97/40.18 (define @t3404 () (not @t3402)) % 39.97/40.18 (define @t3405 () (tptp.xuntil6 tptp.s94)) % 39.97/40.18 (define @t3406 () (or @t375 @t3405 @t3404)) % 39.97/40.18 (define @t3407 () (not @t3405)) % 39.97/40.18 (define @t3408 () (tptp.until5 tptp.s95)) % 39.97/40.18 (define @t3409 () (or @t3408 @t383 @t3407)) % 39.97/40.18 (define @t3410 () (not @t3408)) % 39.97/40.18 (define @t3411 () (tptp.xuntil6 tptp.s95)) % 39.97/40.18 (define @t3412 () (or @t349 @t3411 @t3410)) % 39.97/40.18 (define @t3413 () (not @t3411)) % 39.97/40.18 (define @t3414 () (tptp.until5 tptp.s96)) % 39.97/40.18 (define @t3415 () (or @t3414 @t357 @t3413)) % 39.97/40.18 (define @t3416 () (not @t3414)) % 39.97/40.18 (define @t3417 () (tptp.xuntil6 tptp.s96)) % 39.97/40.18 (define @t3418 () (or @t323 @t3417 @t3416)) % 39.97/40.18 (define @t3419 () (not @t3417)) % 39.97/40.18 (define @t3420 () (tptp.until5 tptp.s97)) % 39.97/40.18 (define @t3421 () (or @t3420 @t331 @t3419)) % 39.97/40.18 (define @t3422 () (not @t3420)) % 39.97/40.18 (define @t3423 () (tptp.xuntil6 tptp.s97)) % 39.97/40.18 (define @t3424 () (or @t297 @t3423 @t3422)) % 39.97/40.18 (define @t3425 () (not @t3423)) % 39.97/40.18 (define @t3426 () (tptp.until5 tptp.s98)) % 39.97/40.18 (define @t3427 () (or @t3426 @t305 @t3425)) % 39.97/40.18 (define @t3428 () (not @t3426)) % 39.97/40.18 (define @t3429 () (tptp.xuntil6 tptp.s98)) % 39.97/40.18 (define @t3430 () (or @t276 @t3429 @t3428)) % 39.97/40.18 (define @t3431 () (not @t3429)) % 39.97/40.18 (define @t3432 () (tptp.until5 tptp.s99)) % 39.97/40.18 (define @t3433 () (or @t3432 @t282 @t3431)) % 39.97/40.18 (define @t3434 () (not @t3432)) % 39.97/40.18 (define @t3435 () (tptp.xuntil6 tptp.s99)) % 39.97/40.18 (define @t3436 () (or @t238 @t3435 @t3434)) % 39.97/40.18 (define @t3437 () (tptp.xuntil2p8 tptp.s98)) % 39.97/40.18 (define @t3438 () (not @t3437)) % 39.97/40.18 (define @t3439 () (or @t273 @t282 @t3438)) % 39.97/40.18 (define @t3440 () (not @t3435)) % 39.97/40.18 (define @t3441 () (tptp.until2p7 tptp.s98)) % 39.97/40.18 (define @t3442 () (or @t3441 @t253 @t270 @t3440)) % 39.97/40.18 (define @t3443 () (not @t3441)) % 39.97/40.18 (define @t3444 () (or @t276 @t3437 @t3443)) % 39.97/40.18 (define @t3445 () (@list tptp.s99 tptp.s97)) % 39.97/40.18 (define @t3446 () (tptp.node2 tptp.s99 tptp.s97)) % 39.97/40.18 (define @t3447 () (not @t108)) % 39.97/40.18 (define @t3448 () (or @t3447 @t3446)) % 39.97/40.18 (define @t3449 () (@list tptp.s97 tptp.s99)) % 39.97/40.18 (define @t3450 () (or @t299 @t3447 @t244)) % 39.97/40.18 (define @t3451 () (not @t3446)) % 39.97/40.18 (define @t3452 () (or @t265 @t264 @t310 @t3451)) % 39.97/40.18 (define @t3453 () (tptp.until2p7 tptp.s97)) % 39.97/40.18 (define @t3454 () (or @t3453 @t3447 @t270 @t3440)) % 39.97/40.18 (define @t3455 () (not @t3453)) % 39.97/40.18 (define @t3456 () (tptp.xuntil2p8 tptp.s97)) % 39.97/40.18 (define @t3457 () (or @t297 @t3456 @t3455)) % 39.97/40.18 (define @t3458 () (not @t3456)) % 39.97/40.18 (define @t3459 () (or @t3441 @t305 @t3458)) % 39.97/40.18 (define @t3460 () (@list tptp.s99 tptp.s96)) % 39.97/40.18 (define @t3461 () (tptp.node2 tptp.s99 tptp.s96)) % 39.97/40.18 (define @t3462 () (not @t109)) % 39.97/40.18 (define @t3463 () (or @t3462 @t3461)) % 39.97/40.18 (define @t3464 () (@list tptp.s96 tptp.s99)) % 39.97/40.18 (define @t3465 () (or @t325 @t3462 @t244)) % 39.97/40.18 (define @t3466 () (not @t3461)) % 39.97/40.18 (define @t3467 () (or @t265 @t264 @t336 @t3466)) % 39.97/40.18 (define @t3468 () (tptp.until2p7 tptp.s96)) % 39.97/40.18 (define @t3469 () (or @t3468 @t3462 @t270 @t3440)) % 39.97/40.18 (define @t3470 () (not @t3468)) % 39.97/40.18 (define @t3471 () (tptp.xuntil2p8 tptp.s96)) % 39.97/40.18 (define @t3472 () (or @t323 @t3471 @t3470)) % 39.97/40.18 (define @t3473 () (not @t3471)) % 39.97/40.18 (define @t3474 () (or @t3453 @t331 @t3473)) % 39.97/40.18 (define @t3475 () (@list tptp.s99 tptp.s95)) % 39.97/40.18 (define @t3476 () (tptp.node2 tptp.s99 tptp.s95)) % 39.97/40.18 (define @t3477 () (not @t110)) % 39.97/40.18 (define @t3478 () (or @t3477 @t3476)) % 39.97/40.18 (define @t3479 () (@list tptp.s95 tptp.s99)) % 39.97/40.18 (define @t3480 () (or @t351 @t3477 @t244)) % 39.97/40.18 (define @t3481 () (not @t3476)) % 39.97/40.18 (define @t3482 () (or @t265 @t264 @t362 @t3481)) % 39.97/40.18 (define @t3483 () (tptp.until2p7 tptp.s95)) % 39.97/40.18 (define @t3484 () (or @t3483 @t3477 @t270 @t3440)) % 39.97/40.18 (define @t3485 () (not @t3483)) % 39.97/40.18 (define @t3486 () (tptp.xuntil2p8 tptp.s95)) % 39.97/40.18 (define @t3487 () (or @t349 @t3486 @t3485)) % 39.97/40.18 (define @t3488 () (not @t3486)) % 39.97/40.18 (define @t3489 () (or @t3468 @t357 @t3488)) % 39.97/40.18 (define @t3490 () (@list tptp.s99 tptp.s94)) % 39.97/40.18 (define @t3491 () (tptp.node2 tptp.s99 tptp.s94)) % 39.97/40.18 (define @t3492 () (not @t111)) % 39.97/40.18 (define @t3493 () (or @t3492 @t3491)) % 39.97/40.18 (define @t3494 () (@list tptp.s94 tptp.s99)) % 39.97/40.18 (define @t3495 () (or @t377 @t3492 @t244)) % 39.97/40.18 (define @t3496 () (not @t3491)) % 39.97/40.18 (define @t3497 () (or @t265 @t264 @t388 @t3496)) % 39.97/40.18 (define @t3498 () (tptp.until2p7 tptp.s94)) % 39.97/40.18 (define @t3499 () (or @t3498 @t3492 @t270 @t3440)) % 39.97/40.18 (define @t3500 () (not @t3498)) % 39.97/40.18 (define @t3501 () (tptp.xuntil2p8 tptp.s94)) % 39.97/40.18 (define @t3502 () (or @t375 @t3501 @t3500)) % 39.97/40.18 (define @t3503 () (not @t3501)) % 39.97/40.18 (define @t3504 () (or @t3483 @t383 @t3503)) % 39.97/40.18 (define @t3505 () (@list tptp.s99 tptp.s93)) % 39.97/40.18 (define @t3506 () (tptp.node2 tptp.s99 tptp.s93)) % 39.97/40.18 (define @t3507 () (not @t112)) % 39.97/40.18 (define @t3508 () (or @t3507 @t3506)) % 39.97/40.18 (define @t3509 () (@list tptp.s93 tptp.s99)) % 39.97/40.18 (define @t3510 () (or @t403 @t3507 @t244)) % 39.97/40.18 (define @t3511 () (not @t3506)) % 39.97/40.18 (define @t3512 () (or @t265 @t264 @t414 @t3511)) % 39.97/40.18 (define @t3513 () (tptp.until2p7 tptp.s93)) % 39.97/40.18 (define @t3514 () (or @t3513 @t3507 @t270 @t3440)) % 39.97/40.18 (define @t3515 () (not @t3513)) % 39.97/40.18 (define @t3516 () (tptp.xuntil2p8 tptp.s93)) % 39.97/40.18 (define @t3517 () (or @t401 @t3516 @t3515)) % 39.97/40.18 (define @t3518 () (not @t3516)) % 39.97/40.18 (define @t3519 () (or @t3498 @t409 @t3518)) % 39.97/40.18 (define @t3520 () (@list tptp.s99 tptp.s92)) % 39.97/40.18 (define @t3521 () (tptp.node2 tptp.s99 tptp.s92)) % 39.97/40.18 (define @t3522 () (not @t113)) % 39.97/40.18 (define @t3523 () (or @t3522 @t3521)) % 39.97/40.18 (define @t3524 () (@list tptp.s92 tptp.s99)) % 39.97/40.18 (define @t3525 () (or @t429 @t3522 @t244)) % 39.97/40.18 (define @t3526 () (not @t3521)) % 39.97/40.18 (define @t3527 () (or @t265 @t264 @t440 @t3526)) % 39.97/40.18 (define @t3528 () (tptp.until2p7 tptp.s92)) % 39.97/40.18 (define @t3529 () (or @t3528 @t3522 @t270 @t3440)) % 39.97/40.18 (define @t3530 () (not @t3528)) % 39.97/40.18 (define @t3531 () (tptp.xuntil2p8 tptp.s92)) % 39.97/40.18 (define @t3532 () (or @t427 @t3531 @t3530)) % 39.97/40.18 (define @t3533 () (not @t3531)) % 39.97/40.18 (define @t3534 () (or @t3513 @t435 @t3533)) % 39.97/40.18 (define @t3535 () (@list tptp.s99 tptp.s91)) % 39.97/40.18 (define @t3536 () (tptp.node2 tptp.s99 tptp.s91)) % 39.97/40.18 (define @t3537 () (not @t114)) % 39.97/40.18 (define @t3538 () (or @t3537 @t3536)) % 39.97/40.18 (define @t3539 () (@list tptp.s91 tptp.s99)) % 39.97/40.18 (define @t3540 () (or @t455 @t3537 @t244)) % 39.97/40.18 (define @t3541 () (not @t3536)) % 39.97/40.18 (define @t3542 () (or @t265 @t264 @t466 @t3541)) % 39.97/40.18 (define @t3543 () (tptp.until2p7 tptp.s91)) % 39.97/40.18 (define @t3544 () (or @t3543 @t3537 @t270 @t3440)) % 39.97/40.18 (define @t3545 () (not @t3543)) % 39.97/40.18 (define @t3546 () (tptp.xuntil2p8 tptp.s91)) % 39.97/40.18 (define @t3547 () (or @t453 @t3546 @t3545)) % 39.97/40.18 (define @t3548 () (not @t3546)) % 39.97/40.18 (define @t3549 () (or @t3528 @t461 @t3548)) % 39.97/40.18 (define @t3550 () (@list tptp.s99 tptp.s90)) % 39.97/40.18 (define @t3551 () (tptp.node2 tptp.s99 tptp.s90)) % 39.97/40.18 (define @t3552 () (not @t115)) % 39.97/40.18 (define @t3553 () (or @t3552 @t3551)) % 39.97/40.18 (define @t3554 () (@list tptp.s90 tptp.s99)) % 39.97/40.18 (define @t3555 () (or @t481 @t3552 @t244)) % 39.97/40.18 (define @t3556 () (not @t3551)) % 39.97/40.18 (define @t3557 () (or @t265 @t264 @t492 @t3556)) % 39.97/40.18 (define @t3558 () (tptp.until2p7 tptp.s90)) % 39.97/40.18 (define @t3559 () (or @t3558 @t3552 @t270 @t3440)) % 39.97/40.18 (define @t3560 () (not @t3558)) % 39.97/40.18 (define @t3561 () (tptp.xuntil2p8 tptp.s90)) % 39.97/40.18 (define @t3562 () (or @t479 @t3561 @t3560)) % 39.97/40.18 (define @t3563 () (not @t3561)) % 39.97/40.18 (define @t3564 () (or @t3543 @t487 @t3563)) % 39.97/40.18 (define @t3565 () (@list tptp.s99 tptp.s89)) % 39.97/40.18 (define @t3566 () (tptp.node2 tptp.s99 tptp.s89)) % 39.97/40.18 (define @t3567 () (not @t116)) % 39.97/40.18 (define @t3568 () (or @t3567 @t3566)) % 39.97/40.18 (define @t3569 () (@list tptp.s89 tptp.s99)) % 39.97/40.18 (define @t3570 () (or @t507 @t3567 @t244)) % 39.97/40.18 (define @t3571 () (not @t3566)) % 39.97/40.18 (define @t3572 () (or @t265 @t264 @t518 @t3571)) % 39.97/40.18 (define @t3573 () (tptp.until2p7 tptp.s89)) % 39.97/40.18 (define @t3574 () (or @t3573 @t3567 @t270 @t3440)) % 39.97/40.18 (define @t3575 () (not @t3573)) % 39.97/40.18 (define @t3576 () (tptp.xuntil2p8 tptp.s89)) % 39.97/40.18 (define @t3577 () (or @t505 @t3576 @t3575)) % 39.97/40.18 (define @t3578 () (not @t3576)) % 39.97/40.18 (define @t3579 () (or @t3558 @t513 @t3578)) % 39.97/40.18 (define @t3580 () (@list tptp.s99 tptp.s88)) % 39.97/40.18 (define @t3581 () (tptp.node2 tptp.s99 tptp.s88)) % 39.97/40.18 (define @t3582 () (not @t117)) % 39.97/40.18 (define @t3583 () (or @t3582 @t3581)) % 39.97/40.18 (define @t3584 () (@list tptp.s88 tptp.s99)) % 39.97/40.18 (define @t3585 () (or @t533 @t3582 @t244)) % 39.97/40.18 (define @t3586 () (not @t3581)) % 39.97/40.18 (define @t3587 () (or @t265 @t264 @t544 @t3586)) % 39.97/40.18 (define @t3588 () (tptp.until2p7 tptp.s88)) % 39.97/40.18 (define @t3589 () (or @t3588 @t3582 @t270 @t3440)) % 39.97/40.18 (define @t3590 () (not @t3588)) % 39.97/40.18 (define @t3591 () (tptp.xuntil2p8 tptp.s88)) % 39.97/40.18 (define @t3592 () (or @t531 @t3591 @t3590)) % 39.97/40.18 (define @t3593 () (not @t3591)) % 39.97/40.18 (define @t3594 () (or @t3573 @t539 @t3593)) % 39.97/40.18 (define @t3595 () (@list tptp.s99 tptp.s87)) % 39.97/40.18 (define @t3596 () (tptp.node2 tptp.s99 tptp.s87)) % 39.97/40.18 (define @t3597 () (not @t118)) % 39.97/40.18 (define @t3598 () (or @t3597 @t3596)) % 39.97/40.18 (define @t3599 () (@list tptp.s87 tptp.s99)) % 39.97/40.18 (define @t3600 () (or @t559 @t3597 @t244)) % 39.97/40.18 (define @t3601 () (not @t3596)) % 39.97/40.18 (define @t3602 () (or @t265 @t264 @t570 @t3601)) % 39.97/40.18 (define @t3603 () (tptp.until2p7 tptp.s87)) % 39.97/40.18 (define @t3604 () (or @t3603 @t3597 @t270 @t3440)) % 39.97/40.18 (define @t3605 () (not @t3603)) % 39.97/40.18 (define @t3606 () (tptp.xuntil2p8 tptp.s87)) % 39.97/40.18 (define @t3607 () (or @t557 @t3606 @t3605)) % 39.97/40.18 (define @t3608 () (not @t3606)) % 39.97/40.18 (define @t3609 () (or @t3588 @t565 @t3608)) % 39.97/40.18 (define @t3610 () (@list tptp.s99 tptp.s86)) % 39.97/40.18 (define @t3611 () (tptp.node2 tptp.s99 tptp.s86)) % 39.97/40.18 (define @t3612 () (not @t119)) % 39.97/40.18 (define @t3613 () (or @t3612 @t3611)) % 39.97/40.18 (define @t3614 () (@list tptp.s86 tptp.s99)) % 39.97/40.18 (define @t3615 () (or @t585 @t3612 @t244)) % 39.97/40.18 (define @t3616 () (not @t3611)) % 39.97/40.18 (define @t3617 () (or @t265 @t264 @t596 @t3616)) % 39.97/40.18 (define @t3618 () (tptp.until2p7 tptp.s86)) % 39.97/40.18 (define @t3619 () (or @t3618 @t3612 @t270 @t3440)) % 39.97/40.18 (define @t3620 () (not @t3618)) % 39.97/40.18 (define @t3621 () (tptp.xuntil2p8 tptp.s86)) % 39.97/40.18 (define @t3622 () (or @t583 @t3621 @t3620)) % 39.97/40.18 (define @t3623 () (not @t3621)) % 39.97/40.18 (define @t3624 () (or @t3603 @t591 @t3623)) % 39.97/40.18 (define @t3625 () (@list tptp.s99 tptp.s85)) % 39.97/40.18 (define @t3626 () (tptp.node2 tptp.s99 tptp.s85)) % 39.97/40.18 (define @t3627 () (not @t120)) % 39.97/40.18 (define @t3628 () (or @t3627 @t3626)) % 39.97/40.18 (define @t3629 () (@list tptp.s85 tptp.s99)) % 39.97/40.18 (define @t3630 () (or @t611 @t3627 @t244)) % 39.97/40.18 (define @t3631 () (not @t3626)) % 39.97/40.18 (define @t3632 () (or @t265 @t264 @t622 @t3631)) % 39.97/40.18 (define @t3633 () (tptp.until2p7 tptp.s85)) % 39.97/40.18 (define @t3634 () (or @t3633 @t3627 @t270 @t3440)) % 39.97/40.18 (define @t3635 () (not @t3633)) % 39.97/40.18 (define @t3636 () (tptp.xuntil2p8 tptp.s85)) % 39.97/40.18 (define @t3637 () (or @t609 @t3636 @t3635)) % 39.97/40.18 (define @t3638 () (not @t3636)) % 39.97/40.18 (define @t3639 () (or @t3618 @t617 @t3638)) % 39.97/40.18 (define @t3640 () (@list tptp.s99 tptp.s84)) % 39.97/40.18 (define @t3641 () (tptp.node2 tptp.s99 tptp.s84)) % 39.97/40.18 (define @t3642 () (not @t121)) % 39.97/40.18 (define @t3643 () (or @t3642 @t3641)) % 39.97/40.18 (define @t3644 () (@list tptp.s84 tptp.s99)) % 39.97/40.18 (define @t3645 () (or @t637 @t3642 @t244)) % 39.97/40.18 (define @t3646 () (not @t3641)) % 39.97/40.18 (define @t3647 () (or @t265 @t264 @t648 @t3646)) % 39.97/40.18 (define @t3648 () (tptp.until2p7 tptp.s84)) % 39.97/40.18 (define @t3649 () (or @t3648 @t3642 @t270 @t3440)) % 39.97/40.18 (define @t3650 () (not @t3648)) % 39.97/40.18 (define @t3651 () (tptp.xuntil2p8 tptp.s84)) % 39.97/40.18 (define @t3652 () (or @t635 @t3651 @t3650)) % 39.97/40.18 (define @t3653 () (not @t3651)) % 39.97/40.18 (define @t3654 () (or @t3633 @t643 @t3653)) % 39.97/40.18 (define @t3655 () (@list tptp.s99 tptp.s83)) % 39.97/40.18 (define @t3656 () (tptp.node2 tptp.s99 tptp.s83)) % 39.97/40.18 (define @t3657 () (not @t122)) % 39.97/40.18 (define @t3658 () (or @t3657 @t3656)) % 39.97/40.18 (define @t3659 () (@list tptp.s83 tptp.s99)) % 39.97/40.18 (define @t3660 () (or @t663 @t3657 @t244)) % 39.97/40.18 (define @t3661 () (not @t3656)) % 39.97/40.18 (define @t3662 () (or @t265 @t264 @t674 @t3661)) % 39.97/40.18 (define @t3663 () (tptp.until2p7 tptp.s83)) % 39.97/40.18 (define @t3664 () (or @t3663 @t3657 @t270 @t3440)) % 39.97/40.18 (define @t3665 () (not @t3663)) % 39.97/40.18 (define @t3666 () (tptp.xuntil2p8 tptp.s83)) % 39.97/40.18 (define @t3667 () (or @t661 @t3666 @t3665)) % 39.97/40.18 (define @t3668 () (not @t3666)) % 39.97/40.18 (define @t3669 () (or @t3648 @t669 @t3668)) % 39.97/40.18 (define @t3670 () (@list tptp.s99 tptp.s82)) % 39.97/40.18 (define @t3671 () (tptp.node2 tptp.s99 tptp.s82)) % 39.97/40.18 (define @t3672 () (not @t123)) % 39.97/40.18 (define @t3673 () (or @t3672 @t3671)) % 39.97/40.18 (define @t3674 () (@list tptp.s82 tptp.s99)) % 39.97/40.18 (define @t3675 () (or @t689 @t3672 @t244)) % 39.97/40.18 (define @t3676 () (not @t3671)) % 39.97/40.18 (define @t3677 () (or @t265 @t264 @t700 @t3676)) % 39.97/40.18 (define @t3678 () (tptp.until2p7 tptp.s82)) % 39.97/40.18 (define @t3679 () (or @t3678 @t3672 @t270 @t3440)) % 39.97/40.18 (define @t3680 () (not @t3678)) % 39.97/40.18 (define @t3681 () (tptp.xuntil2p8 tptp.s82)) % 39.97/40.18 (define @t3682 () (or @t687 @t3681 @t3680)) % 39.97/40.18 (define @t3683 () (not @t3681)) % 39.97/40.18 (define @t3684 () (or @t3663 @t695 @t3683)) % 39.97/40.18 (define @t3685 () (@list tptp.s99 tptp.s81)) % 39.97/40.18 (define @t3686 () (tptp.node2 tptp.s99 tptp.s81)) % 39.97/40.18 (define @t3687 () (not @t124)) % 39.97/40.18 (define @t3688 () (or @t3687 @t3686)) % 39.97/40.18 (define @t3689 () (@list tptp.s81 tptp.s99)) % 39.97/40.18 (define @t3690 () (or @t715 @t3687 @t244)) % 39.97/40.18 (define @t3691 () (not @t3686)) % 39.97/40.18 (define @t3692 () (or @t265 @t264 @t726 @t3691)) % 39.97/40.18 (define @t3693 () (tptp.until2p7 tptp.s81)) % 39.97/40.18 (define @t3694 () (or @t3693 @t3687 @t270 @t3440)) % 39.97/40.18 (define @t3695 () (not @t3693)) % 39.97/40.18 (define @t3696 () (tptp.xuntil2p8 tptp.s81)) % 39.97/40.18 (define @t3697 () (or @t713 @t3696 @t3695)) % 39.97/40.18 (define @t3698 () (not @t3696)) % 39.97/40.18 (define @t3699 () (or @t3678 @t721 @t3698)) % 39.97/40.18 (define @t3700 () (@list tptp.s99 tptp.s80)) % 39.97/40.18 (define @t3701 () (tptp.node2 tptp.s99 tptp.s80)) % 39.97/40.18 (define @t3702 () (not @t125)) % 39.97/40.18 (define @t3703 () (or @t3702 @t3701)) % 39.97/40.18 (define @t3704 () (@list tptp.s80 tptp.s99)) % 39.97/40.18 (define @t3705 () (or @t741 @t3702 @t244)) % 39.97/40.18 (define @t3706 () (not @t3701)) % 39.97/40.18 (define @t3707 () (or @t265 @t264 @t752 @t3706)) % 39.97/40.18 (define @t3708 () (tptp.until2p7 tptp.s80)) % 39.97/40.18 (define @t3709 () (or @t3708 @t3702 @t270 @t3440)) % 39.97/40.18 (define @t3710 () (not @t3708)) % 39.97/40.18 (define @t3711 () (tptp.xuntil2p8 tptp.s80)) % 39.97/40.18 (define @t3712 () (or @t739 @t3711 @t3710)) % 39.97/40.18 (define @t3713 () (not @t3711)) % 39.97/40.18 (define @t3714 () (or @t3693 @t747 @t3713)) % 39.97/40.18 (define @t3715 () (@list tptp.s99 tptp.s79)) % 39.97/40.18 (define @t3716 () (tptp.node2 tptp.s99 tptp.s79)) % 39.97/40.18 (define @t3717 () (not @t126)) % 39.97/40.18 (define @t3718 () (or @t3717 @t3716)) % 39.97/40.18 (define @t3719 () (@list tptp.s79 tptp.s99)) % 39.97/40.18 (define @t3720 () (or @t767 @t3717 @t244)) % 39.97/40.18 (define @t3721 () (not @t3716)) % 39.97/40.18 (define @t3722 () (or @t265 @t264 @t778 @t3721)) % 39.97/40.18 (define @t3723 () (tptp.until2p7 tptp.s79)) % 39.97/40.18 (define @t3724 () (or @t3723 @t3717 @t270 @t3440)) % 39.97/40.18 (define @t3725 () (not @t3723)) % 39.97/40.18 (define @t3726 () (tptp.xuntil2p8 tptp.s79)) % 39.97/40.18 (define @t3727 () (or @t765 @t3726 @t3725)) % 39.97/40.18 (define @t3728 () (not @t3726)) % 39.97/40.18 (define @t3729 () (or @t3708 @t773 @t3728)) % 39.97/40.18 (define @t3730 () (@list tptp.s99 tptp.s78)) % 39.97/40.18 (define @t3731 () (tptp.node2 tptp.s99 tptp.s78)) % 39.97/40.18 (define @t3732 () (not @t127)) % 39.97/40.18 (define @t3733 () (or @t3732 @t3731)) % 39.97/40.18 (define @t3734 () (@list tptp.s78 tptp.s99)) % 39.97/40.18 (define @t3735 () (or @t793 @t3732 @t244)) % 39.97/40.18 (define @t3736 () (not @t3731)) % 39.97/40.18 (define @t3737 () (or @t265 @t264 @t804 @t3736)) % 39.97/40.18 (define @t3738 () (tptp.until2p7 tptp.s78)) % 39.97/40.18 (define @t3739 () (or @t3738 @t3732 @t270 @t3440)) % 39.97/40.18 (define @t3740 () (not @t3738)) % 39.97/40.18 (define @t3741 () (tptp.xuntil2p8 tptp.s78)) % 39.97/40.18 (define @t3742 () (or @t791 @t3741 @t3740)) % 39.97/40.18 (define @t3743 () (not @t3741)) % 39.97/40.18 (define @t3744 () (or @t3723 @t799 @t3743)) % 39.97/40.18 (define @t3745 () (@list tptp.s99 tptp.s77)) % 39.97/40.18 (define @t3746 () (tptp.node2 tptp.s99 tptp.s77)) % 39.97/40.18 (define @t3747 () (not @t128)) % 39.97/40.18 (define @t3748 () (or @t3747 @t3746)) % 39.97/40.18 (define @t3749 () (@list tptp.s77 tptp.s99)) % 39.97/40.18 (define @t3750 () (or @t819 @t3747 @t244)) % 39.97/40.18 (define @t3751 () (not @t3746)) % 39.97/40.18 (define @t3752 () (or @t265 @t264 @t830 @t3751)) % 39.97/40.18 (define @t3753 () (tptp.until2p7 tptp.s77)) % 39.97/40.18 (define @t3754 () (or @t3753 @t3747 @t270 @t3440)) % 39.97/40.18 (define @t3755 () (not @t3753)) % 39.97/40.18 (define @t3756 () (tptp.xuntil2p8 tptp.s77)) % 39.97/40.18 (define @t3757 () (or @t817 @t3756 @t3755)) % 39.97/40.18 (define @t3758 () (not @t3756)) % 39.97/40.18 (define @t3759 () (or @t3738 @t825 @t3758)) % 39.97/40.18 (define @t3760 () (@list tptp.s99 tptp.s76)) % 39.97/40.18 (define @t3761 () (tptp.node2 tptp.s99 tptp.s76)) % 39.97/40.18 (define @t3762 () (not @t129)) % 39.97/40.18 (define @t3763 () (or @t3762 @t3761)) % 39.97/40.18 (define @t3764 () (@list tptp.s76 tptp.s99)) % 39.97/40.18 (define @t3765 () (or @t845 @t3762 @t244)) % 39.97/40.18 (define @t3766 () (not @t3761)) % 39.97/40.18 (define @t3767 () (or @t265 @t264 @t856 @t3766)) % 39.97/40.18 (define @t3768 () (tptp.until2p7 tptp.s76)) % 39.97/40.18 (define @t3769 () (or @t3768 @t3762 @t270 @t3440)) % 39.97/40.18 (define @t3770 () (not @t3768)) % 39.97/40.18 (define @t3771 () (tptp.xuntil2p8 tptp.s76)) % 39.97/40.18 (define @t3772 () (or @t843 @t3771 @t3770)) % 39.97/40.18 (define @t3773 () (not @t3771)) % 39.97/40.18 (define @t3774 () (or @t3753 @t851 @t3773)) % 39.97/40.18 (define @t3775 () (@list tptp.s99 tptp.s75)) % 39.97/40.18 (define @t3776 () (tptp.node2 tptp.s99 tptp.s75)) % 39.97/40.18 (define @t3777 () (not @t130)) % 39.97/40.18 (define @t3778 () (or @t3777 @t3776)) % 39.97/40.18 (define @t3779 () (@list tptp.s75 tptp.s99)) % 39.97/40.18 (define @t3780 () (or @t871 @t3777 @t244)) % 39.97/40.18 (define @t3781 () (not @t3776)) % 39.97/40.18 (define @t3782 () (or @t265 @t264 @t882 @t3781)) % 39.97/40.18 (define @t3783 () (tptp.until2p7 tptp.s75)) % 39.97/40.18 (define @t3784 () (or @t3783 @t3777 @t270 @t3440)) % 39.97/40.18 (define @t3785 () (not @t3783)) % 39.97/40.18 (define @t3786 () (tptp.xuntil2p8 tptp.s75)) % 39.97/40.18 (define @t3787 () (or @t869 @t3786 @t3785)) % 39.97/40.18 (define @t3788 () (not @t3786)) % 39.97/40.18 (define @t3789 () (or @t3768 @t877 @t3788)) % 39.97/40.18 (define @t3790 () (@list tptp.s99 tptp.s74)) % 39.97/40.18 (define @t3791 () (tptp.node2 tptp.s99 tptp.s74)) % 39.97/40.18 (define @t3792 () (not @t131)) % 39.97/40.18 (define @t3793 () (or @t3792 @t3791)) % 39.97/40.18 (define @t3794 () (@list tptp.s74 tptp.s99)) % 39.97/40.18 (define @t3795 () (or @t897 @t3792 @t244)) % 39.97/40.18 (define @t3796 () (not @t3791)) % 39.97/40.18 (define @t3797 () (or @t265 @t264 @t908 @t3796)) % 39.97/40.18 (define @t3798 () (tptp.until2p7 tptp.s74)) % 39.97/40.18 (define @t3799 () (or @t3798 @t3792 @t270 @t3440)) % 39.97/40.18 (define @t3800 () (not @t3798)) % 39.97/40.18 (define @t3801 () (tptp.xuntil2p8 tptp.s74)) % 39.97/40.18 (define @t3802 () (or @t895 @t3801 @t3800)) % 39.97/40.18 (define @t3803 () (not @t3801)) % 39.97/40.18 (define @t3804 () (or @t3783 @t903 @t3803)) % 39.97/40.18 (define @t3805 () (@list tptp.s99 tptp.s73)) % 39.97/40.18 (define @t3806 () (tptp.node2 tptp.s99 tptp.s73)) % 39.97/40.18 (define @t3807 () (not @t132)) % 39.97/40.18 (define @t3808 () (or @t3807 @t3806)) % 39.97/40.18 (define @t3809 () (@list tptp.s73 tptp.s99)) % 39.97/40.18 (define @t3810 () (or @t923 @t3807 @t244)) % 39.97/40.18 (define @t3811 () (not @t3806)) % 39.97/40.18 (define @t3812 () (or @t265 @t264 @t934 @t3811)) % 39.97/40.18 (define @t3813 () (tptp.until2p7 tptp.s73)) % 39.97/40.18 (define @t3814 () (or @t3813 @t3807 @t270 @t3440)) % 39.97/40.18 (define @t3815 () (not @t3813)) % 39.97/40.18 (define @t3816 () (tptp.xuntil2p8 tptp.s73)) % 39.97/40.18 (define @t3817 () (or @t921 @t3816 @t3815)) % 39.97/40.18 (define @t3818 () (not @t3816)) % 39.97/40.18 (define @t3819 () (or @t3798 @t929 @t3818)) % 39.97/40.18 (define @t3820 () (@list tptp.s99 tptp.s72)) % 39.97/40.18 (define @t3821 () (tptp.node2 tptp.s99 tptp.s72)) % 39.97/40.18 (define @t3822 () (not @t133)) % 39.97/40.18 (define @t3823 () (or @t3822 @t3821)) % 39.97/40.18 (define @t3824 () (@list tptp.s72 tptp.s99)) % 39.97/40.18 (define @t3825 () (or @t949 @t3822 @t244)) % 39.97/40.18 (define @t3826 () (not @t3821)) % 39.97/40.18 (define @t3827 () (or @t265 @t264 @t960 @t3826)) % 39.97/40.18 (define @t3828 () (tptp.until2p7 tptp.s72)) % 39.97/40.18 (define @t3829 () (or @t3828 @t3822 @t270 @t3440)) % 39.97/40.18 (define @t3830 () (not @t3828)) % 39.97/40.18 (define @t3831 () (tptp.xuntil2p8 tptp.s72)) % 39.97/40.18 (define @t3832 () (or @t947 @t3831 @t3830)) % 39.97/40.18 (define @t3833 () (not @t3831)) % 39.97/40.18 (define @t3834 () (or @t3813 @t955 @t3833)) % 39.97/40.18 (define @t3835 () (@list tptp.s99 tptp.s71)) % 39.97/40.18 (define @t3836 () (tptp.node2 tptp.s99 tptp.s71)) % 39.97/40.18 (define @t3837 () (not @t134)) % 39.97/40.18 (define @t3838 () (or @t3837 @t3836)) % 39.97/40.18 (define @t3839 () (@list tptp.s71 tptp.s99)) % 39.97/40.18 (define @t3840 () (or @t975 @t3837 @t244)) % 39.97/40.18 (define @t3841 () (not @t3836)) % 39.97/40.18 (define @t3842 () (or @t265 @t264 @t986 @t3841)) % 39.97/40.18 (define @t3843 () (tptp.until2p7 tptp.s71)) % 39.97/40.18 (define @t3844 () (or @t3843 @t3837 @t270 @t3440)) % 39.97/40.18 (define @t3845 () (not @t3843)) % 39.97/40.18 (define @t3846 () (tptp.xuntil2p8 tptp.s71)) % 39.97/40.18 (define @t3847 () (or @t973 @t3846 @t3845)) % 39.97/40.18 (define @t3848 () (not @t3846)) % 39.97/40.18 (define @t3849 () (or @t3828 @t981 @t3848)) % 39.97/40.18 (define @t3850 () (@list tptp.s99 tptp.s70)) % 39.97/40.18 (define @t3851 () (tptp.node2 tptp.s99 tptp.s70)) % 39.97/40.18 (define @t3852 () (not @t135)) % 39.97/40.18 (define @t3853 () (or @t3852 @t3851)) % 39.97/40.18 (define @t3854 () (@list tptp.s70 tptp.s99)) % 39.97/40.18 (define @t3855 () (or @t1001 @t3852 @t244)) % 39.97/40.18 (define @t3856 () (not @t3851)) % 39.97/40.18 (define @t3857 () (or @t265 @t264 @t1012 @t3856)) % 39.97/40.18 (define @t3858 () (tptp.until2p7 tptp.s70)) % 39.97/40.18 (define @t3859 () (or @t3858 @t3852 @t270 @t3440)) % 39.97/40.18 (define @t3860 () (not @t3858)) % 39.97/40.18 (define @t3861 () (tptp.xuntil2p8 tptp.s70)) % 39.97/40.18 (define @t3862 () (or @t999 @t3861 @t3860)) % 39.97/40.18 (define @t3863 () (not @t3861)) % 39.97/40.18 (define @t3864 () (or @t3843 @t1007 @t3863)) % 39.97/40.18 (define @t3865 () (@list tptp.s99 tptp.s69)) % 39.97/40.18 (define @t3866 () (tptp.node2 tptp.s99 tptp.s69)) % 39.97/40.18 (define @t3867 () (not @t136)) % 39.97/40.18 (define @t3868 () (or @t3867 @t3866)) % 39.97/40.18 (define @t3869 () (@list tptp.s69 tptp.s99)) % 39.97/40.18 (define @t3870 () (or @t1027 @t3867 @t244)) % 39.97/40.18 (define @t3871 () (not @t3866)) % 39.97/40.18 (define @t3872 () (or @t265 @t264 @t1038 @t3871)) % 39.97/40.18 (define @t3873 () (tptp.until2p7 tptp.s69)) % 39.97/40.18 (define @t3874 () (or @t3873 @t3867 @t270 @t3440)) % 39.97/40.18 (define @t3875 () (not @t3873)) % 39.97/40.18 (define @t3876 () (tptp.xuntil2p8 tptp.s69)) % 39.97/40.18 (define @t3877 () (or @t1025 @t3876 @t3875)) % 39.97/40.18 (define @t3878 () (not @t3876)) % 39.97/40.18 (define @t3879 () (or @t3858 @t1033 @t3878)) % 39.97/40.18 (define @t3880 () (@list tptp.s99 tptp.s68)) % 39.97/40.18 (define @t3881 () (tptp.node2 tptp.s99 tptp.s68)) % 39.97/40.18 (define @t3882 () (not @t137)) % 39.97/40.18 (define @t3883 () (or @t3882 @t3881)) % 39.97/40.18 (define @t3884 () (@list tptp.s68 tptp.s99)) % 39.97/40.18 (define @t3885 () (or @t1053 @t3882 @t244)) % 39.97/40.18 (define @t3886 () (not @t3881)) % 39.97/40.18 (define @t3887 () (or @t265 @t264 @t1064 @t3886)) % 39.97/40.18 (define @t3888 () (tptp.until2p7 tptp.s68)) % 39.97/40.18 (define @t3889 () (or @t3888 @t3882 @t270 @t3440)) % 39.97/40.18 (define @t3890 () (not @t3888)) % 39.97/40.18 (define @t3891 () (tptp.xuntil2p8 tptp.s68)) % 39.97/40.18 (define @t3892 () (or @t1051 @t3891 @t3890)) % 39.97/40.18 (define @t3893 () (not @t3891)) % 39.97/40.18 (define @t3894 () (or @t3873 @t1059 @t3893)) % 39.97/40.18 (define @t3895 () (@list tptp.s99 tptp.s67)) % 39.97/40.18 (define @t3896 () (tptp.node2 tptp.s99 tptp.s67)) % 39.97/40.18 (define @t3897 () (not @t138)) % 39.97/40.18 (define @t3898 () (or @t3897 @t3896)) % 39.97/40.18 (define @t3899 () (@list tptp.s67 tptp.s99)) % 39.97/40.18 (define @t3900 () (or @t1079 @t3897 @t244)) % 39.97/40.18 (define @t3901 () (not @t3896)) % 39.97/40.18 (define @t3902 () (or @t265 @t264 @t1090 @t3901)) % 39.97/40.18 (define @t3903 () (tptp.until2p7 tptp.s67)) % 39.97/40.18 (define @t3904 () (or @t3903 @t3897 @t270 @t3440)) % 39.97/40.18 (define @t3905 () (not @t3903)) % 39.97/40.18 (define @t3906 () (tptp.xuntil2p8 tptp.s67)) % 39.97/40.18 (define @t3907 () (or @t1077 @t3906 @t3905)) % 39.97/40.18 (define @t3908 () (not @t3906)) % 39.97/40.18 (define @t3909 () (or @t3888 @t1085 @t3908)) % 39.97/40.18 (define @t3910 () (@list tptp.s99 tptp.s66)) % 39.97/40.18 (define @t3911 () (tptp.node2 tptp.s99 tptp.s66)) % 39.97/40.18 (define @t3912 () (not @t139)) % 39.97/40.18 (define @t3913 () (or @t3912 @t3911)) % 39.97/40.18 (define @t3914 () (@list tptp.s66 tptp.s99)) % 39.97/40.18 (define @t3915 () (or @t1105 @t3912 @t244)) % 39.97/40.18 (define @t3916 () (not @t3911)) % 39.97/40.18 (define @t3917 () (or @t265 @t264 @t1116 @t3916)) % 39.97/40.18 (define @t3918 () (tptp.until2p7 tptp.s66)) % 39.97/40.18 (define @t3919 () (or @t3918 @t3912 @t270 @t3440)) % 39.97/40.18 (define @t3920 () (not @t3918)) % 39.97/40.18 (define @t3921 () (tptp.xuntil2p8 tptp.s66)) % 39.97/40.18 (define @t3922 () (or @t1103 @t3921 @t3920)) % 39.97/40.18 (define @t3923 () (not @t3921)) % 39.97/40.18 (define @t3924 () (or @t3903 @t1111 @t3923)) % 39.97/40.18 (define @t3925 () (@list tptp.s99 tptp.s65)) % 39.97/40.18 (define @t3926 () (tptp.node2 tptp.s99 tptp.s65)) % 39.97/40.18 (define @t3927 () (not @t140)) % 39.97/40.18 (define @t3928 () (or @t3927 @t3926)) % 39.97/40.18 (define @t3929 () (@list tptp.s65 tptp.s99)) % 39.97/40.18 (define @t3930 () (or @t1131 @t3927 @t244)) % 39.97/40.18 (define @t3931 () (not @t3926)) % 39.97/40.18 (define @t3932 () (or @t265 @t264 @t1142 @t3931)) % 39.97/40.18 (define @t3933 () (tptp.until2p7 tptp.s65)) % 39.97/40.18 (define @t3934 () (or @t3933 @t3927 @t270 @t3440)) % 39.97/40.18 (define @t3935 () (not @t3933)) % 39.97/40.18 (define @t3936 () (tptp.xuntil2p8 tptp.s65)) % 39.97/40.18 (define @t3937 () (or @t1129 @t3936 @t3935)) % 39.97/40.18 (define @t3938 () (not @t3936)) % 39.97/40.18 (define @t3939 () (or @t3918 @t1137 @t3938)) % 39.97/40.18 (define @t3940 () (@list tptp.s99 tptp.s64)) % 39.97/40.18 (define @t3941 () (tptp.node2 tptp.s99 tptp.s64)) % 39.97/40.18 (define @t3942 () (not @t141)) % 39.97/40.18 (define @t3943 () (or @t3942 @t3941)) % 39.97/40.18 (define @t3944 () (@list tptp.s64 tptp.s99)) % 39.97/40.18 (define @t3945 () (or @t1157 @t3942 @t244)) % 39.97/40.18 (define @t3946 () (not @t3941)) % 39.97/40.18 (define @t3947 () (or @t265 @t264 @t1168 @t3946)) % 39.97/40.18 (define @t3948 () (tptp.until2p7 tptp.s64)) % 39.97/40.18 (define @t3949 () (or @t3948 @t3942 @t270 @t3440)) % 39.97/40.18 (define @t3950 () (not @t3948)) % 39.97/40.18 (define @t3951 () (tptp.xuntil2p8 tptp.s64)) % 39.97/40.18 (define @t3952 () (or @t1155 @t3951 @t3950)) % 39.97/40.18 (define @t3953 () (not @t3951)) % 39.97/40.18 (define @t3954 () (or @t3933 @t1163 @t3953)) % 39.97/40.18 (define @t3955 () (@list tptp.s99 tptp.s63)) % 39.97/40.18 (define @t3956 () (tptp.node2 tptp.s99 tptp.s63)) % 39.97/40.18 (define @t3957 () (not @t142)) % 39.97/40.18 (define @t3958 () (or @t3957 @t3956)) % 39.97/40.18 (define @t3959 () (@list tptp.s63 tptp.s99)) % 39.97/40.18 (define @t3960 () (or @t1183 @t3957 @t244)) % 39.97/40.18 (define @t3961 () (not @t3956)) % 39.97/40.18 (define @t3962 () (or @t265 @t264 @t1194 @t3961)) % 39.97/40.18 (define @t3963 () (tptp.until2p7 tptp.s63)) % 39.97/40.18 (define @t3964 () (or @t3963 @t3957 @t270 @t3440)) % 39.97/40.18 (define @t3965 () (not @t3963)) % 39.97/40.18 (define @t3966 () (tptp.xuntil2p8 tptp.s63)) % 39.97/40.18 (define @t3967 () (or @t1181 @t3966 @t3965)) % 39.97/40.18 (define @t3968 () (not @t3966)) % 39.97/40.18 (define @t3969 () (or @t3948 @t1189 @t3968)) % 39.97/40.18 (define @t3970 () (@list tptp.s99 tptp.s62)) % 39.97/40.18 (define @t3971 () (tptp.node2 tptp.s99 tptp.s62)) % 39.97/40.18 (define @t3972 () (not @t143)) % 39.97/40.18 (define @t3973 () (or @t3972 @t3971)) % 39.97/40.18 (define @t3974 () (@list tptp.s62 tptp.s99)) % 39.97/40.18 (define @t3975 () (or @t1209 @t3972 @t244)) % 39.97/40.18 (define @t3976 () (not @t3971)) % 39.97/40.18 (define @t3977 () (or @t265 @t264 @t1220 @t3976)) % 39.97/40.18 (define @t3978 () (tptp.until2p7 tptp.s62)) % 39.97/40.18 (define @t3979 () (or @t3978 @t3972 @t270 @t3440)) % 39.97/40.18 (define @t3980 () (not @t3978)) % 39.97/40.18 (define @t3981 () (tptp.xuntil2p8 tptp.s62)) % 39.97/40.18 (define @t3982 () (or @t1207 @t3981 @t3980)) % 39.97/40.18 (define @t3983 () (not @t3981)) % 39.97/40.18 (define @t3984 () (or @t3963 @t1215 @t3983)) % 39.97/40.18 (define @t3985 () (@list tptp.s99 tptp.s61)) % 39.97/40.18 (define @t3986 () (tptp.node2 tptp.s99 tptp.s61)) % 39.97/40.18 (define @t3987 () (not @t144)) % 39.97/40.18 (define @t3988 () (or @t3987 @t3986)) % 39.97/40.18 (define @t3989 () (@list tptp.s61 tptp.s99)) % 39.97/40.18 (define @t3990 () (or @t1235 @t3987 @t244)) % 39.97/40.18 (define @t3991 () (not @t3986)) % 39.97/40.18 (define @t3992 () (or @t265 @t264 @t1246 @t3991)) % 39.97/40.18 (define @t3993 () (tptp.until2p7 tptp.s61)) % 39.97/40.18 (define @t3994 () (or @t3993 @t3987 @t270 @t3440)) % 39.97/40.18 (define @t3995 () (not @t3993)) % 39.97/40.18 (define @t3996 () (tptp.xuntil2p8 tptp.s61)) % 39.97/40.18 (define @t3997 () (or @t1233 @t3996 @t3995)) % 39.97/40.18 (define @t3998 () (not @t3996)) % 39.97/40.18 (define @t3999 () (or @t3978 @t1241 @t3998)) % 39.97/40.18 (define @t4000 () (@list tptp.s99 tptp.s60)) % 39.97/40.18 (define @t4001 () (tptp.node2 tptp.s99 tptp.s60)) % 39.97/40.18 (define @t4002 () (not @t145)) % 39.97/40.18 (define @t4003 () (or @t4002 @t4001)) % 39.97/40.18 (define @t4004 () (@list tptp.s60 tptp.s99)) % 39.97/40.18 (define @t4005 () (or @t1261 @t4002 @t244)) % 39.97/40.18 (define @t4006 () (not @t4001)) % 39.97/40.18 (define @t4007 () (or @t265 @t264 @t1272 @t4006)) % 39.97/40.18 (define @t4008 () (tptp.until2p7 tptp.s60)) % 39.97/40.18 (define @t4009 () (or @t4008 @t4002 @t270 @t3440)) % 39.97/40.18 (define @t4010 () (not @t4008)) % 39.97/40.18 (define @t4011 () (tptp.xuntil2p8 tptp.s60)) % 39.97/40.18 (define @t4012 () (or @t1259 @t4011 @t4010)) % 39.97/40.18 (define @t4013 () (not @t4011)) % 39.97/40.18 (define @t4014 () (or @t3993 @t1267 @t4013)) % 39.97/40.18 (define @t4015 () (@list tptp.s99 tptp.s59)) % 39.97/40.18 (define @t4016 () (tptp.node2 tptp.s99 tptp.s59)) % 39.97/40.18 (define @t4017 () (not @t146)) % 39.97/40.18 (define @t4018 () (or @t4017 @t4016)) % 39.97/40.18 (define @t4019 () (@list tptp.s59 tptp.s99)) % 39.97/40.18 (define @t4020 () (or @t1287 @t4017 @t244)) % 39.97/40.18 (define @t4021 () (not @t4016)) % 39.97/40.18 (define @t4022 () (or @t265 @t264 @t1298 @t4021)) % 39.97/40.18 (define @t4023 () (tptp.until2p7 tptp.s59)) % 39.97/40.18 (define @t4024 () (or @t4023 @t4017 @t270 @t3440)) % 39.97/40.18 (define @t4025 () (not @t4023)) % 39.97/40.18 (define @t4026 () (tptp.xuntil2p8 tptp.s59)) % 39.97/40.18 (define @t4027 () (or @t1285 @t4026 @t4025)) % 39.97/40.18 (define @t4028 () (not @t4026)) % 39.97/40.18 (define @t4029 () (or @t4008 @t1293 @t4028)) % 39.97/40.18 (define @t4030 () (@list tptp.s99 tptp.s58)) % 39.97/40.18 (define @t4031 () (tptp.node2 tptp.s99 tptp.s58)) % 39.97/40.18 (define @t4032 () (not @t147)) % 39.97/40.18 (define @t4033 () (or @t4032 @t4031)) % 39.97/40.18 (define @t4034 () (@list tptp.s58 tptp.s99)) % 39.97/40.18 (define @t4035 () (or @t1313 @t4032 @t244)) % 39.97/40.18 (define @t4036 () (not @t4031)) % 39.97/40.18 (define @t4037 () (or @t265 @t264 @t1324 @t4036)) % 39.97/40.18 (define @t4038 () (tptp.until2p7 tptp.s58)) % 39.97/40.18 (define @t4039 () (or @t4038 @t4032 @t270 @t3440)) % 39.97/40.18 (define @t4040 () (not @t4038)) % 39.97/40.18 (define @t4041 () (tptp.xuntil2p8 tptp.s58)) % 39.97/40.18 (define @t4042 () (or @t1311 @t4041 @t4040)) % 39.97/40.18 (define @t4043 () (not @t4041)) % 39.97/40.18 (define @t4044 () (or @t4023 @t1319 @t4043)) % 39.97/40.18 (define @t4045 () (@list tptp.s99 tptp.s57)) % 39.97/40.18 (define @t4046 () (tptp.node2 tptp.s99 tptp.s57)) % 39.97/40.18 (define @t4047 () (not @t148)) % 39.97/40.18 (define @t4048 () (or @t4047 @t4046)) % 39.97/40.18 (define @t4049 () (@list tptp.s57 tptp.s99)) % 39.97/40.18 (define @t4050 () (or @t1339 @t4047 @t244)) % 39.97/40.18 (define @t4051 () (not @t4046)) % 39.97/40.18 (define @t4052 () (or @t265 @t264 @t1350 @t4051)) % 39.97/40.18 (define @t4053 () (tptp.until2p7 tptp.s57)) % 39.97/40.18 (define @t4054 () (or @t4053 @t4047 @t270 @t3440)) % 39.97/40.18 (define @t4055 () (not @t4053)) % 39.97/40.18 (define @t4056 () (tptp.xuntil2p8 tptp.s57)) % 39.97/40.18 (define @t4057 () (or @t1337 @t4056 @t4055)) % 39.97/40.18 (define @t4058 () (not @t4056)) % 39.97/40.18 (define @t4059 () (or @t4038 @t1345 @t4058)) % 39.97/40.18 (define @t4060 () (@list tptp.s99 tptp.s56)) % 39.97/40.18 (define @t4061 () (tptp.node2 tptp.s99 tptp.s56)) % 39.97/40.18 (define @t4062 () (not @t149)) % 39.97/40.18 (define @t4063 () (or @t4062 @t4061)) % 39.97/40.18 (define @t4064 () (@list tptp.s56 tptp.s99)) % 39.97/40.18 (define @t4065 () (or @t1365 @t4062 @t244)) % 39.97/40.18 (define @t4066 () (not @t4061)) % 39.97/40.18 (define @t4067 () (or @t265 @t264 @t1376 @t4066)) % 39.97/40.18 (define @t4068 () (tptp.until2p7 tptp.s56)) % 39.97/40.18 (define @t4069 () (or @t4068 @t4062 @t270 @t3440)) % 39.97/40.18 (define @t4070 () (not @t4068)) % 39.97/40.18 (define @t4071 () (tptp.xuntil2p8 tptp.s56)) % 39.97/40.18 (define @t4072 () (or @t1363 @t4071 @t4070)) % 39.97/40.18 (define @t4073 () (not @t4071)) % 39.97/40.18 (define @t4074 () (or @t4053 @t1371 @t4073)) % 39.97/40.18 (define @t4075 () (@list tptp.s99 tptp.s55)) % 39.97/40.18 (define @t4076 () (tptp.node2 tptp.s99 tptp.s55)) % 39.97/40.18 (define @t4077 () (not @t150)) % 39.97/40.18 (define @t4078 () (or @t4077 @t4076)) % 39.97/40.18 (define @t4079 () (@list tptp.s55 tptp.s99)) % 39.97/40.18 (define @t4080 () (or @t1391 @t4077 @t244)) % 39.97/40.18 (define @t4081 () (not @t4076)) % 39.97/40.18 (define @t4082 () (or @t265 @t264 @t1402 @t4081)) % 39.97/40.18 (define @t4083 () (tptp.until2p7 tptp.s55)) % 39.97/40.18 (define @t4084 () (or @t4083 @t4077 @t270 @t3440)) % 39.97/40.18 (define @t4085 () (not @t4083)) % 39.97/40.18 (define @t4086 () (tptp.xuntil2p8 tptp.s55)) % 39.97/40.18 (define @t4087 () (or @t1389 @t4086 @t4085)) % 39.97/40.18 (define @t4088 () (not @t4086)) % 39.97/40.18 (define @t4089 () (or @t4068 @t1397 @t4088)) % 39.97/40.18 (define @t4090 () (@list tptp.s99 tptp.s54)) % 39.97/40.18 (define @t4091 () (tptp.node2 tptp.s99 tptp.s54)) % 39.97/40.18 (define @t4092 () (not @t151)) % 39.97/40.18 (define @t4093 () (or @t4092 @t4091)) % 39.97/40.18 (define @t4094 () (@list tptp.s54 tptp.s99)) % 39.97/40.18 (define @t4095 () (or @t1417 @t4092 @t244)) % 39.97/40.18 (define @t4096 () (not @t4091)) % 39.97/40.18 (define @t4097 () (or @t265 @t264 @t1428 @t4096)) % 39.97/40.18 (define @t4098 () (tptp.until2p7 tptp.s54)) % 39.97/40.18 (define @t4099 () (or @t4098 @t4092 @t270 @t3440)) % 39.97/40.18 (define @t4100 () (not @t4098)) % 39.97/40.18 (define @t4101 () (tptp.xuntil2p8 tptp.s54)) % 39.97/40.18 (define @t4102 () (or @t1415 @t4101 @t4100)) % 39.97/40.18 (define @t4103 () (not @t4101)) % 39.97/40.18 (define @t4104 () (or @t4083 @t1423 @t4103)) % 39.97/40.18 (define @t4105 () (@list tptp.s99 tptp.s53)) % 39.97/40.18 (define @t4106 () (tptp.node2 tptp.s99 tptp.s53)) % 39.97/40.18 (define @t4107 () (not @t152)) % 39.97/40.18 (define @t4108 () (or @t4107 @t4106)) % 39.97/40.18 (define @t4109 () (@list tptp.s53 tptp.s99)) % 39.97/40.18 (define @t4110 () (or @t1443 @t4107 @t244)) % 39.97/40.18 (define @t4111 () (not @t4106)) % 39.97/40.18 (define @t4112 () (or @t265 @t264 @t1454 @t4111)) % 39.97/40.18 (define @t4113 () (tptp.until2p7 tptp.s53)) % 39.97/40.18 (define @t4114 () (or @t4113 @t4107 @t270 @t3440)) % 39.97/40.18 (define @t4115 () (not @t4113)) % 39.97/40.18 (define @t4116 () (tptp.xuntil2p8 tptp.s53)) % 39.97/40.18 (define @t4117 () (or @t1441 @t4116 @t4115)) % 39.97/40.18 (define @t4118 () (not @t4116)) % 39.97/40.18 (define @t4119 () (or @t4098 @t1449 @t4118)) % 39.97/40.18 (define @t4120 () (@list tptp.s99 tptp.s52)) % 39.97/40.18 (define @t4121 () (tptp.node2 tptp.s99 tptp.s52)) % 39.97/40.18 (define @t4122 () (not @t153)) % 39.97/40.18 (define @t4123 () (or @t4122 @t4121)) % 39.97/40.18 (define @t4124 () (@list tptp.s52 tptp.s99)) % 39.97/40.18 (define @t4125 () (or @t1469 @t4122 @t244)) % 39.97/40.18 (define @t4126 () (not @t4121)) % 39.97/40.18 (define @t4127 () (or @t265 @t264 @t1480 @t4126)) % 39.97/40.18 (define @t4128 () (tptp.until2p7 tptp.s52)) % 39.97/40.18 (define @t4129 () (or @t4128 @t4122 @t270 @t3440)) % 39.97/40.18 (define @t4130 () (not @t4128)) % 39.97/40.18 (define @t4131 () (tptp.xuntil2p8 tptp.s52)) % 39.97/40.18 (define @t4132 () (or @t1467 @t4131 @t4130)) % 39.97/40.18 (define @t4133 () (not @t4131)) % 39.97/40.18 (define @t4134 () (or @t4113 @t1475 @t4133)) % 39.97/40.18 (define @t4135 () (@list tptp.s99 tptp.s51)) % 39.97/40.18 (define @t4136 () (tptp.node2 tptp.s99 tptp.s51)) % 39.97/40.18 (define @t4137 () (not @t154)) % 39.97/40.18 (define @t4138 () (or @t4137 @t4136)) % 39.97/40.18 (define @t4139 () (@list tptp.s51 tptp.s99)) % 39.97/40.18 (define @t4140 () (or @t1495 @t4137 @t244)) % 39.97/40.18 (define @t4141 () (not @t4136)) % 39.97/40.18 (define @t4142 () (or @t265 @t264 @t1506 @t4141)) % 39.97/40.18 (define @t4143 () (tptp.until2p7 tptp.s51)) % 39.97/40.18 (define @t4144 () (or @t4143 @t4137 @t270 @t3440)) % 39.97/40.18 (define @t4145 () (not @t4143)) % 39.97/40.18 (define @t4146 () (tptp.xuntil2p8 tptp.s51)) % 39.97/40.18 (define @t4147 () (or @t1493 @t4146 @t4145)) % 39.97/40.18 (define @t4148 () (not @t4146)) % 39.97/40.18 (define @t4149 () (or @t4128 @t1501 @t4148)) % 39.97/40.18 (define @t4150 () (@list tptp.s99 tptp.s50)) % 39.97/40.18 (define @t4151 () (tptp.node2 tptp.s99 tptp.s50)) % 39.97/40.18 (define @t4152 () (not @t155)) % 39.97/40.18 (define @t4153 () (or @t4152 @t4151)) % 39.97/40.18 (define @t4154 () (@list tptp.s50 tptp.s99)) % 39.97/40.18 (define @t4155 () (or @t1521 @t4152 @t244)) % 39.97/40.18 (define @t4156 () (not @t4151)) % 39.97/40.18 (define @t4157 () (or @t265 @t264 @t1532 @t4156)) % 39.97/40.18 (define @t4158 () (tptp.until2p7 tptp.s50)) % 39.97/40.18 (define @t4159 () (or @t4158 @t4152 @t270 @t3440)) % 39.97/40.18 (define @t4160 () (not @t4158)) % 39.97/40.18 (define @t4161 () (tptp.xuntil2p8 tptp.s50)) % 39.97/40.18 (define @t4162 () (or @t1519 @t4161 @t4160)) % 39.97/40.18 (define @t4163 () (not @t4161)) % 39.97/40.18 (define @t4164 () (or @t4143 @t1527 @t4163)) % 39.97/40.18 (define @t4165 () (@list tptp.s99 tptp.s49)) % 39.97/40.18 (define @t4166 () (tptp.node2 tptp.s99 tptp.s49)) % 39.97/40.18 (define @t4167 () (not @t156)) % 39.97/40.18 (define @t4168 () (or @t4167 @t4166)) % 39.97/40.18 (define @t4169 () (@list tptp.s49 tptp.s99)) % 39.97/40.18 (define @t4170 () (or @t1547 @t4167 @t244)) % 39.97/40.18 (define @t4171 () (not @t4166)) % 39.97/40.18 (define @t4172 () (or @t265 @t264 @t1558 @t4171)) % 39.97/40.18 (define @t4173 () (tptp.until2p7 tptp.s49)) % 39.97/40.18 (define @t4174 () (or @t4173 @t4167 @t270 @t3440)) % 39.97/40.18 (define @t4175 () (not @t4173)) % 39.97/40.18 (define @t4176 () (tptp.xuntil2p8 tptp.s49)) % 39.97/40.18 (define @t4177 () (or @t1545 @t4176 @t4175)) % 39.97/40.18 (define @t4178 () (not @t4176)) % 39.97/40.18 (define @t4179 () (or @t4158 @t1553 @t4178)) % 39.97/40.18 (define @t4180 () (@list tptp.s99 tptp.s48)) % 39.97/40.18 (define @t4181 () (tptp.node2 tptp.s99 tptp.s48)) % 39.97/40.18 (define @t4182 () (not @t157)) % 39.97/40.18 (define @t4183 () (or @t4182 @t4181)) % 39.97/40.18 (define @t4184 () (@list tptp.s48 tptp.s99)) % 39.97/40.18 (define @t4185 () (or @t1573 @t4182 @t244)) % 39.97/40.18 (define @t4186 () (not @t4181)) % 39.97/40.18 (define @t4187 () (or @t265 @t264 @t1584 @t4186)) % 39.97/40.18 (define @t4188 () (tptp.until2p7 tptp.s48)) % 39.97/40.18 (define @t4189 () (or @t4188 @t4182 @t270 @t3440)) % 39.97/40.18 (define @t4190 () (not @t4188)) % 39.97/40.18 (define @t4191 () (tptp.xuntil2p8 tptp.s48)) % 39.97/40.18 (define @t4192 () (or @t1571 @t4191 @t4190)) % 39.97/40.18 (define @t4193 () (not @t4191)) % 39.97/40.18 (define @t4194 () (or @t4173 @t1579 @t4193)) % 39.97/40.18 (define @t4195 () (@list tptp.s99 tptp.s47)) % 39.97/40.18 (define @t4196 () (tptp.node2 tptp.s99 tptp.s47)) % 39.97/40.18 (define @t4197 () (not @t158)) % 39.97/40.18 (define @t4198 () (or @t4197 @t4196)) % 39.97/40.18 (define @t4199 () (@list tptp.s47 tptp.s99)) % 39.97/40.18 (define @t4200 () (or @t1599 @t4197 @t244)) % 39.97/40.18 (define @t4201 () (not @t4196)) % 39.97/40.18 (define @t4202 () (or @t265 @t264 @t1610 @t4201)) % 39.97/40.18 (define @t4203 () (tptp.until2p7 tptp.s47)) % 39.97/40.18 (define @t4204 () (or @t4203 @t4197 @t270 @t3440)) % 39.97/40.18 (define @t4205 () (not @t4203)) % 39.97/40.18 (define @t4206 () (tptp.xuntil2p8 tptp.s47)) % 39.97/40.18 (define @t4207 () (or @t1597 @t4206 @t4205)) % 39.97/40.18 (define @t4208 () (not @t4206)) % 39.97/40.18 (define @t4209 () (or @t4188 @t1605 @t4208)) % 39.97/40.18 (define @t4210 () (@list tptp.s99 tptp.s46)) % 39.97/40.18 (define @t4211 () (tptp.node2 tptp.s99 tptp.s46)) % 39.97/40.18 (define @t4212 () (not @t159)) % 39.97/40.18 (define @t4213 () (or @t4212 @t4211)) % 39.97/40.18 (define @t4214 () (@list tptp.s46 tptp.s99)) % 39.97/40.18 (define @t4215 () (or @t1625 @t4212 @t244)) % 39.97/40.18 (define @t4216 () (not @t4211)) % 39.97/40.18 (define @t4217 () (or @t265 @t264 @t1636 @t4216)) % 39.97/40.18 (define @t4218 () (tptp.until2p7 tptp.s46)) % 39.97/40.18 (define @t4219 () (or @t4218 @t4212 @t270 @t3440)) % 39.97/40.18 (define @t4220 () (not @t4218)) % 39.97/40.18 (define @t4221 () (tptp.xuntil2p8 tptp.s46)) % 39.97/40.18 (define @t4222 () (or @t1623 @t4221 @t4220)) % 39.97/40.18 (define @t4223 () (not @t4221)) % 39.97/40.18 (define @t4224 () (or @t4203 @t1631 @t4223)) % 39.97/40.18 (define @t4225 () (@list tptp.s99 tptp.s45)) % 39.97/40.18 (define @t4226 () (tptp.node2 tptp.s99 tptp.s45)) % 39.97/40.18 (define @t4227 () (not @t160)) % 39.97/40.18 (define @t4228 () (or @t4227 @t4226)) % 39.97/40.18 (define @t4229 () (@list tptp.s45 tptp.s99)) % 39.97/40.18 (define @t4230 () (or @t1651 @t4227 @t244)) % 39.97/40.18 (define @t4231 () (not @t4226)) % 39.97/40.18 (define @t4232 () (or @t265 @t264 @t1662 @t4231)) % 39.97/40.18 (define @t4233 () (tptp.until2p7 tptp.s45)) % 39.97/40.18 (define @t4234 () (or @t4233 @t4227 @t270 @t3440)) % 39.97/40.18 (define @t4235 () (not @t4233)) % 39.97/40.18 (define @t4236 () (tptp.xuntil2p8 tptp.s45)) % 39.97/40.18 (define @t4237 () (or @t1649 @t4236 @t4235)) % 39.97/40.18 (define @t4238 () (not @t4236)) % 39.97/40.18 (define @t4239 () (or @t4218 @t1657 @t4238)) % 39.97/40.18 (define @t4240 () (@list tptp.s99 tptp.s44)) % 39.97/40.18 (define @t4241 () (tptp.node2 tptp.s99 tptp.s44)) % 39.97/40.18 (define @t4242 () (not @t161)) % 39.97/40.18 (define @t4243 () (or @t4242 @t4241)) % 39.97/40.18 (define @t4244 () (@list tptp.s44 tptp.s99)) % 39.97/40.18 (define @t4245 () (or @t1677 @t4242 @t244)) % 39.97/40.18 (define @t4246 () (not @t4241)) % 39.97/40.18 (define @t4247 () (or @t265 @t264 @t1688 @t4246)) % 39.97/40.18 (define @t4248 () (tptp.until2p7 tptp.s44)) % 39.97/40.18 (define @t4249 () (or @t4248 @t4242 @t270 @t3440)) % 39.97/40.18 (define @t4250 () (not @t4248)) % 39.97/40.18 (define @t4251 () (tptp.xuntil2p8 tptp.s44)) % 39.97/40.18 (define @t4252 () (or @t1675 @t4251 @t4250)) % 39.97/40.18 (define @t4253 () (not @t4251)) % 39.97/40.18 (define @t4254 () (or @t4233 @t1683 @t4253)) % 39.97/40.18 (define @t4255 () (@list tptp.s99 tptp.s43)) % 39.97/40.18 (define @t4256 () (tptp.node2 tptp.s99 tptp.s43)) % 39.97/40.18 (define @t4257 () (not @t162)) % 39.97/40.18 (define @t4258 () (or @t4257 @t4256)) % 39.97/40.18 (define @t4259 () (@list tptp.s43 tptp.s99)) % 39.97/40.18 (define @t4260 () (or @t1703 @t4257 @t244)) % 39.97/40.18 (define @t4261 () (not @t4256)) % 39.97/40.18 (define @t4262 () (or @t265 @t264 @t1714 @t4261)) % 39.97/40.18 (define @t4263 () (tptp.until2p7 tptp.s43)) % 39.97/40.18 (define @t4264 () (or @t4263 @t4257 @t270 @t3440)) % 39.97/40.18 (define @t4265 () (not @t4263)) % 39.97/40.18 (define @t4266 () (tptp.xuntil2p8 tptp.s43)) % 39.97/40.18 (define @t4267 () (or @t1701 @t4266 @t4265)) % 39.97/40.18 (define @t4268 () (not @t4266)) % 39.97/40.18 (define @t4269 () (or @t4248 @t1709 @t4268)) % 39.97/40.18 (define @t4270 () (@list tptp.s99 tptp.s42)) % 39.97/40.18 (define @t4271 () (tptp.node2 tptp.s99 tptp.s42)) % 39.97/40.18 (define @t4272 () (not @t163)) % 39.97/40.18 (define @t4273 () (or @t4272 @t4271)) % 39.97/40.18 (define @t4274 () (@list tptp.s42 tptp.s99)) % 39.97/40.18 (define @t4275 () (or @t1729 @t4272 @t244)) % 39.97/40.18 (define @t4276 () (not @t4271)) % 39.97/40.18 (define @t4277 () (or @t265 @t264 @t1740 @t4276)) % 39.97/40.18 (define @t4278 () (tptp.until2p7 tptp.s42)) % 39.97/40.18 (define @t4279 () (or @t4278 @t4272 @t270 @t3440)) % 39.97/40.18 (define @t4280 () (not @t4278)) % 39.97/40.18 (define @t4281 () (tptp.xuntil2p8 tptp.s42)) % 39.97/40.18 (define @t4282 () (or @t1727 @t4281 @t4280)) % 39.97/40.18 (define @t4283 () (not @t4281)) % 39.97/40.18 (define @t4284 () (or @t4263 @t1735 @t4283)) % 39.97/40.18 (define @t4285 () (@list tptp.s99 tptp.s41)) % 39.97/40.18 (define @t4286 () (tptp.node2 tptp.s99 tptp.s41)) % 39.97/40.18 (define @t4287 () (not @t164)) % 39.97/40.18 (define @t4288 () (or @t4287 @t4286)) % 39.97/40.18 (define @t4289 () (@list tptp.s41 tptp.s99)) % 39.97/40.18 (define @t4290 () (or @t1755 @t4287 @t244)) % 39.97/40.18 (define @t4291 () (not @t4286)) % 39.97/40.18 (define @t4292 () (or @t265 @t264 @t1766 @t4291)) % 39.97/40.18 (define @t4293 () (tptp.until2p7 tptp.s41)) % 39.97/40.18 (define @t4294 () (or @t4293 @t4287 @t270 @t3440)) % 39.97/40.18 (define @t4295 () (not @t4293)) % 39.97/40.18 (define @t4296 () (tptp.xuntil2p8 tptp.s41)) % 39.97/40.18 (define @t4297 () (or @t1753 @t4296 @t4295)) % 39.97/40.18 (define @t4298 () (not @t4296)) % 39.97/40.18 (define @t4299 () (or @t4278 @t1761 @t4298)) % 39.97/40.18 (define @t4300 () (@list tptp.s99 tptp.s40)) % 39.97/40.18 (define @t4301 () (tptp.node2 tptp.s99 tptp.s40)) % 39.97/40.18 (define @t4302 () (not @t165)) % 39.97/40.18 (define @t4303 () (or @t4302 @t4301)) % 39.97/40.18 (define @t4304 () (@list tptp.s40 tptp.s99)) % 39.97/40.18 (define @t4305 () (or @t1781 @t4302 @t244)) % 39.97/40.18 (define @t4306 () (not @t4301)) % 39.97/40.18 (define @t4307 () (or @t265 @t264 @t1792 @t4306)) % 39.97/40.18 (define @t4308 () (tptp.until2p7 tptp.s40)) % 39.97/40.18 (define @t4309 () (or @t4308 @t4302 @t270 @t3440)) % 39.97/40.18 (define @t4310 () (not @t4308)) % 39.97/40.18 (define @t4311 () (tptp.xuntil2p8 tptp.s40)) % 39.97/40.18 (define @t4312 () (or @t1779 @t4311 @t4310)) % 39.97/40.18 (define @t4313 () (not @t4311)) % 39.97/40.18 (define @t4314 () (or @t4293 @t1787 @t4313)) % 39.97/40.18 (define @t4315 () (@list tptp.s99 tptp.s39)) % 39.97/40.18 (define @t4316 () (tptp.node2 tptp.s99 tptp.s39)) % 39.97/40.18 (define @t4317 () (not @t166)) % 39.97/40.18 (define @t4318 () (or @t4317 @t4316)) % 39.97/40.18 (define @t4319 () (@list tptp.s39 tptp.s99)) % 39.97/40.18 (define @t4320 () (or @t1807 @t4317 @t244)) % 39.97/40.18 (define @t4321 () (not @t4316)) % 39.97/40.18 (define @t4322 () (or @t265 @t264 @t1818 @t4321)) % 39.97/40.18 (define @t4323 () (tptp.until2p7 tptp.s39)) % 39.97/40.18 (define @t4324 () (or @t4323 @t4317 @t270 @t3440)) % 39.97/40.18 (define @t4325 () (not @t4323)) % 39.97/40.18 (define @t4326 () (tptp.xuntil2p8 tptp.s39)) % 39.97/40.18 (define @t4327 () (or @t1805 @t4326 @t4325)) % 39.97/40.18 (define @t4328 () (not @t4326)) % 39.97/40.18 (define @t4329 () (or @t4308 @t1813 @t4328)) % 39.97/40.18 (define @t4330 () (@list tptp.s99 tptp.s38)) % 39.97/40.18 (define @t4331 () (tptp.node2 tptp.s99 tptp.s38)) % 39.97/40.18 (define @t4332 () (not @t167)) % 39.97/40.18 (define @t4333 () (or @t4332 @t4331)) % 39.97/40.18 (define @t4334 () (@list tptp.s38 tptp.s99)) % 39.97/40.18 (define @t4335 () (or @t1833 @t4332 @t244)) % 39.97/40.18 (define @t4336 () (not @t4331)) % 39.97/40.18 (define @t4337 () (or @t265 @t264 @t1844 @t4336)) % 39.97/40.18 (define @t4338 () (tptp.until2p7 tptp.s38)) % 39.97/40.18 (define @t4339 () (or @t4338 @t4332 @t270 @t3440)) % 39.97/40.18 (define @t4340 () (not @t4338)) % 39.97/40.18 (define @t4341 () (tptp.xuntil2p8 tptp.s38)) % 39.97/40.18 (define @t4342 () (or @t1831 @t4341 @t4340)) % 39.97/40.18 (define @t4343 () (not @t4341)) % 39.97/40.18 (define @t4344 () (or @t4323 @t1839 @t4343)) % 39.97/40.18 (define @t4345 () (@list tptp.s99 tptp.s37)) % 39.97/40.18 (define @t4346 () (tptp.node2 tptp.s99 tptp.s37)) % 39.97/40.18 (define @t4347 () (not @t168)) % 39.97/40.18 (define @t4348 () (or @t4347 @t4346)) % 39.97/40.18 (define @t4349 () (@list tptp.s37 tptp.s99)) % 39.97/40.18 (define @t4350 () (or @t1859 @t4347 @t244)) % 39.97/40.18 (define @t4351 () (not @t4346)) % 39.97/40.18 (define @t4352 () (or @t265 @t264 @t1870 @t4351)) % 39.97/40.18 (define @t4353 () (tptp.until2p7 tptp.s37)) % 39.97/40.18 (define @t4354 () (or @t4353 @t4347 @t270 @t3440)) % 39.97/40.18 (define @t4355 () (not @t4353)) % 39.97/40.18 (define @t4356 () (tptp.xuntil2p8 tptp.s37)) % 39.97/40.18 (define @t4357 () (or @t1857 @t4356 @t4355)) % 39.97/40.18 (define @t4358 () (not @t4356)) % 39.97/40.18 (define @t4359 () (or @t4338 @t1865 @t4358)) % 39.97/40.18 (define @t4360 () (@list tptp.s99 tptp.s36)) % 39.97/40.18 (define @t4361 () (tptp.node2 tptp.s99 tptp.s36)) % 39.97/40.18 (define @t4362 () (not @t169)) % 39.97/40.18 (define @t4363 () (or @t4362 @t4361)) % 39.97/40.18 (define @t4364 () (@list tptp.s36 tptp.s99)) % 39.97/40.18 (define @t4365 () (or @t1885 @t4362 @t244)) % 39.97/40.18 (define @t4366 () (not @t4361)) % 39.97/40.18 (define @t4367 () (or @t265 @t264 @t1896 @t4366)) % 39.97/40.18 (define @t4368 () (tptp.until2p7 tptp.s36)) % 39.97/40.18 (define @t4369 () (or @t4368 @t4362 @t270 @t3440)) % 39.97/40.18 (define @t4370 () (not @t4368)) % 39.97/40.18 (define @t4371 () (tptp.xuntil2p8 tptp.s36)) % 39.97/40.18 (define @t4372 () (or @t1883 @t4371 @t4370)) % 39.97/40.18 (define @t4373 () (not @t4371)) % 39.97/40.18 (define @t4374 () (or @t4353 @t1891 @t4373)) % 39.97/40.18 (define @t4375 () (@list tptp.s99 tptp.s35)) % 39.97/40.18 (define @t4376 () (tptp.node2 tptp.s99 tptp.s35)) % 39.97/40.18 (define @t4377 () (not @t170)) % 39.97/40.18 (define @t4378 () (or @t4377 @t4376)) % 39.97/40.18 (define @t4379 () (@list tptp.s35 tptp.s99)) % 39.97/40.18 (define @t4380 () (or @t1911 @t4377 @t244)) % 39.97/40.18 (define @t4381 () (not @t4376)) % 39.97/40.18 (define @t4382 () (or @t265 @t264 @t1922 @t4381)) % 39.97/40.18 (define @t4383 () (tptp.until2p7 tptp.s35)) % 39.97/40.18 (define @t4384 () (or @t4383 @t4377 @t270 @t3440)) % 39.97/40.18 (define @t4385 () (not @t4383)) % 39.97/40.18 (define @t4386 () (tptp.xuntil2p8 tptp.s35)) % 39.97/40.18 (define @t4387 () (or @t1909 @t4386 @t4385)) % 39.97/40.18 (define @t4388 () (not @t4386)) % 39.97/40.18 (define @t4389 () (or @t4368 @t1917 @t4388)) % 39.97/40.18 (define @t4390 () (@list tptp.s99 tptp.s34)) % 39.97/40.18 (define @t4391 () (tptp.node2 tptp.s99 tptp.s34)) % 39.97/40.18 (define @t4392 () (not @t171)) % 39.97/40.18 (define @t4393 () (or @t4392 @t4391)) % 39.97/40.18 (define @t4394 () (@list tptp.s34 tptp.s99)) % 39.97/40.18 (define @t4395 () (or @t1937 @t4392 @t244)) % 39.97/40.18 (define @t4396 () (not @t4391)) % 39.97/40.18 (define @t4397 () (or @t265 @t264 @t1948 @t4396)) % 39.97/40.18 (define @t4398 () (tptp.until2p7 tptp.s34)) % 39.97/40.18 (define @t4399 () (or @t4398 @t4392 @t270 @t3440)) % 39.97/40.18 (define @t4400 () (not @t4398)) % 39.97/40.18 (define @t4401 () (tptp.xuntil2p8 tptp.s34)) % 39.97/40.18 (define @t4402 () (or @t1935 @t4401 @t4400)) % 39.97/40.18 (define @t4403 () (not @t4401)) % 39.97/40.18 (define @t4404 () (or @t4383 @t1943 @t4403)) % 39.97/40.18 (define @t4405 () (@list tptp.s99 tptp.s33)) % 39.97/40.18 (define @t4406 () (tptp.node2 tptp.s99 tptp.s33)) % 39.97/40.18 (define @t4407 () (not @t172)) % 39.97/40.18 (define @t4408 () (or @t4407 @t4406)) % 39.97/40.18 (define @t4409 () (@list tptp.s33 tptp.s99)) % 39.97/40.18 (define @t4410 () (or @t1963 @t4407 @t244)) % 39.97/40.18 (define @t4411 () (not @t4406)) % 39.97/40.18 (define @t4412 () (or @t265 @t264 @t1974 @t4411)) % 39.97/40.18 (define @t4413 () (tptp.until2p7 tptp.s33)) % 39.97/40.18 (define @t4414 () (or @t4413 @t4407 @t270 @t3440)) % 39.97/40.18 (define @t4415 () (not @t4413)) % 39.97/40.18 (define @t4416 () (tptp.xuntil2p8 tptp.s33)) % 39.97/40.18 (define @t4417 () (or @t1961 @t4416 @t4415)) % 39.97/40.18 (define @t4418 () (not @t4416)) % 39.97/40.18 (define @t4419 () (or @t4398 @t1969 @t4418)) % 39.97/40.18 (define @t4420 () (@list tptp.s99 tptp.s32)) % 39.97/40.18 (define @t4421 () (tptp.node2 tptp.s99 tptp.s32)) % 39.97/40.18 (define @t4422 () (not @t173)) % 39.97/40.18 (define @t4423 () (or @t4422 @t4421)) % 39.97/40.18 (define @t4424 () (@list tptp.s32 tptp.s99)) % 39.97/40.18 (define @t4425 () (or @t1989 @t4422 @t244)) % 39.97/40.18 (define @t4426 () (not @t4421)) % 39.97/40.18 (define @t4427 () (or @t265 @t264 @t2000 @t4426)) % 39.97/40.18 (define @t4428 () (tptp.until2p7 tptp.s32)) % 39.97/40.18 (define @t4429 () (or @t4428 @t4422 @t270 @t3440)) % 39.97/40.18 (define @t4430 () (not @t4428)) % 39.97/40.18 (define @t4431 () (tptp.xuntil2p8 tptp.s32)) % 39.97/40.18 (define @t4432 () (or @t1987 @t4431 @t4430)) % 39.97/40.18 (define @t4433 () (not @t4431)) % 39.97/40.18 (define @t4434 () (or @t4413 @t1995 @t4433)) % 39.97/40.18 (define @t4435 () (@list tptp.s99 tptp.s31)) % 39.97/40.18 (define @t4436 () (tptp.node2 tptp.s99 tptp.s31)) % 39.97/40.18 (define @t4437 () (not @t174)) % 39.97/40.18 (define @t4438 () (or @t4437 @t4436)) % 39.97/40.18 (define @t4439 () (@list tptp.s31 tptp.s99)) % 39.97/40.18 (define @t4440 () (or @t2015 @t4437 @t244)) % 39.97/40.18 (define @t4441 () (not @t4436)) % 39.97/40.18 (define @t4442 () (or @t265 @t264 @t2026 @t4441)) % 39.97/40.18 (define @t4443 () (tptp.until2p7 tptp.s31)) % 39.97/40.18 (define @t4444 () (or @t4443 @t4437 @t270 @t3440)) % 39.97/40.18 (define @t4445 () (not @t4443)) % 39.97/40.18 (define @t4446 () (tptp.xuntil2p8 tptp.s31)) % 39.97/40.18 (define @t4447 () (or @t2013 @t4446 @t4445)) % 39.97/40.18 (define @t4448 () (not @t4446)) % 39.97/40.18 (define @t4449 () (or @t4428 @t2021 @t4448)) % 39.97/40.18 (define @t4450 () (@list tptp.s99 tptp.s30)) % 39.97/40.18 (define @t4451 () (tptp.node2 tptp.s99 tptp.s30)) % 39.97/40.18 (define @t4452 () (not @t175)) % 39.97/40.18 (define @t4453 () (or @t4452 @t4451)) % 39.97/40.18 (define @t4454 () (@list tptp.s30 tptp.s99)) % 39.97/40.18 (define @t4455 () (or @t2041 @t4452 @t244)) % 39.97/40.18 (define @t4456 () (not @t4451)) % 39.97/40.18 (define @t4457 () (or @t265 @t264 @t2052 @t4456)) % 39.97/40.18 (define @t4458 () (tptp.until2p7 tptp.s30)) % 39.97/40.18 (define @t4459 () (or @t4458 @t4452 @t270 @t3440)) % 39.97/40.18 (define @t4460 () (not @t4458)) % 39.97/40.18 (define @t4461 () (tptp.xuntil2p8 tptp.s30)) % 39.97/40.18 (define @t4462 () (or @t2039 @t4461 @t4460)) % 39.97/40.18 (define @t4463 () (not @t4461)) % 39.97/40.18 (define @t4464 () (or @t4443 @t2047 @t4463)) % 39.97/40.18 (define @t4465 () (@list tptp.s99 tptp.s29)) % 39.97/40.18 (define @t4466 () (tptp.node2 tptp.s99 tptp.s29)) % 39.97/40.18 (define @t4467 () (not @t176)) % 39.97/40.18 (define @t4468 () (or @t4467 @t4466)) % 39.97/40.18 (define @t4469 () (@list tptp.s29 tptp.s99)) % 39.97/40.18 (define @t4470 () (or @t2067 @t4467 @t244)) % 39.97/40.18 (define @t4471 () (not @t4466)) % 39.97/40.18 (define @t4472 () (or @t265 @t264 @t2078 @t4471)) % 39.97/40.18 (define @t4473 () (tptp.until2p7 tptp.s29)) % 39.97/40.18 (define @t4474 () (or @t4473 @t4467 @t270 @t3440)) % 39.97/40.18 (define @t4475 () (not @t4473)) % 39.97/40.18 (define @t4476 () (tptp.xuntil2p8 tptp.s29)) % 39.97/40.18 (define @t4477 () (or @t2065 @t4476 @t4475)) % 39.97/40.18 (define @t4478 () (not @t4476)) % 39.97/40.18 (define @t4479 () (or @t4458 @t2073 @t4478)) % 39.97/40.18 (define @t4480 () (@list tptp.s99 tptp.s28)) % 39.97/40.18 (define @t4481 () (tptp.node2 tptp.s99 tptp.s28)) % 39.97/40.18 (define @t4482 () (not @t177)) % 39.97/40.18 (define @t4483 () (or @t4482 @t4481)) % 39.97/40.18 (define @t4484 () (@list tptp.s28 tptp.s99)) % 39.97/40.18 (define @t4485 () (or @t2093 @t4482 @t244)) % 39.97/40.18 (define @t4486 () (not @t4481)) % 39.97/40.18 (define @t4487 () (or @t265 @t264 @t2104 @t4486)) % 39.97/40.18 (define @t4488 () (tptp.until2p7 tptp.s28)) % 39.97/40.18 (define @t4489 () (or @t4488 @t4482 @t270 @t3440)) % 39.97/40.18 (define @t4490 () (not @t4488)) % 39.97/40.18 (define @t4491 () (tptp.xuntil2p8 tptp.s28)) % 39.97/40.18 (define @t4492 () (or @t2091 @t4491 @t4490)) % 39.97/40.18 (define @t4493 () (not @t4491)) % 39.97/40.18 (define @t4494 () (or @t4473 @t2099 @t4493)) % 39.97/40.18 (define @t4495 () (@list tptp.s99 tptp.s27)) % 39.97/40.18 (define @t4496 () (tptp.node2 tptp.s99 tptp.s27)) % 39.97/40.18 (define @t4497 () (not @t178)) % 39.97/40.18 (define @t4498 () (or @t4497 @t4496)) % 39.97/40.18 (define @t4499 () (@list tptp.s27 tptp.s99)) % 39.97/40.18 (define @t4500 () (or @t2119 @t4497 @t244)) % 39.97/40.18 (define @t4501 () (not @t4496)) % 39.97/40.18 (define @t4502 () (or @t265 @t264 @t2130 @t4501)) % 39.97/40.18 (define @t4503 () (tptp.until2p7 tptp.s27)) % 39.97/40.18 (define @t4504 () (or @t4503 @t4497 @t270 @t3440)) % 39.97/40.18 (define @t4505 () (not @t4503)) % 39.97/40.18 (define @t4506 () (tptp.xuntil2p8 tptp.s27)) % 39.97/40.18 (define @t4507 () (or @t2117 @t4506 @t4505)) % 39.97/40.18 (define @t4508 () (not @t4506)) % 39.97/40.18 (define @t4509 () (or @t4488 @t2125 @t4508)) % 39.97/40.18 (define @t4510 () (@list tptp.s99 tptp.s26)) % 39.97/40.18 (define @t4511 () (tptp.node2 tptp.s99 tptp.s26)) % 39.97/40.18 (define @t4512 () (not @t179)) % 39.97/40.18 (define @t4513 () (or @t4512 @t4511)) % 39.97/40.18 (define @t4514 () (@list tptp.s26 tptp.s99)) % 39.97/40.18 (define @t4515 () (or @t2145 @t4512 @t244)) % 39.97/40.18 (define @t4516 () (not @t4511)) % 39.97/40.18 (define @t4517 () (or @t265 @t264 @t2156 @t4516)) % 39.97/40.18 (define @t4518 () (tptp.until2p7 tptp.s26)) % 39.97/40.18 (define @t4519 () (or @t4518 @t4512 @t270 @t3440)) % 39.97/40.18 (define @t4520 () (not @t4518)) % 39.97/40.18 (define @t4521 () (tptp.xuntil2p8 tptp.s26)) % 39.97/40.18 (define @t4522 () (or @t2143 @t4521 @t4520)) % 39.97/40.18 (define @t4523 () (not @t4521)) % 39.97/40.18 (define @t4524 () (or @t4503 @t2151 @t4523)) % 39.97/40.18 (define @t4525 () (@list tptp.s99 tptp.s25)) % 39.97/40.18 (define @t4526 () (tptp.node2 tptp.s99 tptp.s25)) % 39.97/40.18 (define @t4527 () (not @t180)) % 39.97/40.18 (define @t4528 () (or @t4527 @t4526)) % 39.97/40.18 (define @t4529 () (@list tptp.s25 tptp.s99)) % 39.97/40.18 (define @t4530 () (or @t2171 @t4527 @t244)) % 39.97/40.18 (define @t4531 () (not @t4526)) % 39.97/40.18 (define @t4532 () (or @t265 @t264 @t2182 @t4531)) % 39.97/40.18 (define @t4533 () (tptp.until2p7 tptp.s25)) % 39.97/40.18 (define @t4534 () (or @t4533 @t4527 @t270 @t3440)) % 39.97/40.18 (define @t4535 () (not @t4533)) % 39.97/40.18 (define @t4536 () (tptp.xuntil2p8 tptp.s25)) % 39.97/40.18 (define @t4537 () (or @t2169 @t4536 @t4535)) % 39.97/40.18 (define @t4538 () (not @t4536)) % 39.97/40.18 (define @t4539 () (or @t4518 @t2177 @t4538)) % 39.97/40.18 (define @t4540 () (@list tptp.s99 tptp.s24)) % 39.97/40.18 (define @t4541 () (tptp.node2 tptp.s99 tptp.s24)) % 39.97/40.18 (define @t4542 () (not @t181)) % 39.97/40.18 (define @t4543 () (or @t4542 @t4541)) % 39.97/40.18 (define @t4544 () (@list tptp.s24 tptp.s99)) % 39.97/40.18 (define @t4545 () (or @t2197 @t4542 @t244)) % 39.97/40.18 (define @t4546 () (not @t4541)) % 39.97/40.18 (define @t4547 () (or @t265 @t264 @t2208 @t4546)) % 39.97/40.18 (define @t4548 () (tptp.until2p7 tptp.s24)) % 39.97/40.18 (define @t4549 () (or @t4548 @t4542 @t270 @t3440)) % 39.97/40.18 (define @t4550 () (not @t4548)) % 39.97/40.18 (define @t4551 () (tptp.xuntil2p8 tptp.s24)) % 39.97/40.18 (define @t4552 () (or @t2195 @t4551 @t4550)) % 39.97/40.18 (define @t4553 () (not @t4551)) % 39.97/40.18 (define @t4554 () (or @t4533 @t2203 @t4553)) % 39.97/40.18 (define @t4555 () (@list tptp.s99 tptp.s23)) % 39.97/40.18 (define @t4556 () (tptp.node2 tptp.s99 tptp.s23)) % 39.97/40.18 (define @t4557 () (not @t182)) % 39.97/40.18 (define @t4558 () (or @t4557 @t4556)) % 39.97/40.18 (define @t4559 () (@list tptp.s23 tptp.s99)) % 39.97/40.18 (define @t4560 () (or @t2223 @t4557 @t244)) % 39.97/40.18 (define @t4561 () (not @t4556)) % 39.97/40.18 (define @t4562 () (or @t265 @t264 @t2234 @t4561)) % 39.97/40.18 (define @t4563 () (tptp.until2p7 tptp.s23)) % 39.97/40.18 (define @t4564 () (or @t4563 @t4557 @t270 @t3440)) % 39.97/40.18 (define @t4565 () (not @t4563)) % 39.97/40.18 (define @t4566 () (tptp.xuntil2p8 tptp.s23)) % 39.97/40.18 (define @t4567 () (or @t2221 @t4566 @t4565)) % 39.97/40.18 (define @t4568 () (not @t4566)) % 39.97/40.18 (define @t4569 () (or @t4548 @t2229 @t4568)) % 39.97/40.18 (define @t4570 () (@list tptp.s99 tptp.s22)) % 39.97/40.18 (define @t4571 () (tptp.node2 tptp.s99 tptp.s22)) % 39.97/40.18 (define @t4572 () (not @t183)) % 39.97/40.18 (define @t4573 () (or @t4572 @t4571)) % 39.97/40.18 (define @t4574 () (@list tptp.s22 tptp.s99)) % 39.97/40.18 (define @t4575 () (or @t2249 @t4572 @t244)) % 39.97/40.18 (define @t4576 () (not @t4571)) % 39.97/40.18 (define @t4577 () (or @t265 @t264 @t2260 @t4576)) % 39.97/40.18 (define @t4578 () (tptp.until2p7 tptp.s22)) % 39.97/40.18 (define @t4579 () (or @t4578 @t4572 @t270 @t3440)) % 39.97/40.18 (define @t4580 () (not @t4578)) % 39.97/40.18 (define @t4581 () (tptp.xuntil2p8 tptp.s22)) % 39.97/40.18 (define @t4582 () (or @t2247 @t4581 @t4580)) % 39.97/40.18 (define @t4583 () (not @t4581)) % 39.97/40.18 (define @t4584 () (or @t4563 @t2255 @t4583)) % 39.97/40.18 (define @t4585 () (@list tptp.s99 tptp.s21)) % 39.97/40.18 (define @t4586 () (tptp.node2 tptp.s99 tptp.s21)) % 39.97/40.18 (define @t4587 () (not @t184)) % 39.97/40.18 (define @t4588 () (or @t4587 @t4586)) % 39.97/40.18 (define @t4589 () (@list tptp.s21 tptp.s99)) % 39.97/40.18 (define @t4590 () (or @t2275 @t4587 @t244)) % 39.97/40.18 (define @t4591 () (not @t4586)) % 39.97/40.18 (define @t4592 () (or @t265 @t264 @t2286 @t4591)) % 39.97/40.18 (define @t4593 () (tptp.until2p7 tptp.s21)) % 39.97/40.18 (define @t4594 () (or @t4593 @t4587 @t270 @t3440)) % 39.97/40.18 (define @t4595 () (not @t4593)) % 39.97/40.18 (define @t4596 () (tptp.xuntil2p8 tptp.s21)) % 39.97/40.18 (define @t4597 () (or @t2273 @t4596 @t4595)) % 39.97/40.18 (define @t4598 () (not @t4596)) % 39.97/40.18 (define @t4599 () (or @t4578 @t2281 @t4598)) % 39.97/40.18 (define @t4600 () (@list tptp.s99 tptp.s20)) % 39.97/40.18 (define @t4601 () (tptp.node2 tptp.s99 tptp.s20)) % 39.97/40.18 (define @t4602 () (not @t185)) % 39.97/40.18 (define @t4603 () (or @t4602 @t4601)) % 39.97/40.18 (define @t4604 () (@list tptp.s20 tptp.s99)) % 39.97/40.18 (define @t4605 () (or @t2301 @t4602 @t244)) % 39.97/40.18 (define @t4606 () (not @t4601)) % 39.97/40.18 (define @t4607 () (or @t265 @t264 @t2312 @t4606)) % 39.97/40.18 (define @t4608 () (tptp.until2p7 tptp.s20)) % 39.97/40.18 (define @t4609 () (or @t4608 @t4602 @t270 @t3440)) % 39.97/40.18 (define @t4610 () (not @t4608)) % 39.97/40.18 (define @t4611 () (tptp.xuntil2p8 tptp.s20)) % 39.97/40.18 (define @t4612 () (or @t2299 @t4611 @t4610)) % 39.97/40.18 (define @t4613 () (not @t4611)) % 39.97/40.18 (define @t4614 () (or @t4593 @t2307 @t4613)) % 39.97/40.18 (define @t4615 () (@list tptp.s99 tptp.s19)) % 39.97/40.18 (define @t4616 () (tptp.node2 tptp.s99 tptp.s19)) % 39.97/40.18 (define @t4617 () (not @t186)) % 39.97/40.18 (define @t4618 () (or @t4617 @t4616)) % 39.97/40.18 (define @t4619 () (@list tptp.s19 tptp.s99)) % 39.97/40.18 (define @t4620 () (or @t2327 @t4617 @t244)) % 39.97/40.18 (define @t4621 () (not @t4616)) % 39.97/40.18 (define @t4622 () (or @t265 @t264 @t2338 @t4621)) % 39.97/40.18 (define @t4623 () (tptp.until2p7 tptp.s19)) % 39.97/40.18 (define @t4624 () (or @t4623 @t4617 @t270 @t3440)) % 39.97/40.18 (define @t4625 () (not @t4623)) % 39.97/40.18 (define @t4626 () (tptp.xuntil2p8 tptp.s19)) % 39.97/40.18 (define @t4627 () (or @t2325 @t4626 @t4625)) % 39.97/40.18 (define @t4628 () (not @t4626)) % 39.97/40.18 (define @t4629 () (or @t4608 @t2333 @t4628)) % 39.97/40.18 (define @t4630 () (@list tptp.s99 tptp.s18)) % 39.97/40.18 (define @t4631 () (tptp.node2 tptp.s99 tptp.s18)) % 39.97/40.18 (define @t4632 () (not @t187)) % 39.97/40.18 (define @t4633 () (or @t4632 @t4631)) % 39.97/40.18 (define @t4634 () (@list tptp.s18 tptp.s99)) % 39.97/40.18 (define @t4635 () (or @t2353 @t4632 @t244)) % 39.97/40.18 (define @t4636 () (not @t4631)) % 39.97/40.18 (define @t4637 () (or @t265 @t264 @t2364 @t4636)) % 39.97/40.18 (define @t4638 () (tptp.until2p7 tptp.s18)) % 39.97/40.18 (define @t4639 () (or @t4638 @t4632 @t270 @t3440)) % 39.97/40.18 (define @t4640 () (not @t4638)) % 39.97/40.18 (define @t4641 () (tptp.xuntil2p8 tptp.s18)) % 39.97/40.18 (define @t4642 () (or @t2351 @t4641 @t4640)) % 39.97/40.18 (define @t4643 () (not @t4641)) % 39.97/40.18 (define @t4644 () (or @t4623 @t2359 @t4643)) % 39.97/40.18 (define @t4645 () (@list tptp.s99 tptp.s17)) % 39.97/40.18 (define @t4646 () (tptp.node2 tptp.s99 tptp.s17)) % 39.97/40.18 (define @t4647 () (not @t188)) % 39.97/40.18 (define @t4648 () (or @t4647 @t4646)) % 39.97/40.18 (define @t4649 () (@list tptp.s17 tptp.s99)) % 39.97/40.18 (define @t4650 () (or @t2379 @t4647 @t244)) % 39.97/40.18 (define @t4651 () (not @t4646)) % 39.97/40.18 (define @t4652 () (or @t265 @t264 @t2390 @t4651)) % 39.97/40.18 (define @t4653 () (tptp.until2p7 tptp.s17)) % 39.97/40.18 (define @t4654 () (or @t4653 @t4647 @t270 @t3440)) % 39.97/40.18 (define @t4655 () (not @t4653)) % 39.97/40.18 (define @t4656 () (tptp.xuntil2p8 tptp.s17)) % 39.97/40.18 (define @t4657 () (or @t2377 @t4656 @t4655)) % 39.97/40.18 (define @t4658 () (not @t4656)) % 39.97/40.18 (define @t4659 () (or @t4638 @t2385 @t4658)) % 39.97/40.18 (define @t4660 () (@list tptp.s99 tptp.s16)) % 39.97/40.18 (define @t4661 () (tptp.node2 tptp.s99 tptp.s16)) % 39.97/40.18 (define @t4662 () (not @t189)) % 39.97/40.18 (define @t4663 () (or @t4662 @t4661)) % 39.97/40.18 (define @t4664 () (@list tptp.s16 tptp.s99)) % 39.97/40.18 (define @t4665 () (or @t2405 @t4662 @t244)) % 39.97/40.18 (define @t4666 () (not @t4661)) % 39.97/40.18 (define @t4667 () (or @t265 @t264 @t2416 @t4666)) % 39.97/40.18 (define @t4668 () (tptp.until2p7 tptp.s16)) % 39.97/40.18 (define @t4669 () (or @t4668 @t4662 @t270 @t3440)) % 39.97/40.18 (define @t4670 () (not @t4668)) % 39.97/40.18 (define @t4671 () (tptp.xuntil2p8 tptp.s16)) % 39.97/40.18 (define @t4672 () (or @t2403 @t4671 @t4670)) % 39.97/40.18 (define @t4673 () (not @t4671)) % 39.97/40.18 (define @t4674 () (or @t4653 @t2411 @t4673)) % 39.97/40.18 (define @t4675 () (@list tptp.s99 tptp.s15)) % 39.97/40.18 (define @t4676 () (tptp.node2 tptp.s99 tptp.s15)) % 39.97/40.18 (define @t4677 () (not @t190)) % 39.97/40.18 (define @t4678 () (or @t4677 @t4676)) % 39.97/40.18 (define @t4679 () (@list tptp.s15 tptp.s99)) % 39.97/40.18 (define @t4680 () (or @t2431 @t4677 @t244)) % 39.97/40.18 (define @t4681 () (not @t4676)) % 39.97/40.18 (define @t4682 () (or @t265 @t264 @t2442 @t4681)) % 39.97/40.18 (define @t4683 () (tptp.until2p7 tptp.s15)) % 39.97/40.18 (define @t4684 () (or @t4683 @t4677 @t270 @t3440)) % 39.97/40.18 (define @t4685 () (not @t4683)) % 39.97/40.18 (define @t4686 () (tptp.xuntil2p8 tptp.s15)) % 39.97/40.18 (define @t4687 () (or @t2429 @t4686 @t4685)) % 39.97/40.18 (define @t4688 () (not @t4686)) % 39.97/40.18 (define @t4689 () (or @t4668 @t2437 @t4688)) % 39.97/40.18 (define @t4690 () (@list tptp.s99 tptp.s14)) % 39.97/40.18 (define @t4691 () (tptp.node2 tptp.s99 tptp.s14)) % 39.97/40.18 (define @t4692 () (not @t191)) % 39.97/40.18 (define @t4693 () (or @t4692 @t4691)) % 39.97/40.18 (define @t4694 () (@list tptp.s14 tptp.s99)) % 39.97/40.18 (define @t4695 () (or @t2457 @t4692 @t244)) % 39.97/40.18 (define @t4696 () (not @t4691)) % 39.97/40.18 (define @t4697 () (or @t265 @t264 @t2468 @t4696)) % 39.97/40.18 (define @t4698 () (tptp.until2p7 tptp.s14)) % 39.97/40.18 (define @t4699 () (or @t4698 @t4692 @t270 @t3440)) % 39.97/40.18 (define @t4700 () (not @t4698)) % 39.97/40.18 (define @t4701 () (tptp.xuntil2p8 tptp.s14)) % 39.97/40.18 (define @t4702 () (or @t2455 @t4701 @t4700)) % 39.97/40.18 (define @t4703 () (not @t4701)) % 39.97/40.18 (define @t4704 () (or @t4683 @t2463 @t4703)) % 39.97/40.18 (define @t4705 () (@list tptp.s99 tptp.s13)) % 39.97/40.18 (define @t4706 () (tptp.node2 tptp.s99 tptp.s13)) % 39.97/40.18 (define @t4707 () (not @t192)) % 39.97/40.18 (define @t4708 () (or @t4707 @t4706)) % 39.97/40.18 (define @t4709 () (@list tptp.s13 tptp.s99)) % 39.97/40.18 (define @t4710 () (or @t2483 @t4707 @t244)) % 39.97/40.18 (define @t4711 () (not @t4706)) % 39.97/40.18 (define @t4712 () (or @t265 @t264 @t2494 @t4711)) % 39.97/40.18 (define @t4713 () (tptp.until2p7 tptp.s13)) % 39.97/40.18 (define @t4714 () (or @t4713 @t4707 @t270 @t3440)) % 39.97/40.18 (define @t4715 () (not @t4713)) % 39.97/40.18 (define @t4716 () (tptp.xuntil2p8 tptp.s13)) % 39.97/40.18 (define @t4717 () (or @t2481 @t4716 @t4715)) % 39.97/40.18 (define @t4718 () (not @t4716)) % 39.97/40.18 (define @t4719 () (or @t4698 @t2489 @t4718)) % 39.97/40.18 (define @t4720 () (@list tptp.s99 tptp.s12)) % 39.97/40.18 (define @t4721 () (tptp.node2 tptp.s99 tptp.s12)) % 39.97/40.18 (define @t4722 () (not @t193)) % 39.97/40.18 (define @t4723 () (or @t4722 @t4721)) % 39.97/40.18 (define @t4724 () (@list tptp.s12 tptp.s99)) % 39.97/40.18 (define @t4725 () (or @t2509 @t4722 @t244)) % 39.97/40.18 (define @t4726 () (not @t4721)) % 39.97/40.18 (define @t4727 () (or @t265 @t264 @t2520 @t4726)) % 39.97/40.18 (define @t4728 () (tptp.until2p7 tptp.s12)) % 39.97/40.18 (define @t4729 () (or @t4728 @t4722 @t270 @t3440)) % 39.97/40.18 (define @t4730 () (not @t4728)) % 39.97/40.18 (define @t4731 () (tptp.xuntil2p8 tptp.s12)) % 39.97/40.18 (define @t4732 () (or @t2507 @t4731 @t4730)) % 39.97/40.18 (define @t4733 () (not @t4731)) % 39.97/40.18 (define @t4734 () (or @t4713 @t2515 @t4733)) % 39.97/40.18 (define @t4735 () (@list tptp.s99 tptp.s11)) % 39.97/40.18 (define @t4736 () (tptp.node2 tptp.s99 tptp.s11)) % 39.97/40.18 (define @t4737 () (not @t194)) % 39.97/40.18 (define @t4738 () (or @t4737 @t4736)) % 39.97/40.18 (define @t4739 () (@list tptp.s11 tptp.s99)) % 39.97/40.18 (define @t4740 () (or @t2535 @t4737 @t244)) % 39.97/40.18 (define @t4741 () (not @t4736)) % 39.97/40.18 (define @t4742 () (or @t265 @t264 @t2546 @t4741)) % 39.97/40.18 (define @t4743 () (tptp.until2p7 tptp.s11)) % 39.97/40.18 (define @t4744 () (or @t4743 @t4737 @t270 @t3440)) % 39.97/40.18 (define @t4745 () (not @t4743)) % 39.97/40.18 (define @t4746 () (tptp.xuntil2p8 tptp.s11)) % 39.97/40.18 (define @t4747 () (or @t2533 @t4746 @t4745)) % 39.97/40.18 (define @t4748 () (not @t4746)) % 39.97/40.18 (define @t4749 () (or @t4728 @t2541 @t4748)) % 39.97/40.18 (define @t4750 () (@list tptp.s99 tptp.s10)) % 39.97/40.18 (define @t4751 () (tptp.node2 tptp.s99 tptp.s10)) % 39.97/40.18 (define @t4752 () (not @t195)) % 39.97/40.18 (define @t4753 () (or @t4752 @t4751)) % 39.97/40.18 (define @t4754 () (@list tptp.s10 tptp.s99)) % 39.97/40.18 (define @t4755 () (or @t2561 @t4752 @t244)) % 39.97/40.18 (define @t4756 () (not @t4751)) % 39.97/40.18 (define @t4757 () (or @t265 @t264 @t2572 @t4756)) % 39.97/40.18 (define @t4758 () (tptp.until2p7 tptp.s10)) % 39.97/40.18 (define @t4759 () (or @t4758 @t4752 @t270 @t3440)) % 39.97/40.18 (define @t4760 () (not @t4758)) % 39.97/40.18 (define @t4761 () (tptp.xuntil2p8 tptp.s10)) % 39.97/40.18 (define @t4762 () (or @t2559 @t4761 @t4760)) % 39.97/40.18 (define @t4763 () (not @t4761)) % 39.97/40.18 (define @t4764 () (or @t4743 @t2567 @t4763)) % 39.97/40.18 (define @t4765 () (@list tptp.s99 tptp.s9)) % 39.97/40.18 (define @t4766 () (tptp.node2 tptp.s99 tptp.s9)) % 39.97/40.18 (define @t4767 () (not @t196)) % 39.97/40.18 (define @t4768 () (or @t4767 @t4766)) % 39.97/40.18 (define @t4769 () (@list tptp.s9 tptp.s99)) % 39.97/40.18 (define @t4770 () (or @t2587 @t4767 @t244)) % 39.97/40.18 (define @t4771 () (not @t4766)) % 39.97/40.18 (define @t4772 () (or @t265 @t264 @t2598 @t4771)) % 39.97/40.18 (define @t4773 () (tptp.until2p7 tptp.s9)) % 39.97/40.18 (define @t4774 () (or @t4773 @t4767 @t270 @t3440)) % 39.97/40.18 (define @t4775 () (not @t4773)) % 39.97/40.18 (define @t4776 () (tptp.xuntil2p8 tptp.s9)) % 39.97/40.18 (define @t4777 () (or @t2585 @t4776 @t4775)) % 39.97/40.18 (define @t4778 () (not @t4776)) % 39.97/40.18 (define @t4779 () (or @t4758 @t2593 @t4778)) % 39.97/40.18 (define @t4780 () (@list tptp.s99 tptp.s8)) % 39.97/40.18 (define @t4781 () (tptp.node2 tptp.s99 tptp.s8)) % 39.97/40.18 (define @t4782 () (not @t197)) % 39.97/40.18 (define @t4783 () (or @t4782 @t4781)) % 39.97/40.18 (define @t4784 () (@list tptp.s8 tptp.s99)) % 39.97/40.18 (define @t4785 () (or @t2613 @t4782 @t244)) % 39.97/40.18 (define @t4786 () (not @t4781)) % 39.97/40.18 (define @t4787 () (or @t265 @t264 @t2624 @t4786)) % 39.97/40.18 (define @t4788 () (tptp.until2p7 tptp.s8)) % 39.97/40.18 (define @t4789 () (or @t4788 @t4782 @t270 @t3440)) % 39.97/40.18 (define @t4790 () (not @t4788)) % 39.97/40.18 (define @t4791 () (tptp.xuntil2p8 tptp.s8)) % 39.97/40.18 (define @t4792 () (or @t2611 @t4791 @t4790)) % 39.97/40.18 (define @t4793 () (not @t4791)) % 39.97/40.18 (define @t4794 () (or @t4773 @t2619 @t4793)) % 39.97/40.18 (define @t4795 () (@list tptp.s99 tptp.s7)) % 39.97/40.18 (define @t4796 () (tptp.node2 tptp.s99 tptp.s7)) % 39.97/40.18 (define @t4797 () (not @t198)) % 39.97/40.18 (define @t4798 () (or @t4797 @t4796)) % 39.97/40.18 (define @t4799 () (@list tptp.s7 tptp.s99)) % 39.97/40.18 (define @t4800 () (or @t2639 @t4797 @t244)) % 39.97/40.18 (define @t4801 () (not @t4796)) % 39.97/40.18 (define @t4802 () (or @t265 @t264 @t2650 @t4801)) % 39.97/40.18 (define @t4803 () (tptp.until2p7 tptp.s7)) % 39.97/40.18 (define @t4804 () (or @t4803 @t4797 @t270 @t3440)) % 39.97/40.18 (define @t4805 () (not @t4803)) % 39.97/40.18 (define @t4806 () (tptp.xuntil2p8 tptp.s7)) % 39.97/40.18 (define @t4807 () (or @t2637 @t4806 @t4805)) % 39.97/40.18 (define @t4808 () (not @t4806)) % 39.97/40.18 (define @t4809 () (or @t4788 @t2645 @t4808)) % 39.97/40.18 (define @t4810 () (@list tptp.s99 tptp.s6)) % 39.97/40.18 (define @t4811 () (tptp.node2 tptp.s99 tptp.s6)) % 39.97/40.18 (define @t4812 () (not @t199)) % 39.97/40.18 (define @t4813 () (or @t4812 @t4811)) % 39.97/40.18 (define @t4814 () (@list tptp.s6 tptp.s99)) % 39.97/40.18 (define @t4815 () (or @t2665 @t4812 @t244)) % 39.97/40.18 (define @t4816 () (not @t4811)) % 39.97/40.18 (define @t4817 () (or @t265 @t264 @t2676 @t4816)) % 39.97/40.18 (define @t4818 () (tptp.until2p7 tptp.s6)) % 39.97/40.18 (define @t4819 () (or @t4818 @t4812 @t270 @t3440)) % 39.97/40.18 (define @t4820 () (not @t4818)) % 39.97/40.18 (define @t4821 () (tptp.xuntil2p8 tptp.s6)) % 39.97/40.18 (define @t4822 () (or @t2663 @t4821 @t4820)) % 39.97/40.18 (define @t4823 () (not @t4821)) % 39.97/40.18 (define @t4824 () (or @t4803 @t2671 @t4823)) % 39.97/40.18 (define @t4825 () (@list tptp.s99 tptp.s5)) % 39.97/40.18 (define @t4826 () (tptp.node2 tptp.s99 tptp.s5)) % 39.97/40.18 (define @t4827 () (not @t200)) % 39.97/40.18 (define @t4828 () (or @t4827 @t4826)) % 39.97/40.18 (define @t4829 () (@list tptp.s5 tptp.s99)) % 39.97/40.18 (define @t4830 () (or @t2691 @t4827 @t244)) % 39.97/40.18 (define @t4831 () (not @t4826)) % 39.97/40.18 (define @t4832 () (or @t265 @t264 @t2702 @t4831)) % 39.97/40.18 (define @t4833 () (tptp.until2p7 tptp.s5)) % 39.97/40.18 (define @t4834 () (or @t4833 @t4827 @t270 @t3440)) % 39.97/40.18 (define @t4835 () (not @t4833)) % 39.97/40.18 (define @t4836 () (tptp.xuntil2p8 tptp.s5)) % 39.97/40.18 (define @t4837 () (or @t2689 @t4836 @t4835)) % 39.97/40.18 (define @t4838 () (not @t4836)) % 39.97/40.18 (define @t4839 () (or @t4818 @t2697 @t4838)) % 39.97/40.18 (define @t4840 () (@list tptp.s99 tptp.s4)) % 39.97/40.18 (define @t4841 () (tptp.node2 tptp.s99 tptp.s4)) % 39.97/40.18 (define @t4842 () (not @t201)) % 39.97/40.18 (define @t4843 () (or @t4842 @t4841)) % 39.97/40.18 (define @t4844 () (@list tptp.s4 tptp.s99)) % 39.97/40.18 (define @t4845 () (or @t2717 @t4842 @t244)) % 39.97/40.18 (define @t4846 () (not @t4841)) % 39.97/40.18 (define @t4847 () (or @t265 @t264 @t2728 @t4846)) % 39.97/40.18 (define @t4848 () (tptp.until2p7 tptp.s4)) % 39.97/40.18 (define @t4849 () (or @t4848 @t4842 @t270 @t3440)) % 39.97/40.18 (define @t4850 () (not @t4848)) % 39.97/40.18 (define @t4851 () (tptp.xuntil2p8 tptp.s4)) % 39.97/40.18 (define @t4852 () (or @t2715 @t4851 @t4850)) % 39.97/40.18 (define @t4853 () (not @t4851)) % 39.97/40.18 (define @t4854 () (or @t4833 @t2723 @t4853)) % 39.97/40.18 (define @t4855 () (@list tptp.s99 tptp.s3)) % 39.97/40.18 (define @t4856 () (tptp.node2 tptp.s99 tptp.s3)) % 39.97/40.18 (define @t4857 () (not @t202)) % 39.97/40.18 (define @t4858 () (or @t4857 @t4856)) % 39.97/40.18 (define @t4859 () (@list tptp.s3 tptp.s99)) % 39.97/40.18 (define @t4860 () (or @t2743 @t4857 @t244)) % 39.97/40.18 (define @t4861 () (not @t4856)) % 39.97/40.18 (define @t4862 () (or @t265 @t264 @t2754 @t4861)) % 39.97/40.18 (define @t4863 () (tptp.until2p7 tptp.s3)) % 39.97/40.18 (define @t4864 () (or @t4863 @t4857 @t270 @t3440)) % 39.97/40.18 (define @t4865 () (not @t4863)) % 39.97/40.18 (define @t4866 () (tptp.xuntil2p8 tptp.s3)) % 39.97/40.18 (define @t4867 () (or @t2741 @t4866 @t4865)) % 39.97/40.18 (define @t4868 () (not @t4866)) % 39.97/40.18 (define @t4869 () (or @t4848 @t2749 @t4868)) % 39.97/40.18 (define @t4870 () (@list tptp.s99 tptp.s2)) % 39.97/40.18 (define @t4871 () (tptp.node2 tptp.s99 tptp.s2)) % 39.97/40.18 (define @t4872 () (not @t203)) % 39.97/40.18 (define @t4873 () (or @t4872 @t4871)) % 39.97/40.18 (define @t4874 () (@list tptp.s2 tptp.s99)) % 39.97/40.18 (define @t4875 () (or @t2769 @t4872 @t244)) % 39.97/40.18 (define @t4876 () (not @t4871)) % 39.97/40.18 (define @t4877 () (or @t265 @t264 @t2780 @t4876)) % 39.97/40.18 (define @t4878 () (tptp.until2p7 tptp.s2)) % 39.97/40.18 (define @t4879 () (or @t4878 @t4872 @t270 @t3440)) % 39.97/40.18 (define @t4880 () (not @t4878)) % 39.97/40.18 (define @t4881 () (tptp.xuntil2p8 tptp.s2)) % 39.97/40.18 (define @t4882 () (or @t2767 @t4881 @t4880)) % 39.97/40.18 (define @t4883 () (not @t4881)) % 39.97/40.18 (define @t4884 () (or @t4863 @t2775 @t4883)) % 39.97/40.18 (define @t4885 () (@list tptp.s99 tptp.s1)) % 39.97/40.18 (define @t4886 () (tptp.node2 tptp.s99 tptp.s1)) % 39.97/40.18 (define @t4887 () (not @t204)) % 39.97/40.18 (define @t4888 () (or @t4887 @t4886)) % 39.97/40.18 (define @t4889 () (@list tptp.s1 tptp.s99)) % 39.97/40.18 (define @t4890 () (or @t2795 @t4887 @t244)) % 39.97/40.18 (define @t4891 () (not @t4886)) % 39.97/40.18 (define @t4892 () (or @t265 @t264 @t2806 @t4891)) % 39.97/40.18 (define @t4893 () (tptp.until2p7 tptp.s1)) % 39.97/40.18 (define @t4894 () (or @t4893 @t4887 @t270 @t3440)) % 39.97/40.18 (define @t4895 () (not @t4893)) % 39.97/40.18 (define @t4896 () (tptp.xuntil2p8 tptp.s1)) % 39.97/40.18 (define @t4897 () (or @t2793 @t4896 @t4895)) % 39.97/40.18 (define @t4898 () (not @t4896)) % 39.97/40.18 (define @t4899 () (or @t4878 @t2801 @t4898)) % 39.97/40.18 (define @t4900 () (@list tptp.s99 tptp.s0)) % 39.97/40.18 (define @t4901 () (tptp.node2 tptp.s99 tptp.s0)) % 39.97/40.18 (define @t4902 () (not @t205)) % 39.97/40.18 (define @t4903 () (or @t4902 @t4901)) % 39.97/40.18 (define @t4904 () (tptp.m_main_v_state tptp.s0 tptp.c_busy)) % 39.97/40.18 (define @t4905 () (not @t4904)) % 39.97/40.18 (define @t4906 () (or @t2834 @t4905)) % 39.97/40.18 (define @t4907 () (not @t4901)) % 39.97/40.18 (define @t4908 () (or @t265 @t264 @t4904 @t4907)) % 39.97/40.18 (define @t4909 () (tptp.until2p7 tptp.s0)) % 39.97/40.18 (define @t4910 () (or @t4909 @t4902 @t270 @t3440)) % 39.97/40.18 (define @t4911 () (not @t4909)) % 39.97/40.18 (define @t4912 () (tptp.xuntil2p8 tptp.s0)) % 39.97/40.18 (define @t4913 () (or @t2819 @t4912 @t4911)) % 39.97/40.18 (define @t4914 () (not @t4912)) % 39.97/40.18 (define @t4915 () (or @t4893 @t2827 @t4914)) % 39.97/40.18 (define @t4916 () (or @t222 @t223)) % 39.97/40.18 (define @t4917 () (forall @t208 @t4916)) % 39.97/40.18 (define @t4918 () (or tptp.loop @t4916)) % 39.97/40.18 (define @t4919 () (or @t223 @t229)) % 39.97/40.18 (define @t4920 () (forall @t208 @t4919)) % 39.97/40.18 (define @t4921 () (or tptp.loop @t4919)) % 39.97/40.18 (define @t4922 () (or @t244 @t270)) % 39.97/40.18 (define @t4923 () (or @t270 @t3440)) % 39.97/40.18 (define @t4924 () (tptp.node2 tptp.s99 tptp.s99)) % 39.97/40.18 (define @t4925 () (not @t106)) % 39.97/40.18 (define @t4926 () (or @t4925 @t4924)) % 39.97/40.18 (define @t4927 () (not @t4924)) % 39.97/40.18 (define @t4928 () (or @t265 @t264 @t245 @t4927)) % 39.97/40.18 (define @t4929 () (or @t273 @t4925 @t270 @t3440)) % 39.97/40.18 (define @t4930 () (not @t4929)) % 39.97/40.18 (assume @p1 @t1) % 39.97/40.18 (assume @p2 @t2) % 39.97/40.18 (assume @p3 @t3) % 39.97/40.18 (assume @p4 @t4) % 39.97/40.18 (assume @p5 @t5) % 39.97/40.18 (assume @p6 @t6) % 39.97/40.18 (assume @p7 @t7) % 39.97/40.18 (assume @p8 @t8) % 39.97/40.18 (assume @p9 @t9) % 39.97/40.18 (assume @p10 @t10) % 39.97/40.18 (assume @p11 @t11) % 39.97/40.18 (assume @p12 @t12) % 39.97/40.18 (assume @p13 @t13) % 39.97/40.18 (assume @p14 @t14) % 39.97/40.18 (assume @p15 @t15) % 39.97/40.18 (assume @p16 @t16) % 39.97/40.18 (assume @p17 @t17) % 39.97/40.18 (assume @p18 @t18) % 39.97/40.18 (assume @p19 @t19) % 39.97/40.18 (assume @p20 @t20) % 39.97/40.18 (assume @p21 @t21) % 39.97/40.18 (assume @p22 @t22) % 39.97/40.18 (assume @p23 @t23) % 39.97/40.18 (assume @p24 @t24) % 39.97/40.18 (assume @p25 @t25) % 39.97/40.18 (assume @p26 @t26) % 39.97/40.18 (assume @p27 @t27) % 39.97/40.18 (assume @p28 @t28) % 39.97/40.18 (assume @p29 @t29) % 39.97/40.18 (assume @p30 @t30) % 39.97/40.18 (assume @p31 @t31) % 39.97/40.18 (assume @p32 @t32) % 39.97/40.18 (assume @p33 @t33) % 39.97/40.18 (assume @p34 @t34) % 39.97/40.18 (assume @p35 @t35) % 39.97/40.18 (assume @p36 @t36) % 39.97/40.18 (assume @p37 @t37) % 39.97/40.18 (assume @p38 @t38) % 39.97/40.18 (assume @p39 @t39) % 39.97/40.18 (assume @p40 @t40) % 39.97/40.18 (assume @p41 @t41) % 39.97/40.18 (assume @p42 @t42) % 39.97/40.18 (assume @p43 @t43) % 39.97/40.18 (assume @p44 @t44) % 39.97/40.18 (assume @p45 @t45) % 39.97/40.18 (assume @p46 @t46) % 39.97/40.18 (assume @p47 @t47) % 39.97/40.18 (assume @p48 @t48) % 39.97/40.18 (assume @p49 @t49) % 39.97/40.18 (assume @p50 @t50) % 39.97/40.18 (assume @p51 @t51) % 39.97/40.18 (assume @p52 @t52) % 39.97/40.18 (assume @p53 @t53) % 39.97/40.18 (assume @p54 @t54) % 39.97/40.18 (assume @p55 @t55) % 39.97/40.18 (assume @p56 @t56) % 39.97/40.18 (assume @p57 @t57) % 39.97/40.18 (assume @p58 @t58) % 39.97/40.18 (assume @p59 @t59) % 39.97/40.18 (assume @p60 @t60) % 39.97/40.18 (assume @p61 @t61) % 39.97/40.18 (assume @p62 @t62) % 39.97/40.18 (assume @p63 @t63) % 39.97/40.18 (assume @p64 @t64) % 39.97/40.18 (assume @p65 @t65) % 39.97/40.18 (assume @p66 @t66) % 39.97/40.18 (assume @p67 @t67) % 39.97/40.18 (assume @p68 @t68) % 39.97/40.18 (assume @p69 @t69) % 39.97/40.18 (assume @p70 @t70) % 39.97/40.18 (assume @p71 @t71) % 39.97/40.18 (assume @p72 @t72) % 39.97/40.18 (assume @p73 @t73) % 39.97/40.18 (assume @p74 @t74) % 39.97/40.18 (assume @p75 @t75) % 39.97/40.18 (assume @p76 @t76) % 39.97/40.18 (assume @p77 @t77) % 39.97/40.18 (assume @p78 @t78) % 39.97/40.18 (assume @p79 @t79) % 39.97/40.18 (assume @p80 @t80) % 39.97/40.18 (assume @p81 @t81) % 39.97/40.18 (assume @p82 @t82) % 39.97/40.18 (assume @p83 @t83) % 39.97/40.18 (assume @p84 @t84) % 39.97/40.18 (assume @p85 @t85) % 39.97/40.18 (assume @p86 @t86) % 39.97/40.18 (assume @p87 @t87) % 39.97/40.18 (assume @p88 @t88) % 39.97/40.18 (assume @p89 @t89) % 39.97/40.18 (assume @p90 @t90) % 39.97/40.18 (assume @p91 @t91) % 39.97/40.18 (assume @p92 @t92) % 39.97/40.18 (assume @p93 @t93) % 39.97/40.18 (assume @p94 @t94) % 39.97/40.18 (assume @p95 @t95) % 39.97/40.18 (assume @p96 @t96) % 39.97/40.18 (assume @p97 @t97) % 39.97/40.18 (assume @p98 @t98) % 39.97/40.18 (assume @p99 @t99) % 39.97/40.18 (assume @p100 @t100) % 39.97/40.18 (assume @p101 (forall @t105 (or @t104 @t103))) % 39.97/40.18 (assume @p102 (or (not tptp.loop) @t205 @t204 @t203 @t202 @t201 @t200 @t199 @t198 @t197 @t196 @t195 @t194 @t193 @t192 @t191 @t190 @t189 @t188 @t187 @t186 @t185 @t184 @t183 @t182 @t181 @t180 @t179 @t178 @t177 @t176 @t175 @t174 @t173 @t172 @t171 @t170 @t169 @t168 @t167 @t166 @t165 @t164 @t163 @t162 @t161 @t160 @t159 @t158 @t157 @t156 @t155 @t154 @t153 @t152 @t151 @t150 @t149 @t148 @t147 @t146 @t145 @t144 @t143 @t142 @t141 @t140 @t139 @t138 @t137 @t136 @t135 @t134 @t133 @t132 @t131 @t130 @t129 @t128 @t127 @t126 @t125 @t124 @t123 @t122 @t121 @t120 @t119 @t118 @t117 @t116 @t115 @t114 @t113 @t112 @t111 @t110 @t109 @t108 @t107 @t106)) % 39.97/40.18 (assume @p103 (forall @t208 (or @t207 @t206))) % 39.97/40.18 (assume @p104 (forall @t208 (or @t210 @t209))) % 39.97/40.18 (assume @p105 @t211) % 39.97/40.18 (assume @p106 (forall @t208 (or @t207 @t213))) % 39.97/40.18 (assume @p107 (forall @t208 (or @t214 @t213))) % 39.97/40.18 (assume @p108 (forall @t105 (or @t210 (not @t214) @t217 @t216))) % 39.97/40.18 (assume @p109 (forall @t218 (or (tptp.m_main_v_state @t101 tptp.c_ready) @t217 @t212 @t216))) % 39.97/40.18 (assume @p110 @t220) % 39.97/40.18 (assume @p111 (forall @t208 (or @t209 @t222))) % 39.97/40.18 (assume @p112 (forall @t218 (or (tptp.always3 @t101) @t219 @t222))) % 39.97/40.18 (assume @p113 @t225) % 39.97/40.18 (assume @p114 (forall @t208 (or @t214 @t227))) % 39.97/40.18 (assume @p115 (forall @t208 (or @t221 @t227))) % 39.97/40.18 (assume @p116 (forall @t208 (or @t226 @t228 (not (tptp.until5 @t102))))) % 39.97/40.18 (assume @p117 (forall @t218 (or (tptp.until5 @t101) @t104 @t229))) % 39.97/40.18 (assume @p118 @t231) % 39.97/40.18 (assume @p119 @t233) % 39.97/40.18 (assume @p120 (forall @t208 (or @t226 @t234 (not (tptp.until2p7 @t102))))) % 39.97/40.18 (assume @p121 (forall @t218 (or @t232 @t104 @t235))) % 39.97/40.18 (assume @p122 (forall @t208 (or @t223 @t235))) % 39.97/40.18 (assume @p123 @t236) % 39.97/40.18 (step @p124 :rule instantiate :premises (@p116) :args (@t237)) % 39.97/40.18 (step @p125 :rule instantiate :premises (@p115) :args (@t237)) % 39.97/40.18 (step @p126 :rule cnf_or_pos :args (@t241)) % 39.97/40.18 (step @p127 :rule reordering :premises (@p126) :args ((or @t240 @t239 (not @t241)))) % 39.97/40.18 (step @p128 :rule instantiate :premises (@p114) :args (@t237)) % 39.97/40.18 (step @p129 :rule cnf_or_pos :args (@t243)) % 39.97/40.18 (step @p130 :rule reordering :premises (@p129) :args ((or @t239 @t242 (not @t243)))) % 39.97/40.18 (step @p131 :rule instantiate :premises (@p111) :args (@t237)) % 39.97/40.18 (step @p132 :rule cnf_or_pos :args (@t247)) % 39.97/40.18 (step @p133 :rule reordering :premises (@p132) :args ((or @t244 @t246 (not @t247)))) % 39.97/40.18 (step @p134 :rule instantiate :premises (@p103) :args (@t237)) % 39.97/40.18 (step @p135 :rule cnf_or_pos :args (@t249)) % 39.97/40.18 (step @p136 :rule reordering :premises (@p135) :args ((or @t245 @t248 (not @t249)))) % 39.97/40.18 (step @p137 :rule instantiate :premises (@p110) :args (@t250)) % 39.97/40.18 (assume-push @p6023 @t220) % 39.97/40.18 (step @p139 :rule instantiate :premises (@p110) :args (@t251)) % 39.97/40.18 (step-pop @p6024 :rule scope :premises (@p139)) % 39.97/40.18 (step @p140 :rule process_scope :premises (@p6024) :args (@t254)) % 39.97/40.18 (step @p142 :rule implies_elim :premises (@p140)) % 39.97/40.18 (step @p143 :rule cnf_or_pos :args (@t254)) % 39.97/40.18 (step @p144 :rule reordering :premises (@p143) :args ((or @t253 @t252 (not @t254)))) % 39.97/40.18 (step @p145 :rule instantiate :premises (@p112) :args (@t255)) % 39.97/40.18 (step @p146 :rule cnf_or_pos :args (@t257)) % 39.97/40.18 (step @p147 :rule reordering :premises (@p146) :args ((or @t253 @t244 @t256 (not @t257)))) % 39.97/40.18 (step @p148 :rule instantiate :premises (@p111) :args (@t258)) % 39.97/40.18 (step @p149 :rule cnf_or_pos :args (@t262)) % 39.97/40.18 (step @p150 :rule reordering :premises (@p149) :args ((or @t259 @t261 (not @t262)))) % 39.97/40.18 (step @p151 :rule instantiate :premises (@p108) :args (@t251)) % 39.97/40.18 (step @p152 :rule cnf_or_pos :args (@t266)) % 39.97/40.18 (step @p153 :rule reordering :premises (@p152) :args ((or @t260 @t265 @t264 @t263 (not @t266)))) % 39.97/40.18 (step @p154 :rule chain_m_resolution :premises (@p153 @p151 @p150 @p148 @p136 @p134 @p147 @p145 @p133 @p131 @p130 @p128 @p127 @p125 @p144 @p142 @p110) :args ((or @t253 @t239) @t267 (@list @t266 @t260 @t262 @t248 @t249 @t256 @t257 @t245 @t247 @t242 @t243 @t240 @t241 @t252 @t254 @t220))) % 39.97/40.18 (step @p155 :rule instantiate :premises (@p122) :args (@t237)) % 39.97/40.18 (step @p156 :rule cnf_or_pos :args (@t271)) % 39.97/40.18 (step @p157 :rule reordering :premises (@p156) :args ((or @t270 @t269 (not @t271)))) % 39.97/40.18 (step @p158 :rule chain_m_resolution :premises (@p157 @p100 @p155) :args (@t269 @t272 (@list @t100 @t271))) % 39.97/40.18 (step @p159 :rule instantiate :premises (@p120) :args (@t237)) % 39.97/40.18 (step @p160 :rule cnf_or_pos :args (@t275)) % 39.97/40.18 (step @p161 :rule reordering :premises (@p160) :args ((or @t268 @t274 @t238 (not @t275)))) % 39.97/40.18 (step @p162 :rule instantiate :premises (@p117) :args (@t251)) % 39.97/40.18 (step @p163 :rule instantiate :premises (@p116) :args (@t258)) % 39.97/40.18 (step @p164 :rule instantiate :premises (@p115) :args (@t258)) % 39.97/40.18 (step @p165 :rule cnf_or_pos :args (@t278)) % 39.97/40.18 (step @p166 :rule reordering :premises (@p165) :args ((or @t256 @t277 (not @t278)))) % 39.97/40.18 (step @p167 :rule instantiate :premises (@p114) :args (@t258)) % 39.97/40.18 (step @p168 :rule cnf_or_pos :args (@t280)) % 39.97/40.18 (step @p169 :rule reordering :premises (@p168) :args ((or @t277 @t279 (not @t280)))) % 39.97/40.18 (step @p170 :rule instantiate :premises (@p101) :args (@t255)) % 39.97/40.18 (step @p171 :rule cnf_or_pos :args (@t283)) % 39.97/40.18 (step @p172 :rule reordering :premises (@p171) :args ((or @t282 @t281 (not @t283)))) % 39.97/40.18 (step @p173 :rule chain_m_resolution :premises (@p172 @p99 @p170) :args (@t281 @t272 (@list @t99 @t283))) % 39.97/40.18 (step @p174 :rule instantiate :premises (@p112) :args (@t251)) % 39.97/40.18 (step @p175 :rule cnf_or_pos :args (@t285)) % 39.97/40.18 (step @p176 :rule reordering :premises (@p175) :args ((or @t240 @t284 @t259 (not @t285)))) % 39.97/40.18 (step @p177 :rule instantiate :premises (@p103) :args (@t258)) % 39.97/40.18 (step @p178 :rule cnf_or_pos :args (@t287)) % 39.97/40.18 (step @p179 :rule reordering :premises (@p178) :args ((or @t260 @t286 (not @t287)))) % 39.97/40.18 (step @p180 :rule instantiate :premises (@p110) :args (@t255)) % 39.97/40.18 (step @p181 :rule cnf_or_pos :args (@t289)) % 39.97/40.18 (step @p182 :rule reordering :premises (@p181) :args ((or @t284 @t288 (not @t289)))) % 39.97/40.18 (step @p183 :rule chain_m_resolution :premises (@p182 @p173 @p180) :args (@t288 @t272 (@list @t281 @t289))) % 39.97/40.18 (step @p184 :rule instantiate :premises (@p108) :args (@t255)) % 39.97/40.18 (step @p185 :rule cnf_or_pos :args (@t293)) % 39.97/40.18 (step @p186 :rule reordering :premises (@p185) :args ((or @t290 @t292 @t291 @t245 (not @t293)))) % 39.97/40.18 (step @p187 :rule chain_m_resolution :premises (@p186 @p184 @p183 @p179 @p177 @p133 @p131 @p150 @p148 @p176 @p174 @p173 @p169 @p167 @p166 @p164) :args (@t277 @t294 (@list @t293 @t288 @t286 @t287 @t245 @t247 @t260 @t262 @t240 @t285 @t281 @t279 @t280 @t256 @t278))) % 39.97/40.18 (step @p188 :rule instantiate :premises (@p117) :args (@t295)) % 39.97/40.18 (step @p189 :rule instantiate :premises (@p116) :args (@t296)) % 39.97/40.18 (step @p190 :rule instantiate :premises (@p115) :args (@t296)) % 39.97/40.18 (step @p191 :rule cnf_or_pos :args (@t300)) % 39.97/40.18 (step @p192 :rule reordering :premises (@p191) :args ((or @t299 @t298 (not @t300)))) % 39.97/40.18 (step @p193 :rule instantiate :premises (@p114) :args (@t296)) % 39.97/40.18 (step @p194 :rule cnf_or_pos :args (@t302)) % 39.97/40.18 (step @p195 :rule reordering :premises (@p194) :args ((or @t298 @t301 (not @t302)))) % 39.97/40.18 (step @p196 :rule instantiate :premises (@p101) :args (@t303)) % 39.97/40.18 (step @p197 :rule cnf_or_pos :args (@t306)) % 39.97/40.18 (step @p198 :rule reordering :premises (@p197) :args ((or @t305 @t304 (not @t306)))) % 39.97/40.18 (step @p199 :rule chain_m_resolution :premises (@p198 @p98 @p196) :args (@t304 @t272 (@list @t98 @t306))) % 39.97/40.18 (step @p200 :rule instantiate :premises (@p112) :args (@t295)) % 39.97/40.18 (step @p201 :rule cnf_or_pos :args (@t309)) % 39.97/40.18 (step @p202 :rule reordering :premises (@p201) :args ((or @t308 @t256 @t307 (not @t309)))) % 39.97/40.18 (step @p203 :rule instantiate :premises (@p111) :args (@t296)) % 39.97/40.18 (step @p204 :rule cnf_or_pos :args (@t312)) % 39.97/40.18 (step @p205 :rule reordering :premises (@p204) :args ((or @t307 @t311 (not @t312)))) % 39.97/40.18 (step @p206 :rule instantiate :premises (@p103) :args (@t296)) % 39.97/40.18 (step @p207 :rule cnf_or_pos :args (@t314)) % 39.97/40.18 (step @p208 :rule reordering :premises (@p207) :args ((or @t310 @t313 (not @t314)))) % 39.97/40.18 (step @p209 :rule instantiate :premises (@p110) :args (@t303)) % 39.97/40.18 (step @p210 :rule cnf_or_pos :args (@t316)) % 39.97/40.18 (step @p211 :rule reordering :premises (@p210) :args ((or @t308 @t315 (not @t316)))) % 39.97/40.18 (step @p212 :rule chain_m_resolution :premises (@p211 @p199 @p209) :args (@t315 @t272 (@list @t304 @t316))) % 39.97/40.18 (step @p213 :rule instantiate :premises (@p108) :args (@t303)) % 39.97/40.18 (step @p214 :rule cnf_or_pos :args (@t320)) % 39.97/40.18 (step @p215 :rule reordering :premises (@p214) :args ((or @t317 @t319 @t318 @t260 (not @t320)))) % 39.97/40.18 (step @p216 :rule chain_m_resolution :premises (@p215 @p213 @p212 @p208 @p206 @p150 @p148 @p205 @p203 @p202 @p200 @p199 @p195 @p193 @p192 @p190) :args (@t298 @t294 (@list @t320 @t315 @t313 @t314 @t260 @t262 @t310 @t312 @t256 @t309 @t304 @t301 @t302 @t299 @t300))) % 39.97/40.18 (step @p217 :rule instantiate :premises (@p117) :args (@t321)) % 39.97/40.18 (step @p218 :rule instantiate :premises (@p116) :args (@t322)) % 39.97/40.18 (step @p219 :rule instantiate :premises (@p115) :args (@t322)) % 39.97/40.18 (step @p220 :rule cnf_or_pos :args (@t326)) % 39.97/40.18 (step @p221 :rule reordering :premises (@p220) :args ((or @t325 @t324 (not @t326)))) % 39.97/40.18 (step @p222 :rule instantiate :premises (@p114) :args (@t322)) % 39.97/40.18 (step @p223 :rule cnf_or_pos :args (@t328)) % 39.97/40.18 (step @p224 :rule reordering :premises (@p223) :args ((or @t324 @t327 (not @t328)))) % 39.97/40.18 (step @p225 :rule instantiate :premises (@p101) :args (@t329)) % 39.97/40.18 (step @p226 :rule cnf_or_pos :args (@t332)) % 39.97/40.18 (step @p227 :rule reordering :premises (@p226) :args ((or @t331 @t330 (not @t332)))) % 39.97/40.18 (step @p228 :rule chain_m_resolution :premises (@p227 @p97 @p225) :args (@t330 @t272 (@list @t97 @t332))) % 39.97/40.18 (step @p229 :rule instantiate :premises (@p112) :args (@t321)) % 39.97/40.18 (step @p230 :rule cnf_or_pos :args (@t335)) % 39.97/40.18 (step @p231 :rule reordering :premises (@p230) :args ((or @t334 @t299 @t333 (not @t335)))) % 39.97/40.18 (step @p232 :rule instantiate :premises (@p111) :args (@t322)) % 39.97/40.18 (step @p233 :rule cnf_or_pos :args (@t338)) % 39.97/40.18 (step @p234 :rule reordering :premises (@p233) :args ((or @t333 @t337 (not @t338)))) % 39.97/40.18 (step @p235 :rule instantiate :premises (@p103) :args (@t322)) % 39.97/40.18 (step @p236 :rule cnf_or_pos :args (@t340)) % 39.97/40.18 (step @p237 :rule reordering :premises (@p236) :args ((or @t336 @t339 (not @t340)))) % 39.97/40.18 (step @p238 :rule instantiate :premises (@p110) :args (@t329)) % 39.97/40.18 (step @p239 :rule cnf_or_pos :args (@t342)) % 39.97/40.18 (step @p240 :rule reordering :premises (@p239) :args ((or @t334 @t341 (not @t342)))) % 39.97/40.18 (step @p241 :rule chain_m_resolution :premises (@p240 @p228 @p238) :args (@t341 @t272 (@list @t330 @t342))) % 39.97/40.18 (step @p242 :rule instantiate :premises (@p108) :args (@t329)) % 39.97/40.18 (step @p243 :rule cnf_or_pos :args (@t346)) % 39.97/40.18 (step @p244 :rule reordering :premises (@p243) :args ((or @t343 @t345 @t344 @t310 (not @t346)))) % 39.97/40.18 (step @p245 :rule chain_m_resolution :premises (@p244 @p242 @p241 @p237 @p235 @p205 @p203 @p234 @p232 @p231 @p229 @p228 @p224 @p222 @p221 @p219) :args (@t324 @t294 (@list @t346 @t341 @t339 @t340 @t310 @t312 @t336 @t338 @t299 @t335 @t330 @t327 @t328 @t325 @t326))) % 39.97/40.18 (step @p246 :rule instantiate :premises (@p117) :args (@t347)) % 39.97/40.18 (step @p247 :rule instantiate :premises (@p116) :args (@t348)) % 39.97/40.18 (step @p248 :rule instantiate :premises (@p115) :args (@t348)) % 39.97/40.18 (step @p249 :rule cnf_or_pos :args (@t352)) % 39.97/40.18 (step @p250 :rule reordering :premises (@p249) :args ((or @t351 @t350 (not @t352)))) % 39.97/40.18 (step @p251 :rule instantiate :premises (@p114) :args (@t348)) % 39.97/40.18 (step @p252 :rule cnf_or_pos :args (@t354)) % 39.97/40.18 (step @p253 :rule reordering :premises (@p252) :args ((or @t350 @t353 (not @t354)))) % 39.97/40.18 (step @p254 :rule instantiate :premises (@p101) :args (@t355)) % 39.97/40.18 (step @p255 :rule cnf_or_pos :args (@t358)) % 39.97/40.18 (step @p256 :rule reordering :premises (@p255) :args ((or @t357 @t356 (not @t358)))) % 39.97/40.18 (step @p257 :rule chain_m_resolution :premises (@p256 @p96 @p254) :args (@t356 @t272 (@list @t96 @t358))) % 39.97/40.18 (step @p258 :rule instantiate :premises (@p112) :args (@t347)) % 39.97/40.18 (step @p259 :rule cnf_or_pos :args (@t361)) % 39.97/40.18 (step @p260 :rule reordering :premises (@p259) :args ((or @t360 @t325 @t359 (not @t361)))) % 39.97/40.18 (step @p261 :rule instantiate :premises (@p111) :args (@t348)) % 39.97/40.18 (step @p262 :rule cnf_or_pos :args (@t364)) % 39.97/40.18 (step @p263 :rule reordering :premises (@p262) :args ((or @t359 @t363 (not @t364)))) % 39.97/40.18 (step @p264 :rule instantiate :premises (@p103) :args (@t348)) % 39.97/40.18 (step @p265 :rule cnf_or_pos :args (@t366)) % 39.97/40.18 (step @p266 :rule reordering :premises (@p265) :args ((or @t362 @t365 (not @t366)))) % 39.97/40.18 (step @p267 :rule instantiate :premises (@p110) :args (@t355)) % 39.97/40.18 (step @p268 :rule cnf_or_pos :args (@t368)) % 39.97/40.18 (step @p269 :rule reordering :premises (@p268) :args ((or @t360 @t367 (not @t368)))) % 39.97/40.18 (step @p270 :rule chain_m_resolution :premises (@p269 @p257 @p267) :args (@t367 @t272 (@list @t356 @t368))) % 39.97/40.18 (step @p271 :rule instantiate :premises (@p108) :args (@t355)) % 39.97/40.18 (step @p272 :rule cnf_or_pos :args (@t372)) % 39.97/40.18 (step @p273 :rule reordering :premises (@p272) :args ((or @t369 @t371 @t370 @t336 (not @t372)))) % 39.97/40.18 (step @p274 :rule chain_m_resolution :premises (@p273 @p271 @p270 @p266 @p264 @p234 @p232 @p263 @p261 @p260 @p258 @p257 @p253 @p251 @p250 @p248) :args (@t350 @t294 (@list @t372 @t367 @t365 @t366 @t336 @t338 @t362 @t364 @t325 @t361 @t356 @t353 @t354 @t351 @t352))) % 39.97/40.19 (step @p275 :rule instantiate :premises (@p117) :args (@t373)) % 39.97/40.19 (step @p276 :rule instantiate :premises (@p116) :args (@t374)) % 39.97/40.19 (step @p277 :rule instantiate :premises (@p115) :args (@t374)) % 39.97/40.19 (step @p278 :rule cnf_or_pos :args (@t378)) % 39.97/40.19 (step @p279 :rule reordering :premises (@p278) :args ((or @t377 @t376 (not @t378)))) % 39.97/40.19 (step @p280 :rule instantiate :premises (@p114) :args (@t374)) % 39.97/40.19 (step @p281 :rule cnf_or_pos :args (@t380)) % 39.97/40.19 (step @p282 :rule reordering :premises (@p281) :args ((or @t376 @t379 (not @t380)))) % 39.97/40.19 (step @p283 :rule instantiate :premises (@p101) :args (@t381)) % 39.97/40.19 (step @p284 :rule cnf_or_pos :args (@t384)) % 39.97/40.19 (step @p285 :rule reordering :premises (@p284) :args ((or @t383 @t382 (not @t384)))) % 39.97/40.19 (step @p286 :rule chain_m_resolution :premises (@p285 @p95 @p283) :args (@t382 @t272 (@list @t95 @t384))) % 39.97/40.19 (step @p287 :rule instantiate :premises (@p112) :args (@t373)) % 39.97/40.19 (step @p288 :rule cnf_or_pos :args (@t387)) % 39.97/40.19 (step @p289 :rule reordering :premises (@p288) :args ((or @t386 @t351 @t385 (not @t387)))) % 39.97/40.19 (step @p290 :rule instantiate :premises (@p111) :args (@t374)) % 39.97/40.19 (step @p291 :rule cnf_or_pos :args (@t390)) % 39.97/40.19 (step @p292 :rule reordering :premises (@p291) :args ((or @t385 @t389 (not @t390)))) % 39.97/40.19 (step @p293 :rule instantiate :premises (@p103) :args (@t374)) % 39.97/40.19 (step @p294 :rule cnf_or_pos :args (@t392)) % 39.97/40.19 (step @p295 :rule reordering :premises (@p294) :args ((or @t388 @t391 (not @t392)))) % 39.97/40.19 (step @p296 :rule instantiate :premises (@p110) :args (@t381)) % 39.97/40.19 (step @p297 :rule cnf_or_pos :args (@t394)) % 39.97/40.19 (step @p298 :rule reordering :premises (@p297) :args ((or @t386 @t393 (not @t394)))) % 39.97/40.19 (step @p299 :rule chain_m_resolution :premises (@p298 @p286 @p296) :args (@t393 @t272 (@list @t382 @t394))) % 39.97/40.19 (step @p300 :rule instantiate :premises (@p108) :args (@t381)) % 39.97/40.19 (step @p301 :rule cnf_or_pos :args (@t398)) % 39.97/40.19 (step @p302 :rule reordering :premises (@p301) :args ((or @t395 @t397 @t396 @t362 (not @t398)))) % 39.97/40.19 (step @p303 :rule chain_m_resolution :premises (@p302 @p300 @p299 @p295 @p293 @p263 @p261 @p292 @p290 @p289 @p287 @p286 @p282 @p280 @p279 @p277) :args (@t376 @t294 (@list @t398 @t393 @t391 @t392 @t362 @t364 @t388 @t390 @t351 @t387 @t382 @t379 @t380 @t377 @t378))) % 39.97/40.19 (step @p304 :rule instantiate :premises (@p117) :args (@t399)) % 39.97/40.19 (step @p305 :rule instantiate :premises (@p116) :args (@t400)) % 39.97/40.19 (step @p306 :rule instantiate :premises (@p115) :args (@t400)) % 39.97/40.19 (step @p307 :rule cnf_or_pos :args (@t404)) % 39.97/40.19 (step @p308 :rule reordering :premises (@p307) :args ((or @t403 @t402 (not @t404)))) % 39.97/40.19 (step @p309 :rule instantiate :premises (@p114) :args (@t400)) % 39.97/40.19 (step @p310 :rule cnf_or_pos :args (@t406)) % 39.97/40.19 (step @p311 :rule reordering :premises (@p310) :args ((or @t402 @t405 (not @t406)))) % 39.97/40.19 (step @p312 :rule instantiate :premises (@p101) :args (@t407)) % 39.97/40.19 (step @p313 :rule cnf_or_pos :args (@t410)) % 39.97/40.19 (step @p314 :rule reordering :premises (@p313) :args ((or @t409 @t408 (not @t410)))) % 39.97/40.19 (step @p315 :rule chain_m_resolution :premises (@p314 @p94 @p312) :args (@t408 @t272 (@list @t94 @t410))) % 39.97/40.19 (step @p316 :rule instantiate :premises (@p112) :args (@t399)) % 39.97/40.19 (step @p317 :rule cnf_or_pos :args (@t413)) % 39.97/40.19 (step @p318 :rule reordering :premises (@p317) :args ((or @t412 @t377 @t411 (not @t413)))) % 39.97/40.19 (step @p319 :rule instantiate :premises (@p111) :args (@t400)) % 39.97/40.19 (step @p320 :rule cnf_or_pos :args (@t416)) % 39.97/40.19 (step @p321 :rule reordering :premises (@p320) :args ((or @t411 @t415 (not @t416)))) % 39.97/40.19 (step @p322 :rule instantiate :premises (@p103) :args (@t400)) % 39.97/40.19 (step @p323 :rule cnf_or_pos :args (@t418)) % 39.97/40.19 (step @p324 :rule reordering :premises (@p323) :args ((or @t414 @t417 (not @t418)))) % 39.97/40.19 (step @p325 :rule instantiate :premises (@p110) :args (@t407)) % 39.97/40.19 (step @p326 :rule cnf_or_pos :args (@t420)) % 39.97/40.19 (step @p327 :rule reordering :premises (@p326) :args ((or @t412 @t419 (not @t420)))) % 39.97/40.19 (step @p328 :rule chain_m_resolution :premises (@p327 @p315 @p325) :args (@t419 @t272 (@list @t408 @t420))) % 39.97/40.19 (step @p329 :rule instantiate :premises (@p108) :args (@t407)) % 39.97/40.19 (step @p330 :rule cnf_or_pos :args (@t424)) % 39.97/40.19 (step @p331 :rule reordering :premises (@p330) :args ((or @t421 @t423 @t422 @t388 (not @t424)))) % 39.97/40.19 (step @p332 :rule chain_m_resolution :premises (@p331 @p329 @p328 @p324 @p322 @p292 @p290 @p321 @p319 @p318 @p316 @p315 @p311 @p309 @p308 @p306) :args (@t402 @t294 (@list @t424 @t419 @t417 @t418 @t388 @t390 @t414 @t416 @t377 @t413 @t408 @t405 @t406 @t403 @t404))) % 39.97/40.19 (step @p333 :rule instantiate :premises (@p117) :args (@t425)) % 39.97/40.19 (step @p334 :rule instantiate :premises (@p116) :args (@t426)) % 39.97/40.19 (step @p335 :rule instantiate :premises (@p115) :args (@t426)) % 39.97/40.19 (step @p336 :rule cnf_or_pos :args (@t430)) % 39.97/40.19 (step @p337 :rule reordering :premises (@p336) :args ((or @t429 @t428 (not @t430)))) % 39.97/40.19 (step @p338 :rule instantiate :premises (@p114) :args (@t426)) % 39.97/40.19 (step @p339 :rule cnf_or_pos :args (@t432)) % 39.97/40.19 (step @p340 :rule reordering :premises (@p339) :args ((or @t428 @t431 (not @t432)))) % 39.97/40.19 (step @p341 :rule instantiate :premises (@p101) :args (@t433)) % 39.97/40.19 (step @p342 :rule cnf_or_pos :args (@t436)) % 39.97/40.19 (step @p343 :rule reordering :premises (@p342) :args ((or @t435 @t434 (not @t436)))) % 39.97/40.19 (step @p344 :rule chain_m_resolution :premises (@p343 @p93 @p341) :args (@t434 @t272 (@list @t93 @t436))) % 39.97/40.19 (step @p345 :rule instantiate :premises (@p112) :args (@t425)) % 39.97/40.19 (step @p346 :rule cnf_or_pos :args (@t439)) % 39.97/40.19 (step @p347 :rule reordering :premises (@p346) :args ((or @t438 @t403 @t437 (not @t439)))) % 39.97/40.19 (step @p348 :rule instantiate :premises (@p111) :args (@t426)) % 39.97/40.19 (step @p349 :rule cnf_or_pos :args (@t442)) % 39.97/40.19 (step @p350 :rule reordering :premises (@p349) :args ((or @t437 @t441 (not @t442)))) % 39.97/40.19 (step @p351 :rule instantiate :premises (@p103) :args (@t426)) % 39.97/40.19 (step @p352 :rule cnf_or_pos :args (@t444)) % 39.97/40.19 (step @p353 :rule reordering :premises (@p352) :args ((or @t440 @t443 (not @t444)))) % 39.97/40.19 (step @p354 :rule instantiate :premises (@p110) :args (@t433)) % 39.97/40.19 (step @p355 :rule cnf_or_pos :args (@t446)) % 39.97/40.19 (step @p356 :rule reordering :premises (@p355) :args ((or @t438 @t445 (not @t446)))) % 39.97/40.19 (step @p357 :rule chain_m_resolution :premises (@p356 @p344 @p354) :args (@t445 @t272 (@list @t434 @t446))) % 39.97/40.19 (step @p358 :rule instantiate :premises (@p108) :args (@t433)) % 39.97/40.19 (step @p359 :rule cnf_or_pos :args (@t450)) % 39.97/40.19 (step @p360 :rule reordering :premises (@p359) :args ((or @t447 @t449 @t448 @t414 (not @t450)))) % 39.97/40.19 (step @p361 :rule chain_m_resolution :premises (@p360 @p358 @p357 @p353 @p351 @p321 @p319 @p350 @p348 @p347 @p345 @p344 @p340 @p338 @p337 @p335) :args (@t428 @t294 (@list @t450 @t445 @t443 @t444 @t414 @t416 @t440 @t442 @t403 @t439 @t434 @t431 @t432 @t429 @t430))) % 39.97/40.19 (step @p362 :rule instantiate :premises (@p117) :args (@t451)) % 39.97/40.19 (step @p363 :rule instantiate :premises (@p116) :args (@t452)) % 39.97/40.19 (step @p364 :rule instantiate :premises (@p115) :args (@t452)) % 39.97/40.19 (step @p365 :rule cnf_or_pos :args (@t456)) % 39.97/40.19 (step @p366 :rule reordering :premises (@p365) :args ((or @t455 @t454 (not @t456)))) % 39.97/40.19 (step @p367 :rule instantiate :premises (@p114) :args (@t452)) % 39.97/40.19 (step @p368 :rule cnf_or_pos :args (@t458)) % 39.97/40.19 (step @p369 :rule reordering :premises (@p368) :args ((or @t454 @t457 (not @t458)))) % 39.97/40.19 (step @p370 :rule instantiate :premises (@p101) :args (@t459)) % 39.97/40.19 (step @p371 :rule cnf_or_pos :args (@t462)) % 39.97/40.19 (step @p372 :rule reordering :premises (@p371) :args ((or @t461 @t460 (not @t462)))) % 39.97/40.19 (step @p373 :rule chain_m_resolution :premises (@p372 @p92 @p370) :args (@t460 @t272 (@list @t92 @t462))) % 39.97/40.19 (step @p374 :rule instantiate :premises (@p112) :args (@t451)) % 39.97/40.19 (step @p375 :rule cnf_or_pos :args (@t465)) % 39.97/40.19 (step @p376 :rule reordering :premises (@p375) :args ((or @t464 @t429 @t463 (not @t465)))) % 39.97/40.19 (step @p377 :rule instantiate :premises (@p111) :args (@t452)) % 39.97/40.19 (step @p378 :rule cnf_or_pos :args (@t468)) % 39.97/40.19 (step @p379 :rule reordering :premises (@p378) :args ((or @t463 @t467 (not @t468)))) % 39.97/40.19 (step @p380 :rule instantiate :premises (@p103) :args (@t452)) % 39.97/40.19 (step @p381 :rule cnf_or_pos :args (@t470)) % 39.97/40.19 (step @p382 :rule reordering :premises (@p381) :args ((or @t466 @t469 (not @t470)))) % 39.97/40.19 (step @p383 :rule instantiate :premises (@p110) :args (@t459)) % 39.97/40.19 (step @p384 :rule cnf_or_pos :args (@t472)) % 39.97/40.19 (step @p385 :rule reordering :premises (@p384) :args ((or @t464 @t471 (not @t472)))) % 39.97/40.19 (step @p386 :rule chain_m_resolution :premises (@p385 @p373 @p383) :args (@t471 @t272 (@list @t460 @t472))) % 39.97/40.19 (step @p387 :rule instantiate :premises (@p108) :args (@t459)) % 39.97/40.19 (step @p388 :rule cnf_or_pos :args (@t476)) % 39.97/40.19 (step @p389 :rule reordering :premises (@p388) :args ((or @t473 @t475 @t474 @t440 (not @t476)))) % 39.97/40.19 (step @p390 :rule chain_m_resolution :premises (@p389 @p387 @p386 @p382 @p380 @p350 @p348 @p379 @p377 @p376 @p374 @p373 @p369 @p367 @p366 @p364) :args (@t454 @t294 (@list @t476 @t471 @t469 @t470 @t440 @t442 @t466 @t468 @t429 @t465 @t460 @t457 @t458 @t455 @t456))) % 39.97/40.19 (step @p391 :rule instantiate :premises (@p117) :args (@t477)) % 39.97/40.19 (step @p392 :rule instantiate :premises (@p116) :args (@t478)) % 39.97/40.19 (step @p393 :rule instantiate :premises (@p115) :args (@t478)) % 39.97/40.19 (step @p394 :rule cnf_or_pos :args (@t482)) % 39.97/40.19 (step @p395 :rule reordering :premises (@p394) :args ((or @t481 @t480 (not @t482)))) % 39.97/40.19 (step @p396 :rule instantiate :premises (@p114) :args (@t478)) % 39.97/40.19 (step @p397 :rule cnf_or_pos :args (@t484)) % 39.97/40.19 (step @p398 :rule reordering :premises (@p397) :args ((or @t480 @t483 (not @t484)))) % 39.97/40.19 (step @p399 :rule instantiate :premises (@p101) :args (@t485)) % 39.97/40.19 (step @p400 :rule cnf_or_pos :args (@t488)) % 39.97/40.19 (step @p401 :rule reordering :premises (@p400) :args ((or @t487 @t486 (not @t488)))) % 39.97/40.19 (step @p402 :rule chain_m_resolution :premises (@p401 @p91 @p399) :args (@t486 @t272 (@list @t91 @t488))) % 39.97/40.19 (step @p403 :rule instantiate :premises (@p112) :args (@t477)) % 39.97/40.19 (step @p404 :rule cnf_or_pos :args (@t491)) % 39.97/40.19 (step @p405 :rule reordering :premises (@p404) :args ((or @t490 @t455 @t489 (not @t491)))) % 39.97/40.19 (step @p406 :rule instantiate :premises (@p111) :args (@t478)) % 39.97/40.19 (step @p407 :rule cnf_or_pos :args (@t494)) % 39.97/40.19 (step @p408 :rule reordering :premises (@p407) :args ((or @t489 @t493 (not @t494)))) % 39.97/40.19 (step @p409 :rule instantiate :premises (@p103) :args (@t478)) % 39.97/40.19 (step @p410 :rule cnf_or_pos :args (@t496)) % 39.97/40.19 (step @p411 :rule reordering :premises (@p410) :args ((or @t492 @t495 (not @t496)))) % 39.97/40.19 (step @p412 :rule instantiate :premises (@p110) :args (@t485)) % 39.97/40.19 (step @p413 :rule cnf_or_pos :args (@t498)) % 39.97/40.19 (step @p414 :rule reordering :premises (@p413) :args ((or @t490 @t497 (not @t498)))) % 39.97/40.19 (step @p415 :rule chain_m_resolution :premises (@p414 @p402 @p412) :args (@t497 @t272 (@list @t486 @t498))) % 39.97/40.19 (step @p416 :rule instantiate :premises (@p108) :args (@t485)) % 39.97/40.19 (step @p417 :rule cnf_or_pos :args (@t502)) % 39.97/40.19 (step @p418 :rule reordering :premises (@p417) :args ((or @t499 @t501 @t500 @t466 (not @t502)))) % 39.97/40.19 (step @p419 :rule chain_m_resolution :premises (@p418 @p416 @p415 @p411 @p409 @p379 @p377 @p408 @p406 @p405 @p403 @p402 @p398 @p396 @p395 @p393) :args (@t480 @t294 (@list @t502 @t497 @t495 @t496 @t466 @t468 @t492 @t494 @t455 @t491 @t486 @t483 @t484 @t481 @t482))) % 39.97/40.19 (step @p420 :rule instantiate :premises (@p117) :args (@t503)) % 39.97/40.19 (step @p421 :rule instantiate :premises (@p116) :args (@t504)) % 39.97/40.19 (step @p422 :rule instantiate :premises (@p115) :args (@t504)) % 39.97/40.19 (step @p423 :rule cnf_or_pos :args (@t508)) % 39.97/40.19 (step @p424 :rule reordering :premises (@p423) :args ((or @t507 @t506 (not @t508)))) % 39.97/40.19 (step @p425 :rule instantiate :premises (@p114) :args (@t504)) % 39.97/40.19 (step @p426 :rule cnf_or_pos :args (@t510)) % 39.97/40.19 (step @p427 :rule reordering :premises (@p426) :args ((or @t506 @t509 (not @t510)))) % 39.97/40.19 (step @p428 :rule instantiate :premises (@p101) :args (@t511)) % 39.97/40.19 (step @p429 :rule cnf_or_pos :args (@t514)) % 39.97/40.19 (step @p430 :rule reordering :premises (@p429) :args ((or @t513 @t512 (not @t514)))) % 39.97/40.19 (step @p431 :rule chain_m_resolution :premises (@p430 @p90 @p428) :args (@t512 @t272 (@list @t90 @t514))) % 39.97/40.19 (step @p432 :rule instantiate :premises (@p112) :args (@t503)) % 39.97/40.19 (step @p433 :rule cnf_or_pos :args (@t517)) % 39.97/40.19 (step @p434 :rule reordering :premises (@p433) :args ((or @t516 @t481 @t515 (not @t517)))) % 39.97/40.19 (step @p435 :rule instantiate :premises (@p111) :args (@t504)) % 39.97/40.19 (step @p436 :rule cnf_or_pos :args (@t520)) % 39.97/40.19 (step @p437 :rule reordering :premises (@p436) :args ((or @t515 @t519 (not @t520)))) % 39.97/40.19 (step @p438 :rule instantiate :premises (@p103) :args (@t504)) % 39.97/40.19 (step @p439 :rule cnf_or_pos :args (@t522)) % 39.97/40.19 (step @p440 :rule reordering :premises (@p439) :args ((or @t518 @t521 (not @t522)))) % 39.97/40.19 (step @p441 :rule instantiate :premises (@p110) :args (@t511)) % 39.97/40.19 (step @p442 :rule cnf_or_pos :args (@t524)) % 39.97/40.19 (step @p443 :rule reordering :premises (@p442) :args ((or @t516 @t523 (not @t524)))) % 39.97/40.19 (step @p444 :rule chain_m_resolution :premises (@p443 @p431 @p441) :args (@t523 @t272 (@list @t512 @t524))) % 39.97/40.19 (step @p445 :rule instantiate :premises (@p108) :args (@t511)) % 39.97/40.19 (step @p446 :rule cnf_or_pos :args (@t528)) % 39.97/40.19 (step @p447 :rule reordering :premises (@p446) :args ((or @t525 @t527 @t526 @t492 (not @t528)))) % 39.97/40.19 (step @p448 :rule chain_m_resolution :premises (@p447 @p445 @p444 @p440 @p438 @p408 @p406 @p437 @p435 @p434 @p432 @p431 @p427 @p425 @p424 @p422) :args (@t506 @t294 (@list @t528 @t523 @t521 @t522 @t492 @t494 @t518 @t520 @t481 @t517 @t512 @t509 @t510 @t507 @t508))) % 39.97/40.19 (step @p449 :rule instantiate :premises (@p117) :args (@t529)) % 39.97/40.19 (step @p450 :rule instantiate :premises (@p116) :args (@t530)) % 39.97/40.19 (step @p451 :rule instantiate :premises (@p115) :args (@t530)) % 39.97/40.19 (step @p452 :rule cnf_or_pos :args (@t534)) % 39.97/40.19 (step @p453 :rule reordering :premises (@p452) :args ((or @t533 @t532 (not @t534)))) % 39.97/40.19 (step @p454 :rule instantiate :premises (@p114) :args (@t530)) % 39.97/40.19 (step @p455 :rule cnf_or_pos :args (@t536)) % 39.97/40.19 (step @p456 :rule reordering :premises (@p455) :args ((or @t532 @t535 (not @t536)))) % 39.97/40.19 (step @p457 :rule instantiate :premises (@p101) :args (@t537)) % 39.97/40.19 (step @p458 :rule cnf_or_pos :args (@t540)) % 39.97/40.19 (step @p459 :rule reordering :premises (@p458) :args ((or @t539 @t538 (not @t540)))) % 39.97/40.19 (step @p460 :rule chain_m_resolution :premises (@p459 @p89 @p457) :args (@t538 @t272 (@list @t89 @t540))) % 39.97/40.19 (step @p461 :rule instantiate :premises (@p112) :args (@t529)) % 39.97/40.19 (step @p462 :rule cnf_or_pos :args (@t543)) % 39.97/40.19 (step @p463 :rule reordering :premises (@p462) :args ((or @t542 @t507 @t541 (not @t543)))) % 39.97/40.19 (step @p464 :rule instantiate :premises (@p111) :args (@t530)) % 39.97/40.19 (step @p465 :rule cnf_or_pos :args (@t546)) % 39.97/40.19 (step @p466 :rule reordering :premises (@p465) :args ((or @t541 @t545 (not @t546)))) % 39.97/40.19 (step @p467 :rule instantiate :premises (@p103) :args (@t530)) % 39.97/40.19 (step @p468 :rule cnf_or_pos :args (@t548)) % 39.97/40.19 (step @p469 :rule reordering :premises (@p468) :args ((or @t544 @t547 (not @t548)))) % 39.97/40.19 (step @p470 :rule instantiate :premises (@p110) :args (@t537)) % 39.97/40.19 (step @p471 :rule cnf_or_pos :args (@t550)) % 39.97/40.19 (step @p472 :rule reordering :premises (@p471) :args ((or @t542 @t549 (not @t550)))) % 39.97/40.19 (step @p473 :rule chain_m_resolution :premises (@p472 @p460 @p470) :args (@t549 @t272 (@list @t538 @t550))) % 39.97/40.19 (step @p474 :rule instantiate :premises (@p108) :args (@t537)) % 39.97/40.19 (step @p475 :rule cnf_or_pos :args (@t554)) % 39.97/40.19 (step @p476 :rule reordering :premises (@p475) :args ((or @t551 @t553 @t552 @t518 (not @t554)))) % 39.97/40.19 (step @p477 :rule chain_m_resolution :premises (@p476 @p474 @p473 @p469 @p467 @p437 @p435 @p466 @p464 @p463 @p461 @p460 @p456 @p454 @p453 @p451) :args (@t532 @t294 (@list @t554 @t549 @t547 @t548 @t518 @t520 @t544 @t546 @t507 @t543 @t538 @t535 @t536 @t533 @t534))) % 39.97/40.19 (step @p478 :rule instantiate :premises (@p117) :args (@t555)) % 39.97/40.19 (step @p479 :rule instantiate :premises (@p116) :args (@t556)) % 39.97/40.19 (step @p480 :rule instantiate :premises (@p115) :args (@t556)) % 39.97/40.19 (step @p481 :rule cnf_or_pos :args (@t560)) % 39.97/40.19 (step @p482 :rule reordering :premises (@p481) :args ((or @t559 @t558 (not @t560)))) % 39.97/40.19 (step @p483 :rule instantiate :premises (@p114) :args (@t556)) % 39.97/40.19 (step @p484 :rule cnf_or_pos :args (@t562)) % 39.97/40.19 (step @p485 :rule reordering :premises (@p484) :args ((or @t558 @t561 (not @t562)))) % 39.97/40.19 (step @p486 :rule instantiate :premises (@p101) :args (@t563)) % 39.97/40.19 (step @p487 :rule cnf_or_pos :args (@t566)) % 39.97/40.19 (step @p488 :rule reordering :premises (@p487) :args ((or @t565 @t564 (not @t566)))) % 39.97/40.19 (step @p489 :rule chain_m_resolution :premises (@p488 @p88 @p486) :args (@t564 @t272 (@list @t88 @t566))) % 39.97/40.19 (step @p490 :rule instantiate :premises (@p112) :args (@t555)) % 39.97/40.19 (step @p491 :rule cnf_or_pos :args (@t569)) % 39.97/40.19 (step @p492 :rule reordering :premises (@p491) :args ((or @t568 @t533 @t567 (not @t569)))) % 39.97/40.19 (step @p493 :rule instantiate :premises (@p111) :args (@t556)) % 39.97/40.19 (step @p494 :rule cnf_or_pos :args (@t572)) % 39.97/40.19 (step @p495 :rule reordering :premises (@p494) :args ((or @t567 @t571 (not @t572)))) % 39.97/40.19 (step @p496 :rule instantiate :premises (@p103) :args (@t556)) % 39.97/40.19 (step @p497 :rule cnf_or_pos :args (@t574)) % 39.97/40.19 (step @p498 :rule reordering :premises (@p497) :args ((or @t570 @t573 (not @t574)))) % 39.97/40.19 (step @p499 :rule instantiate :premises (@p110) :args (@t563)) % 39.97/40.19 (step @p500 :rule cnf_or_pos :args (@t576)) % 39.97/40.19 (step @p501 :rule reordering :premises (@p500) :args ((or @t568 @t575 (not @t576)))) % 39.97/40.19 (step @p502 :rule chain_m_resolution :premises (@p501 @p489 @p499) :args (@t575 @t272 (@list @t564 @t576))) % 39.97/40.19 (step @p503 :rule instantiate :premises (@p108) :args (@t563)) % 39.97/40.19 (step @p504 :rule cnf_or_pos :args (@t580)) % 39.97/40.19 (step @p505 :rule reordering :premises (@p504) :args ((or @t577 @t579 @t578 @t544 (not @t580)))) % 39.97/40.19 (step @p506 :rule chain_m_resolution :premises (@p505 @p503 @p502 @p498 @p496 @p466 @p464 @p495 @p493 @p492 @p490 @p489 @p485 @p483 @p482 @p480) :args (@t558 @t294 (@list @t580 @t575 @t573 @t574 @t544 @t546 @t570 @t572 @t533 @t569 @t564 @t561 @t562 @t559 @t560))) % 39.97/40.19 (step @p507 :rule instantiate :premises (@p117) :args (@t581)) % 39.97/40.19 (step @p508 :rule instantiate :premises (@p116) :args (@t582)) % 39.97/40.19 (step @p509 :rule instantiate :premises (@p115) :args (@t582)) % 39.97/40.19 (step @p510 :rule cnf_or_pos :args (@t586)) % 39.97/40.19 (step @p511 :rule reordering :premises (@p510) :args ((or @t585 @t584 (not @t586)))) % 39.97/40.19 (step @p512 :rule instantiate :premises (@p114) :args (@t582)) % 39.97/40.19 (step @p513 :rule cnf_or_pos :args (@t588)) % 39.97/40.19 (step @p514 :rule reordering :premises (@p513) :args ((or @t584 @t587 (not @t588)))) % 39.97/40.19 (step @p515 :rule instantiate :premises (@p101) :args (@t589)) % 39.97/40.19 (step @p516 :rule cnf_or_pos :args (@t592)) % 39.97/40.19 (step @p517 :rule reordering :premises (@p516) :args ((or @t591 @t590 (not @t592)))) % 39.97/40.19 (step @p518 :rule chain_m_resolution :premises (@p517 @p87 @p515) :args (@t590 @t272 (@list @t87 @t592))) % 39.97/40.19 (step @p519 :rule instantiate :premises (@p112) :args (@t581)) % 39.97/40.19 (step @p520 :rule cnf_or_pos :args (@t595)) % 39.97/40.19 (step @p521 :rule reordering :premises (@p520) :args ((or @t594 @t559 @t593 (not @t595)))) % 39.97/40.19 (step @p522 :rule instantiate :premises (@p111) :args (@t582)) % 39.97/40.19 (step @p523 :rule cnf_or_pos :args (@t598)) % 39.97/40.19 (step @p524 :rule reordering :premises (@p523) :args ((or @t593 @t597 (not @t598)))) % 39.97/40.19 (step @p525 :rule instantiate :premises (@p103) :args (@t582)) % 39.97/40.19 (step @p526 :rule cnf_or_pos :args (@t600)) % 39.97/40.19 (step @p527 :rule reordering :premises (@p526) :args ((or @t596 @t599 (not @t600)))) % 39.97/40.19 (step @p528 :rule instantiate :premises (@p110) :args (@t589)) % 39.97/40.19 (step @p529 :rule cnf_or_pos :args (@t602)) % 39.97/40.19 (step @p530 :rule reordering :premises (@p529) :args ((or @t594 @t601 (not @t602)))) % 39.97/40.19 (step @p531 :rule chain_m_resolution :premises (@p530 @p518 @p528) :args (@t601 @t272 (@list @t590 @t602))) % 39.97/40.19 (step @p532 :rule instantiate :premises (@p108) :args (@t589)) % 39.97/40.19 (step @p533 :rule cnf_or_pos :args (@t606)) % 39.97/40.19 (step @p534 :rule reordering :premises (@p533) :args ((or @t603 @t605 @t604 @t570 (not @t606)))) % 39.97/40.19 (step @p535 :rule chain_m_resolution :premises (@p534 @p532 @p531 @p527 @p525 @p495 @p493 @p524 @p522 @p521 @p519 @p518 @p514 @p512 @p511 @p509) :args (@t584 @t294 (@list @t606 @t601 @t599 @t600 @t570 @t572 @t596 @t598 @t559 @t595 @t590 @t587 @t588 @t585 @t586))) % 39.97/40.19 (step @p536 :rule instantiate :premises (@p117) :args (@t607)) % 39.97/40.19 (step @p537 :rule instantiate :premises (@p116) :args (@t608)) % 39.97/40.19 (step @p538 :rule instantiate :premises (@p115) :args (@t608)) % 39.97/40.19 (step @p539 :rule cnf_or_pos :args (@t612)) % 39.97/40.19 (step @p540 :rule reordering :premises (@p539) :args ((or @t611 @t610 (not @t612)))) % 39.97/40.19 (step @p541 :rule instantiate :premises (@p114) :args (@t608)) % 39.97/40.19 (step @p542 :rule cnf_or_pos :args (@t614)) % 39.97/40.19 (step @p543 :rule reordering :premises (@p542) :args ((or @t610 @t613 (not @t614)))) % 39.97/40.19 (step @p544 :rule instantiate :premises (@p101) :args (@t615)) % 39.97/40.19 (step @p545 :rule cnf_or_pos :args (@t618)) % 39.97/40.19 (step @p546 :rule reordering :premises (@p545) :args ((or @t617 @t616 (not @t618)))) % 39.97/40.19 (step @p547 :rule chain_m_resolution :premises (@p546 @p86 @p544) :args (@t616 @t272 (@list @t86 @t618))) % 39.97/40.19 (step @p548 :rule instantiate :premises (@p112) :args (@t607)) % 39.97/40.19 (step @p549 :rule cnf_or_pos :args (@t621)) % 39.97/40.19 (step @p550 :rule reordering :premises (@p549) :args ((or @t620 @t585 @t619 (not @t621)))) % 39.97/40.19 (step @p551 :rule instantiate :premises (@p111) :args (@t608)) % 39.97/40.19 (step @p552 :rule cnf_or_pos :args (@t624)) % 39.97/40.19 (step @p553 :rule reordering :premises (@p552) :args ((or @t619 @t623 (not @t624)))) % 39.97/40.19 (step @p554 :rule instantiate :premises (@p103) :args (@t608)) % 39.97/40.19 (step @p555 :rule cnf_or_pos :args (@t626)) % 39.97/40.19 (step @p556 :rule reordering :premises (@p555) :args ((or @t622 @t625 (not @t626)))) % 39.97/40.19 (step @p557 :rule instantiate :premises (@p110) :args (@t615)) % 39.97/40.19 (step @p558 :rule cnf_or_pos :args (@t628)) % 39.97/40.19 (step @p559 :rule reordering :premises (@p558) :args ((or @t620 @t627 (not @t628)))) % 39.97/40.19 (step @p560 :rule chain_m_resolution :premises (@p559 @p547 @p557) :args (@t627 @t272 (@list @t616 @t628))) % 39.97/40.19 (step @p561 :rule instantiate :premises (@p108) :args (@t615)) % 39.97/40.19 (step @p562 :rule cnf_or_pos :args (@t632)) % 39.97/40.19 (step @p563 :rule reordering :premises (@p562) :args ((or @t629 @t631 @t630 @t596 (not @t632)))) % 39.97/40.19 (step @p564 :rule chain_m_resolution :premises (@p563 @p561 @p560 @p556 @p554 @p524 @p522 @p553 @p551 @p550 @p548 @p547 @p543 @p541 @p540 @p538) :args (@t610 @t294 (@list @t632 @t627 @t625 @t626 @t596 @t598 @t622 @t624 @t585 @t621 @t616 @t613 @t614 @t611 @t612))) % 39.97/40.19 (step @p565 :rule instantiate :premises (@p117) :args (@t633)) % 39.97/40.19 (step @p566 :rule instantiate :premises (@p116) :args (@t634)) % 39.97/40.19 (step @p567 :rule instantiate :premises (@p115) :args (@t634)) % 39.97/40.19 (step @p568 :rule cnf_or_pos :args (@t638)) % 39.97/40.19 (step @p569 :rule reordering :premises (@p568) :args ((or @t637 @t636 (not @t638)))) % 39.97/40.19 (step @p570 :rule instantiate :premises (@p114) :args (@t634)) % 39.97/40.19 (step @p571 :rule cnf_or_pos :args (@t640)) % 39.97/40.19 (step @p572 :rule reordering :premises (@p571) :args ((or @t636 @t639 (not @t640)))) % 39.97/40.19 (step @p573 :rule instantiate :premises (@p101) :args (@t641)) % 39.97/40.19 (step @p574 :rule cnf_or_pos :args (@t644)) % 39.97/40.19 (step @p575 :rule reordering :premises (@p574) :args ((or @t643 @t642 (not @t644)))) % 39.97/40.19 (step @p576 :rule chain_m_resolution :premises (@p575 @p85 @p573) :args (@t642 @t272 (@list @t85 @t644))) % 39.97/40.19 (step @p577 :rule instantiate :premises (@p112) :args (@t633)) % 39.97/40.19 (step @p578 :rule cnf_or_pos :args (@t647)) % 39.97/40.19 (step @p579 :rule reordering :premises (@p578) :args ((or @t646 @t611 @t645 (not @t647)))) % 39.97/40.19 (step @p580 :rule instantiate :premises (@p111) :args (@t634)) % 39.97/40.19 (step @p581 :rule cnf_or_pos :args (@t650)) % 39.97/40.19 (step @p582 :rule reordering :premises (@p581) :args ((or @t645 @t649 (not @t650)))) % 39.97/40.19 (step @p583 :rule instantiate :premises (@p103) :args (@t634)) % 39.97/40.19 (step @p584 :rule cnf_or_pos :args (@t652)) % 39.97/40.19 (step @p585 :rule reordering :premises (@p584) :args ((or @t648 @t651 (not @t652)))) % 39.97/40.19 (step @p586 :rule instantiate :premises (@p110) :args (@t641)) % 39.97/40.19 (step @p587 :rule cnf_or_pos :args (@t654)) % 39.97/40.19 (step @p588 :rule reordering :premises (@p587) :args ((or @t646 @t653 (not @t654)))) % 39.97/40.19 (step @p589 :rule chain_m_resolution :premises (@p588 @p576 @p586) :args (@t653 @t272 (@list @t642 @t654))) % 39.97/40.19 (step @p590 :rule instantiate :premises (@p108) :args (@t641)) % 39.97/40.19 (step @p591 :rule cnf_or_pos :args (@t658)) % 39.97/40.19 (step @p592 :rule reordering :premises (@p591) :args ((or @t655 @t657 @t656 @t622 (not @t658)))) % 39.97/40.19 (step @p593 :rule chain_m_resolution :premises (@p592 @p590 @p589 @p585 @p583 @p553 @p551 @p582 @p580 @p579 @p577 @p576 @p572 @p570 @p569 @p567) :args (@t636 @t294 (@list @t658 @t653 @t651 @t652 @t622 @t624 @t648 @t650 @t611 @t647 @t642 @t639 @t640 @t637 @t638))) % 39.97/40.19 (step @p594 :rule instantiate :premises (@p117) :args (@t659)) % 39.97/40.19 (step @p595 :rule instantiate :premises (@p116) :args (@t660)) % 39.97/40.19 (step @p596 :rule instantiate :premises (@p115) :args (@t660)) % 39.97/40.19 (step @p597 :rule cnf_or_pos :args (@t664)) % 39.97/40.19 (step @p598 :rule reordering :premises (@p597) :args ((or @t663 @t662 (not @t664)))) % 39.97/40.19 (step @p599 :rule instantiate :premises (@p114) :args (@t660)) % 39.97/40.19 (step @p600 :rule cnf_or_pos :args (@t666)) % 39.97/40.19 (step @p601 :rule reordering :premises (@p600) :args ((or @t662 @t665 (not @t666)))) % 39.97/40.19 (step @p602 :rule instantiate :premises (@p101) :args (@t667)) % 39.97/40.19 (step @p603 :rule cnf_or_pos :args (@t670)) % 39.97/40.19 (step @p604 :rule reordering :premises (@p603) :args ((or @t669 @t668 (not @t670)))) % 39.97/40.19 (step @p605 :rule chain_m_resolution :premises (@p604 @p84 @p602) :args (@t668 @t272 (@list @t84 @t670))) % 39.97/40.19 (step @p606 :rule instantiate :premises (@p112) :args (@t659)) % 39.97/40.19 (step @p607 :rule cnf_or_pos :args (@t673)) % 39.97/40.19 (step @p608 :rule reordering :premises (@p607) :args ((or @t672 @t637 @t671 (not @t673)))) % 39.97/40.19 (step @p609 :rule instantiate :premises (@p111) :args (@t660)) % 39.97/40.19 (step @p610 :rule cnf_or_pos :args (@t676)) % 39.97/40.19 (step @p611 :rule reordering :premises (@p610) :args ((or @t671 @t675 (not @t676)))) % 39.97/40.19 (step @p612 :rule instantiate :premises (@p103) :args (@t660)) % 39.97/40.19 (step @p613 :rule cnf_or_pos :args (@t678)) % 39.97/40.19 (step @p614 :rule reordering :premises (@p613) :args ((or @t674 @t677 (not @t678)))) % 39.97/40.19 (step @p615 :rule instantiate :premises (@p110) :args (@t667)) % 39.97/40.19 (step @p616 :rule cnf_or_pos :args (@t680)) % 39.97/40.19 (step @p617 :rule reordering :premises (@p616) :args ((or @t672 @t679 (not @t680)))) % 39.97/40.19 (step @p618 :rule chain_m_resolution :premises (@p617 @p605 @p615) :args (@t679 @t272 (@list @t668 @t680))) % 39.97/40.19 (step @p619 :rule instantiate :premises (@p108) :args (@t667)) % 39.97/40.19 (step @p620 :rule cnf_or_pos :args (@t684)) % 39.97/40.19 (step @p621 :rule reordering :premises (@p620) :args ((or @t681 @t683 @t682 @t648 (not @t684)))) % 39.97/40.19 (step @p622 :rule chain_m_resolution :premises (@p621 @p619 @p618 @p614 @p612 @p582 @p580 @p611 @p609 @p608 @p606 @p605 @p601 @p599 @p598 @p596) :args (@t662 @t294 (@list @t684 @t679 @t677 @t678 @t648 @t650 @t674 @t676 @t637 @t673 @t668 @t665 @t666 @t663 @t664))) % 39.97/40.19 (step @p623 :rule instantiate :premises (@p117) :args (@t685)) % 39.97/40.19 (step @p624 :rule instantiate :premises (@p116) :args (@t686)) % 39.97/40.19 (step @p625 :rule instantiate :premises (@p115) :args (@t686)) % 39.97/40.19 (step @p626 :rule cnf_or_pos :args (@t690)) % 39.97/40.19 (step @p627 :rule reordering :premises (@p626) :args ((or @t689 @t688 (not @t690)))) % 39.97/40.19 (step @p628 :rule instantiate :premises (@p114) :args (@t686)) % 39.97/40.19 (step @p629 :rule cnf_or_pos :args (@t692)) % 39.97/40.19 (step @p630 :rule reordering :premises (@p629) :args ((or @t688 @t691 (not @t692)))) % 39.97/40.19 (step @p631 :rule instantiate :premises (@p101) :args (@t693)) % 39.97/40.19 (step @p632 :rule cnf_or_pos :args (@t696)) % 39.97/40.19 (step @p633 :rule reordering :premises (@p632) :args ((or @t695 @t694 (not @t696)))) % 39.97/40.19 (step @p634 :rule chain_m_resolution :premises (@p633 @p83 @p631) :args (@t694 @t272 (@list @t83 @t696))) % 39.97/40.19 (step @p635 :rule instantiate :premises (@p112) :args (@t685)) % 39.97/40.19 (step @p636 :rule cnf_or_pos :args (@t699)) % 39.97/40.19 (step @p637 :rule reordering :premises (@p636) :args ((or @t698 @t663 @t697 (not @t699)))) % 39.97/40.19 (step @p638 :rule instantiate :premises (@p111) :args (@t686)) % 39.97/40.19 (step @p639 :rule cnf_or_pos :args (@t702)) % 39.97/40.19 (step @p640 :rule reordering :premises (@p639) :args ((or @t697 @t701 (not @t702)))) % 39.97/40.19 (step @p641 :rule instantiate :premises (@p103) :args (@t686)) % 39.97/40.19 (step @p642 :rule cnf_or_pos :args (@t704)) % 39.97/40.19 (step @p643 :rule reordering :premises (@p642) :args ((or @t700 @t703 (not @t704)))) % 39.97/40.19 (step @p644 :rule instantiate :premises (@p110) :args (@t693)) % 39.97/40.19 (step @p645 :rule cnf_or_pos :args (@t706)) % 39.97/40.19 (step @p646 :rule reordering :premises (@p645) :args ((or @t698 @t705 (not @t706)))) % 39.97/40.19 (step @p647 :rule chain_m_resolution :premises (@p646 @p634 @p644) :args (@t705 @t272 (@list @t694 @t706))) % 39.97/40.19 (step @p648 :rule instantiate :premises (@p108) :args (@t693)) % 39.97/40.19 (step @p649 :rule cnf_or_pos :args (@t710)) % 39.97/40.19 (step @p650 :rule reordering :premises (@p649) :args ((or @t707 @t709 @t708 @t674 (not @t710)))) % 39.97/40.19 (step @p651 :rule chain_m_resolution :premises (@p650 @p648 @p647 @p643 @p641 @p611 @p609 @p640 @p638 @p637 @p635 @p634 @p630 @p628 @p627 @p625) :args (@t688 @t294 (@list @t710 @t705 @t703 @t704 @t674 @t676 @t700 @t702 @t663 @t699 @t694 @t691 @t692 @t689 @t690))) % 39.97/40.19 (step @p652 :rule instantiate :premises (@p117) :args (@t711)) % 39.97/40.19 (step @p653 :rule instantiate :premises (@p116) :args (@t712)) % 39.97/40.19 (step @p654 :rule instantiate :premises (@p115) :args (@t712)) % 39.97/40.19 (step @p655 :rule cnf_or_pos :args (@t716)) % 39.97/40.19 (step @p656 :rule reordering :premises (@p655) :args ((or @t715 @t714 (not @t716)))) % 39.97/40.19 (step @p657 :rule instantiate :premises (@p114) :args (@t712)) % 39.97/40.19 (step @p658 :rule cnf_or_pos :args (@t718)) % 39.97/40.19 (step @p659 :rule reordering :premises (@p658) :args ((or @t714 @t717 (not @t718)))) % 39.97/40.19 (step @p660 :rule instantiate :premises (@p101) :args (@t719)) % 39.97/40.19 (step @p661 :rule cnf_or_pos :args (@t722)) % 39.97/40.19 (step @p662 :rule reordering :premises (@p661) :args ((or @t721 @t720 (not @t722)))) % 39.97/40.19 (step @p663 :rule chain_m_resolution :premises (@p662 @p82 @p660) :args (@t720 @t272 (@list @t82 @t722))) % 39.97/40.19 (step @p664 :rule instantiate :premises (@p112) :args (@t711)) % 39.97/40.19 (step @p665 :rule cnf_or_pos :args (@t725)) % 39.97/40.19 (step @p666 :rule reordering :premises (@p665) :args ((or @t724 @t689 @t723 (not @t725)))) % 39.97/40.19 (step @p667 :rule instantiate :premises (@p111) :args (@t712)) % 39.97/40.19 (step @p668 :rule cnf_or_pos :args (@t728)) % 39.97/40.19 (step @p669 :rule reordering :premises (@p668) :args ((or @t723 @t727 (not @t728)))) % 39.97/40.19 (step @p670 :rule instantiate :premises (@p103) :args (@t712)) % 39.97/40.19 (step @p671 :rule cnf_or_pos :args (@t730)) % 39.97/40.19 (step @p672 :rule reordering :premises (@p671) :args ((or @t726 @t729 (not @t730)))) % 39.97/40.19 (step @p673 :rule instantiate :premises (@p110) :args (@t719)) % 39.97/40.19 (step @p674 :rule cnf_or_pos :args (@t732)) % 39.97/40.19 (step @p675 :rule reordering :premises (@p674) :args ((or @t724 @t731 (not @t732)))) % 39.97/40.19 (step @p676 :rule chain_m_resolution :premises (@p675 @p663 @p673) :args (@t731 @t272 (@list @t720 @t732))) % 39.97/40.19 (step @p677 :rule instantiate :premises (@p108) :args (@t719)) % 39.97/40.19 (step @p678 :rule cnf_or_pos :args (@t736)) % 39.97/40.19 (step @p679 :rule reordering :premises (@p678) :args ((or @t733 @t735 @t734 @t700 (not @t736)))) % 39.97/40.19 (step @p680 :rule chain_m_resolution :premises (@p679 @p677 @p676 @p672 @p670 @p640 @p638 @p669 @p667 @p666 @p664 @p663 @p659 @p657 @p656 @p654) :args (@t714 @t294 (@list @t736 @t731 @t729 @t730 @t700 @t702 @t726 @t728 @t689 @t725 @t720 @t717 @t718 @t715 @t716))) % 39.97/40.19 (step @p681 :rule instantiate :premises (@p117) :args (@t737)) % 39.97/40.19 (step @p682 :rule instantiate :premises (@p116) :args (@t738)) % 39.97/40.19 (step @p683 :rule instantiate :premises (@p115) :args (@t738)) % 39.97/40.19 (step @p684 :rule cnf_or_pos :args (@t742)) % 39.97/40.19 (step @p685 :rule reordering :premises (@p684) :args ((or @t741 @t740 (not @t742)))) % 39.97/40.19 (step @p686 :rule instantiate :premises (@p114) :args (@t738)) % 39.97/40.19 (step @p687 :rule cnf_or_pos :args (@t744)) % 39.97/40.19 (step @p688 :rule reordering :premises (@p687) :args ((or @t740 @t743 (not @t744)))) % 39.97/40.19 (step @p689 :rule instantiate :premises (@p101) :args (@t745)) % 39.97/40.19 (step @p690 :rule cnf_or_pos :args (@t748)) % 39.97/40.19 (step @p691 :rule reordering :premises (@p690) :args ((or @t747 @t746 (not @t748)))) % 39.97/40.19 (step @p692 :rule chain_m_resolution :premises (@p691 @p81 @p689) :args (@t746 @t272 (@list @t81 @t748))) % 39.97/40.19 (step @p693 :rule instantiate :premises (@p112) :args (@t737)) % 39.97/40.19 (step @p694 :rule cnf_or_pos :args (@t751)) % 39.97/40.19 (step @p695 :rule reordering :premises (@p694) :args ((or @t750 @t715 @t749 (not @t751)))) % 39.97/40.19 (step @p696 :rule instantiate :premises (@p111) :args (@t738)) % 39.97/40.19 (step @p697 :rule cnf_or_pos :args (@t754)) % 39.97/40.19 (step @p698 :rule reordering :premises (@p697) :args ((or @t749 @t753 (not @t754)))) % 39.97/40.19 (step @p699 :rule instantiate :premises (@p103) :args (@t738)) % 39.97/40.19 (step @p700 :rule cnf_or_pos :args (@t756)) % 39.97/40.19 (step @p701 :rule reordering :premises (@p700) :args ((or @t752 @t755 (not @t756)))) % 39.97/40.19 (step @p702 :rule instantiate :premises (@p110) :args (@t745)) % 39.97/40.19 (step @p703 :rule cnf_or_pos :args (@t758)) % 39.97/40.19 (step @p704 :rule reordering :premises (@p703) :args ((or @t750 @t757 (not @t758)))) % 39.97/40.19 (step @p705 :rule chain_m_resolution :premises (@p704 @p692 @p702) :args (@t757 @t272 (@list @t746 @t758))) % 39.97/40.19 (step @p706 :rule instantiate :premises (@p108) :args (@t745)) % 39.97/40.19 (step @p707 :rule cnf_or_pos :args (@t762)) % 39.97/40.19 (step @p708 :rule reordering :premises (@p707) :args ((or @t759 @t761 @t760 @t726 (not @t762)))) % 39.97/40.19 (step @p709 :rule chain_m_resolution :premises (@p708 @p706 @p705 @p701 @p699 @p669 @p667 @p698 @p696 @p695 @p693 @p692 @p688 @p686 @p685 @p683) :args (@t740 @t294 (@list @t762 @t757 @t755 @t756 @t726 @t728 @t752 @t754 @t715 @t751 @t746 @t743 @t744 @t741 @t742))) % 39.97/40.19 (step @p710 :rule instantiate :premises (@p117) :args (@t763)) % 39.97/40.19 (step @p711 :rule instantiate :premises (@p116) :args (@t764)) % 39.97/40.19 (step @p712 :rule instantiate :premises (@p115) :args (@t764)) % 39.97/40.19 (step @p713 :rule cnf_or_pos :args (@t768)) % 39.97/40.19 (step @p714 :rule reordering :premises (@p713) :args ((or @t767 @t766 (not @t768)))) % 39.97/40.19 (step @p715 :rule instantiate :premises (@p114) :args (@t764)) % 39.97/40.19 (step @p716 :rule cnf_or_pos :args (@t770)) % 39.97/40.19 (step @p717 :rule reordering :premises (@p716) :args ((or @t766 @t769 (not @t770)))) % 39.97/40.19 (step @p718 :rule instantiate :premises (@p101) :args (@t771)) % 39.97/40.19 (step @p719 :rule cnf_or_pos :args (@t774)) % 39.97/40.19 (step @p720 :rule reordering :premises (@p719) :args ((or @t773 @t772 (not @t774)))) % 39.97/40.19 (step @p721 :rule chain_m_resolution :premises (@p720 @p80 @p718) :args (@t772 @t272 (@list @t80 @t774))) % 39.97/40.19 (step @p722 :rule instantiate :premises (@p112) :args (@t763)) % 39.97/40.19 (step @p723 :rule cnf_or_pos :args (@t777)) % 39.97/40.19 (step @p724 :rule reordering :premises (@p723) :args ((or @t776 @t741 @t775 (not @t777)))) % 39.97/40.19 (step @p725 :rule instantiate :premises (@p111) :args (@t764)) % 39.97/40.19 (step @p726 :rule cnf_or_pos :args (@t780)) % 39.97/40.19 (step @p727 :rule reordering :premises (@p726) :args ((or @t775 @t779 (not @t780)))) % 39.97/40.19 (step @p728 :rule instantiate :premises (@p103) :args (@t764)) % 39.97/40.19 (step @p729 :rule cnf_or_pos :args (@t782)) % 39.97/40.19 (step @p730 :rule reordering :premises (@p729) :args ((or @t778 @t781 (not @t782)))) % 39.97/40.19 (step @p731 :rule instantiate :premises (@p110) :args (@t771)) % 39.97/40.19 (step @p732 :rule cnf_or_pos :args (@t784)) % 39.97/40.19 (step @p733 :rule reordering :premises (@p732) :args ((or @t776 @t783 (not @t784)))) % 39.97/40.19 (step @p734 :rule chain_m_resolution :premises (@p733 @p721 @p731) :args (@t783 @t272 (@list @t772 @t784))) % 39.97/40.19 (step @p735 :rule instantiate :premises (@p108) :args (@t771)) % 39.97/40.19 (step @p736 :rule cnf_or_pos :args (@t788)) % 39.97/40.19 (step @p737 :rule reordering :premises (@p736) :args ((or @t785 @t787 @t786 @t752 (not @t788)))) % 39.97/40.19 (step @p738 :rule chain_m_resolution :premises (@p737 @p735 @p734 @p730 @p728 @p698 @p696 @p727 @p725 @p724 @p722 @p721 @p717 @p715 @p714 @p712) :args (@t766 @t294 (@list @t788 @t783 @t781 @t782 @t752 @t754 @t778 @t780 @t741 @t777 @t772 @t769 @t770 @t767 @t768))) % 39.97/40.19 (step @p739 :rule instantiate :premises (@p117) :args (@t789)) % 39.97/40.19 (step @p740 :rule instantiate :premises (@p116) :args (@t790)) % 39.97/40.19 (step @p741 :rule instantiate :premises (@p115) :args (@t790)) % 39.97/40.19 (step @p742 :rule cnf_or_pos :args (@t794)) % 39.97/40.19 (step @p743 :rule reordering :premises (@p742) :args ((or @t793 @t792 (not @t794)))) % 39.97/40.19 (step @p744 :rule instantiate :premises (@p114) :args (@t790)) % 39.97/40.19 (step @p745 :rule cnf_or_pos :args (@t796)) % 39.97/40.19 (step @p746 :rule reordering :premises (@p745) :args ((or @t792 @t795 (not @t796)))) % 39.97/40.19 (step @p747 :rule instantiate :premises (@p101) :args (@t797)) % 39.97/40.19 (step @p748 :rule cnf_or_pos :args (@t800)) % 39.97/40.19 (step @p749 :rule reordering :premises (@p748) :args ((or @t799 @t798 (not @t800)))) % 39.97/40.19 (step @p750 :rule chain_m_resolution :premises (@p749 @p79 @p747) :args (@t798 @t272 (@list @t79 @t800))) % 39.97/40.19 (step @p751 :rule instantiate :premises (@p112) :args (@t789)) % 39.97/40.19 (step @p752 :rule cnf_or_pos :args (@t803)) % 39.97/40.19 (step @p753 :rule reordering :premises (@p752) :args ((or @t802 @t767 @t801 (not @t803)))) % 39.97/40.19 (step @p754 :rule instantiate :premises (@p111) :args (@t790)) % 39.97/40.19 (step @p755 :rule cnf_or_pos :args (@t806)) % 39.97/40.19 (step @p756 :rule reordering :premises (@p755) :args ((or @t801 @t805 (not @t806)))) % 39.97/40.19 (step @p757 :rule instantiate :premises (@p103) :args (@t790)) % 39.97/40.19 (step @p758 :rule cnf_or_pos :args (@t808)) % 39.97/40.19 (step @p759 :rule reordering :premises (@p758) :args ((or @t804 @t807 (not @t808)))) % 39.97/40.19 (step @p760 :rule instantiate :premises (@p110) :args (@t797)) % 39.97/40.19 (step @p761 :rule cnf_or_pos :args (@t810)) % 39.97/40.19 (step @p762 :rule reordering :premises (@p761) :args ((or @t802 @t809 (not @t810)))) % 39.97/40.19 (step @p763 :rule chain_m_resolution :premises (@p762 @p750 @p760) :args (@t809 @t272 (@list @t798 @t810))) % 39.97/40.19 (step @p764 :rule instantiate :premises (@p108) :args (@t797)) % 39.97/40.19 (step @p765 :rule cnf_or_pos :args (@t814)) % 39.97/40.19 (step @p766 :rule reordering :premises (@p765) :args ((or @t811 @t813 @t812 @t778 (not @t814)))) % 39.97/40.19 (step @p767 :rule chain_m_resolution :premises (@p766 @p764 @p763 @p759 @p757 @p727 @p725 @p756 @p754 @p753 @p751 @p750 @p746 @p744 @p743 @p741) :args (@t792 @t294 (@list @t814 @t809 @t807 @t808 @t778 @t780 @t804 @t806 @t767 @t803 @t798 @t795 @t796 @t793 @t794))) % 39.97/40.19 (step @p768 :rule instantiate :premises (@p117) :args (@t815)) % 39.97/40.19 (step @p769 :rule instantiate :premises (@p116) :args (@t816)) % 39.97/40.19 (step @p770 :rule instantiate :premises (@p115) :args (@t816)) % 39.97/40.19 (step @p771 :rule cnf_or_pos :args (@t820)) % 39.97/40.19 (step @p772 :rule reordering :premises (@p771) :args ((or @t819 @t818 (not @t820)))) % 39.97/40.19 (step @p773 :rule instantiate :premises (@p114) :args (@t816)) % 39.97/40.19 (step @p774 :rule cnf_or_pos :args (@t822)) % 39.97/40.19 (step @p775 :rule reordering :premises (@p774) :args ((or @t818 @t821 (not @t822)))) % 39.97/40.19 (step @p776 :rule instantiate :premises (@p101) :args (@t823)) % 39.97/40.19 (step @p777 :rule cnf_or_pos :args (@t826)) % 39.97/40.19 (step @p778 :rule reordering :premises (@p777) :args ((or @t825 @t824 (not @t826)))) % 39.97/40.19 (step @p779 :rule chain_m_resolution :premises (@p778 @p78 @p776) :args (@t824 @t272 (@list @t78 @t826))) % 39.97/40.19 (step @p780 :rule instantiate :premises (@p112) :args (@t815)) % 39.97/40.19 (step @p781 :rule cnf_or_pos :args (@t829)) % 39.97/40.19 (step @p782 :rule reordering :premises (@p781) :args ((or @t828 @t793 @t827 (not @t829)))) % 39.97/40.19 (step @p783 :rule instantiate :premises (@p111) :args (@t816)) % 39.97/40.19 (step @p784 :rule cnf_or_pos :args (@t832)) % 39.97/40.19 (step @p785 :rule reordering :premises (@p784) :args ((or @t827 @t831 (not @t832)))) % 39.97/40.19 (step @p786 :rule instantiate :premises (@p103) :args (@t816)) % 39.97/40.19 (step @p787 :rule cnf_or_pos :args (@t834)) % 39.97/40.19 (step @p788 :rule reordering :premises (@p787) :args ((or @t830 @t833 (not @t834)))) % 39.97/40.19 (step @p789 :rule instantiate :premises (@p110) :args (@t823)) % 39.97/40.19 (step @p790 :rule cnf_or_pos :args (@t836)) % 39.97/40.19 (step @p791 :rule reordering :premises (@p790) :args ((or @t828 @t835 (not @t836)))) % 39.97/40.19 (step @p792 :rule chain_m_resolution :premises (@p791 @p779 @p789) :args (@t835 @t272 (@list @t824 @t836))) % 39.97/40.19 (step @p793 :rule instantiate :premises (@p108) :args (@t823)) % 39.97/40.19 (step @p794 :rule cnf_or_pos :args (@t840)) % 39.97/40.19 (step @p795 :rule reordering :premises (@p794) :args ((or @t837 @t839 @t838 @t804 (not @t840)))) % 39.97/40.19 (step @p796 :rule chain_m_resolution :premises (@p795 @p793 @p792 @p788 @p786 @p756 @p754 @p785 @p783 @p782 @p780 @p779 @p775 @p773 @p772 @p770) :args (@t818 @t294 (@list @t840 @t835 @t833 @t834 @t804 @t806 @t830 @t832 @t793 @t829 @t824 @t821 @t822 @t819 @t820))) % 39.97/40.19 (step @p797 :rule instantiate :premises (@p117) :args (@t841)) % 39.97/40.19 (step @p798 :rule instantiate :premises (@p116) :args (@t842)) % 39.97/40.19 (step @p799 :rule instantiate :premises (@p115) :args (@t842)) % 39.97/40.19 (step @p800 :rule cnf_or_pos :args (@t846)) % 39.97/40.19 (step @p801 :rule reordering :premises (@p800) :args ((or @t845 @t844 (not @t846)))) % 39.97/40.19 (step @p802 :rule instantiate :premises (@p114) :args (@t842)) % 39.97/40.19 (step @p803 :rule cnf_or_pos :args (@t848)) % 39.97/40.19 (step @p804 :rule reordering :premises (@p803) :args ((or @t844 @t847 (not @t848)))) % 39.97/40.19 (step @p805 :rule instantiate :premises (@p101) :args (@t849)) % 39.97/40.19 (step @p806 :rule cnf_or_pos :args (@t852)) % 39.97/40.19 (step @p807 :rule reordering :premises (@p806) :args ((or @t851 @t850 (not @t852)))) % 39.97/40.19 (step @p808 :rule chain_m_resolution :premises (@p807 @p77 @p805) :args (@t850 @t272 (@list @t77 @t852))) % 39.97/40.19 (step @p809 :rule instantiate :premises (@p112) :args (@t841)) % 39.97/40.19 (step @p810 :rule cnf_or_pos :args (@t855)) % 39.97/40.19 (step @p811 :rule reordering :premises (@p810) :args ((or @t854 @t819 @t853 (not @t855)))) % 39.97/40.19 (step @p812 :rule instantiate :premises (@p111) :args (@t842)) % 39.97/40.19 (step @p813 :rule cnf_or_pos :args (@t858)) % 39.97/40.19 (step @p814 :rule reordering :premises (@p813) :args ((or @t853 @t857 (not @t858)))) % 39.97/40.19 (step @p815 :rule instantiate :premises (@p103) :args (@t842)) % 39.97/40.19 (step @p816 :rule cnf_or_pos :args (@t860)) % 39.97/40.19 (step @p817 :rule reordering :premises (@p816) :args ((or @t856 @t859 (not @t860)))) % 39.97/40.19 (step @p818 :rule instantiate :premises (@p110) :args (@t849)) % 39.97/40.19 (step @p819 :rule cnf_or_pos :args (@t862)) % 39.97/40.19 (step @p820 :rule reordering :premises (@p819) :args ((or @t854 @t861 (not @t862)))) % 39.97/40.19 (step @p821 :rule chain_m_resolution :premises (@p820 @p808 @p818) :args (@t861 @t272 (@list @t850 @t862))) % 39.97/40.19 (step @p822 :rule instantiate :premises (@p108) :args (@t849)) % 39.97/40.19 (step @p823 :rule cnf_or_pos :args (@t866)) % 39.97/40.19 (step @p824 :rule reordering :premises (@p823) :args ((or @t863 @t865 @t864 @t830 (not @t866)))) % 39.97/40.19 (step @p825 :rule chain_m_resolution :premises (@p824 @p822 @p821 @p817 @p815 @p785 @p783 @p814 @p812 @p811 @p809 @p808 @p804 @p802 @p801 @p799) :args (@t844 @t294 (@list @t866 @t861 @t859 @t860 @t830 @t832 @t856 @t858 @t819 @t855 @t850 @t847 @t848 @t845 @t846))) % 39.97/40.19 (step @p826 :rule instantiate :premises (@p117) :args (@t867)) % 39.97/40.19 (step @p827 :rule instantiate :premises (@p116) :args (@t868)) % 39.97/40.19 (step @p828 :rule instantiate :premises (@p115) :args (@t868)) % 39.97/40.19 (step @p829 :rule cnf_or_pos :args (@t872)) % 39.97/40.19 (step @p830 :rule reordering :premises (@p829) :args ((or @t871 @t870 (not @t872)))) % 39.97/40.19 (step @p831 :rule instantiate :premises (@p114) :args (@t868)) % 39.97/40.19 (step @p832 :rule cnf_or_pos :args (@t874)) % 39.97/40.19 (step @p833 :rule reordering :premises (@p832) :args ((or @t870 @t873 (not @t874)))) % 39.97/40.19 (step @p834 :rule instantiate :premises (@p101) :args (@t875)) % 39.97/40.19 (step @p835 :rule cnf_or_pos :args (@t878)) % 39.97/40.19 (step @p836 :rule reordering :premises (@p835) :args ((or @t877 @t876 (not @t878)))) % 39.97/40.19 (step @p837 :rule chain_m_resolution :premises (@p836 @p76 @p834) :args (@t876 @t272 (@list @t76 @t878))) % 39.97/40.19 (step @p838 :rule instantiate :premises (@p112) :args (@t867)) % 39.97/40.19 (step @p839 :rule cnf_or_pos :args (@t881)) % 39.97/40.19 (step @p840 :rule reordering :premises (@p839) :args ((or @t880 @t845 @t879 (not @t881)))) % 39.97/40.19 (step @p841 :rule instantiate :premises (@p111) :args (@t868)) % 39.97/40.19 (step @p842 :rule cnf_or_pos :args (@t884)) % 39.97/40.19 (step @p843 :rule reordering :premises (@p842) :args ((or @t879 @t883 (not @t884)))) % 39.97/40.19 (step @p844 :rule instantiate :premises (@p103) :args (@t868)) % 39.97/40.19 (step @p845 :rule cnf_or_pos :args (@t886)) % 39.97/40.19 (step @p846 :rule reordering :premises (@p845) :args ((or @t882 @t885 (not @t886)))) % 39.97/40.19 (step @p847 :rule instantiate :premises (@p110) :args (@t875)) % 39.97/40.19 (step @p848 :rule cnf_or_pos :args (@t888)) % 39.97/40.19 (step @p849 :rule reordering :premises (@p848) :args ((or @t880 @t887 (not @t888)))) % 39.97/40.19 (step @p850 :rule chain_m_resolution :premises (@p849 @p837 @p847) :args (@t887 @t272 (@list @t876 @t888))) % 39.97/40.19 (step @p851 :rule instantiate :premises (@p108) :args (@t875)) % 39.97/40.19 (step @p852 :rule cnf_or_pos :args (@t892)) % 39.97/40.19 (step @p853 :rule reordering :premises (@p852) :args ((or @t889 @t891 @t890 @t856 (not @t892)))) % 39.97/40.19 (step @p854 :rule chain_m_resolution :premises (@p853 @p851 @p850 @p846 @p844 @p814 @p812 @p843 @p841 @p840 @p838 @p837 @p833 @p831 @p830 @p828) :args (@t870 @t294 (@list @t892 @t887 @t885 @t886 @t856 @t858 @t882 @t884 @t845 @t881 @t876 @t873 @t874 @t871 @t872))) % 39.97/40.19 (step @p855 :rule instantiate :premises (@p117) :args (@t893)) % 39.97/40.19 (step @p856 :rule instantiate :premises (@p116) :args (@t894)) % 39.97/40.19 (step @p857 :rule instantiate :premises (@p115) :args (@t894)) % 39.97/40.19 (step @p858 :rule cnf_or_pos :args (@t898)) % 39.97/40.19 (step @p859 :rule reordering :premises (@p858) :args ((or @t897 @t896 (not @t898)))) % 39.97/40.19 (step @p860 :rule instantiate :premises (@p114) :args (@t894)) % 39.97/40.19 (step @p861 :rule cnf_or_pos :args (@t900)) % 39.97/40.19 (step @p862 :rule reordering :premises (@p861) :args ((or @t896 @t899 (not @t900)))) % 39.97/40.19 (step @p863 :rule instantiate :premises (@p101) :args (@t901)) % 39.97/40.19 (step @p864 :rule cnf_or_pos :args (@t904)) % 39.97/40.19 (step @p865 :rule reordering :premises (@p864) :args ((or @t903 @t902 (not @t904)))) % 39.97/40.19 (step @p866 :rule chain_m_resolution :premises (@p865 @p75 @p863) :args (@t902 @t272 (@list @t75 @t904))) % 39.97/40.19 (step @p867 :rule instantiate :premises (@p112) :args (@t893)) % 39.97/40.19 (step @p868 :rule cnf_or_pos :args (@t907)) % 39.97/40.19 (step @p869 :rule reordering :premises (@p868) :args ((or @t906 @t871 @t905 (not @t907)))) % 39.97/40.19 (step @p870 :rule instantiate :premises (@p111) :args (@t894)) % 39.97/40.19 (step @p871 :rule cnf_or_pos :args (@t910)) % 39.97/40.19 (step @p872 :rule reordering :premises (@p871) :args ((or @t905 @t909 (not @t910)))) % 39.97/40.19 (step @p873 :rule instantiate :premises (@p103) :args (@t894)) % 39.97/40.19 (step @p874 :rule cnf_or_pos :args (@t912)) % 39.97/40.19 (step @p875 :rule reordering :premises (@p874) :args ((or @t908 @t911 (not @t912)))) % 39.97/40.19 (step @p876 :rule instantiate :premises (@p110) :args (@t901)) % 39.97/40.19 (step @p877 :rule cnf_or_pos :args (@t914)) % 39.97/40.19 (step @p878 :rule reordering :premises (@p877) :args ((or @t906 @t913 (not @t914)))) % 39.97/40.19 (step @p879 :rule chain_m_resolution :premises (@p878 @p866 @p876) :args (@t913 @t272 (@list @t902 @t914))) % 39.97/40.19 (step @p880 :rule instantiate :premises (@p108) :args (@t901)) % 39.97/40.19 (step @p881 :rule cnf_or_pos :args (@t918)) % 39.97/40.19 (step @p882 :rule reordering :premises (@p881) :args ((or @t915 @t917 @t916 @t882 (not @t918)))) % 39.97/40.19 (step @p883 :rule chain_m_resolution :premises (@p882 @p880 @p879 @p875 @p873 @p843 @p841 @p872 @p870 @p869 @p867 @p866 @p862 @p860 @p859 @p857) :args (@t896 @t294 (@list @t918 @t913 @t911 @t912 @t882 @t884 @t908 @t910 @t871 @t907 @t902 @t899 @t900 @t897 @t898))) % 39.97/40.19 (step @p884 :rule instantiate :premises (@p117) :args (@t919)) % 39.97/40.19 (step @p885 :rule instantiate :premises (@p116) :args (@t920)) % 39.97/40.19 (step @p886 :rule instantiate :premises (@p115) :args (@t920)) % 39.97/40.19 (step @p887 :rule cnf_or_pos :args (@t924)) % 39.97/40.19 (step @p888 :rule reordering :premises (@p887) :args ((or @t923 @t922 (not @t924)))) % 39.97/40.19 (step @p889 :rule instantiate :premises (@p114) :args (@t920)) % 39.97/40.19 (step @p890 :rule cnf_or_pos :args (@t926)) % 39.97/40.19 (step @p891 :rule reordering :premises (@p890) :args ((or @t922 @t925 (not @t926)))) % 39.97/40.19 (step @p892 :rule instantiate :premises (@p101) :args (@t927)) % 39.97/40.19 (step @p893 :rule cnf_or_pos :args (@t930)) % 39.97/40.19 (step @p894 :rule reordering :premises (@p893) :args ((or @t929 @t928 (not @t930)))) % 39.97/40.19 (step @p895 :rule chain_m_resolution :premises (@p894 @p74 @p892) :args (@t928 @t272 (@list @t74 @t930))) % 39.97/40.19 (step @p896 :rule instantiate :premises (@p112) :args (@t919)) % 39.97/40.19 (step @p897 :rule cnf_or_pos :args (@t933)) % 39.97/40.19 (step @p898 :rule reordering :premises (@p897) :args ((or @t932 @t897 @t931 (not @t933)))) % 39.97/40.19 (step @p899 :rule instantiate :premises (@p111) :args (@t920)) % 39.97/40.19 (step @p900 :rule cnf_or_pos :args (@t936)) % 39.97/40.19 (step @p901 :rule reordering :premises (@p900) :args ((or @t931 @t935 (not @t936)))) % 39.97/40.19 (step @p902 :rule instantiate :premises (@p103) :args (@t920)) % 39.97/40.19 (step @p903 :rule cnf_or_pos :args (@t938)) % 39.97/40.19 (step @p904 :rule reordering :premises (@p903) :args ((or @t934 @t937 (not @t938)))) % 39.97/40.19 (step @p905 :rule instantiate :premises (@p110) :args (@t927)) % 39.97/40.19 (step @p906 :rule cnf_or_pos :args (@t940)) % 39.97/40.19 (step @p907 :rule reordering :premises (@p906) :args ((or @t932 @t939 (not @t940)))) % 39.97/40.19 (step @p908 :rule chain_m_resolution :premises (@p907 @p895 @p905) :args (@t939 @t272 (@list @t928 @t940))) % 39.97/40.19 (step @p909 :rule instantiate :premises (@p108) :args (@t927)) % 39.97/40.19 (step @p910 :rule cnf_or_pos :args (@t944)) % 39.97/40.19 (step @p911 :rule reordering :premises (@p910) :args ((or @t941 @t943 @t942 @t908 (not @t944)))) % 39.97/40.19 (step @p912 :rule chain_m_resolution :premises (@p911 @p909 @p908 @p904 @p902 @p872 @p870 @p901 @p899 @p898 @p896 @p895 @p891 @p889 @p888 @p886) :args (@t922 @t294 (@list @t944 @t939 @t937 @t938 @t908 @t910 @t934 @t936 @t897 @t933 @t928 @t925 @t926 @t923 @t924))) % 39.97/40.19 (step @p913 :rule instantiate :premises (@p117) :args (@t945)) % 39.97/40.19 (step @p914 :rule instantiate :premises (@p116) :args (@t946)) % 39.97/40.19 (step @p915 :rule instantiate :premises (@p115) :args (@t946)) % 39.97/40.19 (step @p916 :rule cnf_or_pos :args (@t950)) % 39.97/40.19 (step @p917 :rule reordering :premises (@p916) :args ((or @t949 @t948 (not @t950)))) % 39.97/40.19 (step @p918 :rule instantiate :premises (@p114) :args (@t946)) % 39.97/40.19 (step @p919 :rule cnf_or_pos :args (@t952)) % 39.97/40.19 (step @p920 :rule reordering :premises (@p919) :args ((or @t948 @t951 (not @t952)))) % 39.97/40.19 (step @p921 :rule instantiate :premises (@p101) :args (@t953)) % 39.97/40.19 (step @p922 :rule cnf_or_pos :args (@t956)) % 39.97/40.19 (step @p923 :rule reordering :premises (@p922) :args ((or @t955 @t954 (not @t956)))) % 39.97/40.19 (step @p924 :rule chain_m_resolution :premises (@p923 @p73 @p921) :args (@t954 @t272 (@list @t73 @t956))) % 39.97/40.19 (step @p925 :rule instantiate :premises (@p112) :args (@t945)) % 39.97/40.19 (step @p926 :rule cnf_or_pos :args (@t959)) % 39.97/40.19 (step @p927 :rule reordering :premises (@p926) :args ((or @t958 @t923 @t957 (not @t959)))) % 39.97/40.19 (step @p928 :rule instantiate :premises (@p111) :args (@t946)) % 39.97/40.19 (step @p929 :rule cnf_or_pos :args (@t962)) % 39.97/40.19 (step @p930 :rule reordering :premises (@p929) :args ((or @t957 @t961 (not @t962)))) % 39.97/40.19 (step @p931 :rule instantiate :premises (@p103) :args (@t946)) % 39.97/40.19 (step @p932 :rule cnf_or_pos :args (@t964)) % 39.97/40.19 (step @p933 :rule reordering :premises (@p932) :args ((or @t960 @t963 (not @t964)))) % 39.97/40.19 (step @p934 :rule instantiate :premises (@p110) :args (@t953)) % 39.97/40.19 (step @p935 :rule cnf_or_pos :args (@t966)) % 39.97/40.19 (step @p936 :rule reordering :premises (@p935) :args ((or @t958 @t965 (not @t966)))) % 39.97/40.19 (step @p937 :rule chain_m_resolution :premises (@p936 @p924 @p934) :args (@t965 @t272 (@list @t954 @t966))) % 39.97/40.19 (step @p938 :rule instantiate :premises (@p108) :args (@t953)) % 39.97/40.19 (step @p939 :rule cnf_or_pos :args (@t970)) % 39.97/40.19 (step @p940 :rule reordering :premises (@p939) :args ((or @t967 @t969 @t968 @t934 (not @t970)))) % 39.97/40.19 (step @p941 :rule chain_m_resolution :premises (@p940 @p938 @p937 @p933 @p931 @p901 @p899 @p930 @p928 @p927 @p925 @p924 @p920 @p918 @p917 @p915) :args (@t948 @t294 (@list @t970 @t965 @t963 @t964 @t934 @t936 @t960 @t962 @t923 @t959 @t954 @t951 @t952 @t949 @t950))) % 39.97/40.19 (step @p942 :rule instantiate :premises (@p117) :args (@t971)) % 39.97/40.19 (step @p943 :rule instantiate :premises (@p116) :args (@t972)) % 39.97/40.19 (step @p944 :rule instantiate :premises (@p115) :args (@t972)) % 39.97/40.19 (step @p945 :rule cnf_or_pos :args (@t976)) % 39.97/40.19 (step @p946 :rule reordering :premises (@p945) :args ((or @t975 @t974 (not @t976)))) % 39.97/40.19 (step @p947 :rule instantiate :premises (@p114) :args (@t972)) % 39.97/40.19 (step @p948 :rule cnf_or_pos :args (@t978)) % 39.97/40.19 (step @p949 :rule reordering :premises (@p948) :args ((or @t974 @t977 (not @t978)))) % 39.97/40.19 (step @p950 :rule instantiate :premises (@p101) :args (@t979)) % 39.97/40.19 (step @p951 :rule cnf_or_pos :args (@t982)) % 39.97/40.19 (step @p952 :rule reordering :premises (@p951) :args ((or @t981 @t980 (not @t982)))) % 39.97/40.19 (step @p953 :rule chain_m_resolution :premises (@p952 @p72 @p950) :args (@t980 @t272 (@list @t72 @t982))) % 39.97/40.19 (step @p954 :rule instantiate :premises (@p112) :args (@t971)) % 39.97/40.19 (step @p955 :rule cnf_or_pos :args (@t985)) % 39.97/40.19 (step @p956 :rule reordering :premises (@p955) :args ((or @t984 @t949 @t983 (not @t985)))) % 39.97/40.19 (step @p957 :rule instantiate :premises (@p111) :args (@t972)) % 39.97/40.19 (step @p958 :rule cnf_or_pos :args (@t988)) % 39.97/40.19 (step @p959 :rule reordering :premises (@p958) :args ((or @t983 @t987 (not @t988)))) % 39.97/40.19 (step @p960 :rule instantiate :premises (@p103) :args (@t972)) % 39.97/40.19 (step @p961 :rule cnf_or_pos :args (@t990)) % 39.97/40.19 (step @p962 :rule reordering :premises (@p961) :args ((or @t986 @t989 (not @t990)))) % 39.97/40.19 (step @p963 :rule instantiate :premises (@p110) :args (@t979)) % 39.97/40.19 (step @p964 :rule cnf_or_pos :args (@t992)) % 39.97/40.19 (step @p965 :rule reordering :premises (@p964) :args ((or @t984 @t991 (not @t992)))) % 39.97/40.19 (step @p966 :rule chain_m_resolution :premises (@p965 @p953 @p963) :args (@t991 @t272 (@list @t980 @t992))) % 39.97/40.19 (step @p967 :rule instantiate :premises (@p108) :args (@t979)) % 39.97/40.19 (step @p968 :rule cnf_or_pos :args (@t996)) % 39.97/40.19 (step @p969 :rule reordering :premises (@p968) :args ((or @t993 @t995 @t994 @t960 (not @t996)))) % 39.97/40.19 (step @p970 :rule chain_m_resolution :premises (@p969 @p967 @p966 @p962 @p960 @p930 @p928 @p959 @p957 @p956 @p954 @p953 @p949 @p947 @p946 @p944) :args (@t974 @t294 (@list @t996 @t991 @t989 @t990 @t960 @t962 @t986 @t988 @t949 @t985 @t980 @t977 @t978 @t975 @t976))) % 39.97/40.19 (step @p971 :rule instantiate :premises (@p117) :args (@t997)) % 39.97/40.19 (step @p972 :rule instantiate :premises (@p116) :args (@t998)) % 39.97/40.19 (step @p973 :rule instantiate :premises (@p115) :args (@t998)) % 39.97/40.19 (step @p974 :rule cnf_or_pos :args (@t1002)) % 39.97/40.19 (step @p975 :rule reordering :premises (@p974) :args ((or @t1001 @t1000 (not @t1002)))) % 39.97/40.19 (step @p976 :rule instantiate :premises (@p114) :args (@t998)) % 39.97/40.19 (step @p977 :rule cnf_or_pos :args (@t1004)) % 39.97/40.19 (step @p978 :rule reordering :premises (@p977) :args ((or @t1000 @t1003 (not @t1004)))) % 39.97/40.19 (step @p979 :rule instantiate :premises (@p101) :args (@t1005)) % 39.97/40.19 (step @p980 :rule cnf_or_pos :args (@t1008)) % 39.97/40.19 (step @p981 :rule reordering :premises (@p980) :args ((or @t1007 @t1006 (not @t1008)))) % 39.97/40.19 (step @p982 :rule chain_m_resolution :premises (@p981 @p71 @p979) :args (@t1006 @t272 (@list @t71 @t1008))) % 39.97/40.19 (step @p983 :rule instantiate :premises (@p112) :args (@t997)) % 39.97/40.19 (step @p984 :rule cnf_or_pos :args (@t1011)) % 39.97/40.19 (step @p985 :rule reordering :premises (@p984) :args ((or @t1010 @t975 @t1009 (not @t1011)))) % 39.97/40.19 (step @p986 :rule instantiate :premises (@p111) :args (@t998)) % 39.97/40.19 (step @p987 :rule cnf_or_pos :args (@t1014)) % 39.97/40.19 (step @p988 :rule reordering :premises (@p987) :args ((or @t1009 @t1013 (not @t1014)))) % 39.97/40.19 (step @p989 :rule instantiate :premises (@p103) :args (@t998)) % 39.97/40.19 (step @p990 :rule cnf_or_pos :args (@t1016)) % 39.97/40.19 (step @p991 :rule reordering :premises (@p990) :args ((or @t1012 @t1015 (not @t1016)))) % 39.97/40.19 (step @p992 :rule instantiate :premises (@p110) :args (@t1005)) % 39.97/40.19 (step @p993 :rule cnf_or_pos :args (@t1018)) % 39.97/40.19 (step @p994 :rule reordering :premises (@p993) :args ((or @t1010 @t1017 (not @t1018)))) % 39.97/40.19 (step @p995 :rule chain_m_resolution :premises (@p994 @p982 @p992) :args (@t1017 @t272 (@list @t1006 @t1018))) % 39.97/40.19 (step @p996 :rule instantiate :premises (@p108) :args (@t1005)) % 39.97/40.19 (step @p997 :rule cnf_or_pos :args (@t1022)) % 39.97/40.19 (step @p998 :rule reordering :premises (@p997) :args ((or @t1019 @t1021 @t1020 @t986 (not @t1022)))) % 39.97/40.19 (step @p999 :rule chain_m_resolution :premises (@p998 @p996 @p995 @p991 @p989 @p959 @p957 @p988 @p986 @p985 @p983 @p982 @p978 @p976 @p975 @p973) :args (@t1000 @t294 (@list @t1022 @t1017 @t1015 @t1016 @t986 @t988 @t1012 @t1014 @t975 @t1011 @t1006 @t1003 @t1004 @t1001 @t1002))) % 39.97/40.19 (step @p1000 :rule instantiate :premises (@p117) :args (@t1023)) % 39.97/40.19 (step @p1001 :rule instantiate :premises (@p116) :args (@t1024)) % 39.97/40.19 (step @p1002 :rule instantiate :premises (@p115) :args (@t1024)) % 39.97/40.19 (step @p1003 :rule cnf_or_pos :args (@t1028)) % 39.97/40.19 (step @p1004 :rule reordering :premises (@p1003) :args ((or @t1027 @t1026 (not @t1028)))) % 39.97/40.19 (step @p1005 :rule instantiate :premises (@p114) :args (@t1024)) % 39.97/40.19 (step @p1006 :rule cnf_or_pos :args (@t1030)) % 39.97/40.19 (step @p1007 :rule reordering :premises (@p1006) :args ((or @t1026 @t1029 (not @t1030)))) % 39.97/40.19 (step @p1008 :rule instantiate :premises (@p101) :args (@t1031)) % 39.97/40.19 (step @p1009 :rule cnf_or_pos :args (@t1034)) % 39.97/40.19 (step @p1010 :rule reordering :premises (@p1009) :args ((or @t1033 @t1032 (not @t1034)))) % 39.97/40.19 (step @p1011 :rule chain_m_resolution :premises (@p1010 @p70 @p1008) :args (@t1032 @t272 (@list @t70 @t1034))) % 39.97/40.19 (step @p1012 :rule instantiate :premises (@p112) :args (@t1023)) % 39.97/40.19 (step @p1013 :rule cnf_or_pos :args (@t1037)) % 39.97/40.19 (step @p1014 :rule reordering :premises (@p1013) :args ((or @t1036 @t1001 @t1035 (not @t1037)))) % 39.97/40.19 (step @p1015 :rule instantiate :premises (@p111) :args (@t1024)) % 39.97/40.19 (step @p1016 :rule cnf_or_pos :args (@t1040)) % 39.97/40.19 (step @p1017 :rule reordering :premises (@p1016) :args ((or @t1035 @t1039 (not @t1040)))) % 39.97/40.19 (step @p1018 :rule instantiate :premises (@p103) :args (@t1024)) % 39.97/40.19 (step @p1019 :rule cnf_or_pos :args (@t1042)) % 39.97/40.19 (step @p1020 :rule reordering :premises (@p1019) :args ((or @t1038 @t1041 (not @t1042)))) % 39.97/40.19 (step @p1021 :rule instantiate :premises (@p110) :args (@t1031)) % 39.97/40.19 (step @p1022 :rule cnf_or_pos :args (@t1044)) % 39.97/40.19 (step @p1023 :rule reordering :premises (@p1022) :args ((or @t1036 @t1043 (not @t1044)))) % 39.97/40.19 (step @p1024 :rule chain_m_resolution :premises (@p1023 @p1011 @p1021) :args (@t1043 @t272 (@list @t1032 @t1044))) % 39.97/40.19 (step @p1025 :rule instantiate :premises (@p108) :args (@t1031)) % 39.97/40.19 (step @p1026 :rule cnf_or_pos :args (@t1048)) % 39.97/40.19 (step @p1027 :rule reordering :premises (@p1026) :args ((or @t1045 @t1047 @t1046 @t1012 (not @t1048)))) % 39.97/40.19 (step @p1028 :rule chain_m_resolution :premises (@p1027 @p1025 @p1024 @p1020 @p1018 @p988 @p986 @p1017 @p1015 @p1014 @p1012 @p1011 @p1007 @p1005 @p1004 @p1002) :args (@t1026 @t294 (@list @t1048 @t1043 @t1041 @t1042 @t1012 @t1014 @t1038 @t1040 @t1001 @t1037 @t1032 @t1029 @t1030 @t1027 @t1028))) % 39.97/40.19 (step @p1029 :rule instantiate :premises (@p117) :args (@t1049)) % 39.97/40.19 (step @p1030 :rule instantiate :premises (@p116) :args (@t1050)) % 39.97/40.19 (step @p1031 :rule instantiate :premises (@p115) :args (@t1050)) % 39.97/40.19 (step @p1032 :rule cnf_or_pos :args (@t1054)) % 39.97/40.19 (step @p1033 :rule reordering :premises (@p1032) :args ((or @t1053 @t1052 (not @t1054)))) % 39.97/40.19 (step @p1034 :rule instantiate :premises (@p114) :args (@t1050)) % 39.97/40.19 (step @p1035 :rule cnf_or_pos :args (@t1056)) % 39.97/40.19 (step @p1036 :rule reordering :premises (@p1035) :args ((or @t1052 @t1055 (not @t1056)))) % 39.97/40.19 (step @p1037 :rule instantiate :premises (@p101) :args (@t1057)) % 39.97/40.19 (step @p1038 :rule cnf_or_pos :args (@t1060)) % 39.97/40.19 (step @p1039 :rule reordering :premises (@p1038) :args ((or @t1059 @t1058 (not @t1060)))) % 39.97/40.19 (step @p1040 :rule chain_m_resolution :premises (@p1039 @p69 @p1037) :args (@t1058 @t272 (@list @t69 @t1060))) % 39.97/40.19 (step @p1041 :rule instantiate :premises (@p112) :args (@t1049)) % 39.97/40.19 (step @p1042 :rule cnf_or_pos :args (@t1063)) % 39.97/40.19 (step @p1043 :rule reordering :premises (@p1042) :args ((or @t1062 @t1027 @t1061 (not @t1063)))) % 39.97/40.19 (step @p1044 :rule instantiate :premises (@p111) :args (@t1050)) % 39.97/40.19 (step @p1045 :rule cnf_or_pos :args (@t1066)) % 39.97/40.19 (step @p1046 :rule reordering :premises (@p1045) :args ((or @t1061 @t1065 (not @t1066)))) % 39.97/40.19 (step @p1047 :rule instantiate :premises (@p103) :args (@t1050)) % 39.97/40.19 (step @p1048 :rule cnf_or_pos :args (@t1068)) % 39.97/40.19 (step @p1049 :rule reordering :premises (@p1048) :args ((or @t1064 @t1067 (not @t1068)))) % 39.97/40.19 (step @p1050 :rule instantiate :premises (@p110) :args (@t1057)) % 39.97/40.19 (step @p1051 :rule cnf_or_pos :args (@t1070)) % 39.97/40.19 (step @p1052 :rule reordering :premises (@p1051) :args ((or @t1062 @t1069 (not @t1070)))) % 39.97/40.19 (step @p1053 :rule chain_m_resolution :premises (@p1052 @p1040 @p1050) :args (@t1069 @t272 (@list @t1058 @t1070))) % 39.97/40.19 (step @p1054 :rule instantiate :premises (@p108) :args (@t1057)) % 39.97/40.19 (step @p1055 :rule cnf_or_pos :args (@t1074)) % 39.97/40.19 (step @p1056 :rule reordering :premises (@p1055) :args ((or @t1071 @t1073 @t1072 @t1038 (not @t1074)))) % 39.97/40.19 (step @p1057 :rule chain_m_resolution :premises (@p1056 @p1054 @p1053 @p1049 @p1047 @p1017 @p1015 @p1046 @p1044 @p1043 @p1041 @p1040 @p1036 @p1034 @p1033 @p1031) :args (@t1052 @t294 (@list @t1074 @t1069 @t1067 @t1068 @t1038 @t1040 @t1064 @t1066 @t1027 @t1063 @t1058 @t1055 @t1056 @t1053 @t1054))) % 39.97/40.19 (step @p1058 :rule instantiate :premises (@p117) :args (@t1075)) % 39.97/40.19 (step @p1059 :rule instantiate :premises (@p116) :args (@t1076)) % 39.97/40.19 (step @p1060 :rule instantiate :premises (@p115) :args (@t1076)) % 39.97/40.19 (step @p1061 :rule cnf_or_pos :args (@t1080)) % 39.97/40.19 (step @p1062 :rule reordering :premises (@p1061) :args ((or @t1079 @t1078 (not @t1080)))) % 39.97/40.19 (step @p1063 :rule instantiate :premises (@p114) :args (@t1076)) % 39.97/40.19 (step @p1064 :rule cnf_or_pos :args (@t1082)) % 39.97/40.19 (step @p1065 :rule reordering :premises (@p1064) :args ((or @t1078 @t1081 (not @t1082)))) % 39.97/40.19 (step @p1066 :rule instantiate :premises (@p101) :args (@t1083)) % 39.97/40.19 (step @p1067 :rule cnf_or_pos :args (@t1086)) % 39.97/40.19 (step @p1068 :rule reordering :premises (@p1067) :args ((or @t1085 @t1084 (not @t1086)))) % 39.97/40.19 (step @p1069 :rule chain_m_resolution :premises (@p1068 @p68 @p1066) :args (@t1084 @t272 (@list @t68 @t1086))) % 39.97/40.19 (step @p1070 :rule instantiate :premises (@p112) :args (@t1075)) % 39.97/40.19 (step @p1071 :rule cnf_or_pos :args (@t1089)) % 39.97/40.19 (step @p1072 :rule reordering :premises (@p1071) :args ((or @t1088 @t1053 @t1087 (not @t1089)))) % 39.97/40.19 (step @p1073 :rule instantiate :premises (@p111) :args (@t1076)) % 39.97/40.19 (step @p1074 :rule cnf_or_pos :args (@t1092)) % 39.97/40.19 (step @p1075 :rule reordering :premises (@p1074) :args ((or @t1087 @t1091 (not @t1092)))) % 39.97/40.19 (step @p1076 :rule instantiate :premises (@p103) :args (@t1076)) % 39.97/40.19 (step @p1077 :rule cnf_or_pos :args (@t1094)) % 39.97/40.19 (step @p1078 :rule reordering :premises (@p1077) :args ((or @t1090 @t1093 (not @t1094)))) % 39.97/40.19 (step @p1079 :rule instantiate :premises (@p110) :args (@t1083)) % 39.97/40.19 (step @p1080 :rule cnf_or_pos :args (@t1096)) % 39.97/40.19 (step @p1081 :rule reordering :premises (@p1080) :args ((or @t1088 @t1095 (not @t1096)))) % 39.97/40.19 (step @p1082 :rule chain_m_resolution :premises (@p1081 @p1069 @p1079) :args (@t1095 @t272 (@list @t1084 @t1096))) % 39.97/40.19 (step @p1083 :rule instantiate :premises (@p108) :args (@t1083)) % 39.97/40.19 (step @p1084 :rule cnf_or_pos :args (@t1100)) % 39.97/40.19 (step @p1085 :rule reordering :premises (@p1084) :args ((or @t1097 @t1099 @t1098 @t1064 (not @t1100)))) % 39.97/40.19 (step @p1086 :rule chain_m_resolution :premises (@p1085 @p1083 @p1082 @p1078 @p1076 @p1046 @p1044 @p1075 @p1073 @p1072 @p1070 @p1069 @p1065 @p1063 @p1062 @p1060) :args (@t1078 @t294 (@list @t1100 @t1095 @t1093 @t1094 @t1064 @t1066 @t1090 @t1092 @t1053 @t1089 @t1084 @t1081 @t1082 @t1079 @t1080))) % 39.97/40.19 (step @p1087 :rule instantiate :premises (@p117) :args (@t1101)) % 39.97/40.19 (step @p1088 :rule instantiate :premises (@p116) :args (@t1102)) % 39.97/40.19 (step @p1089 :rule instantiate :premises (@p115) :args (@t1102)) % 39.97/40.19 (step @p1090 :rule cnf_or_pos :args (@t1106)) % 39.97/40.19 (step @p1091 :rule reordering :premises (@p1090) :args ((or @t1105 @t1104 (not @t1106)))) % 39.97/40.19 (step @p1092 :rule instantiate :premises (@p114) :args (@t1102)) % 39.97/40.19 (step @p1093 :rule cnf_or_pos :args (@t1108)) % 39.97/40.19 (step @p1094 :rule reordering :premises (@p1093) :args ((or @t1104 @t1107 (not @t1108)))) % 39.97/40.19 (step @p1095 :rule instantiate :premises (@p101) :args (@t1109)) % 39.97/40.19 (step @p1096 :rule cnf_or_pos :args (@t1112)) % 39.97/40.19 (step @p1097 :rule reordering :premises (@p1096) :args ((or @t1111 @t1110 (not @t1112)))) % 39.97/40.19 (step @p1098 :rule chain_m_resolution :premises (@p1097 @p67 @p1095) :args (@t1110 @t272 (@list @t67 @t1112))) % 39.97/40.19 (step @p1099 :rule instantiate :premises (@p112) :args (@t1101)) % 39.97/40.19 (step @p1100 :rule cnf_or_pos :args (@t1115)) % 39.97/40.19 (step @p1101 :rule reordering :premises (@p1100) :args ((or @t1114 @t1079 @t1113 (not @t1115)))) % 39.97/40.19 (step @p1102 :rule instantiate :premises (@p111) :args (@t1102)) % 39.97/40.19 (step @p1103 :rule cnf_or_pos :args (@t1118)) % 39.97/40.19 (step @p1104 :rule reordering :premises (@p1103) :args ((or @t1113 @t1117 (not @t1118)))) % 39.97/40.19 (step @p1105 :rule instantiate :premises (@p103) :args (@t1102)) % 39.97/40.19 (step @p1106 :rule cnf_or_pos :args (@t1120)) % 39.97/40.19 (step @p1107 :rule reordering :premises (@p1106) :args ((or @t1116 @t1119 (not @t1120)))) % 39.97/40.19 (step @p1108 :rule instantiate :premises (@p110) :args (@t1109)) % 39.97/40.19 (step @p1109 :rule cnf_or_pos :args (@t1122)) % 39.97/40.19 (step @p1110 :rule reordering :premises (@p1109) :args ((or @t1114 @t1121 (not @t1122)))) % 39.97/40.19 (step @p1111 :rule chain_m_resolution :premises (@p1110 @p1098 @p1108) :args (@t1121 @t272 (@list @t1110 @t1122))) % 39.97/40.19 (step @p1112 :rule instantiate :premises (@p108) :args (@t1109)) % 39.97/40.19 (step @p1113 :rule cnf_or_pos :args (@t1126)) % 39.97/40.19 (step @p1114 :rule reordering :premises (@p1113) :args ((or @t1123 @t1125 @t1124 @t1090 (not @t1126)))) % 39.97/40.19 (step @p1115 :rule chain_m_resolution :premises (@p1114 @p1112 @p1111 @p1107 @p1105 @p1075 @p1073 @p1104 @p1102 @p1101 @p1099 @p1098 @p1094 @p1092 @p1091 @p1089) :args (@t1104 @t294 (@list @t1126 @t1121 @t1119 @t1120 @t1090 @t1092 @t1116 @t1118 @t1079 @t1115 @t1110 @t1107 @t1108 @t1105 @t1106))) % 39.97/40.19 (step @p1116 :rule instantiate :premises (@p117) :args (@t1127)) % 39.97/40.19 (step @p1117 :rule instantiate :premises (@p116) :args (@t1128)) % 39.97/40.19 (step @p1118 :rule instantiate :premises (@p115) :args (@t1128)) % 39.97/40.19 (step @p1119 :rule cnf_or_pos :args (@t1132)) % 39.97/40.19 (step @p1120 :rule reordering :premises (@p1119) :args ((or @t1131 @t1130 (not @t1132)))) % 39.97/40.19 (step @p1121 :rule instantiate :premises (@p114) :args (@t1128)) % 39.97/40.19 (step @p1122 :rule cnf_or_pos :args (@t1134)) % 39.97/40.19 (step @p1123 :rule reordering :premises (@p1122) :args ((or @t1130 @t1133 (not @t1134)))) % 39.97/40.19 (step @p1124 :rule instantiate :premises (@p101) :args (@t1135)) % 39.97/40.19 (step @p1125 :rule cnf_or_pos :args (@t1138)) % 39.97/40.19 (step @p1126 :rule reordering :premises (@p1125) :args ((or @t1137 @t1136 (not @t1138)))) % 39.97/40.19 (step @p1127 :rule chain_m_resolution :premises (@p1126 @p66 @p1124) :args (@t1136 @t272 (@list @t66 @t1138))) % 39.97/40.19 (step @p1128 :rule instantiate :premises (@p112) :args (@t1127)) % 39.97/40.19 (step @p1129 :rule cnf_or_pos :args (@t1141)) % 39.97/40.19 (step @p1130 :rule reordering :premises (@p1129) :args ((or @t1140 @t1105 @t1139 (not @t1141)))) % 39.97/40.19 (step @p1131 :rule instantiate :premises (@p111) :args (@t1128)) % 39.97/40.19 (step @p1132 :rule cnf_or_pos :args (@t1144)) % 39.97/40.19 (step @p1133 :rule reordering :premises (@p1132) :args ((or @t1139 @t1143 (not @t1144)))) % 39.97/40.19 (step @p1134 :rule instantiate :premises (@p103) :args (@t1128)) % 39.97/40.19 (step @p1135 :rule cnf_or_pos :args (@t1146)) % 39.97/40.19 (step @p1136 :rule reordering :premises (@p1135) :args ((or @t1142 @t1145 (not @t1146)))) % 39.97/40.19 (step @p1137 :rule instantiate :premises (@p110) :args (@t1135)) % 39.97/40.19 (step @p1138 :rule cnf_or_pos :args (@t1148)) % 39.97/40.19 (step @p1139 :rule reordering :premises (@p1138) :args ((or @t1140 @t1147 (not @t1148)))) % 39.97/40.19 (step @p1140 :rule chain_m_resolution :premises (@p1139 @p1127 @p1137) :args (@t1147 @t272 (@list @t1136 @t1148))) % 39.97/40.19 (step @p1141 :rule instantiate :premises (@p108) :args (@t1135)) % 39.97/40.19 (step @p1142 :rule cnf_or_pos :args (@t1152)) % 39.97/40.19 (step @p1143 :rule reordering :premises (@p1142) :args ((or @t1149 @t1151 @t1150 @t1116 (not @t1152)))) % 39.97/40.19 (step @p1144 :rule chain_m_resolution :premises (@p1143 @p1141 @p1140 @p1136 @p1134 @p1104 @p1102 @p1133 @p1131 @p1130 @p1128 @p1127 @p1123 @p1121 @p1120 @p1118) :args (@t1130 @t294 (@list @t1152 @t1147 @t1145 @t1146 @t1116 @t1118 @t1142 @t1144 @t1105 @t1141 @t1136 @t1133 @t1134 @t1131 @t1132))) % 39.97/40.19 (step @p1145 :rule instantiate :premises (@p117) :args (@t1153)) % 39.97/40.19 (step @p1146 :rule instantiate :premises (@p116) :args (@t1154)) % 39.97/40.19 (step @p1147 :rule instantiate :premises (@p115) :args (@t1154)) % 39.97/40.19 (step @p1148 :rule cnf_or_pos :args (@t1158)) % 39.97/40.19 (step @p1149 :rule reordering :premises (@p1148) :args ((or @t1157 @t1156 (not @t1158)))) % 39.97/40.19 (step @p1150 :rule instantiate :premises (@p114) :args (@t1154)) % 39.97/40.19 (step @p1151 :rule cnf_or_pos :args (@t1160)) % 39.97/40.19 (step @p1152 :rule reordering :premises (@p1151) :args ((or @t1156 @t1159 (not @t1160)))) % 39.97/40.19 (step @p1153 :rule instantiate :premises (@p101) :args (@t1161)) % 39.97/40.19 (step @p1154 :rule cnf_or_pos :args (@t1164)) % 39.97/40.19 (step @p1155 :rule reordering :premises (@p1154) :args ((or @t1163 @t1162 (not @t1164)))) % 39.97/40.19 (step @p1156 :rule chain_m_resolution :premises (@p1155 @p65 @p1153) :args (@t1162 @t272 (@list @t65 @t1164))) % 39.97/40.19 (step @p1157 :rule instantiate :premises (@p112) :args (@t1153)) % 39.97/40.19 (step @p1158 :rule cnf_or_pos :args (@t1167)) % 39.97/40.19 (step @p1159 :rule reordering :premises (@p1158) :args ((or @t1166 @t1131 @t1165 (not @t1167)))) % 39.97/40.19 (step @p1160 :rule instantiate :premises (@p111) :args (@t1154)) % 39.97/40.19 (step @p1161 :rule cnf_or_pos :args (@t1170)) % 39.97/40.19 (step @p1162 :rule reordering :premises (@p1161) :args ((or @t1165 @t1169 (not @t1170)))) % 39.97/40.19 (step @p1163 :rule instantiate :premises (@p103) :args (@t1154)) % 39.97/40.19 (step @p1164 :rule cnf_or_pos :args (@t1172)) % 39.97/40.19 (step @p1165 :rule reordering :premises (@p1164) :args ((or @t1168 @t1171 (not @t1172)))) % 39.97/40.19 (step @p1166 :rule instantiate :premises (@p110) :args (@t1161)) % 39.97/40.19 (step @p1167 :rule cnf_or_pos :args (@t1174)) % 39.97/40.19 (step @p1168 :rule reordering :premises (@p1167) :args ((or @t1166 @t1173 (not @t1174)))) % 39.97/40.19 (step @p1169 :rule chain_m_resolution :premises (@p1168 @p1156 @p1166) :args (@t1173 @t272 (@list @t1162 @t1174))) % 39.97/40.19 (step @p1170 :rule instantiate :premises (@p108) :args (@t1161)) % 39.97/40.19 (step @p1171 :rule cnf_or_pos :args (@t1178)) % 39.97/40.19 (step @p1172 :rule reordering :premises (@p1171) :args ((or @t1175 @t1177 @t1176 @t1142 (not @t1178)))) % 39.97/40.19 (step @p1173 :rule chain_m_resolution :premises (@p1172 @p1170 @p1169 @p1165 @p1163 @p1133 @p1131 @p1162 @p1160 @p1159 @p1157 @p1156 @p1152 @p1150 @p1149 @p1147) :args (@t1156 @t294 (@list @t1178 @t1173 @t1171 @t1172 @t1142 @t1144 @t1168 @t1170 @t1131 @t1167 @t1162 @t1159 @t1160 @t1157 @t1158))) % 39.97/40.19 (step @p1174 :rule instantiate :premises (@p117) :args (@t1179)) % 39.97/40.19 (step @p1175 :rule instantiate :premises (@p116) :args (@t1180)) % 39.97/40.19 (step @p1176 :rule instantiate :premises (@p115) :args (@t1180)) % 39.97/40.19 (step @p1177 :rule cnf_or_pos :args (@t1184)) % 39.97/40.19 (step @p1178 :rule reordering :premises (@p1177) :args ((or @t1183 @t1182 (not @t1184)))) % 39.97/40.19 (step @p1179 :rule instantiate :premises (@p114) :args (@t1180)) % 39.97/40.19 (step @p1180 :rule cnf_or_pos :args (@t1186)) % 39.97/40.19 (step @p1181 :rule reordering :premises (@p1180) :args ((or @t1182 @t1185 (not @t1186)))) % 39.97/40.19 (step @p1182 :rule instantiate :premises (@p101) :args (@t1187)) % 39.97/40.19 (step @p1183 :rule cnf_or_pos :args (@t1190)) % 39.97/40.19 (step @p1184 :rule reordering :premises (@p1183) :args ((or @t1189 @t1188 (not @t1190)))) % 39.97/40.19 (step @p1185 :rule chain_m_resolution :premises (@p1184 @p64 @p1182) :args (@t1188 @t272 (@list @t64 @t1190))) % 39.97/40.19 (step @p1186 :rule instantiate :premises (@p112) :args (@t1179)) % 39.97/40.19 (step @p1187 :rule cnf_or_pos :args (@t1193)) % 39.97/40.19 (step @p1188 :rule reordering :premises (@p1187) :args ((or @t1192 @t1157 @t1191 (not @t1193)))) % 39.97/40.19 (step @p1189 :rule instantiate :premises (@p111) :args (@t1180)) % 39.97/40.19 (step @p1190 :rule cnf_or_pos :args (@t1196)) % 39.97/40.19 (step @p1191 :rule reordering :premises (@p1190) :args ((or @t1191 @t1195 (not @t1196)))) % 39.97/40.19 (step @p1192 :rule instantiate :premises (@p103) :args (@t1180)) % 39.97/40.19 (step @p1193 :rule cnf_or_pos :args (@t1198)) % 39.97/40.19 (step @p1194 :rule reordering :premises (@p1193) :args ((or @t1194 @t1197 (not @t1198)))) % 39.97/40.19 (step @p1195 :rule instantiate :premises (@p110) :args (@t1187)) % 39.97/40.19 (step @p1196 :rule cnf_or_pos :args (@t1200)) % 39.97/40.19 (step @p1197 :rule reordering :premises (@p1196) :args ((or @t1192 @t1199 (not @t1200)))) % 39.97/40.19 (step @p1198 :rule chain_m_resolution :premises (@p1197 @p1185 @p1195) :args (@t1199 @t272 (@list @t1188 @t1200))) % 39.97/40.19 (step @p1199 :rule instantiate :premises (@p108) :args (@t1187)) % 39.97/40.19 (step @p1200 :rule cnf_or_pos :args (@t1204)) % 39.97/40.19 (step @p1201 :rule reordering :premises (@p1200) :args ((or @t1201 @t1203 @t1202 @t1168 (not @t1204)))) % 39.97/40.19 (step @p1202 :rule chain_m_resolution :premises (@p1201 @p1199 @p1198 @p1194 @p1192 @p1162 @p1160 @p1191 @p1189 @p1188 @p1186 @p1185 @p1181 @p1179 @p1178 @p1176) :args (@t1182 @t294 (@list @t1204 @t1199 @t1197 @t1198 @t1168 @t1170 @t1194 @t1196 @t1157 @t1193 @t1188 @t1185 @t1186 @t1183 @t1184))) % 39.97/40.19 (step @p1203 :rule instantiate :premises (@p117) :args (@t1205)) % 39.97/40.19 (step @p1204 :rule instantiate :premises (@p116) :args (@t1206)) % 39.97/40.19 (step @p1205 :rule instantiate :premises (@p115) :args (@t1206)) % 39.97/40.19 (step @p1206 :rule cnf_or_pos :args (@t1210)) % 39.97/40.19 (step @p1207 :rule reordering :premises (@p1206) :args ((or @t1209 @t1208 (not @t1210)))) % 39.97/40.19 (step @p1208 :rule instantiate :premises (@p114) :args (@t1206)) % 39.97/40.19 (step @p1209 :rule cnf_or_pos :args (@t1212)) % 39.97/40.19 (step @p1210 :rule reordering :premises (@p1209) :args ((or @t1208 @t1211 (not @t1212)))) % 39.97/40.19 (step @p1211 :rule instantiate :premises (@p101) :args (@t1213)) % 39.97/40.19 (step @p1212 :rule cnf_or_pos :args (@t1216)) % 39.97/40.19 (step @p1213 :rule reordering :premises (@p1212) :args ((or @t1215 @t1214 (not @t1216)))) % 39.97/40.19 (step @p1214 :rule chain_m_resolution :premises (@p1213 @p63 @p1211) :args (@t1214 @t272 (@list @t63 @t1216))) % 39.97/40.19 (step @p1215 :rule instantiate :premises (@p112) :args (@t1205)) % 39.97/40.19 (step @p1216 :rule cnf_or_pos :args (@t1219)) % 39.97/40.19 (step @p1217 :rule reordering :premises (@p1216) :args ((or @t1218 @t1183 @t1217 (not @t1219)))) % 39.97/40.19 (step @p1218 :rule instantiate :premises (@p111) :args (@t1206)) % 39.97/40.19 (step @p1219 :rule cnf_or_pos :args (@t1222)) % 39.97/40.19 (step @p1220 :rule reordering :premises (@p1219) :args ((or @t1217 @t1221 (not @t1222)))) % 39.97/40.19 (step @p1221 :rule instantiate :premises (@p103) :args (@t1206)) % 39.97/40.19 (step @p1222 :rule cnf_or_pos :args (@t1224)) % 39.97/40.19 (step @p1223 :rule reordering :premises (@p1222) :args ((or @t1220 @t1223 (not @t1224)))) % 39.97/40.19 (step @p1224 :rule instantiate :premises (@p110) :args (@t1213)) % 39.97/40.19 (step @p1225 :rule cnf_or_pos :args (@t1226)) % 39.97/40.19 (step @p1226 :rule reordering :premises (@p1225) :args ((or @t1218 @t1225 (not @t1226)))) % 39.97/40.19 (step @p1227 :rule chain_m_resolution :premises (@p1226 @p1214 @p1224) :args (@t1225 @t272 (@list @t1214 @t1226))) % 39.97/40.19 (step @p1228 :rule instantiate :premises (@p108) :args (@t1213)) % 39.97/40.19 (step @p1229 :rule cnf_or_pos :args (@t1230)) % 39.97/40.19 (step @p1230 :rule reordering :premises (@p1229) :args ((or @t1227 @t1229 @t1228 @t1194 (not @t1230)))) % 39.97/40.19 (step @p1231 :rule chain_m_resolution :premises (@p1230 @p1228 @p1227 @p1223 @p1221 @p1191 @p1189 @p1220 @p1218 @p1217 @p1215 @p1214 @p1210 @p1208 @p1207 @p1205) :args (@t1208 @t294 (@list @t1230 @t1225 @t1223 @t1224 @t1194 @t1196 @t1220 @t1222 @t1183 @t1219 @t1214 @t1211 @t1212 @t1209 @t1210))) % 39.97/40.19 (step @p1232 :rule instantiate :premises (@p117) :args (@t1231)) % 39.97/40.19 (step @p1233 :rule instantiate :premises (@p116) :args (@t1232)) % 39.97/40.19 (step @p1234 :rule instantiate :premises (@p115) :args (@t1232)) % 39.97/40.19 (step @p1235 :rule cnf_or_pos :args (@t1236)) % 39.97/40.19 (step @p1236 :rule reordering :premises (@p1235) :args ((or @t1235 @t1234 (not @t1236)))) % 39.97/40.19 (step @p1237 :rule instantiate :premises (@p114) :args (@t1232)) % 39.97/40.19 (step @p1238 :rule cnf_or_pos :args (@t1238)) % 39.97/40.19 (step @p1239 :rule reordering :premises (@p1238) :args ((or @t1234 @t1237 (not @t1238)))) % 39.97/40.19 (step @p1240 :rule instantiate :premises (@p101) :args (@t1239)) % 39.97/40.19 (step @p1241 :rule cnf_or_pos :args (@t1242)) % 39.97/40.19 (step @p1242 :rule reordering :premises (@p1241) :args ((or @t1241 @t1240 (not @t1242)))) % 39.97/40.19 (step @p1243 :rule chain_m_resolution :premises (@p1242 @p62 @p1240) :args (@t1240 @t272 (@list @t62 @t1242))) % 39.97/40.19 (step @p1244 :rule instantiate :premises (@p112) :args (@t1231)) % 39.97/40.19 (step @p1245 :rule cnf_or_pos :args (@t1245)) % 39.97/40.19 (step @p1246 :rule reordering :premises (@p1245) :args ((or @t1244 @t1209 @t1243 (not @t1245)))) % 39.97/40.19 (step @p1247 :rule instantiate :premises (@p111) :args (@t1232)) % 39.97/40.19 (step @p1248 :rule cnf_or_pos :args (@t1248)) % 39.97/40.19 (step @p1249 :rule reordering :premises (@p1248) :args ((or @t1243 @t1247 (not @t1248)))) % 39.97/40.19 (step @p1250 :rule instantiate :premises (@p103) :args (@t1232)) % 39.97/40.19 (step @p1251 :rule cnf_or_pos :args (@t1250)) % 39.97/40.19 (step @p1252 :rule reordering :premises (@p1251) :args ((or @t1246 @t1249 (not @t1250)))) % 39.97/40.19 (step @p1253 :rule instantiate :premises (@p110) :args (@t1239)) % 39.97/40.19 (step @p1254 :rule cnf_or_pos :args (@t1252)) % 39.97/40.19 (step @p1255 :rule reordering :premises (@p1254) :args ((or @t1244 @t1251 (not @t1252)))) % 39.97/40.19 (step @p1256 :rule chain_m_resolution :premises (@p1255 @p1243 @p1253) :args (@t1251 @t272 (@list @t1240 @t1252))) % 39.97/40.19 (step @p1257 :rule instantiate :premises (@p108) :args (@t1239)) % 39.97/40.19 (step @p1258 :rule cnf_or_pos :args (@t1256)) % 39.97/40.19 (step @p1259 :rule reordering :premises (@p1258) :args ((or @t1253 @t1255 @t1254 @t1220 (not @t1256)))) % 39.97/40.19 (step @p1260 :rule chain_m_resolution :premises (@p1259 @p1257 @p1256 @p1252 @p1250 @p1220 @p1218 @p1249 @p1247 @p1246 @p1244 @p1243 @p1239 @p1237 @p1236 @p1234) :args (@t1234 @t294 (@list @t1256 @t1251 @t1249 @t1250 @t1220 @t1222 @t1246 @t1248 @t1209 @t1245 @t1240 @t1237 @t1238 @t1235 @t1236))) % 39.97/40.19 (step @p1261 :rule instantiate :premises (@p117) :args (@t1257)) % 39.97/40.19 (step @p1262 :rule instantiate :premises (@p116) :args (@t1258)) % 39.97/40.19 (step @p1263 :rule instantiate :premises (@p115) :args (@t1258)) % 39.97/40.19 (step @p1264 :rule cnf_or_pos :args (@t1262)) % 39.97/40.19 (step @p1265 :rule reordering :premises (@p1264) :args ((or @t1261 @t1260 (not @t1262)))) % 39.97/40.19 (step @p1266 :rule instantiate :premises (@p114) :args (@t1258)) % 39.97/40.19 (step @p1267 :rule cnf_or_pos :args (@t1264)) % 39.97/40.19 (step @p1268 :rule reordering :premises (@p1267) :args ((or @t1260 @t1263 (not @t1264)))) % 39.97/40.19 (step @p1269 :rule instantiate :premises (@p101) :args (@t1265)) % 39.97/40.19 (step @p1270 :rule cnf_or_pos :args (@t1268)) % 39.97/40.19 (step @p1271 :rule reordering :premises (@p1270) :args ((or @t1267 @t1266 (not @t1268)))) % 39.97/40.19 (step @p1272 :rule chain_m_resolution :premises (@p1271 @p61 @p1269) :args (@t1266 @t272 (@list @t61 @t1268))) % 39.97/40.19 (step @p1273 :rule instantiate :premises (@p112) :args (@t1257)) % 39.97/40.19 (step @p1274 :rule cnf_or_pos :args (@t1271)) % 39.97/40.19 (step @p1275 :rule reordering :premises (@p1274) :args ((or @t1270 @t1235 @t1269 (not @t1271)))) % 39.97/40.19 (step @p1276 :rule instantiate :premises (@p111) :args (@t1258)) % 39.97/40.19 (step @p1277 :rule cnf_or_pos :args (@t1274)) % 39.97/40.19 (step @p1278 :rule reordering :premises (@p1277) :args ((or @t1269 @t1273 (not @t1274)))) % 39.97/40.19 (step @p1279 :rule instantiate :premises (@p103) :args (@t1258)) % 39.97/40.19 (step @p1280 :rule cnf_or_pos :args (@t1276)) % 39.97/40.19 (step @p1281 :rule reordering :premises (@p1280) :args ((or @t1272 @t1275 (not @t1276)))) % 39.97/40.19 (step @p1282 :rule instantiate :premises (@p110) :args (@t1265)) % 39.97/40.19 (step @p1283 :rule cnf_or_pos :args (@t1278)) % 39.97/40.19 (step @p1284 :rule reordering :premises (@p1283) :args ((or @t1270 @t1277 (not @t1278)))) % 39.97/40.19 (step @p1285 :rule chain_m_resolution :premises (@p1284 @p1272 @p1282) :args (@t1277 @t272 (@list @t1266 @t1278))) % 39.97/40.19 (step @p1286 :rule instantiate :premises (@p108) :args (@t1265)) % 39.97/40.19 (step @p1287 :rule cnf_or_pos :args (@t1282)) % 39.97/40.19 (step @p1288 :rule reordering :premises (@p1287) :args ((or @t1279 @t1281 @t1280 @t1246 (not @t1282)))) % 39.97/40.19 (step @p1289 :rule chain_m_resolution :premises (@p1288 @p1286 @p1285 @p1281 @p1279 @p1249 @p1247 @p1278 @p1276 @p1275 @p1273 @p1272 @p1268 @p1266 @p1265 @p1263) :args (@t1260 @t294 (@list @t1282 @t1277 @t1275 @t1276 @t1246 @t1248 @t1272 @t1274 @t1235 @t1271 @t1266 @t1263 @t1264 @t1261 @t1262))) % 39.97/40.19 (step @p1290 :rule instantiate :premises (@p117) :args (@t1283)) % 39.97/40.19 (step @p1291 :rule instantiate :premises (@p116) :args (@t1284)) % 39.97/40.19 (step @p1292 :rule instantiate :premises (@p115) :args (@t1284)) % 39.97/40.19 (step @p1293 :rule cnf_or_pos :args (@t1288)) % 39.97/40.19 (step @p1294 :rule reordering :premises (@p1293) :args ((or @t1287 @t1286 (not @t1288)))) % 39.97/40.19 (step @p1295 :rule instantiate :premises (@p114) :args (@t1284)) % 39.97/40.19 (step @p1296 :rule cnf_or_pos :args (@t1290)) % 39.97/40.19 (step @p1297 :rule reordering :premises (@p1296) :args ((or @t1286 @t1289 (not @t1290)))) % 39.97/40.19 (step @p1298 :rule instantiate :premises (@p101) :args (@t1291)) % 39.97/40.19 (step @p1299 :rule cnf_or_pos :args (@t1294)) % 39.97/40.19 (step @p1300 :rule reordering :premises (@p1299) :args ((or @t1293 @t1292 (not @t1294)))) % 39.97/40.19 (step @p1301 :rule chain_m_resolution :premises (@p1300 @p60 @p1298) :args (@t1292 @t272 (@list @t60 @t1294))) % 39.97/40.19 (step @p1302 :rule instantiate :premises (@p112) :args (@t1283)) % 39.97/40.19 (step @p1303 :rule cnf_or_pos :args (@t1297)) % 39.97/40.19 (step @p1304 :rule reordering :premises (@p1303) :args ((or @t1296 @t1261 @t1295 (not @t1297)))) % 39.97/40.19 (step @p1305 :rule instantiate :premises (@p111) :args (@t1284)) % 39.97/40.19 (step @p1306 :rule cnf_or_pos :args (@t1300)) % 39.97/40.19 (step @p1307 :rule reordering :premises (@p1306) :args ((or @t1295 @t1299 (not @t1300)))) % 39.97/40.19 (step @p1308 :rule instantiate :premises (@p103) :args (@t1284)) % 39.97/40.19 (step @p1309 :rule cnf_or_pos :args (@t1302)) % 39.97/40.19 (step @p1310 :rule reordering :premises (@p1309) :args ((or @t1298 @t1301 (not @t1302)))) % 39.97/40.19 (step @p1311 :rule instantiate :premises (@p110) :args (@t1291)) % 39.97/40.19 (step @p1312 :rule cnf_or_pos :args (@t1304)) % 39.97/40.19 (step @p1313 :rule reordering :premises (@p1312) :args ((or @t1296 @t1303 (not @t1304)))) % 39.97/40.19 (step @p1314 :rule chain_m_resolution :premises (@p1313 @p1301 @p1311) :args (@t1303 @t272 (@list @t1292 @t1304))) % 39.97/40.19 (step @p1315 :rule instantiate :premises (@p108) :args (@t1291)) % 39.97/40.19 (step @p1316 :rule cnf_or_pos :args (@t1308)) % 39.97/40.19 (step @p1317 :rule reordering :premises (@p1316) :args ((or @t1305 @t1307 @t1306 @t1272 (not @t1308)))) % 39.97/40.19 (step @p1318 :rule chain_m_resolution :premises (@p1317 @p1315 @p1314 @p1310 @p1308 @p1278 @p1276 @p1307 @p1305 @p1304 @p1302 @p1301 @p1297 @p1295 @p1294 @p1292) :args (@t1286 @t294 (@list @t1308 @t1303 @t1301 @t1302 @t1272 @t1274 @t1298 @t1300 @t1261 @t1297 @t1292 @t1289 @t1290 @t1287 @t1288))) % 39.97/40.19 (step @p1319 :rule instantiate :premises (@p117) :args (@t1309)) % 39.97/40.19 (step @p1320 :rule instantiate :premises (@p116) :args (@t1310)) % 39.97/40.19 (step @p1321 :rule instantiate :premises (@p115) :args (@t1310)) % 39.97/40.19 (step @p1322 :rule cnf_or_pos :args (@t1314)) % 39.97/40.19 (step @p1323 :rule reordering :premises (@p1322) :args ((or @t1313 @t1312 (not @t1314)))) % 39.97/40.19 (step @p1324 :rule instantiate :premises (@p114) :args (@t1310)) % 39.97/40.19 (step @p1325 :rule cnf_or_pos :args (@t1316)) % 39.97/40.19 (step @p1326 :rule reordering :premises (@p1325) :args ((or @t1312 @t1315 (not @t1316)))) % 39.97/40.19 (step @p1327 :rule instantiate :premises (@p101) :args (@t1317)) % 39.97/40.19 (step @p1328 :rule cnf_or_pos :args (@t1320)) % 39.97/40.19 (step @p1329 :rule reordering :premises (@p1328) :args ((or @t1319 @t1318 (not @t1320)))) % 39.97/40.19 (step @p1330 :rule chain_m_resolution :premises (@p1329 @p59 @p1327) :args (@t1318 @t272 (@list @t59 @t1320))) % 39.97/40.19 (step @p1331 :rule instantiate :premises (@p112) :args (@t1309)) % 39.97/40.19 (step @p1332 :rule cnf_or_pos :args (@t1323)) % 39.97/40.19 (step @p1333 :rule reordering :premises (@p1332) :args ((or @t1322 @t1287 @t1321 (not @t1323)))) % 39.97/40.19 (step @p1334 :rule instantiate :premises (@p111) :args (@t1310)) % 39.97/40.19 (step @p1335 :rule cnf_or_pos :args (@t1326)) % 39.97/40.19 (step @p1336 :rule reordering :premises (@p1335) :args ((or @t1321 @t1325 (not @t1326)))) % 39.97/40.19 (step @p1337 :rule instantiate :premises (@p103) :args (@t1310)) % 39.97/40.19 (step @p1338 :rule cnf_or_pos :args (@t1328)) % 39.97/40.19 (step @p1339 :rule reordering :premises (@p1338) :args ((or @t1324 @t1327 (not @t1328)))) % 39.97/40.19 (step @p1340 :rule instantiate :premises (@p110) :args (@t1317)) % 39.97/40.19 (step @p1341 :rule cnf_or_pos :args (@t1330)) % 39.97/40.19 (step @p1342 :rule reordering :premises (@p1341) :args ((or @t1322 @t1329 (not @t1330)))) % 39.97/40.19 (step @p1343 :rule chain_m_resolution :premises (@p1342 @p1330 @p1340) :args (@t1329 @t272 (@list @t1318 @t1330))) % 39.97/40.19 (step @p1344 :rule instantiate :premises (@p108) :args (@t1317)) % 39.97/40.19 (step @p1345 :rule cnf_or_pos :args (@t1334)) % 39.97/40.19 (step @p1346 :rule reordering :premises (@p1345) :args ((or @t1331 @t1333 @t1332 @t1298 (not @t1334)))) % 39.97/40.19 (step @p1347 :rule chain_m_resolution :premises (@p1346 @p1344 @p1343 @p1339 @p1337 @p1307 @p1305 @p1336 @p1334 @p1333 @p1331 @p1330 @p1326 @p1324 @p1323 @p1321) :args (@t1312 @t294 (@list @t1334 @t1329 @t1327 @t1328 @t1298 @t1300 @t1324 @t1326 @t1287 @t1323 @t1318 @t1315 @t1316 @t1313 @t1314))) % 39.97/40.19 (step @p1348 :rule instantiate :premises (@p117) :args (@t1335)) % 39.97/40.19 (step @p1349 :rule instantiate :premises (@p116) :args (@t1336)) % 39.97/40.19 (step @p1350 :rule instantiate :premises (@p115) :args (@t1336)) % 39.97/40.19 (step @p1351 :rule cnf_or_pos :args (@t1340)) % 39.97/40.19 (step @p1352 :rule reordering :premises (@p1351) :args ((or @t1339 @t1338 (not @t1340)))) % 39.97/40.19 (step @p1353 :rule instantiate :premises (@p114) :args (@t1336)) % 39.97/40.19 (step @p1354 :rule cnf_or_pos :args (@t1342)) % 39.97/40.19 (step @p1355 :rule reordering :premises (@p1354) :args ((or @t1338 @t1341 (not @t1342)))) % 39.97/40.19 (step @p1356 :rule instantiate :premises (@p101) :args (@t1343)) % 39.97/40.19 (step @p1357 :rule cnf_or_pos :args (@t1346)) % 39.97/40.19 (step @p1358 :rule reordering :premises (@p1357) :args ((or @t1345 @t1344 (not @t1346)))) % 39.97/40.19 (step @p1359 :rule chain_m_resolution :premises (@p1358 @p58 @p1356) :args (@t1344 @t272 (@list @t58 @t1346))) % 39.97/40.19 (step @p1360 :rule instantiate :premises (@p112) :args (@t1335)) % 39.97/40.19 (step @p1361 :rule cnf_or_pos :args (@t1349)) % 39.97/40.19 (step @p1362 :rule reordering :premises (@p1361) :args ((or @t1348 @t1313 @t1347 (not @t1349)))) % 39.97/40.19 (step @p1363 :rule instantiate :premises (@p111) :args (@t1336)) % 39.97/40.19 (step @p1364 :rule cnf_or_pos :args (@t1352)) % 39.97/40.19 (step @p1365 :rule reordering :premises (@p1364) :args ((or @t1347 @t1351 (not @t1352)))) % 39.97/40.19 (step @p1366 :rule instantiate :premises (@p103) :args (@t1336)) % 39.97/40.19 (step @p1367 :rule cnf_or_pos :args (@t1354)) % 39.97/40.19 (step @p1368 :rule reordering :premises (@p1367) :args ((or @t1350 @t1353 (not @t1354)))) % 39.97/40.19 (step @p1369 :rule instantiate :premises (@p110) :args (@t1343)) % 39.97/40.19 (step @p1370 :rule cnf_or_pos :args (@t1356)) % 39.97/40.19 (step @p1371 :rule reordering :premises (@p1370) :args ((or @t1348 @t1355 (not @t1356)))) % 39.97/40.19 (step @p1372 :rule chain_m_resolution :premises (@p1371 @p1359 @p1369) :args (@t1355 @t272 (@list @t1344 @t1356))) % 39.97/40.19 (step @p1373 :rule instantiate :premises (@p108) :args (@t1343)) % 39.97/40.19 (step @p1374 :rule cnf_or_pos :args (@t1360)) % 39.97/40.19 (step @p1375 :rule reordering :premises (@p1374) :args ((or @t1357 @t1359 @t1358 @t1324 (not @t1360)))) % 39.97/40.19 (step @p1376 :rule chain_m_resolution :premises (@p1375 @p1373 @p1372 @p1368 @p1366 @p1336 @p1334 @p1365 @p1363 @p1362 @p1360 @p1359 @p1355 @p1353 @p1352 @p1350) :args (@t1338 @t294 (@list @t1360 @t1355 @t1353 @t1354 @t1324 @t1326 @t1350 @t1352 @t1313 @t1349 @t1344 @t1341 @t1342 @t1339 @t1340))) % 39.97/40.19 (step @p1377 :rule instantiate :premises (@p117) :args (@t1361)) % 39.97/40.19 (step @p1378 :rule instantiate :premises (@p116) :args (@t1362)) % 39.97/40.19 (step @p1379 :rule instantiate :premises (@p115) :args (@t1362)) % 39.97/40.19 (step @p1380 :rule cnf_or_pos :args (@t1366)) % 39.97/40.19 (step @p1381 :rule reordering :premises (@p1380) :args ((or @t1365 @t1364 (not @t1366)))) % 39.97/40.19 (step @p1382 :rule instantiate :premises (@p114) :args (@t1362)) % 39.97/40.19 (step @p1383 :rule cnf_or_pos :args (@t1368)) % 39.97/40.19 (step @p1384 :rule reordering :premises (@p1383) :args ((or @t1364 @t1367 (not @t1368)))) % 39.97/40.19 (step @p1385 :rule instantiate :premises (@p101) :args (@t1369)) % 39.97/40.19 (step @p1386 :rule cnf_or_pos :args (@t1372)) % 39.97/40.19 (step @p1387 :rule reordering :premises (@p1386) :args ((or @t1371 @t1370 (not @t1372)))) % 39.97/40.19 (step @p1388 :rule chain_m_resolution :premises (@p1387 @p57 @p1385) :args (@t1370 @t272 (@list @t57 @t1372))) % 39.97/40.19 (step @p1389 :rule instantiate :premises (@p112) :args (@t1361)) % 39.97/40.19 (step @p1390 :rule cnf_or_pos :args (@t1375)) % 39.97/40.19 (step @p1391 :rule reordering :premises (@p1390) :args ((or @t1374 @t1339 @t1373 (not @t1375)))) % 39.97/40.19 (step @p1392 :rule instantiate :premises (@p111) :args (@t1362)) % 39.97/40.19 (step @p1393 :rule cnf_or_pos :args (@t1378)) % 39.97/40.19 (step @p1394 :rule reordering :premises (@p1393) :args ((or @t1373 @t1377 (not @t1378)))) % 39.97/40.19 (step @p1395 :rule instantiate :premises (@p103) :args (@t1362)) % 39.97/40.19 (step @p1396 :rule cnf_or_pos :args (@t1380)) % 39.97/40.19 (step @p1397 :rule reordering :premises (@p1396) :args ((or @t1376 @t1379 (not @t1380)))) % 39.97/40.19 (step @p1398 :rule instantiate :premises (@p110) :args (@t1369)) % 39.97/40.19 (step @p1399 :rule cnf_or_pos :args (@t1382)) % 39.97/40.19 (step @p1400 :rule reordering :premises (@p1399) :args ((or @t1374 @t1381 (not @t1382)))) % 39.97/40.19 (step @p1401 :rule chain_m_resolution :premises (@p1400 @p1388 @p1398) :args (@t1381 @t272 (@list @t1370 @t1382))) % 39.97/40.19 (step @p1402 :rule instantiate :premises (@p108) :args (@t1369)) % 39.97/40.19 (step @p1403 :rule cnf_or_pos :args (@t1386)) % 39.97/40.19 (step @p1404 :rule reordering :premises (@p1403) :args ((or @t1383 @t1385 @t1384 @t1350 (not @t1386)))) % 39.97/40.19 (step @p1405 :rule chain_m_resolution :premises (@p1404 @p1402 @p1401 @p1397 @p1395 @p1365 @p1363 @p1394 @p1392 @p1391 @p1389 @p1388 @p1384 @p1382 @p1381 @p1379) :args (@t1364 @t294 (@list @t1386 @t1381 @t1379 @t1380 @t1350 @t1352 @t1376 @t1378 @t1339 @t1375 @t1370 @t1367 @t1368 @t1365 @t1366))) % 39.97/40.19 (step @p1406 :rule instantiate :premises (@p117) :args (@t1387)) % 39.97/40.19 (step @p1407 :rule instantiate :premises (@p116) :args (@t1388)) % 39.97/40.19 (step @p1408 :rule instantiate :premises (@p115) :args (@t1388)) % 39.97/40.19 (step @p1409 :rule cnf_or_pos :args (@t1392)) % 39.97/40.19 (step @p1410 :rule reordering :premises (@p1409) :args ((or @t1391 @t1390 (not @t1392)))) % 39.97/40.19 (step @p1411 :rule instantiate :premises (@p114) :args (@t1388)) % 39.97/40.19 (step @p1412 :rule cnf_or_pos :args (@t1394)) % 39.97/40.19 (step @p1413 :rule reordering :premises (@p1412) :args ((or @t1390 @t1393 (not @t1394)))) % 39.97/40.19 (step @p1414 :rule instantiate :premises (@p101) :args (@t1395)) % 39.97/40.19 (step @p1415 :rule cnf_or_pos :args (@t1398)) % 39.97/40.19 (step @p1416 :rule reordering :premises (@p1415) :args ((or @t1397 @t1396 (not @t1398)))) % 39.97/40.19 (step @p1417 :rule chain_m_resolution :premises (@p1416 @p56 @p1414) :args (@t1396 @t272 (@list @t56 @t1398))) % 39.97/40.19 (step @p1418 :rule instantiate :premises (@p112) :args (@t1387)) % 39.97/40.19 (step @p1419 :rule cnf_or_pos :args (@t1401)) % 39.97/40.19 (step @p1420 :rule reordering :premises (@p1419) :args ((or @t1400 @t1365 @t1399 (not @t1401)))) % 39.97/40.19 (step @p1421 :rule instantiate :premises (@p111) :args (@t1388)) % 39.97/40.19 (step @p1422 :rule cnf_or_pos :args (@t1404)) % 39.97/40.19 (step @p1423 :rule reordering :premises (@p1422) :args ((or @t1399 @t1403 (not @t1404)))) % 39.97/40.19 (step @p1424 :rule instantiate :premises (@p103) :args (@t1388)) % 39.97/40.19 (step @p1425 :rule cnf_or_pos :args (@t1406)) % 39.97/40.19 (step @p1426 :rule reordering :premises (@p1425) :args ((or @t1402 @t1405 (not @t1406)))) % 39.97/40.19 (step @p1427 :rule instantiate :premises (@p110) :args (@t1395)) % 39.97/40.19 (step @p1428 :rule cnf_or_pos :args (@t1408)) % 39.97/40.19 (step @p1429 :rule reordering :premises (@p1428) :args ((or @t1400 @t1407 (not @t1408)))) % 39.97/40.19 (step @p1430 :rule chain_m_resolution :premises (@p1429 @p1417 @p1427) :args (@t1407 @t272 (@list @t1396 @t1408))) % 39.97/40.19 (step @p1431 :rule instantiate :premises (@p108) :args (@t1395)) % 39.97/40.19 (step @p1432 :rule cnf_or_pos :args (@t1412)) % 39.97/40.19 (step @p1433 :rule reordering :premises (@p1432) :args ((or @t1409 @t1411 @t1410 @t1376 (not @t1412)))) % 39.97/40.19 (step @p1434 :rule chain_m_resolution :premises (@p1433 @p1431 @p1430 @p1426 @p1424 @p1394 @p1392 @p1423 @p1421 @p1420 @p1418 @p1417 @p1413 @p1411 @p1410 @p1408) :args (@t1390 @t294 (@list @t1412 @t1407 @t1405 @t1406 @t1376 @t1378 @t1402 @t1404 @t1365 @t1401 @t1396 @t1393 @t1394 @t1391 @t1392))) % 39.97/40.19 (step @p1435 :rule instantiate :premises (@p117) :args (@t1413)) % 39.97/40.19 (step @p1436 :rule instantiate :premises (@p116) :args (@t1414)) % 39.97/40.19 (step @p1437 :rule instantiate :premises (@p115) :args (@t1414)) % 39.97/40.19 (step @p1438 :rule cnf_or_pos :args (@t1418)) % 39.97/40.19 (step @p1439 :rule reordering :premises (@p1438) :args ((or @t1417 @t1416 (not @t1418)))) % 39.97/40.19 (step @p1440 :rule instantiate :premises (@p114) :args (@t1414)) % 39.97/40.19 (step @p1441 :rule cnf_or_pos :args (@t1420)) % 39.97/40.19 (step @p1442 :rule reordering :premises (@p1441) :args ((or @t1416 @t1419 (not @t1420)))) % 39.97/40.19 (step @p1443 :rule instantiate :premises (@p101) :args (@t1421)) % 39.97/40.19 (step @p1444 :rule cnf_or_pos :args (@t1424)) % 39.97/40.19 (step @p1445 :rule reordering :premises (@p1444) :args ((or @t1423 @t1422 (not @t1424)))) % 39.97/40.19 (step @p1446 :rule chain_m_resolution :premises (@p1445 @p55 @p1443) :args (@t1422 @t272 (@list @t55 @t1424))) % 39.97/40.19 (step @p1447 :rule instantiate :premises (@p112) :args (@t1413)) % 39.97/40.19 (step @p1448 :rule cnf_or_pos :args (@t1427)) % 39.97/40.19 (step @p1449 :rule reordering :premises (@p1448) :args ((or @t1426 @t1391 @t1425 (not @t1427)))) % 39.97/40.19 (step @p1450 :rule instantiate :premises (@p111) :args (@t1414)) % 39.97/40.19 (step @p1451 :rule cnf_or_pos :args (@t1430)) % 39.97/40.19 (step @p1452 :rule reordering :premises (@p1451) :args ((or @t1425 @t1429 (not @t1430)))) % 39.97/40.19 (step @p1453 :rule instantiate :premises (@p103) :args (@t1414)) % 39.97/40.19 (step @p1454 :rule cnf_or_pos :args (@t1432)) % 39.97/40.19 (step @p1455 :rule reordering :premises (@p1454) :args ((or @t1428 @t1431 (not @t1432)))) % 39.97/40.19 (step @p1456 :rule instantiate :premises (@p110) :args (@t1421)) % 39.97/40.19 (step @p1457 :rule cnf_or_pos :args (@t1434)) % 39.97/40.19 (step @p1458 :rule reordering :premises (@p1457) :args ((or @t1426 @t1433 (not @t1434)))) % 39.97/40.19 (step @p1459 :rule chain_m_resolution :premises (@p1458 @p1446 @p1456) :args (@t1433 @t272 (@list @t1422 @t1434))) % 39.97/40.19 (step @p1460 :rule instantiate :premises (@p108) :args (@t1421)) % 39.97/40.19 (step @p1461 :rule cnf_or_pos :args (@t1438)) % 39.97/40.19 (step @p1462 :rule reordering :premises (@p1461) :args ((or @t1435 @t1437 @t1436 @t1402 (not @t1438)))) % 39.97/40.19 (step @p1463 :rule chain_m_resolution :premises (@p1462 @p1460 @p1459 @p1455 @p1453 @p1423 @p1421 @p1452 @p1450 @p1449 @p1447 @p1446 @p1442 @p1440 @p1439 @p1437) :args (@t1416 @t294 (@list @t1438 @t1433 @t1431 @t1432 @t1402 @t1404 @t1428 @t1430 @t1391 @t1427 @t1422 @t1419 @t1420 @t1417 @t1418))) % 39.97/40.19 (step @p1464 :rule instantiate :premises (@p117) :args (@t1439)) % 39.97/40.19 (step @p1465 :rule instantiate :premises (@p116) :args (@t1440)) % 39.97/40.19 (step @p1466 :rule instantiate :premises (@p115) :args (@t1440)) % 39.97/40.19 (step @p1467 :rule cnf_or_pos :args (@t1444)) % 39.97/40.19 (step @p1468 :rule reordering :premises (@p1467) :args ((or @t1443 @t1442 (not @t1444)))) % 39.97/40.19 (step @p1469 :rule instantiate :premises (@p114) :args (@t1440)) % 39.97/40.19 (step @p1470 :rule cnf_or_pos :args (@t1446)) % 39.97/40.19 (step @p1471 :rule reordering :premises (@p1470) :args ((or @t1442 @t1445 (not @t1446)))) % 39.97/40.19 (step @p1472 :rule instantiate :premises (@p101) :args (@t1447)) % 39.97/40.19 (step @p1473 :rule cnf_or_pos :args (@t1450)) % 39.97/40.19 (step @p1474 :rule reordering :premises (@p1473) :args ((or @t1449 @t1448 (not @t1450)))) % 39.97/40.19 (step @p1475 :rule chain_m_resolution :premises (@p1474 @p54 @p1472) :args (@t1448 @t272 (@list @t54 @t1450))) % 39.97/40.19 (step @p1476 :rule instantiate :premises (@p112) :args (@t1439)) % 39.97/40.19 (step @p1477 :rule cnf_or_pos :args (@t1453)) % 39.97/40.19 (step @p1478 :rule reordering :premises (@p1477) :args ((or @t1452 @t1417 @t1451 (not @t1453)))) % 39.97/40.19 (step @p1479 :rule instantiate :premises (@p111) :args (@t1440)) % 39.97/40.19 (step @p1480 :rule cnf_or_pos :args (@t1456)) % 39.97/40.19 (step @p1481 :rule reordering :premises (@p1480) :args ((or @t1451 @t1455 (not @t1456)))) % 39.97/40.19 (step @p1482 :rule instantiate :premises (@p103) :args (@t1440)) % 39.97/40.19 (step @p1483 :rule cnf_or_pos :args (@t1458)) % 39.97/40.19 (step @p1484 :rule reordering :premises (@p1483) :args ((or @t1454 @t1457 (not @t1458)))) % 39.97/40.19 (step @p1485 :rule instantiate :premises (@p110) :args (@t1447)) % 39.97/40.19 (step @p1486 :rule cnf_or_pos :args (@t1460)) % 39.97/40.19 (step @p1487 :rule reordering :premises (@p1486) :args ((or @t1452 @t1459 (not @t1460)))) % 39.97/40.19 (step @p1488 :rule chain_m_resolution :premises (@p1487 @p1475 @p1485) :args (@t1459 @t272 (@list @t1448 @t1460))) % 39.97/40.19 (step @p1489 :rule instantiate :premises (@p108) :args (@t1447)) % 39.97/40.19 (step @p1490 :rule cnf_or_pos :args (@t1464)) % 39.97/40.19 (step @p1491 :rule reordering :premises (@p1490) :args ((or @t1461 @t1463 @t1462 @t1428 (not @t1464)))) % 39.97/40.19 (step @p1492 :rule chain_m_resolution :premises (@p1491 @p1489 @p1488 @p1484 @p1482 @p1452 @p1450 @p1481 @p1479 @p1478 @p1476 @p1475 @p1471 @p1469 @p1468 @p1466) :args (@t1442 @t294 (@list @t1464 @t1459 @t1457 @t1458 @t1428 @t1430 @t1454 @t1456 @t1417 @t1453 @t1448 @t1445 @t1446 @t1443 @t1444))) % 39.97/40.19 (step @p1493 :rule instantiate :premises (@p117) :args (@t1465)) % 39.97/40.19 (step @p1494 :rule instantiate :premises (@p116) :args (@t1466)) % 39.97/40.19 (step @p1495 :rule instantiate :premises (@p115) :args (@t1466)) % 39.97/40.19 (step @p1496 :rule cnf_or_pos :args (@t1470)) % 39.97/40.19 (step @p1497 :rule reordering :premises (@p1496) :args ((or @t1469 @t1468 (not @t1470)))) % 39.97/40.19 (step @p1498 :rule instantiate :premises (@p114) :args (@t1466)) % 39.97/40.19 (step @p1499 :rule cnf_or_pos :args (@t1472)) % 39.97/40.19 (step @p1500 :rule reordering :premises (@p1499) :args ((or @t1468 @t1471 (not @t1472)))) % 39.97/40.19 (step @p1501 :rule instantiate :premises (@p101) :args (@t1473)) % 39.97/40.19 (step @p1502 :rule cnf_or_pos :args (@t1476)) % 39.97/40.19 (step @p1503 :rule reordering :premises (@p1502) :args ((or @t1475 @t1474 (not @t1476)))) % 39.97/40.19 (step @p1504 :rule chain_m_resolution :premises (@p1503 @p53 @p1501) :args (@t1474 @t272 (@list @t53 @t1476))) % 39.97/40.19 (step @p1505 :rule instantiate :premises (@p112) :args (@t1465)) % 39.97/40.19 (step @p1506 :rule cnf_or_pos :args (@t1479)) % 39.97/40.19 (step @p1507 :rule reordering :premises (@p1506) :args ((or @t1478 @t1443 @t1477 (not @t1479)))) % 39.97/40.19 (step @p1508 :rule instantiate :premises (@p111) :args (@t1466)) % 39.97/40.19 (step @p1509 :rule cnf_or_pos :args (@t1482)) % 39.97/40.19 (step @p1510 :rule reordering :premises (@p1509) :args ((or @t1477 @t1481 (not @t1482)))) % 39.97/40.19 (step @p1511 :rule instantiate :premises (@p103) :args (@t1466)) % 39.97/40.19 (step @p1512 :rule cnf_or_pos :args (@t1484)) % 39.97/40.19 (step @p1513 :rule reordering :premises (@p1512) :args ((or @t1480 @t1483 (not @t1484)))) % 39.97/40.19 (step @p1514 :rule instantiate :premises (@p110) :args (@t1473)) % 39.97/40.19 (step @p1515 :rule cnf_or_pos :args (@t1486)) % 39.97/40.19 (step @p1516 :rule reordering :premises (@p1515) :args ((or @t1478 @t1485 (not @t1486)))) % 39.97/40.19 (step @p1517 :rule chain_m_resolution :premises (@p1516 @p1504 @p1514) :args (@t1485 @t272 (@list @t1474 @t1486))) % 39.97/40.19 (step @p1518 :rule instantiate :premises (@p108) :args (@t1473)) % 39.97/40.19 (step @p1519 :rule cnf_or_pos :args (@t1490)) % 39.97/40.19 (step @p1520 :rule reordering :premises (@p1519) :args ((or @t1487 @t1489 @t1488 @t1454 (not @t1490)))) % 39.97/40.19 (step @p1521 :rule chain_m_resolution :premises (@p1520 @p1518 @p1517 @p1513 @p1511 @p1481 @p1479 @p1510 @p1508 @p1507 @p1505 @p1504 @p1500 @p1498 @p1497 @p1495) :args (@t1468 @t294 (@list @t1490 @t1485 @t1483 @t1484 @t1454 @t1456 @t1480 @t1482 @t1443 @t1479 @t1474 @t1471 @t1472 @t1469 @t1470))) % 39.97/40.19 (step @p1522 :rule instantiate :premises (@p117) :args (@t1491)) % 39.97/40.19 (step @p1523 :rule instantiate :premises (@p116) :args (@t1492)) % 39.97/40.19 (step @p1524 :rule instantiate :premises (@p115) :args (@t1492)) % 39.97/40.19 (step @p1525 :rule cnf_or_pos :args (@t1496)) % 39.97/40.19 (step @p1526 :rule reordering :premises (@p1525) :args ((or @t1495 @t1494 (not @t1496)))) % 39.97/40.19 (step @p1527 :rule instantiate :premises (@p114) :args (@t1492)) % 39.97/40.19 (step @p1528 :rule cnf_or_pos :args (@t1498)) % 39.97/40.19 (step @p1529 :rule reordering :premises (@p1528) :args ((or @t1494 @t1497 (not @t1498)))) % 39.97/40.19 (step @p1530 :rule instantiate :premises (@p101) :args (@t1499)) % 39.97/40.19 (step @p1531 :rule cnf_or_pos :args (@t1502)) % 39.97/40.19 (step @p1532 :rule reordering :premises (@p1531) :args ((or @t1501 @t1500 (not @t1502)))) % 39.97/40.19 (step @p1533 :rule chain_m_resolution :premises (@p1532 @p52 @p1530) :args (@t1500 @t272 (@list @t52 @t1502))) % 39.97/40.19 (step @p1534 :rule instantiate :premises (@p112) :args (@t1491)) % 39.97/40.19 (step @p1535 :rule cnf_or_pos :args (@t1505)) % 39.97/40.19 (step @p1536 :rule reordering :premises (@p1535) :args ((or @t1504 @t1469 @t1503 (not @t1505)))) % 39.97/40.19 (step @p1537 :rule instantiate :premises (@p111) :args (@t1492)) % 39.97/40.19 (step @p1538 :rule cnf_or_pos :args (@t1508)) % 39.97/40.19 (step @p1539 :rule reordering :premises (@p1538) :args ((or @t1503 @t1507 (not @t1508)))) % 39.97/40.19 (step @p1540 :rule instantiate :premises (@p103) :args (@t1492)) % 39.97/40.19 (step @p1541 :rule cnf_or_pos :args (@t1510)) % 39.97/40.19 (step @p1542 :rule reordering :premises (@p1541) :args ((or @t1506 @t1509 (not @t1510)))) % 39.97/40.19 (step @p1543 :rule instantiate :premises (@p110) :args (@t1499)) % 39.97/40.19 (step @p1544 :rule cnf_or_pos :args (@t1512)) % 39.97/40.19 (step @p1545 :rule reordering :premises (@p1544) :args ((or @t1504 @t1511 (not @t1512)))) % 39.97/40.19 (step @p1546 :rule chain_m_resolution :premises (@p1545 @p1533 @p1543) :args (@t1511 @t272 (@list @t1500 @t1512))) % 39.97/40.19 (step @p1547 :rule instantiate :premises (@p108) :args (@t1499)) % 39.97/40.19 (step @p1548 :rule cnf_or_pos :args (@t1516)) % 39.97/40.19 (step @p1549 :rule reordering :premises (@p1548) :args ((or @t1513 @t1515 @t1514 @t1480 (not @t1516)))) % 39.97/40.19 (step @p1550 :rule chain_m_resolution :premises (@p1549 @p1547 @p1546 @p1542 @p1540 @p1510 @p1508 @p1539 @p1537 @p1536 @p1534 @p1533 @p1529 @p1527 @p1526 @p1524) :args (@t1494 @t294 (@list @t1516 @t1511 @t1509 @t1510 @t1480 @t1482 @t1506 @t1508 @t1469 @t1505 @t1500 @t1497 @t1498 @t1495 @t1496))) % 39.97/40.19 (step @p1551 :rule instantiate :premises (@p117) :args (@t1517)) % 39.97/40.19 (step @p1552 :rule instantiate :premises (@p116) :args (@t1518)) % 39.97/40.19 (step @p1553 :rule instantiate :premises (@p115) :args (@t1518)) % 39.97/40.19 (step @p1554 :rule cnf_or_pos :args (@t1522)) % 39.97/40.19 (step @p1555 :rule reordering :premises (@p1554) :args ((or @t1521 @t1520 (not @t1522)))) % 39.97/40.19 (step @p1556 :rule instantiate :premises (@p114) :args (@t1518)) % 39.97/40.19 (step @p1557 :rule cnf_or_pos :args (@t1524)) % 39.97/40.19 (step @p1558 :rule reordering :premises (@p1557) :args ((or @t1520 @t1523 (not @t1524)))) % 39.97/40.19 (step @p1559 :rule instantiate :premises (@p101) :args (@t1525)) % 39.97/40.19 (step @p1560 :rule cnf_or_pos :args (@t1528)) % 39.97/40.19 (step @p1561 :rule reordering :premises (@p1560) :args ((or @t1527 @t1526 (not @t1528)))) % 39.97/40.19 (step @p1562 :rule chain_m_resolution :premises (@p1561 @p51 @p1559) :args (@t1526 @t272 (@list @t51 @t1528))) % 39.97/40.19 (step @p1563 :rule instantiate :premises (@p112) :args (@t1517)) % 39.97/40.19 (step @p1564 :rule cnf_or_pos :args (@t1531)) % 39.97/40.19 (step @p1565 :rule reordering :premises (@p1564) :args ((or @t1530 @t1495 @t1529 (not @t1531)))) % 39.97/40.19 (step @p1566 :rule instantiate :premises (@p111) :args (@t1518)) % 39.97/40.19 (step @p1567 :rule cnf_or_pos :args (@t1534)) % 39.97/40.19 (step @p1568 :rule reordering :premises (@p1567) :args ((or @t1529 @t1533 (not @t1534)))) % 39.97/40.19 (step @p1569 :rule instantiate :premises (@p103) :args (@t1518)) % 39.97/40.19 (step @p1570 :rule cnf_or_pos :args (@t1536)) % 39.97/40.19 (step @p1571 :rule reordering :premises (@p1570) :args ((or @t1532 @t1535 (not @t1536)))) % 39.97/40.19 (step @p1572 :rule instantiate :premises (@p110) :args (@t1525)) % 39.97/40.19 (step @p1573 :rule cnf_or_pos :args (@t1538)) % 39.97/40.19 (step @p1574 :rule reordering :premises (@p1573) :args ((or @t1530 @t1537 (not @t1538)))) % 39.97/40.19 (step @p1575 :rule chain_m_resolution :premises (@p1574 @p1562 @p1572) :args (@t1537 @t272 (@list @t1526 @t1538))) % 39.97/40.19 (step @p1576 :rule instantiate :premises (@p108) :args (@t1525)) % 39.97/40.19 (step @p1577 :rule cnf_or_pos :args (@t1542)) % 39.97/40.19 (step @p1578 :rule reordering :premises (@p1577) :args ((or @t1539 @t1541 @t1540 @t1506 (not @t1542)))) % 39.97/40.19 (step @p1579 :rule chain_m_resolution :premises (@p1578 @p1576 @p1575 @p1571 @p1569 @p1539 @p1537 @p1568 @p1566 @p1565 @p1563 @p1562 @p1558 @p1556 @p1555 @p1553) :args (@t1520 @t294 (@list @t1542 @t1537 @t1535 @t1536 @t1506 @t1508 @t1532 @t1534 @t1495 @t1531 @t1526 @t1523 @t1524 @t1521 @t1522))) % 39.97/40.19 (step @p1580 :rule instantiate :premises (@p117) :args (@t1543)) % 39.97/40.19 (step @p1581 :rule instantiate :premises (@p116) :args (@t1544)) % 39.97/40.19 (step @p1582 :rule instantiate :premises (@p115) :args (@t1544)) % 39.97/40.19 (step @p1583 :rule cnf_or_pos :args (@t1548)) % 39.97/40.19 (step @p1584 :rule reordering :premises (@p1583) :args ((or @t1547 @t1546 (not @t1548)))) % 39.97/40.19 (step @p1585 :rule instantiate :premises (@p114) :args (@t1544)) % 39.97/40.19 (step @p1586 :rule cnf_or_pos :args (@t1550)) % 39.97/40.19 (step @p1587 :rule reordering :premises (@p1586) :args ((or @t1546 @t1549 (not @t1550)))) % 39.97/40.19 (step @p1588 :rule instantiate :premises (@p101) :args (@t1551)) % 39.97/40.19 (step @p1589 :rule cnf_or_pos :args (@t1554)) % 39.97/40.19 (step @p1590 :rule reordering :premises (@p1589) :args ((or @t1553 @t1552 (not @t1554)))) % 39.97/40.19 (step @p1591 :rule chain_m_resolution :premises (@p1590 @p50 @p1588) :args (@t1552 @t272 (@list @t50 @t1554))) % 39.97/40.19 (step @p1592 :rule instantiate :premises (@p112) :args (@t1543)) % 39.97/40.19 (step @p1593 :rule cnf_or_pos :args (@t1557)) % 39.97/40.19 (step @p1594 :rule reordering :premises (@p1593) :args ((or @t1556 @t1521 @t1555 (not @t1557)))) % 39.97/40.19 (step @p1595 :rule instantiate :premises (@p111) :args (@t1544)) % 39.97/40.19 (step @p1596 :rule cnf_or_pos :args (@t1560)) % 39.97/40.19 (step @p1597 :rule reordering :premises (@p1596) :args ((or @t1555 @t1559 (not @t1560)))) % 39.97/40.19 (step @p1598 :rule instantiate :premises (@p103) :args (@t1544)) % 39.97/40.19 (step @p1599 :rule cnf_or_pos :args (@t1562)) % 39.97/40.19 (step @p1600 :rule reordering :premises (@p1599) :args ((or @t1558 @t1561 (not @t1562)))) % 39.97/40.19 (step @p1601 :rule instantiate :premises (@p110) :args (@t1551)) % 39.97/40.19 (step @p1602 :rule cnf_or_pos :args (@t1564)) % 39.97/40.19 (step @p1603 :rule reordering :premises (@p1602) :args ((or @t1556 @t1563 (not @t1564)))) % 39.97/40.19 (step @p1604 :rule chain_m_resolution :premises (@p1603 @p1591 @p1601) :args (@t1563 @t272 (@list @t1552 @t1564))) % 39.97/40.19 (step @p1605 :rule instantiate :premises (@p108) :args (@t1551)) % 39.97/40.19 (step @p1606 :rule cnf_or_pos :args (@t1568)) % 39.97/40.19 (step @p1607 :rule reordering :premises (@p1606) :args ((or @t1565 @t1567 @t1566 @t1532 (not @t1568)))) % 39.97/40.19 (step @p1608 :rule chain_m_resolution :premises (@p1607 @p1605 @p1604 @p1600 @p1598 @p1568 @p1566 @p1597 @p1595 @p1594 @p1592 @p1591 @p1587 @p1585 @p1584 @p1582) :args (@t1546 @t294 (@list @t1568 @t1563 @t1561 @t1562 @t1532 @t1534 @t1558 @t1560 @t1521 @t1557 @t1552 @t1549 @t1550 @t1547 @t1548))) % 39.97/40.19 (step @p1609 :rule instantiate :premises (@p117) :args (@t1569)) % 39.97/40.19 (step @p1610 :rule instantiate :premises (@p116) :args (@t1570)) % 39.97/40.19 (step @p1611 :rule instantiate :premises (@p115) :args (@t1570)) % 39.97/40.19 (step @p1612 :rule cnf_or_pos :args (@t1574)) % 39.97/40.19 (step @p1613 :rule reordering :premises (@p1612) :args ((or @t1573 @t1572 (not @t1574)))) % 39.97/40.19 (step @p1614 :rule instantiate :premises (@p114) :args (@t1570)) % 39.97/40.19 (step @p1615 :rule cnf_or_pos :args (@t1576)) % 39.97/40.19 (step @p1616 :rule reordering :premises (@p1615) :args ((or @t1572 @t1575 (not @t1576)))) % 39.97/40.19 (step @p1617 :rule instantiate :premises (@p101) :args (@t1577)) % 39.97/40.19 (step @p1618 :rule cnf_or_pos :args (@t1580)) % 39.97/40.19 (step @p1619 :rule reordering :premises (@p1618) :args ((or @t1579 @t1578 (not @t1580)))) % 39.97/40.19 (step @p1620 :rule chain_m_resolution :premises (@p1619 @p49 @p1617) :args (@t1578 @t272 (@list @t49 @t1580))) % 39.97/40.19 (step @p1621 :rule instantiate :premises (@p112) :args (@t1569)) % 39.97/40.19 (step @p1622 :rule cnf_or_pos :args (@t1583)) % 39.97/40.19 (step @p1623 :rule reordering :premises (@p1622) :args ((or @t1582 @t1547 @t1581 (not @t1583)))) % 39.97/40.19 (step @p1624 :rule instantiate :premises (@p111) :args (@t1570)) % 39.97/40.19 (step @p1625 :rule cnf_or_pos :args (@t1586)) % 39.97/40.19 (step @p1626 :rule reordering :premises (@p1625) :args ((or @t1581 @t1585 (not @t1586)))) % 39.97/40.19 (step @p1627 :rule instantiate :premises (@p103) :args (@t1570)) % 39.97/40.19 (step @p1628 :rule cnf_or_pos :args (@t1588)) % 39.97/40.19 (step @p1629 :rule reordering :premises (@p1628) :args ((or @t1584 @t1587 (not @t1588)))) % 39.97/40.19 (step @p1630 :rule instantiate :premises (@p110) :args (@t1577)) % 39.97/40.19 (step @p1631 :rule cnf_or_pos :args (@t1590)) % 39.97/40.19 (step @p1632 :rule reordering :premises (@p1631) :args ((or @t1582 @t1589 (not @t1590)))) % 39.97/40.19 (step @p1633 :rule chain_m_resolution :premises (@p1632 @p1620 @p1630) :args (@t1589 @t272 (@list @t1578 @t1590))) % 39.97/40.19 (step @p1634 :rule instantiate :premises (@p108) :args (@t1577)) % 39.97/40.19 (step @p1635 :rule cnf_or_pos :args (@t1594)) % 39.97/40.19 (step @p1636 :rule reordering :premises (@p1635) :args ((or @t1591 @t1593 @t1592 @t1558 (not @t1594)))) % 39.97/40.19 (step @p1637 :rule chain_m_resolution :premises (@p1636 @p1634 @p1633 @p1629 @p1627 @p1597 @p1595 @p1626 @p1624 @p1623 @p1621 @p1620 @p1616 @p1614 @p1613 @p1611) :args (@t1572 @t294 (@list @t1594 @t1589 @t1587 @t1588 @t1558 @t1560 @t1584 @t1586 @t1547 @t1583 @t1578 @t1575 @t1576 @t1573 @t1574))) % 39.97/40.19 (step @p1638 :rule instantiate :premises (@p117) :args (@t1595)) % 39.97/40.19 (step @p1639 :rule instantiate :premises (@p116) :args (@t1596)) % 39.97/40.19 (step @p1640 :rule instantiate :premises (@p115) :args (@t1596)) % 39.97/40.19 (step @p1641 :rule cnf_or_pos :args (@t1600)) % 39.97/40.19 (step @p1642 :rule reordering :premises (@p1641) :args ((or @t1599 @t1598 (not @t1600)))) % 39.97/40.19 (step @p1643 :rule instantiate :premises (@p114) :args (@t1596)) % 39.97/40.19 (step @p1644 :rule cnf_or_pos :args (@t1602)) % 39.97/40.19 (step @p1645 :rule reordering :premises (@p1644) :args ((or @t1598 @t1601 (not @t1602)))) % 39.97/40.19 (step @p1646 :rule instantiate :premises (@p101) :args (@t1603)) % 39.97/40.19 (step @p1647 :rule cnf_or_pos :args (@t1606)) % 39.97/40.19 (step @p1648 :rule reordering :premises (@p1647) :args ((or @t1605 @t1604 (not @t1606)))) % 39.97/40.19 (step @p1649 :rule chain_m_resolution :premises (@p1648 @p48 @p1646) :args (@t1604 @t272 (@list @t48 @t1606))) % 39.97/40.19 (step @p1650 :rule instantiate :premises (@p112) :args (@t1595)) % 39.97/40.19 (step @p1651 :rule cnf_or_pos :args (@t1609)) % 39.97/40.19 (step @p1652 :rule reordering :premises (@p1651) :args ((or @t1608 @t1573 @t1607 (not @t1609)))) % 39.97/40.19 (step @p1653 :rule instantiate :premises (@p111) :args (@t1596)) % 39.97/40.19 (step @p1654 :rule cnf_or_pos :args (@t1612)) % 39.97/40.19 (step @p1655 :rule reordering :premises (@p1654) :args ((or @t1607 @t1611 (not @t1612)))) % 39.97/40.19 (step @p1656 :rule instantiate :premises (@p103) :args (@t1596)) % 39.97/40.19 (step @p1657 :rule cnf_or_pos :args (@t1614)) % 39.97/40.19 (step @p1658 :rule reordering :premises (@p1657) :args ((or @t1610 @t1613 (not @t1614)))) % 39.97/40.19 (step @p1659 :rule instantiate :premises (@p110) :args (@t1603)) % 39.97/40.19 (step @p1660 :rule cnf_or_pos :args (@t1616)) % 39.97/40.19 (step @p1661 :rule reordering :premises (@p1660) :args ((or @t1608 @t1615 (not @t1616)))) % 39.97/40.19 (step @p1662 :rule chain_m_resolution :premises (@p1661 @p1649 @p1659) :args (@t1615 @t272 (@list @t1604 @t1616))) % 39.97/40.19 (step @p1663 :rule instantiate :premises (@p108) :args (@t1603)) % 39.97/40.19 (step @p1664 :rule cnf_or_pos :args (@t1620)) % 39.97/40.19 (step @p1665 :rule reordering :premises (@p1664) :args ((or @t1617 @t1619 @t1618 @t1584 (not @t1620)))) % 39.97/40.19 (step @p1666 :rule chain_m_resolution :premises (@p1665 @p1663 @p1662 @p1658 @p1656 @p1626 @p1624 @p1655 @p1653 @p1652 @p1650 @p1649 @p1645 @p1643 @p1642 @p1640) :args (@t1598 @t294 (@list @t1620 @t1615 @t1613 @t1614 @t1584 @t1586 @t1610 @t1612 @t1573 @t1609 @t1604 @t1601 @t1602 @t1599 @t1600))) % 39.97/40.19 (step @p1667 :rule instantiate :premises (@p117) :args (@t1621)) % 39.97/40.19 (step @p1668 :rule instantiate :premises (@p116) :args (@t1622)) % 39.97/40.19 (step @p1669 :rule instantiate :premises (@p115) :args (@t1622)) % 39.97/40.19 (step @p1670 :rule cnf_or_pos :args (@t1626)) % 39.97/40.19 (step @p1671 :rule reordering :premises (@p1670) :args ((or @t1625 @t1624 (not @t1626)))) % 39.97/40.19 (step @p1672 :rule instantiate :premises (@p114) :args (@t1622)) % 39.97/40.19 (step @p1673 :rule cnf_or_pos :args (@t1628)) % 39.97/40.19 (step @p1674 :rule reordering :premises (@p1673) :args ((or @t1624 @t1627 (not @t1628)))) % 39.97/40.19 (step @p1675 :rule instantiate :premises (@p101) :args (@t1629)) % 39.97/40.19 (step @p1676 :rule cnf_or_pos :args (@t1632)) % 39.97/40.19 (step @p1677 :rule reordering :premises (@p1676) :args ((or @t1631 @t1630 (not @t1632)))) % 39.97/40.19 (step @p1678 :rule chain_m_resolution :premises (@p1677 @p47 @p1675) :args (@t1630 @t272 (@list @t47 @t1632))) % 39.97/40.19 (step @p1679 :rule instantiate :premises (@p112) :args (@t1621)) % 39.97/40.19 (step @p1680 :rule cnf_or_pos :args (@t1635)) % 39.97/40.19 (step @p1681 :rule reordering :premises (@p1680) :args ((or @t1634 @t1599 @t1633 (not @t1635)))) % 39.97/40.19 (step @p1682 :rule instantiate :premises (@p111) :args (@t1622)) % 39.97/40.19 (step @p1683 :rule cnf_or_pos :args (@t1638)) % 39.97/40.19 (step @p1684 :rule reordering :premises (@p1683) :args ((or @t1633 @t1637 (not @t1638)))) % 39.97/40.19 (step @p1685 :rule instantiate :premises (@p103) :args (@t1622)) % 39.97/40.19 (step @p1686 :rule cnf_or_pos :args (@t1640)) % 39.97/40.19 (step @p1687 :rule reordering :premises (@p1686) :args ((or @t1636 @t1639 (not @t1640)))) % 39.97/40.19 (step @p1688 :rule instantiate :premises (@p110) :args (@t1629)) % 39.97/40.19 (step @p1689 :rule cnf_or_pos :args (@t1642)) % 39.97/40.19 (step @p1690 :rule reordering :premises (@p1689) :args ((or @t1634 @t1641 (not @t1642)))) % 39.97/40.19 (step @p1691 :rule chain_m_resolution :premises (@p1690 @p1678 @p1688) :args (@t1641 @t272 (@list @t1630 @t1642))) % 39.97/40.19 (step @p1692 :rule instantiate :premises (@p108) :args (@t1629)) % 39.97/40.19 (step @p1693 :rule cnf_or_pos :args (@t1646)) % 39.97/40.19 (step @p1694 :rule reordering :premises (@p1693) :args ((or @t1643 @t1645 @t1644 @t1610 (not @t1646)))) % 39.97/40.19 (step @p1695 :rule chain_m_resolution :premises (@p1694 @p1692 @p1691 @p1687 @p1685 @p1655 @p1653 @p1684 @p1682 @p1681 @p1679 @p1678 @p1674 @p1672 @p1671 @p1669) :args (@t1624 @t294 (@list @t1646 @t1641 @t1639 @t1640 @t1610 @t1612 @t1636 @t1638 @t1599 @t1635 @t1630 @t1627 @t1628 @t1625 @t1626))) % 39.97/40.19 (step @p1696 :rule instantiate :premises (@p117) :args (@t1647)) % 39.97/40.19 (step @p1697 :rule instantiate :premises (@p116) :args (@t1648)) % 39.97/40.19 (step @p1698 :rule instantiate :premises (@p115) :args (@t1648)) % 39.97/40.19 (step @p1699 :rule cnf_or_pos :args (@t1652)) % 39.97/40.19 (step @p1700 :rule reordering :premises (@p1699) :args ((or @t1651 @t1650 (not @t1652)))) % 39.97/40.19 (step @p1701 :rule instantiate :premises (@p114) :args (@t1648)) % 39.97/40.19 (step @p1702 :rule cnf_or_pos :args (@t1654)) % 39.97/40.19 (step @p1703 :rule reordering :premises (@p1702) :args ((or @t1650 @t1653 (not @t1654)))) % 39.97/40.19 (step @p1704 :rule instantiate :premises (@p101) :args (@t1655)) % 39.97/40.19 (step @p1705 :rule cnf_or_pos :args (@t1658)) % 39.97/40.19 (step @p1706 :rule reordering :premises (@p1705) :args ((or @t1657 @t1656 (not @t1658)))) % 39.97/40.19 (step @p1707 :rule chain_m_resolution :premises (@p1706 @p46 @p1704) :args (@t1656 @t272 (@list @t46 @t1658))) % 39.97/40.19 (step @p1708 :rule instantiate :premises (@p112) :args (@t1647)) % 39.97/40.19 (step @p1709 :rule cnf_or_pos :args (@t1661)) % 39.97/40.19 (step @p1710 :rule reordering :premises (@p1709) :args ((or @t1660 @t1625 @t1659 (not @t1661)))) % 39.97/40.19 (step @p1711 :rule instantiate :premises (@p111) :args (@t1648)) % 39.97/40.19 (step @p1712 :rule cnf_or_pos :args (@t1664)) % 39.97/40.19 (step @p1713 :rule reordering :premises (@p1712) :args ((or @t1659 @t1663 (not @t1664)))) % 39.97/40.19 (step @p1714 :rule instantiate :premises (@p103) :args (@t1648)) % 39.97/40.19 (step @p1715 :rule cnf_or_pos :args (@t1666)) % 39.97/40.19 (step @p1716 :rule reordering :premises (@p1715) :args ((or @t1662 @t1665 (not @t1666)))) % 39.97/40.19 (step @p1717 :rule instantiate :premises (@p110) :args (@t1655)) % 39.97/40.19 (step @p1718 :rule cnf_or_pos :args (@t1668)) % 39.97/40.19 (step @p1719 :rule reordering :premises (@p1718) :args ((or @t1660 @t1667 (not @t1668)))) % 39.97/40.19 (step @p1720 :rule chain_m_resolution :premises (@p1719 @p1707 @p1717) :args (@t1667 @t272 (@list @t1656 @t1668))) % 39.97/40.19 (step @p1721 :rule instantiate :premises (@p108) :args (@t1655)) % 39.97/40.19 (step @p1722 :rule cnf_or_pos :args (@t1672)) % 39.97/40.19 (step @p1723 :rule reordering :premises (@p1722) :args ((or @t1669 @t1671 @t1670 @t1636 (not @t1672)))) % 39.97/40.19 (step @p1724 :rule chain_m_resolution :premises (@p1723 @p1721 @p1720 @p1716 @p1714 @p1684 @p1682 @p1713 @p1711 @p1710 @p1708 @p1707 @p1703 @p1701 @p1700 @p1698) :args (@t1650 @t294 (@list @t1672 @t1667 @t1665 @t1666 @t1636 @t1638 @t1662 @t1664 @t1625 @t1661 @t1656 @t1653 @t1654 @t1651 @t1652))) % 39.97/40.19 (step @p1725 :rule instantiate :premises (@p117) :args (@t1673)) % 39.97/40.19 (step @p1726 :rule instantiate :premises (@p116) :args (@t1674)) % 39.97/40.19 (step @p1727 :rule instantiate :premises (@p115) :args (@t1674)) % 39.97/40.19 (step @p1728 :rule cnf_or_pos :args (@t1678)) % 39.97/40.19 (step @p1729 :rule reordering :premises (@p1728) :args ((or @t1677 @t1676 (not @t1678)))) % 39.97/40.19 (step @p1730 :rule instantiate :premises (@p114) :args (@t1674)) % 39.97/40.19 (step @p1731 :rule cnf_or_pos :args (@t1680)) % 39.97/40.19 (step @p1732 :rule reordering :premises (@p1731) :args ((or @t1676 @t1679 (not @t1680)))) % 39.97/40.19 (step @p1733 :rule instantiate :premises (@p101) :args (@t1681)) % 39.97/40.19 (step @p1734 :rule cnf_or_pos :args (@t1684)) % 39.97/40.19 (step @p1735 :rule reordering :premises (@p1734) :args ((or @t1683 @t1682 (not @t1684)))) % 39.97/40.19 (step @p1736 :rule chain_m_resolution :premises (@p1735 @p45 @p1733) :args (@t1682 @t272 (@list @t45 @t1684))) % 39.97/40.19 (step @p1737 :rule instantiate :premises (@p112) :args (@t1673)) % 39.97/40.19 (step @p1738 :rule cnf_or_pos :args (@t1687)) % 39.97/40.19 (step @p1739 :rule reordering :premises (@p1738) :args ((or @t1686 @t1651 @t1685 (not @t1687)))) % 39.97/40.19 (step @p1740 :rule instantiate :premises (@p111) :args (@t1674)) % 39.97/40.19 (step @p1741 :rule cnf_or_pos :args (@t1690)) % 39.97/40.19 (step @p1742 :rule reordering :premises (@p1741) :args ((or @t1685 @t1689 (not @t1690)))) % 39.97/40.19 (step @p1743 :rule instantiate :premises (@p103) :args (@t1674)) % 39.97/40.19 (step @p1744 :rule cnf_or_pos :args (@t1692)) % 39.97/40.19 (step @p1745 :rule reordering :premises (@p1744) :args ((or @t1688 @t1691 (not @t1692)))) % 39.97/40.19 (step @p1746 :rule instantiate :premises (@p110) :args (@t1681)) % 39.97/40.19 (step @p1747 :rule cnf_or_pos :args (@t1694)) % 39.97/40.19 (step @p1748 :rule reordering :premises (@p1747) :args ((or @t1686 @t1693 (not @t1694)))) % 39.97/40.19 (step @p1749 :rule chain_m_resolution :premises (@p1748 @p1736 @p1746) :args (@t1693 @t272 (@list @t1682 @t1694))) % 39.97/40.19 (step @p1750 :rule instantiate :premises (@p108) :args (@t1681)) % 39.97/40.19 (step @p1751 :rule cnf_or_pos :args (@t1698)) % 39.97/40.19 (step @p1752 :rule reordering :premises (@p1751) :args ((or @t1695 @t1697 @t1696 @t1662 (not @t1698)))) % 39.97/40.19 (step @p1753 :rule chain_m_resolution :premises (@p1752 @p1750 @p1749 @p1745 @p1743 @p1713 @p1711 @p1742 @p1740 @p1739 @p1737 @p1736 @p1732 @p1730 @p1729 @p1727) :args (@t1676 @t294 (@list @t1698 @t1693 @t1691 @t1692 @t1662 @t1664 @t1688 @t1690 @t1651 @t1687 @t1682 @t1679 @t1680 @t1677 @t1678))) % 39.97/40.19 (step @p1754 :rule instantiate :premises (@p117) :args (@t1699)) % 39.97/40.19 (step @p1755 :rule instantiate :premises (@p116) :args (@t1700)) % 39.97/40.19 (step @p1756 :rule instantiate :premises (@p115) :args (@t1700)) % 39.97/40.19 (step @p1757 :rule cnf_or_pos :args (@t1704)) % 39.97/40.19 (step @p1758 :rule reordering :premises (@p1757) :args ((or @t1703 @t1702 (not @t1704)))) % 39.97/40.19 (step @p1759 :rule instantiate :premises (@p114) :args (@t1700)) % 39.97/40.19 (step @p1760 :rule cnf_or_pos :args (@t1706)) % 39.97/40.19 (step @p1761 :rule reordering :premises (@p1760) :args ((or @t1702 @t1705 (not @t1706)))) % 39.97/40.19 (step @p1762 :rule instantiate :premises (@p101) :args (@t1707)) % 39.97/40.19 (step @p1763 :rule cnf_or_pos :args (@t1710)) % 39.97/40.19 (step @p1764 :rule reordering :premises (@p1763) :args ((or @t1709 @t1708 (not @t1710)))) % 39.97/40.19 (step @p1765 :rule chain_m_resolution :premises (@p1764 @p44 @p1762) :args (@t1708 @t272 (@list @t44 @t1710))) % 39.97/40.19 (step @p1766 :rule instantiate :premises (@p112) :args (@t1699)) % 39.97/40.19 (step @p1767 :rule cnf_or_pos :args (@t1713)) % 39.97/40.19 (step @p1768 :rule reordering :premises (@p1767) :args ((or @t1712 @t1677 @t1711 (not @t1713)))) % 39.97/40.19 (step @p1769 :rule instantiate :premises (@p111) :args (@t1700)) % 39.97/40.19 (step @p1770 :rule cnf_or_pos :args (@t1716)) % 39.97/40.19 (step @p1771 :rule reordering :premises (@p1770) :args ((or @t1711 @t1715 (not @t1716)))) % 39.97/40.19 (step @p1772 :rule instantiate :premises (@p103) :args (@t1700)) % 39.97/40.19 (step @p1773 :rule cnf_or_pos :args (@t1718)) % 39.97/40.19 (step @p1774 :rule reordering :premises (@p1773) :args ((or @t1714 @t1717 (not @t1718)))) % 39.97/40.19 (step @p1775 :rule instantiate :premises (@p110) :args (@t1707)) % 39.97/40.19 (step @p1776 :rule cnf_or_pos :args (@t1720)) % 39.97/40.19 (step @p1777 :rule reordering :premises (@p1776) :args ((or @t1712 @t1719 (not @t1720)))) % 39.97/40.19 (step @p1778 :rule chain_m_resolution :premises (@p1777 @p1765 @p1775) :args (@t1719 @t272 (@list @t1708 @t1720))) % 39.97/40.19 (step @p1779 :rule instantiate :premises (@p108) :args (@t1707)) % 39.97/40.19 (step @p1780 :rule cnf_or_pos :args (@t1724)) % 39.97/40.19 (step @p1781 :rule reordering :premises (@p1780) :args ((or @t1721 @t1723 @t1722 @t1688 (not @t1724)))) % 39.97/40.19 (step @p1782 :rule chain_m_resolution :premises (@p1781 @p1779 @p1778 @p1774 @p1772 @p1742 @p1740 @p1771 @p1769 @p1768 @p1766 @p1765 @p1761 @p1759 @p1758 @p1756) :args (@t1702 @t294 (@list @t1724 @t1719 @t1717 @t1718 @t1688 @t1690 @t1714 @t1716 @t1677 @t1713 @t1708 @t1705 @t1706 @t1703 @t1704))) % 39.97/40.19 (step @p1783 :rule instantiate :premises (@p117) :args (@t1725)) % 39.97/40.19 (step @p1784 :rule instantiate :premises (@p116) :args (@t1726)) % 39.97/40.19 (step @p1785 :rule instantiate :premises (@p115) :args (@t1726)) % 39.97/40.19 (step @p1786 :rule cnf_or_pos :args (@t1730)) % 39.97/40.19 (step @p1787 :rule reordering :premises (@p1786) :args ((or @t1729 @t1728 (not @t1730)))) % 39.97/40.19 (step @p1788 :rule instantiate :premises (@p114) :args (@t1726)) % 39.97/40.19 (step @p1789 :rule cnf_or_pos :args (@t1732)) % 39.97/40.19 (step @p1790 :rule reordering :premises (@p1789) :args ((or @t1728 @t1731 (not @t1732)))) % 39.97/40.19 (step @p1791 :rule instantiate :premises (@p101) :args (@t1733)) % 39.97/40.19 (step @p1792 :rule cnf_or_pos :args (@t1736)) % 39.97/40.19 (step @p1793 :rule reordering :premises (@p1792) :args ((or @t1735 @t1734 (not @t1736)))) % 39.97/40.19 (step @p1794 :rule chain_m_resolution :premises (@p1793 @p43 @p1791) :args (@t1734 @t272 (@list @t43 @t1736))) % 39.97/40.19 (step @p1795 :rule instantiate :premises (@p112) :args (@t1725)) % 39.97/40.19 (step @p1796 :rule cnf_or_pos :args (@t1739)) % 39.97/40.19 (step @p1797 :rule reordering :premises (@p1796) :args ((or @t1738 @t1703 @t1737 (not @t1739)))) % 39.97/40.19 (step @p1798 :rule instantiate :premises (@p111) :args (@t1726)) % 39.97/40.19 (step @p1799 :rule cnf_or_pos :args (@t1742)) % 39.97/40.19 (step @p1800 :rule reordering :premises (@p1799) :args ((or @t1737 @t1741 (not @t1742)))) % 39.97/40.19 (step @p1801 :rule instantiate :premises (@p103) :args (@t1726)) % 39.97/40.19 (step @p1802 :rule cnf_or_pos :args (@t1744)) % 39.97/40.19 (step @p1803 :rule reordering :premises (@p1802) :args ((or @t1740 @t1743 (not @t1744)))) % 39.97/40.19 (step @p1804 :rule instantiate :premises (@p110) :args (@t1733)) % 39.97/40.19 (step @p1805 :rule cnf_or_pos :args (@t1746)) % 39.97/40.19 (step @p1806 :rule reordering :premises (@p1805) :args ((or @t1738 @t1745 (not @t1746)))) % 39.97/40.19 (step @p1807 :rule chain_m_resolution :premises (@p1806 @p1794 @p1804) :args (@t1745 @t272 (@list @t1734 @t1746))) % 39.97/40.19 (step @p1808 :rule instantiate :premises (@p108) :args (@t1733)) % 39.97/40.19 (step @p1809 :rule cnf_or_pos :args (@t1750)) % 39.97/40.19 (step @p1810 :rule reordering :premises (@p1809) :args ((or @t1747 @t1749 @t1748 @t1714 (not @t1750)))) % 39.97/40.19 (step @p1811 :rule chain_m_resolution :premises (@p1810 @p1808 @p1807 @p1803 @p1801 @p1771 @p1769 @p1800 @p1798 @p1797 @p1795 @p1794 @p1790 @p1788 @p1787 @p1785) :args (@t1728 @t294 (@list @t1750 @t1745 @t1743 @t1744 @t1714 @t1716 @t1740 @t1742 @t1703 @t1739 @t1734 @t1731 @t1732 @t1729 @t1730))) % 39.97/40.19 (step @p1812 :rule instantiate :premises (@p117) :args (@t1751)) % 39.97/40.19 (step @p1813 :rule instantiate :premises (@p116) :args (@t1752)) % 39.97/40.19 (step @p1814 :rule instantiate :premises (@p115) :args (@t1752)) % 39.97/40.19 (step @p1815 :rule cnf_or_pos :args (@t1756)) % 39.97/40.19 (step @p1816 :rule reordering :premises (@p1815) :args ((or @t1755 @t1754 (not @t1756)))) % 39.97/40.19 (step @p1817 :rule instantiate :premises (@p114) :args (@t1752)) % 39.97/40.19 (step @p1818 :rule cnf_or_pos :args (@t1758)) % 39.97/40.19 (step @p1819 :rule reordering :premises (@p1818) :args ((or @t1754 @t1757 (not @t1758)))) % 39.97/40.19 (step @p1820 :rule instantiate :premises (@p101) :args (@t1759)) % 39.97/40.19 (step @p1821 :rule cnf_or_pos :args (@t1762)) % 39.97/40.19 (step @p1822 :rule reordering :premises (@p1821) :args ((or @t1761 @t1760 (not @t1762)))) % 39.97/40.19 (step @p1823 :rule chain_m_resolution :premises (@p1822 @p42 @p1820) :args (@t1760 @t272 (@list @t42 @t1762))) % 39.97/40.19 (step @p1824 :rule instantiate :premises (@p112) :args (@t1751)) % 39.97/40.19 (step @p1825 :rule cnf_or_pos :args (@t1765)) % 39.97/40.19 (step @p1826 :rule reordering :premises (@p1825) :args ((or @t1764 @t1729 @t1763 (not @t1765)))) % 39.97/40.19 (step @p1827 :rule instantiate :premises (@p111) :args (@t1752)) % 39.97/40.19 (step @p1828 :rule cnf_or_pos :args (@t1768)) % 39.97/40.19 (step @p1829 :rule reordering :premises (@p1828) :args ((or @t1763 @t1767 (not @t1768)))) % 39.97/40.19 (step @p1830 :rule instantiate :premises (@p103) :args (@t1752)) % 39.97/40.19 (step @p1831 :rule cnf_or_pos :args (@t1770)) % 39.97/40.19 (step @p1832 :rule reordering :premises (@p1831) :args ((or @t1766 @t1769 (not @t1770)))) % 39.97/40.19 (step @p1833 :rule instantiate :premises (@p110) :args (@t1759)) % 39.97/40.19 (step @p1834 :rule cnf_or_pos :args (@t1772)) % 39.97/40.19 (step @p1835 :rule reordering :premises (@p1834) :args ((or @t1764 @t1771 (not @t1772)))) % 39.97/40.19 (step @p1836 :rule chain_m_resolution :premises (@p1835 @p1823 @p1833) :args (@t1771 @t272 (@list @t1760 @t1772))) % 39.97/40.19 (step @p1837 :rule instantiate :premises (@p108) :args (@t1759)) % 39.97/40.19 (step @p1838 :rule cnf_or_pos :args (@t1776)) % 39.97/40.19 (step @p1839 :rule reordering :premises (@p1838) :args ((or @t1773 @t1775 @t1774 @t1740 (not @t1776)))) % 39.97/40.19 (step @p1840 :rule chain_m_resolution :premises (@p1839 @p1837 @p1836 @p1832 @p1830 @p1800 @p1798 @p1829 @p1827 @p1826 @p1824 @p1823 @p1819 @p1817 @p1816 @p1814) :args (@t1754 @t294 (@list @t1776 @t1771 @t1769 @t1770 @t1740 @t1742 @t1766 @t1768 @t1729 @t1765 @t1760 @t1757 @t1758 @t1755 @t1756))) % 39.97/40.19 (step @p1841 :rule instantiate :premises (@p117) :args (@t1777)) % 39.97/40.19 (step @p1842 :rule instantiate :premises (@p116) :args (@t1778)) % 39.97/40.19 (step @p1843 :rule instantiate :premises (@p115) :args (@t1778)) % 39.97/40.19 (step @p1844 :rule cnf_or_pos :args (@t1782)) % 39.97/40.19 (step @p1845 :rule reordering :premises (@p1844) :args ((or @t1781 @t1780 (not @t1782)))) % 39.97/40.19 (step @p1846 :rule instantiate :premises (@p114) :args (@t1778)) % 39.97/40.19 (step @p1847 :rule cnf_or_pos :args (@t1784)) % 39.97/40.19 (step @p1848 :rule reordering :premises (@p1847) :args ((or @t1780 @t1783 (not @t1784)))) % 39.97/40.19 (step @p1849 :rule instantiate :premises (@p101) :args (@t1785)) % 39.97/40.19 (step @p1850 :rule cnf_or_pos :args (@t1788)) % 39.97/40.19 (step @p1851 :rule reordering :premises (@p1850) :args ((or @t1787 @t1786 (not @t1788)))) % 39.97/40.19 (step @p1852 :rule chain_m_resolution :premises (@p1851 @p41 @p1849) :args (@t1786 @t272 (@list @t41 @t1788))) % 39.97/40.19 (step @p1853 :rule instantiate :premises (@p112) :args (@t1777)) % 39.97/40.19 (step @p1854 :rule cnf_or_pos :args (@t1791)) % 39.97/40.19 (step @p1855 :rule reordering :premises (@p1854) :args ((or @t1790 @t1755 @t1789 (not @t1791)))) % 39.97/40.19 (step @p1856 :rule instantiate :premises (@p111) :args (@t1778)) % 39.97/40.19 (step @p1857 :rule cnf_or_pos :args (@t1794)) % 39.97/40.19 (step @p1858 :rule reordering :premises (@p1857) :args ((or @t1789 @t1793 (not @t1794)))) % 39.97/40.19 (step @p1859 :rule instantiate :premises (@p103) :args (@t1778)) % 39.97/40.19 (step @p1860 :rule cnf_or_pos :args (@t1796)) % 39.97/40.19 (step @p1861 :rule reordering :premises (@p1860) :args ((or @t1792 @t1795 (not @t1796)))) % 39.97/40.19 (step @p1862 :rule instantiate :premises (@p110) :args (@t1785)) % 39.97/40.19 (step @p1863 :rule cnf_or_pos :args (@t1798)) % 39.97/40.19 (step @p1864 :rule reordering :premises (@p1863) :args ((or @t1790 @t1797 (not @t1798)))) % 39.97/40.19 (step @p1865 :rule chain_m_resolution :premises (@p1864 @p1852 @p1862) :args (@t1797 @t272 (@list @t1786 @t1798))) % 39.97/40.19 (step @p1866 :rule instantiate :premises (@p108) :args (@t1785)) % 39.97/40.19 (step @p1867 :rule cnf_or_pos :args (@t1802)) % 39.97/40.19 (step @p1868 :rule reordering :premises (@p1867) :args ((or @t1799 @t1801 @t1800 @t1766 (not @t1802)))) % 39.97/40.19 (step @p1869 :rule chain_m_resolution :premises (@p1868 @p1866 @p1865 @p1861 @p1859 @p1829 @p1827 @p1858 @p1856 @p1855 @p1853 @p1852 @p1848 @p1846 @p1845 @p1843) :args (@t1780 @t294 (@list @t1802 @t1797 @t1795 @t1796 @t1766 @t1768 @t1792 @t1794 @t1755 @t1791 @t1786 @t1783 @t1784 @t1781 @t1782))) % 39.97/40.19 (step @p1870 :rule instantiate :premises (@p117) :args (@t1803)) % 39.97/40.19 (step @p1871 :rule instantiate :premises (@p116) :args (@t1804)) % 39.97/40.19 (step @p1872 :rule instantiate :premises (@p115) :args (@t1804)) % 39.97/40.19 (step @p1873 :rule cnf_or_pos :args (@t1808)) % 39.97/40.19 (step @p1874 :rule reordering :premises (@p1873) :args ((or @t1807 @t1806 (not @t1808)))) % 39.97/40.19 (step @p1875 :rule instantiate :premises (@p114) :args (@t1804)) % 39.97/40.19 (step @p1876 :rule cnf_or_pos :args (@t1810)) % 39.97/40.19 (step @p1877 :rule reordering :premises (@p1876) :args ((or @t1806 @t1809 (not @t1810)))) % 39.97/40.19 (step @p1878 :rule instantiate :premises (@p101) :args (@t1811)) % 39.97/40.19 (step @p1879 :rule cnf_or_pos :args (@t1814)) % 39.97/40.19 (step @p1880 :rule reordering :premises (@p1879) :args ((or @t1813 @t1812 (not @t1814)))) % 39.97/40.19 (step @p1881 :rule chain_m_resolution :premises (@p1880 @p40 @p1878) :args (@t1812 @t272 (@list @t40 @t1814))) % 39.97/40.19 (step @p1882 :rule instantiate :premises (@p112) :args (@t1803)) % 39.97/40.19 (step @p1883 :rule cnf_or_pos :args (@t1817)) % 39.97/40.19 (step @p1884 :rule reordering :premises (@p1883) :args ((or @t1816 @t1781 @t1815 (not @t1817)))) % 39.97/40.19 (step @p1885 :rule instantiate :premises (@p111) :args (@t1804)) % 39.97/40.19 (step @p1886 :rule cnf_or_pos :args (@t1820)) % 39.97/40.19 (step @p1887 :rule reordering :premises (@p1886) :args ((or @t1815 @t1819 (not @t1820)))) % 39.97/40.19 (step @p1888 :rule instantiate :premises (@p103) :args (@t1804)) % 39.97/40.19 (step @p1889 :rule cnf_or_pos :args (@t1822)) % 39.97/40.19 (step @p1890 :rule reordering :premises (@p1889) :args ((or @t1818 @t1821 (not @t1822)))) % 39.97/40.19 (step @p1891 :rule instantiate :premises (@p110) :args (@t1811)) % 39.97/40.19 (step @p1892 :rule cnf_or_pos :args (@t1824)) % 39.97/40.19 (step @p1893 :rule reordering :premises (@p1892) :args ((or @t1816 @t1823 (not @t1824)))) % 39.97/40.19 (step @p1894 :rule chain_m_resolution :premises (@p1893 @p1881 @p1891) :args (@t1823 @t272 (@list @t1812 @t1824))) % 39.97/40.19 (step @p1895 :rule instantiate :premises (@p108) :args (@t1811)) % 39.97/40.19 (step @p1896 :rule cnf_or_pos :args (@t1828)) % 39.97/40.19 (step @p1897 :rule reordering :premises (@p1896) :args ((or @t1825 @t1827 @t1826 @t1792 (not @t1828)))) % 39.97/40.19 (step @p1898 :rule chain_m_resolution :premises (@p1897 @p1895 @p1894 @p1890 @p1888 @p1858 @p1856 @p1887 @p1885 @p1884 @p1882 @p1881 @p1877 @p1875 @p1874 @p1872) :args (@t1806 @t294 (@list @t1828 @t1823 @t1821 @t1822 @t1792 @t1794 @t1818 @t1820 @t1781 @t1817 @t1812 @t1809 @t1810 @t1807 @t1808))) % 39.97/40.19 (step @p1899 :rule instantiate :premises (@p117) :args (@t1829)) % 39.97/40.19 (step @p1900 :rule instantiate :premises (@p116) :args (@t1830)) % 39.97/40.19 (step @p1901 :rule instantiate :premises (@p115) :args (@t1830)) % 39.97/40.19 (step @p1902 :rule cnf_or_pos :args (@t1834)) % 39.97/40.19 (step @p1903 :rule reordering :premises (@p1902) :args ((or @t1833 @t1832 (not @t1834)))) % 39.97/40.19 (step @p1904 :rule instantiate :premises (@p114) :args (@t1830)) % 39.97/40.19 (step @p1905 :rule cnf_or_pos :args (@t1836)) % 39.97/40.19 (step @p1906 :rule reordering :premises (@p1905) :args ((or @t1832 @t1835 (not @t1836)))) % 39.97/40.19 (step @p1907 :rule instantiate :premises (@p101) :args (@t1837)) % 39.97/40.19 (step @p1908 :rule cnf_or_pos :args (@t1840)) % 39.97/40.19 (step @p1909 :rule reordering :premises (@p1908) :args ((or @t1839 @t1838 (not @t1840)))) % 39.97/40.19 (step @p1910 :rule chain_m_resolution :premises (@p1909 @p39 @p1907) :args (@t1838 @t272 (@list @t39 @t1840))) % 39.97/40.19 (step @p1911 :rule instantiate :premises (@p112) :args (@t1829)) % 39.97/40.19 (step @p1912 :rule cnf_or_pos :args (@t1843)) % 39.97/40.19 (step @p1913 :rule reordering :premises (@p1912) :args ((or @t1842 @t1807 @t1841 (not @t1843)))) % 39.97/40.19 (step @p1914 :rule instantiate :premises (@p111) :args (@t1830)) % 39.97/40.19 (step @p1915 :rule cnf_or_pos :args (@t1846)) % 39.97/40.19 (step @p1916 :rule reordering :premises (@p1915) :args ((or @t1841 @t1845 (not @t1846)))) % 39.97/40.19 (step @p1917 :rule instantiate :premises (@p103) :args (@t1830)) % 39.97/40.19 (step @p1918 :rule cnf_or_pos :args (@t1848)) % 39.97/40.19 (step @p1919 :rule reordering :premises (@p1918) :args ((or @t1844 @t1847 (not @t1848)))) % 39.97/40.19 (step @p1920 :rule instantiate :premises (@p110) :args (@t1837)) % 39.97/40.19 (step @p1921 :rule cnf_or_pos :args (@t1850)) % 39.97/40.19 (step @p1922 :rule reordering :premises (@p1921) :args ((or @t1842 @t1849 (not @t1850)))) % 39.97/40.19 (step @p1923 :rule chain_m_resolution :premises (@p1922 @p1910 @p1920) :args (@t1849 @t272 (@list @t1838 @t1850))) % 39.97/40.19 (step @p1924 :rule instantiate :premises (@p108) :args (@t1837)) % 39.97/40.19 (step @p1925 :rule cnf_or_pos :args (@t1854)) % 39.97/40.19 (step @p1926 :rule reordering :premises (@p1925) :args ((or @t1851 @t1853 @t1852 @t1818 (not @t1854)))) % 39.97/40.19 (step @p1927 :rule chain_m_resolution :premises (@p1926 @p1924 @p1923 @p1919 @p1917 @p1887 @p1885 @p1916 @p1914 @p1913 @p1911 @p1910 @p1906 @p1904 @p1903 @p1901) :args (@t1832 @t294 (@list @t1854 @t1849 @t1847 @t1848 @t1818 @t1820 @t1844 @t1846 @t1807 @t1843 @t1838 @t1835 @t1836 @t1833 @t1834))) % 39.97/40.19 (step @p1928 :rule instantiate :premises (@p117) :args (@t1855)) % 39.97/40.19 (step @p1929 :rule instantiate :premises (@p116) :args (@t1856)) % 39.97/40.19 (step @p1930 :rule instantiate :premises (@p115) :args (@t1856)) % 39.97/40.19 (step @p1931 :rule cnf_or_pos :args (@t1860)) % 39.97/40.19 (step @p1932 :rule reordering :premises (@p1931) :args ((or @t1859 @t1858 (not @t1860)))) % 39.97/40.19 (step @p1933 :rule instantiate :premises (@p114) :args (@t1856)) % 39.97/40.19 (step @p1934 :rule cnf_or_pos :args (@t1862)) % 39.97/40.19 (step @p1935 :rule reordering :premises (@p1934) :args ((or @t1858 @t1861 (not @t1862)))) % 39.97/40.19 (step @p1936 :rule instantiate :premises (@p101) :args (@t1863)) % 39.97/40.19 (step @p1937 :rule cnf_or_pos :args (@t1866)) % 39.97/40.19 (step @p1938 :rule reordering :premises (@p1937) :args ((or @t1865 @t1864 (not @t1866)))) % 39.97/40.19 (step @p1939 :rule chain_m_resolution :premises (@p1938 @p38 @p1936) :args (@t1864 @t272 (@list @t38 @t1866))) % 39.97/40.19 (step @p1940 :rule instantiate :premises (@p112) :args (@t1855)) % 39.97/40.19 (step @p1941 :rule cnf_or_pos :args (@t1869)) % 39.97/40.19 (step @p1942 :rule reordering :premises (@p1941) :args ((or @t1868 @t1833 @t1867 (not @t1869)))) % 39.97/40.19 (step @p1943 :rule instantiate :premises (@p111) :args (@t1856)) % 39.97/40.19 (step @p1944 :rule cnf_or_pos :args (@t1872)) % 39.97/40.19 (step @p1945 :rule reordering :premises (@p1944) :args ((or @t1867 @t1871 (not @t1872)))) % 39.97/40.19 (step @p1946 :rule instantiate :premises (@p103) :args (@t1856)) % 39.97/40.19 (step @p1947 :rule cnf_or_pos :args (@t1874)) % 39.97/40.19 (step @p1948 :rule reordering :premises (@p1947) :args ((or @t1870 @t1873 (not @t1874)))) % 39.97/40.19 (step @p1949 :rule instantiate :premises (@p110) :args (@t1863)) % 39.97/40.19 (step @p1950 :rule cnf_or_pos :args (@t1876)) % 39.97/40.19 (step @p1951 :rule reordering :premises (@p1950) :args ((or @t1868 @t1875 (not @t1876)))) % 39.97/40.19 (step @p1952 :rule chain_m_resolution :premises (@p1951 @p1939 @p1949) :args (@t1875 @t272 (@list @t1864 @t1876))) % 39.97/40.19 (step @p1953 :rule instantiate :premises (@p108) :args (@t1863)) % 39.97/40.19 (step @p1954 :rule cnf_or_pos :args (@t1880)) % 39.97/40.19 (step @p1955 :rule reordering :premises (@p1954) :args ((or @t1877 @t1879 @t1878 @t1844 (not @t1880)))) % 39.97/40.19 (step @p1956 :rule chain_m_resolution :premises (@p1955 @p1953 @p1952 @p1948 @p1946 @p1916 @p1914 @p1945 @p1943 @p1942 @p1940 @p1939 @p1935 @p1933 @p1932 @p1930) :args (@t1858 @t294 (@list @t1880 @t1875 @t1873 @t1874 @t1844 @t1846 @t1870 @t1872 @t1833 @t1869 @t1864 @t1861 @t1862 @t1859 @t1860))) % 39.97/40.19 (step @p1957 :rule instantiate :premises (@p117) :args (@t1881)) % 39.97/40.19 (step @p1958 :rule instantiate :premises (@p116) :args (@t1882)) % 39.97/40.19 (step @p1959 :rule instantiate :premises (@p115) :args (@t1882)) % 39.97/40.19 (step @p1960 :rule cnf_or_pos :args (@t1886)) % 39.97/40.19 (step @p1961 :rule reordering :premises (@p1960) :args ((or @t1885 @t1884 (not @t1886)))) % 39.97/40.19 (step @p1962 :rule instantiate :premises (@p114) :args (@t1882)) % 39.97/40.19 (step @p1963 :rule cnf_or_pos :args (@t1888)) % 39.97/40.19 (step @p1964 :rule reordering :premises (@p1963) :args ((or @t1884 @t1887 (not @t1888)))) % 39.97/40.19 (step @p1965 :rule instantiate :premises (@p101) :args (@t1889)) % 39.97/40.19 (step @p1966 :rule cnf_or_pos :args (@t1892)) % 39.97/40.19 (step @p1967 :rule reordering :premises (@p1966) :args ((or @t1891 @t1890 (not @t1892)))) % 39.97/40.19 (step @p1968 :rule chain_m_resolution :premises (@p1967 @p37 @p1965) :args (@t1890 @t272 (@list @t37 @t1892))) % 39.97/40.19 (step @p1969 :rule instantiate :premises (@p112) :args (@t1881)) % 39.97/40.19 (step @p1970 :rule cnf_or_pos :args (@t1895)) % 39.97/40.19 (step @p1971 :rule reordering :premises (@p1970) :args ((or @t1894 @t1859 @t1893 (not @t1895)))) % 39.97/40.19 (step @p1972 :rule instantiate :premises (@p111) :args (@t1882)) % 39.97/40.19 (step @p1973 :rule cnf_or_pos :args (@t1898)) % 39.97/40.19 (step @p1974 :rule reordering :premises (@p1973) :args ((or @t1893 @t1897 (not @t1898)))) % 39.97/40.19 (step @p1975 :rule instantiate :premises (@p103) :args (@t1882)) % 39.97/40.19 (step @p1976 :rule cnf_or_pos :args (@t1900)) % 39.97/40.19 (step @p1977 :rule reordering :premises (@p1976) :args ((or @t1896 @t1899 (not @t1900)))) % 39.97/40.19 (step @p1978 :rule instantiate :premises (@p110) :args (@t1889)) % 39.97/40.19 (step @p1979 :rule cnf_or_pos :args (@t1902)) % 39.97/40.19 (step @p1980 :rule reordering :premises (@p1979) :args ((or @t1894 @t1901 (not @t1902)))) % 39.97/40.19 (step @p1981 :rule chain_m_resolution :premises (@p1980 @p1968 @p1978) :args (@t1901 @t272 (@list @t1890 @t1902))) % 39.97/40.19 (step @p1982 :rule instantiate :premises (@p108) :args (@t1889)) % 39.97/40.19 (step @p1983 :rule cnf_or_pos :args (@t1906)) % 39.97/40.19 (step @p1984 :rule reordering :premises (@p1983) :args ((or @t1903 @t1905 @t1904 @t1870 (not @t1906)))) % 39.97/40.19 (step @p1985 :rule chain_m_resolution :premises (@p1984 @p1982 @p1981 @p1977 @p1975 @p1945 @p1943 @p1974 @p1972 @p1971 @p1969 @p1968 @p1964 @p1962 @p1961 @p1959) :args (@t1884 @t294 (@list @t1906 @t1901 @t1899 @t1900 @t1870 @t1872 @t1896 @t1898 @t1859 @t1895 @t1890 @t1887 @t1888 @t1885 @t1886))) % 39.97/40.19 (step @p1986 :rule instantiate :premises (@p117) :args (@t1907)) % 39.97/40.19 (step @p1987 :rule instantiate :premises (@p116) :args (@t1908)) % 39.97/40.19 (step @p1988 :rule instantiate :premises (@p115) :args (@t1908)) % 39.97/40.19 (step @p1989 :rule cnf_or_pos :args (@t1912)) % 39.97/40.19 (step @p1990 :rule reordering :premises (@p1989) :args ((or @t1911 @t1910 (not @t1912)))) % 39.97/40.19 (step @p1991 :rule instantiate :premises (@p114) :args (@t1908)) % 39.97/40.19 (step @p1992 :rule cnf_or_pos :args (@t1914)) % 39.97/40.19 (step @p1993 :rule reordering :premises (@p1992) :args ((or @t1910 @t1913 (not @t1914)))) % 39.97/40.19 (step @p1994 :rule instantiate :premises (@p101) :args (@t1915)) % 39.97/40.19 (step @p1995 :rule cnf_or_pos :args (@t1918)) % 39.97/40.19 (step @p1996 :rule reordering :premises (@p1995) :args ((or @t1917 @t1916 (not @t1918)))) % 39.97/40.19 (step @p1997 :rule chain_m_resolution :premises (@p1996 @p36 @p1994) :args (@t1916 @t272 (@list @t36 @t1918))) % 39.97/40.19 (step @p1998 :rule instantiate :premises (@p112) :args (@t1907)) % 39.97/40.19 (step @p1999 :rule cnf_or_pos :args (@t1921)) % 39.97/40.19 (step @p2000 :rule reordering :premises (@p1999) :args ((or @t1920 @t1885 @t1919 (not @t1921)))) % 39.97/40.19 (step @p2001 :rule instantiate :premises (@p111) :args (@t1908)) % 39.97/40.19 (step @p2002 :rule cnf_or_pos :args (@t1924)) % 39.97/40.19 (step @p2003 :rule reordering :premises (@p2002) :args ((or @t1919 @t1923 (not @t1924)))) % 39.97/40.19 (step @p2004 :rule instantiate :premises (@p103) :args (@t1908)) % 39.97/40.19 (step @p2005 :rule cnf_or_pos :args (@t1926)) % 39.97/40.19 (step @p2006 :rule reordering :premises (@p2005) :args ((or @t1922 @t1925 (not @t1926)))) % 39.97/40.19 (step @p2007 :rule instantiate :premises (@p110) :args (@t1915)) % 39.97/40.19 (step @p2008 :rule cnf_or_pos :args (@t1928)) % 39.97/40.19 (step @p2009 :rule reordering :premises (@p2008) :args ((or @t1920 @t1927 (not @t1928)))) % 39.97/40.19 (step @p2010 :rule chain_m_resolution :premises (@p2009 @p1997 @p2007) :args (@t1927 @t272 (@list @t1916 @t1928))) % 39.97/40.19 (step @p2011 :rule instantiate :premises (@p108) :args (@t1915)) % 39.97/40.19 (step @p2012 :rule cnf_or_pos :args (@t1932)) % 39.97/40.19 (step @p2013 :rule reordering :premises (@p2012) :args ((or @t1929 @t1931 @t1930 @t1896 (not @t1932)))) % 39.97/40.19 (step @p2014 :rule chain_m_resolution :premises (@p2013 @p2011 @p2010 @p2006 @p2004 @p1974 @p1972 @p2003 @p2001 @p2000 @p1998 @p1997 @p1993 @p1991 @p1990 @p1988) :args (@t1910 @t294 (@list @t1932 @t1927 @t1925 @t1926 @t1896 @t1898 @t1922 @t1924 @t1885 @t1921 @t1916 @t1913 @t1914 @t1911 @t1912))) % 39.97/40.19 (step @p2015 :rule instantiate :premises (@p117) :args (@t1933)) % 39.97/40.19 (step @p2016 :rule instantiate :premises (@p116) :args (@t1934)) % 39.97/40.19 (step @p2017 :rule instantiate :premises (@p115) :args (@t1934)) % 39.97/40.19 (step @p2018 :rule cnf_or_pos :args (@t1938)) % 39.97/40.19 (step @p2019 :rule reordering :premises (@p2018) :args ((or @t1937 @t1936 (not @t1938)))) % 39.97/40.19 (step @p2020 :rule instantiate :premises (@p114) :args (@t1934)) % 39.97/40.19 (step @p2021 :rule cnf_or_pos :args (@t1940)) % 39.97/40.19 (step @p2022 :rule reordering :premises (@p2021) :args ((or @t1936 @t1939 (not @t1940)))) % 39.97/40.19 (step @p2023 :rule instantiate :premises (@p101) :args (@t1941)) % 39.97/40.19 (step @p2024 :rule cnf_or_pos :args (@t1944)) % 39.97/40.19 (step @p2025 :rule reordering :premises (@p2024) :args ((or @t1943 @t1942 (not @t1944)))) % 39.97/40.19 (step @p2026 :rule chain_m_resolution :premises (@p2025 @p35 @p2023) :args (@t1942 @t272 (@list @t35 @t1944))) % 39.97/40.19 (step @p2027 :rule instantiate :premises (@p112) :args (@t1933)) % 39.97/40.19 (step @p2028 :rule cnf_or_pos :args (@t1947)) % 39.97/40.19 (step @p2029 :rule reordering :premises (@p2028) :args ((or @t1946 @t1911 @t1945 (not @t1947)))) % 39.97/40.19 (step @p2030 :rule instantiate :premises (@p111) :args (@t1934)) % 39.97/40.19 (step @p2031 :rule cnf_or_pos :args (@t1950)) % 39.97/40.19 (step @p2032 :rule reordering :premises (@p2031) :args ((or @t1945 @t1949 (not @t1950)))) % 39.97/40.19 (step @p2033 :rule instantiate :premises (@p103) :args (@t1934)) % 39.97/40.19 (step @p2034 :rule cnf_or_pos :args (@t1952)) % 39.97/40.19 (step @p2035 :rule reordering :premises (@p2034) :args ((or @t1948 @t1951 (not @t1952)))) % 39.97/40.19 (step @p2036 :rule instantiate :premises (@p110) :args (@t1941)) % 39.97/40.19 (step @p2037 :rule cnf_or_pos :args (@t1954)) % 39.97/40.19 (step @p2038 :rule reordering :premises (@p2037) :args ((or @t1946 @t1953 (not @t1954)))) % 39.97/40.19 (step @p2039 :rule chain_m_resolution :premises (@p2038 @p2026 @p2036) :args (@t1953 @t272 (@list @t1942 @t1954))) % 39.97/40.19 (step @p2040 :rule instantiate :premises (@p108) :args (@t1941)) % 39.97/40.19 (step @p2041 :rule cnf_or_pos :args (@t1958)) % 39.97/40.19 (step @p2042 :rule reordering :premises (@p2041) :args ((or @t1955 @t1957 @t1956 @t1922 (not @t1958)))) % 39.97/40.19 (step @p2043 :rule chain_m_resolution :premises (@p2042 @p2040 @p2039 @p2035 @p2033 @p2003 @p2001 @p2032 @p2030 @p2029 @p2027 @p2026 @p2022 @p2020 @p2019 @p2017) :args (@t1936 @t294 (@list @t1958 @t1953 @t1951 @t1952 @t1922 @t1924 @t1948 @t1950 @t1911 @t1947 @t1942 @t1939 @t1940 @t1937 @t1938))) % 39.97/40.19 (step @p2044 :rule instantiate :premises (@p117) :args (@t1959)) % 39.97/40.19 (step @p2045 :rule instantiate :premises (@p116) :args (@t1960)) % 39.97/40.19 (step @p2046 :rule instantiate :premises (@p115) :args (@t1960)) % 39.97/40.19 (step @p2047 :rule cnf_or_pos :args (@t1964)) % 39.97/40.19 (step @p2048 :rule reordering :premises (@p2047) :args ((or @t1963 @t1962 (not @t1964)))) % 39.97/40.19 (step @p2049 :rule instantiate :premises (@p114) :args (@t1960)) % 39.97/40.19 (step @p2050 :rule cnf_or_pos :args (@t1966)) % 39.97/40.19 (step @p2051 :rule reordering :premises (@p2050) :args ((or @t1962 @t1965 (not @t1966)))) % 39.97/40.19 (step @p2052 :rule instantiate :premises (@p101) :args (@t1967)) % 39.97/40.19 (step @p2053 :rule cnf_or_pos :args (@t1970)) % 39.97/40.19 (step @p2054 :rule reordering :premises (@p2053) :args ((or @t1969 @t1968 (not @t1970)))) % 39.97/40.19 (step @p2055 :rule chain_m_resolution :premises (@p2054 @p34 @p2052) :args (@t1968 @t272 (@list @t34 @t1970))) % 39.97/40.19 (step @p2056 :rule instantiate :premises (@p112) :args (@t1959)) % 39.97/40.19 (step @p2057 :rule cnf_or_pos :args (@t1973)) % 39.97/40.19 (step @p2058 :rule reordering :premises (@p2057) :args ((or @t1972 @t1937 @t1971 (not @t1973)))) % 39.97/40.19 (step @p2059 :rule instantiate :premises (@p111) :args (@t1960)) % 39.97/40.19 (step @p2060 :rule cnf_or_pos :args (@t1976)) % 39.97/40.19 (step @p2061 :rule reordering :premises (@p2060) :args ((or @t1971 @t1975 (not @t1976)))) % 39.97/40.19 (step @p2062 :rule instantiate :premises (@p103) :args (@t1960)) % 39.97/40.19 (step @p2063 :rule cnf_or_pos :args (@t1978)) % 39.97/40.19 (step @p2064 :rule reordering :premises (@p2063) :args ((or @t1974 @t1977 (not @t1978)))) % 39.97/40.19 (step @p2065 :rule instantiate :premises (@p110) :args (@t1967)) % 39.97/40.19 (step @p2066 :rule cnf_or_pos :args (@t1980)) % 39.97/40.19 (step @p2067 :rule reordering :premises (@p2066) :args ((or @t1972 @t1979 (not @t1980)))) % 39.97/40.19 (step @p2068 :rule chain_m_resolution :premises (@p2067 @p2055 @p2065) :args (@t1979 @t272 (@list @t1968 @t1980))) % 39.97/40.19 (step @p2069 :rule instantiate :premises (@p108) :args (@t1967)) % 39.97/40.19 (step @p2070 :rule cnf_or_pos :args (@t1984)) % 39.97/40.19 (step @p2071 :rule reordering :premises (@p2070) :args ((or @t1981 @t1983 @t1982 @t1948 (not @t1984)))) % 39.97/40.19 (step @p2072 :rule chain_m_resolution :premises (@p2071 @p2069 @p2068 @p2064 @p2062 @p2032 @p2030 @p2061 @p2059 @p2058 @p2056 @p2055 @p2051 @p2049 @p2048 @p2046) :args (@t1962 @t294 (@list @t1984 @t1979 @t1977 @t1978 @t1948 @t1950 @t1974 @t1976 @t1937 @t1973 @t1968 @t1965 @t1966 @t1963 @t1964))) % 39.97/40.19 (step @p2073 :rule instantiate :premises (@p117) :args (@t1985)) % 39.97/40.19 (step @p2074 :rule instantiate :premises (@p116) :args (@t1986)) % 39.97/40.19 (step @p2075 :rule instantiate :premises (@p115) :args (@t1986)) % 39.97/40.19 (step @p2076 :rule cnf_or_pos :args (@t1990)) % 39.97/40.19 (step @p2077 :rule reordering :premises (@p2076) :args ((or @t1989 @t1988 (not @t1990)))) % 39.97/40.19 (step @p2078 :rule instantiate :premises (@p114) :args (@t1986)) % 39.97/40.19 (step @p2079 :rule cnf_or_pos :args (@t1992)) % 39.97/40.19 (step @p2080 :rule reordering :premises (@p2079) :args ((or @t1988 @t1991 (not @t1992)))) % 39.97/40.19 (step @p2081 :rule instantiate :premises (@p101) :args (@t1993)) % 39.97/40.19 (step @p2082 :rule cnf_or_pos :args (@t1996)) % 39.97/40.19 (step @p2083 :rule reordering :premises (@p2082) :args ((or @t1995 @t1994 (not @t1996)))) % 39.97/40.19 (step @p2084 :rule chain_m_resolution :premises (@p2083 @p33 @p2081) :args (@t1994 @t272 (@list @t33 @t1996))) % 39.97/40.19 (step @p2085 :rule instantiate :premises (@p112) :args (@t1985)) % 39.97/40.19 (step @p2086 :rule cnf_or_pos :args (@t1999)) % 39.97/40.19 (step @p2087 :rule reordering :premises (@p2086) :args ((or @t1998 @t1963 @t1997 (not @t1999)))) % 39.97/40.19 (step @p2088 :rule instantiate :premises (@p111) :args (@t1986)) % 39.97/40.19 (step @p2089 :rule cnf_or_pos :args (@t2002)) % 39.97/40.19 (step @p2090 :rule reordering :premises (@p2089) :args ((or @t1997 @t2001 (not @t2002)))) % 39.97/40.19 (step @p2091 :rule instantiate :premises (@p103) :args (@t1986)) % 39.97/40.19 (step @p2092 :rule cnf_or_pos :args (@t2004)) % 39.97/40.19 (step @p2093 :rule reordering :premises (@p2092) :args ((or @t2000 @t2003 (not @t2004)))) % 39.97/40.19 (step @p2094 :rule instantiate :premises (@p110) :args (@t1993)) % 39.97/40.19 (step @p2095 :rule cnf_or_pos :args (@t2006)) % 39.97/40.19 (step @p2096 :rule reordering :premises (@p2095) :args ((or @t1998 @t2005 (not @t2006)))) % 39.97/40.19 (step @p2097 :rule chain_m_resolution :premises (@p2096 @p2084 @p2094) :args (@t2005 @t272 (@list @t1994 @t2006))) % 39.97/40.19 (step @p2098 :rule instantiate :premises (@p108) :args (@t1993)) % 39.97/40.19 (step @p2099 :rule cnf_or_pos :args (@t2010)) % 39.97/40.19 (step @p2100 :rule reordering :premises (@p2099) :args ((or @t2007 @t2009 @t2008 @t1974 (not @t2010)))) % 39.97/40.19 (step @p2101 :rule chain_m_resolution :premises (@p2100 @p2098 @p2097 @p2093 @p2091 @p2061 @p2059 @p2090 @p2088 @p2087 @p2085 @p2084 @p2080 @p2078 @p2077 @p2075) :args (@t1988 @t294 (@list @t2010 @t2005 @t2003 @t2004 @t1974 @t1976 @t2000 @t2002 @t1963 @t1999 @t1994 @t1991 @t1992 @t1989 @t1990))) % 39.97/40.19 (step @p2102 :rule instantiate :premises (@p117) :args (@t2011)) % 39.97/40.19 (step @p2103 :rule instantiate :premises (@p116) :args (@t2012)) % 39.97/40.19 (step @p2104 :rule instantiate :premises (@p115) :args (@t2012)) % 39.97/40.19 (step @p2105 :rule cnf_or_pos :args (@t2016)) % 39.97/40.19 (step @p2106 :rule reordering :premises (@p2105) :args ((or @t2015 @t2014 (not @t2016)))) % 39.97/40.19 (step @p2107 :rule instantiate :premises (@p114) :args (@t2012)) % 39.97/40.19 (step @p2108 :rule cnf_or_pos :args (@t2018)) % 39.97/40.19 (step @p2109 :rule reordering :premises (@p2108) :args ((or @t2014 @t2017 (not @t2018)))) % 39.97/40.19 (step @p2110 :rule instantiate :premises (@p101) :args (@t2019)) % 39.97/40.19 (step @p2111 :rule cnf_or_pos :args (@t2022)) % 39.97/40.19 (step @p2112 :rule reordering :premises (@p2111) :args ((or @t2021 @t2020 (not @t2022)))) % 39.97/40.19 (step @p2113 :rule chain_m_resolution :premises (@p2112 @p32 @p2110) :args (@t2020 @t272 (@list @t32 @t2022))) % 39.97/40.19 (step @p2114 :rule instantiate :premises (@p112) :args (@t2011)) % 39.97/40.19 (step @p2115 :rule cnf_or_pos :args (@t2025)) % 39.97/40.19 (step @p2116 :rule reordering :premises (@p2115) :args ((or @t2024 @t1989 @t2023 (not @t2025)))) % 39.97/40.19 (step @p2117 :rule instantiate :premises (@p111) :args (@t2012)) % 39.97/40.19 (step @p2118 :rule cnf_or_pos :args (@t2028)) % 39.97/40.19 (step @p2119 :rule reordering :premises (@p2118) :args ((or @t2023 @t2027 (not @t2028)))) % 39.97/40.19 (step @p2120 :rule instantiate :premises (@p103) :args (@t2012)) % 39.97/40.19 (step @p2121 :rule cnf_or_pos :args (@t2030)) % 39.97/40.19 (step @p2122 :rule reordering :premises (@p2121) :args ((or @t2026 @t2029 (not @t2030)))) % 39.97/40.19 (step @p2123 :rule instantiate :premises (@p110) :args (@t2019)) % 39.97/40.19 (step @p2124 :rule cnf_or_pos :args (@t2032)) % 39.97/40.19 (step @p2125 :rule reordering :premises (@p2124) :args ((or @t2024 @t2031 (not @t2032)))) % 39.97/40.19 (step @p2126 :rule chain_m_resolution :premises (@p2125 @p2113 @p2123) :args (@t2031 @t272 (@list @t2020 @t2032))) % 39.97/40.19 (step @p2127 :rule instantiate :premises (@p108) :args (@t2019)) % 39.97/40.19 (step @p2128 :rule cnf_or_pos :args (@t2036)) % 39.97/40.19 (step @p2129 :rule reordering :premises (@p2128) :args ((or @t2033 @t2035 @t2034 @t2000 (not @t2036)))) % 39.97/40.19 (step @p2130 :rule chain_m_resolution :premises (@p2129 @p2127 @p2126 @p2122 @p2120 @p2090 @p2088 @p2119 @p2117 @p2116 @p2114 @p2113 @p2109 @p2107 @p2106 @p2104) :args (@t2014 @t294 (@list @t2036 @t2031 @t2029 @t2030 @t2000 @t2002 @t2026 @t2028 @t1989 @t2025 @t2020 @t2017 @t2018 @t2015 @t2016))) % 39.97/40.19 (step @p2131 :rule instantiate :premises (@p117) :args (@t2037)) % 39.97/40.19 (step @p2132 :rule instantiate :premises (@p116) :args (@t2038)) % 39.97/40.19 (step @p2133 :rule instantiate :premises (@p115) :args (@t2038)) % 39.97/40.19 (step @p2134 :rule cnf_or_pos :args (@t2042)) % 39.97/40.19 (step @p2135 :rule reordering :premises (@p2134) :args ((or @t2041 @t2040 (not @t2042)))) % 39.97/40.19 (step @p2136 :rule instantiate :premises (@p114) :args (@t2038)) % 39.97/40.19 (step @p2137 :rule cnf_or_pos :args (@t2044)) % 39.97/40.19 (step @p2138 :rule reordering :premises (@p2137) :args ((or @t2040 @t2043 (not @t2044)))) % 39.97/40.19 (step @p2139 :rule instantiate :premises (@p101) :args (@t2045)) % 39.97/40.19 (step @p2140 :rule cnf_or_pos :args (@t2048)) % 39.97/40.19 (step @p2141 :rule reordering :premises (@p2140) :args ((or @t2047 @t2046 (not @t2048)))) % 39.97/40.19 (step @p2142 :rule chain_m_resolution :premises (@p2141 @p31 @p2139) :args (@t2046 @t272 (@list @t31 @t2048))) % 39.97/40.19 (step @p2143 :rule instantiate :premises (@p112) :args (@t2037)) % 39.97/40.19 (step @p2144 :rule cnf_or_pos :args (@t2051)) % 39.97/40.19 (step @p2145 :rule reordering :premises (@p2144) :args ((or @t2050 @t2015 @t2049 (not @t2051)))) % 39.97/40.19 (step @p2146 :rule instantiate :premises (@p111) :args (@t2038)) % 39.97/40.19 (step @p2147 :rule cnf_or_pos :args (@t2054)) % 39.97/40.19 (step @p2148 :rule reordering :premises (@p2147) :args ((or @t2049 @t2053 (not @t2054)))) % 39.97/40.19 (step @p2149 :rule instantiate :premises (@p103) :args (@t2038)) % 39.97/40.19 (step @p2150 :rule cnf_or_pos :args (@t2056)) % 39.97/40.19 (step @p2151 :rule reordering :premises (@p2150) :args ((or @t2052 @t2055 (not @t2056)))) % 39.97/40.19 (step @p2152 :rule instantiate :premises (@p110) :args (@t2045)) % 39.97/40.19 (step @p2153 :rule cnf_or_pos :args (@t2058)) % 39.97/40.19 (step @p2154 :rule reordering :premises (@p2153) :args ((or @t2050 @t2057 (not @t2058)))) % 39.97/40.19 (step @p2155 :rule chain_m_resolution :premises (@p2154 @p2142 @p2152) :args (@t2057 @t272 (@list @t2046 @t2058))) % 39.97/40.19 (step @p2156 :rule instantiate :premises (@p108) :args (@t2045)) % 39.97/40.19 (step @p2157 :rule cnf_or_pos :args (@t2062)) % 39.97/40.19 (step @p2158 :rule reordering :premises (@p2157) :args ((or @t2059 @t2061 @t2060 @t2026 (not @t2062)))) % 39.97/40.19 (step @p2159 :rule chain_m_resolution :premises (@p2158 @p2156 @p2155 @p2151 @p2149 @p2119 @p2117 @p2148 @p2146 @p2145 @p2143 @p2142 @p2138 @p2136 @p2135 @p2133) :args (@t2040 @t294 (@list @t2062 @t2057 @t2055 @t2056 @t2026 @t2028 @t2052 @t2054 @t2015 @t2051 @t2046 @t2043 @t2044 @t2041 @t2042))) % 39.97/40.19 (step @p2160 :rule instantiate :premises (@p117) :args (@t2063)) % 39.97/40.19 (step @p2161 :rule instantiate :premises (@p116) :args (@t2064)) % 39.97/40.19 (step @p2162 :rule instantiate :premises (@p115) :args (@t2064)) % 39.97/40.19 (step @p2163 :rule cnf_or_pos :args (@t2068)) % 39.97/40.19 (step @p2164 :rule reordering :premises (@p2163) :args ((or @t2067 @t2066 (not @t2068)))) % 39.97/40.19 (step @p2165 :rule instantiate :premises (@p114) :args (@t2064)) % 39.97/40.19 (step @p2166 :rule cnf_or_pos :args (@t2070)) % 39.97/40.19 (step @p2167 :rule reordering :premises (@p2166) :args ((or @t2066 @t2069 (not @t2070)))) % 39.97/40.19 (step @p2168 :rule instantiate :premises (@p101) :args (@t2071)) % 39.97/40.19 (step @p2169 :rule cnf_or_pos :args (@t2074)) % 39.97/40.19 (step @p2170 :rule reordering :premises (@p2169) :args ((or @t2073 @t2072 (not @t2074)))) % 39.97/40.19 (step @p2171 :rule chain_m_resolution :premises (@p2170 @p30 @p2168) :args (@t2072 @t272 (@list @t30 @t2074))) % 39.97/40.19 (step @p2172 :rule instantiate :premises (@p112) :args (@t2063)) % 39.97/40.19 (step @p2173 :rule cnf_or_pos :args (@t2077)) % 39.97/40.19 (step @p2174 :rule reordering :premises (@p2173) :args ((or @t2076 @t2041 @t2075 (not @t2077)))) % 39.97/40.19 (step @p2175 :rule instantiate :premises (@p111) :args (@t2064)) % 39.97/40.19 (step @p2176 :rule cnf_or_pos :args (@t2080)) % 39.97/40.19 (step @p2177 :rule reordering :premises (@p2176) :args ((or @t2075 @t2079 (not @t2080)))) % 39.97/40.19 (step @p2178 :rule instantiate :premises (@p103) :args (@t2064)) % 39.97/40.19 (step @p2179 :rule cnf_or_pos :args (@t2082)) % 39.97/40.19 (step @p2180 :rule reordering :premises (@p2179) :args ((or @t2078 @t2081 (not @t2082)))) % 39.97/40.19 (step @p2181 :rule instantiate :premises (@p110) :args (@t2071)) % 39.97/40.19 (step @p2182 :rule cnf_or_pos :args (@t2084)) % 39.97/40.19 (step @p2183 :rule reordering :premises (@p2182) :args ((or @t2076 @t2083 (not @t2084)))) % 39.97/40.19 (step @p2184 :rule chain_m_resolution :premises (@p2183 @p2171 @p2181) :args (@t2083 @t272 (@list @t2072 @t2084))) % 39.97/40.19 (step @p2185 :rule instantiate :premises (@p108) :args (@t2071)) % 39.97/40.19 (step @p2186 :rule cnf_or_pos :args (@t2088)) % 39.97/40.19 (step @p2187 :rule reordering :premises (@p2186) :args ((or @t2085 @t2087 @t2086 @t2052 (not @t2088)))) % 39.97/40.19 (step @p2188 :rule chain_m_resolution :premises (@p2187 @p2185 @p2184 @p2180 @p2178 @p2148 @p2146 @p2177 @p2175 @p2174 @p2172 @p2171 @p2167 @p2165 @p2164 @p2162) :args (@t2066 @t294 (@list @t2088 @t2083 @t2081 @t2082 @t2052 @t2054 @t2078 @t2080 @t2041 @t2077 @t2072 @t2069 @t2070 @t2067 @t2068))) % 39.97/40.19 (step @p2189 :rule instantiate :premises (@p117) :args (@t2089)) % 39.97/40.19 (step @p2190 :rule instantiate :premises (@p116) :args (@t2090)) % 39.97/40.19 (step @p2191 :rule instantiate :premises (@p115) :args (@t2090)) % 39.97/40.19 (step @p2192 :rule cnf_or_pos :args (@t2094)) % 39.97/40.19 (step @p2193 :rule reordering :premises (@p2192) :args ((or @t2093 @t2092 (not @t2094)))) % 39.97/40.19 (step @p2194 :rule instantiate :premises (@p114) :args (@t2090)) % 39.97/40.19 (step @p2195 :rule cnf_or_pos :args (@t2096)) % 39.97/40.19 (step @p2196 :rule reordering :premises (@p2195) :args ((or @t2092 @t2095 (not @t2096)))) % 39.97/40.19 (step @p2197 :rule instantiate :premises (@p101) :args (@t2097)) % 39.97/40.19 (step @p2198 :rule cnf_or_pos :args (@t2100)) % 39.97/40.19 (step @p2199 :rule reordering :premises (@p2198) :args ((or @t2099 @t2098 (not @t2100)))) % 39.97/40.19 (step @p2200 :rule chain_m_resolution :premises (@p2199 @p29 @p2197) :args (@t2098 @t272 (@list @t29 @t2100))) % 39.97/40.19 (step @p2201 :rule instantiate :premises (@p112) :args (@t2089)) % 39.97/40.19 (step @p2202 :rule cnf_or_pos :args (@t2103)) % 39.97/40.19 (step @p2203 :rule reordering :premises (@p2202) :args ((or @t2102 @t2067 @t2101 (not @t2103)))) % 39.97/40.19 (step @p2204 :rule instantiate :premises (@p111) :args (@t2090)) % 39.97/40.19 (step @p2205 :rule cnf_or_pos :args (@t2106)) % 39.97/40.19 (step @p2206 :rule reordering :premises (@p2205) :args ((or @t2101 @t2105 (not @t2106)))) % 39.97/40.19 (step @p2207 :rule instantiate :premises (@p103) :args (@t2090)) % 39.97/40.19 (step @p2208 :rule cnf_or_pos :args (@t2108)) % 39.97/40.19 (step @p2209 :rule reordering :premises (@p2208) :args ((or @t2104 @t2107 (not @t2108)))) % 39.97/40.19 (step @p2210 :rule instantiate :premises (@p110) :args (@t2097)) % 39.97/40.19 (step @p2211 :rule cnf_or_pos :args (@t2110)) % 39.97/40.19 (step @p2212 :rule reordering :premises (@p2211) :args ((or @t2102 @t2109 (not @t2110)))) % 39.97/40.19 (step @p2213 :rule chain_m_resolution :premises (@p2212 @p2200 @p2210) :args (@t2109 @t272 (@list @t2098 @t2110))) % 39.97/40.19 (step @p2214 :rule instantiate :premises (@p108) :args (@t2097)) % 39.97/40.19 (step @p2215 :rule cnf_or_pos :args (@t2114)) % 39.97/40.19 (step @p2216 :rule reordering :premises (@p2215) :args ((or @t2111 @t2113 @t2112 @t2078 (not @t2114)))) % 39.97/40.19 (step @p2217 :rule chain_m_resolution :premises (@p2216 @p2214 @p2213 @p2209 @p2207 @p2177 @p2175 @p2206 @p2204 @p2203 @p2201 @p2200 @p2196 @p2194 @p2193 @p2191) :args (@t2092 @t294 (@list @t2114 @t2109 @t2107 @t2108 @t2078 @t2080 @t2104 @t2106 @t2067 @t2103 @t2098 @t2095 @t2096 @t2093 @t2094))) % 39.97/40.19 (step @p2218 :rule instantiate :premises (@p117) :args (@t2115)) % 39.97/40.19 (step @p2219 :rule instantiate :premises (@p116) :args (@t2116)) % 39.97/40.19 (step @p2220 :rule instantiate :premises (@p115) :args (@t2116)) % 39.97/40.19 (step @p2221 :rule cnf_or_pos :args (@t2120)) % 39.97/40.19 (step @p2222 :rule reordering :premises (@p2221) :args ((or @t2119 @t2118 (not @t2120)))) % 39.97/40.19 (step @p2223 :rule instantiate :premises (@p114) :args (@t2116)) % 39.97/40.19 (step @p2224 :rule cnf_or_pos :args (@t2122)) % 39.97/40.19 (step @p2225 :rule reordering :premises (@p2224) :args ((or @t2118 @t2121 (not @t2122)))) % 39.97/40.19 (step @p2226 :rule instantiate :premises (@p101) :args (@t2123)) % 39.97/40.19 (step @p2227 :rule cnf_or_pos :args (@t2126)) % 39.97/40.19 (step @p2228 :rule reordering :premises (@p2227) :args ((or @t2125 @t2124 (not @t2126)))) % 39.97/40.19 (step @p2229 :rule chain_m_resolution :premises (@p2228 @p28 @p2226) :args (@t2124 @t272 (@list @t28 @t2126))) % 39.97/40.19 (step @p2230 :rule instantiate :premises (@p112) :args (@t2115)) % 39.97/40.19 (step @p2231 :rule cnf_or_pos :args (@t2129)) % 39.97/40.19 (step @p2232 :rule reordering :premises (@p2231) :args ((or @t2128 @t2093 @t2127 (not @t2129)))) % 39.97/40.19 (step @p2233 :rule instantiate :premises (@p111) :args (@t2116)) % 39.97/40.19 (step @p2234 :rule cnf_or_pos :args (@t2132)) % 39.97/40.19 (step @p2235 :rule reordering :premises (@p2234) :args ((or @t2127 @t2131 (not @t2132)))) % 39.97/40.19 (step @p2236 :rule instantiate :premises (@p103) :args (@t2116)) % 39.97/40.19 (step @p2237 :rule cnf_or_pos :args (@t2134)) % 39.97/40.19 (step @p2238 :rule reordering :premises (@p2237) :args ((or @t2130 @t2133 (not @t2134)))) % 39.97/40.19 (step @p2239 :rule instantiate :premises (@p110) :args (@t2123)) % 39.97/40.19 (step @p2240 :rule cnf_or_pos :args (@t2136)) % 39.97/40.19 (step @p2241 :rule reordering :premises (@p2240) :args ((or @t2128 @t2135 (not @t2136)))) % 39.97/40.19 (step @p2242 :rule chain_m_resolution :premises (@p2241 @p2229 @p2239) :args (@t2135 @t272 (@list @t2124 @t2136))) % 39.97/40.19 (step @p2243 :rule instantiate :premises (@p108) :args (@t2123)) % 39.97/40.19 (step @p2244 :rule cnf_or_pos :args (@t2140)) % 39.97/40.19 (step @p2245 :rule reordering :premises (@p2244) :args ((or @t2137 @t2139 @t2138 @t2104 (not @t2140)))) % 39.97/40.19 (step @p2246 :rule chain_m_resolution :premises (@p2245 @p2243 @p2242 @p2238 @p2236 @p2206 @p2204 @p2235 @p2233 @p2232 @p2230 @p2229 @p2225 @p2223 @p2222 @p2220) :args (@t2118 @t294 (@list @t2140 @t2135 @t2133 @t2134 @t2104 @t2106 @t2130 @t2132 @t2093 @t2129 @t2124 @t2121 @t2122 @t2119 @t2120))) % 39.97/40.19 (step @p2247 :rule instantiate :premises (@p117) :args (@t2141)) % 39.97/40.19 (step @p2248 :rule instantiate :premises (@p116) :args (@t2142)) % 39.97/40.19 (step @p2249 :rule instantiate :premises (@p115) :args (@t2142)) % 39.97/40.19 (step @p2250 :rule cnf_or_pos :args (@t2146)) % 39.97/40.19 (step @p2251 :rule reordering :premises (@p2250) :args ((or @t2145 @t2144 (not @t2146)))) % 39.97/40.19 (step @p2252 :rule instantiate :premises (@p114) :args (@t2142)) % 39.97/40.19 (step @p2253 :rule cnf_or_pos :args (@t2148)) % 39.97/40.19 (step @p2254 :rule reordering :premises (@p2253) :args ((or @t2144 @t2147 (not @t2148)))) % 39.97/40.19 (step @p2255 :rule instantiate :premises (@p101) :args (@t2149)) % 39.97/40.19 (step @p2256 :rule cnf_or_pos :args (@t2152)) % 39.97/40.19 (step @p2257 :rule reordering :premises (@p2256) :args ((or @t2151 @t2150 (not @t2152)))) % 39.97/40.19 (step @p2258 :rule chain_m_resolution :premises (@p2257 @p27 @p2255) :args (@t2150 @t272 (@list @t27 @t2152))) % 39.97/40.19 (step @p2259 :rule instantiate :premises (@p112) :args (@t2141)) % 39.97/40.19 (step @p2260 :rule cnf_or_pos :args (@t2155)) % 39.97/40.19 (step @p2261 :rule reordering :premises (@p2260) :args ((or @t2154 @t2119 @t2153 (not @t2155)))) % 39.97/40.19 (step @p2262 :rule instantiate :premises (@p111) :args (@t2142)) % 39.97/40.19 (step @p2263 :rule cnf_or_pos :args (@t2158)) % 39.97/40.19 (step @p2264 :rule reordering :premises (@p2263) :args ((or @t2153 @t2157 (not @t2158)))) % 39.97/40.19 (step @p2265 :rule instantiate :premises (@p103) :args (@t2142)) % 39.97/40.19 (step @p2266 :rule cnf_or_pos :args (@t2160)) % 39.97/40.19 (step @p2267 :rule reordering :premises (@p2266) :args ((or @t2156 @t2159 (not @t2160)))) % 39.97/40.19 (step @p2268 :rule instantiate :premises (@p110) :args (@t2149)) % 39.97/40.19 (step @p2269 :rule cnf_or_pos :args (@t2162)) % 39.97/40.19 (step @p2270 :rule reordering :premises (@p2269) :args ((or @t2154 @t2161 (not @t2162)))) % 39.97/40.19 (step @p2271 :rule chain_m_resolution :premises (@p2270 @p2258 @p2268) :args (@t2161 @t272 (@list @t2150 @t2162))) % 39.97/40.19 (step @p2272 :rule instantiate :premises (@p108) :args (@t2149)) % 39.97/40.19 (step @p2273 :rule cnf_or_pos :args (@t2166)) % 39.97/40.19 (step @p2274 :rule reordering :premises (@p2273) :args ((or @t2163 @t2165 @t2164 @t2130 (not @t2166)))) % 39.97/40.19 (step @p2275 :rule chain_m_resolution :premises (@p2274 @p2272 @p2271 @p2267 @p2265 @p2235 @p2233 @p2264 @p2262 @p2261 @p2259 @p2258 @p2254 @p2252 @p2251 @p2249) :args (@t2144 @t294 (@list @t2166 @t2161 @t2159 @t2160 @t2130 @t2132 @t2156 @t2158 @t2119 @t2155 @t2150 @t2147 @t2148 @t2145 @t2146))) % 39.97/40.19 (step @p2276 :rule instantiate :premises (@p117) :args (@t2167)) % 39.97/40.19 (step @p2277 :rule instantiate :premises (@p116) :args (@t2168)) % 39.97/40.19 (step @p2278 :rule instantiate :premises (@p115) :args (@t2168)) % 39.97/40.19 (step @p2279 :rule cnf_or_pos :args (@t2172)) % 39.97/40.19 (step @p2280 :rule reordering :premises (@p2279) :args ((or @t2171 @t2170 (not @t2172)))) % 39.97/40.19 (step @p2281 :rule instantiate :premises (@p114) :args (@t2168)) % 39.97/40.19 (step @p2282 :rule cnf_or_pos :args (@t2174)) % 39.97/40.19 (step @p2283 :rule reordering :premises (@p2282) :args ((or @t2170 @t2173 (not @t2174)))) % 39.97/40.19 (step @p2284 :rule instantiate :premises (@p101) :args (@t2175)) % 39.97/40.19 (step @p2285 :rule cnf_or_pos :args (@t2178)) % 39.97/40.19 (step @p2286 :rule reordering :premises (@p2285) :args ((or @t2177 @t2176 (not @t2178)))) % 39.97/40.19 (step @p2287 :rule chain_m_resolution :premises (@p2286 @p26 @p2284) :args (@t2176 @t272 (@list @t26 @t2178))) % 39.97/40.19 (step @p2288 :rule instantiate :premises (@p112) :args (@t2167)) % 39.97/40.19 (step @p2289 :rule cnf_or_pos :args (@t2181)) % 39.97/40.19 (step @p2290 :rule reordering :premises (@p2289) :args ((or @t2180 @t2145 @t2179 (not @t2181)))) % 39.97/40.19 (step @p2291 :rule instantiate :premises (@p111) :args (@t2168)) % 39.97/40.19 (step @p2292 :rule cnf_or_pos :args (@t2184)) % 39.97/40.19 (step @p2293 :rule reordering :premises (@p2292) :args ((or @t2179 @t2183 (not @t2184)))) % 39.97/40.19 (step @p2294 :rule instantiate :premises (@p103) :args (@t2168)) % 39.97/40.19 (step @p2295 :rule cnf_or_pos :args (@t2186)) % 39.97/40.19 (step @p2296 :rule reordering :premises (@p2295) :args ((or @t2182 @t2185 (not @t2186)))) % 39.97/40.19 (step @p2297 :rule instantiate :premises (@p110) :args (@t2175)) % 39.97/40.19 (step @p2298 :rule cnf_or_pos :args (@t2188)) % 39.97/40.19 (step @p2299 :rule reordering :premises (@p2298) :args ((or @t2180 @t2187 (not @t2188)))) % 39.97/40.19 (step @p2300 :rule chain_m_resolution :premises (@p2299 @p2287 @p2297) :args (@t2187 @t272 (@list @t2176 @t2188))) % 39.97/40.19 (step @p2301 :rule instantiate :premises (@p108) :args (@t2175)) % 39.97/40.19 (step @p2302 :rule cnf_or_pos :args (@t2192)) % 39.97/40.19 (step @p2303 :rule reordering :premises (@p2302) :args ((or @t2189 @t2191 @t2190 @t2156 (not @t2192)))) % 39.97/40.19 (step @p2304 :rule chain_m_resolution :premises (@p2303 @p2301 @p2300 @p2296 @p2294 @p2264 @p2262 @p2293 @p2291 @p2290 @p2288 @p2287 @p2283 @p2281 @p2280 @p2278) :args (@t2170 @t294 (@list @t2192 @t2187 @t2185 @t2186 @t2156 @t2158 @t2182 @t2184 @t2145 @t2181 @t2176 @t2173 @t2174 @t2171 @t2172))) % 39.97/40.19 (step @p2305 :rule instantiate :premises (@p117) :args (@t2193)) % 39.97/40.19 (step @p2306 :rule instantiate :premises (@p116) :args (@t2194)) % 39.97/40.19 (step @p2307 :rule instantiate :premises (@p115) :args (@t2194)) % 39.97/40.19 (step @p2308 :rule cnf_or_pos :args (@t2198)) % 39.97/40.19 (step @p2309 :rule reordering :premises (@p2308) :args ((or @t2197 @t2196 (not @t2198)))) % 39.97/40.19 (step @p2310 :rule instantiate :premises (@p114) :args (@t2194)) % 39.97/40.19 (step @p2311 :rule cnf_or_pos :args (@t2200)) % 39.97/40.19 (step @p2312 :rule reordering :premises (@p2311) :args ((or @t2196 @t2199 (not @t2200)))) % 39.97/40.19 (step @p2313 :rule instantiate :premises (@p101) :args (@t2201)) % 39.97/40.19 (step @p2314 :rule cnf_or_pos :args (@t2204)) % 39.97/40.19 (step @p2315 :rule reordering :premises (@p2314) :args ((or @t2203 @t2202 (not @t2204)))) % 39.97/40.19 (step @p2316 :rule chain_m_resolution :premises (@p2315 @p25 @p2313) :args (@t2202 @t272 (@list @t25 @t2204))) % 39.97/40.19 (step @p2317 :rule instantiate :premises (@p112) :args (@t2193)) % 39.97/40.19 (step @p2318 :rule cnf_or_pos :args (@t2207)) % 39.97/40.19 (step @p2319 :rule reordering :premises (@p2318) :args ((or @t2206 @t2171 @t2205 (not @t2207)))) % 39.97/40.19 (step @p2320 :rule instantiate :premises (@p111) :args (@t2194)) % 39.97/40.19 (step @p2321 :rule cnf_or_pos :args (@t2210)) % 39.97/40.19 (step @p2322 :rule reordering :premises (@p2321) :args ((or @t2205 @t2209 (not @t2210)))) % 39.97/40.19 (step @p2323 :rule instantiate :premises (@p103) :args (@t2194)) % 39.97/40.19 (step @p2324 :rule cnf_or_pos :args (@t2212)) % 39.97/40.19 (step @p2325 :rule reordering :premises (@p2324) :args ((or @t2208 @t2211 (not @t2212)))) % 39.97/40.19 (step @p2326 :rule instantiate :premises (@p110) :args (@t2201)) % 39.97/40.19 (step @p2327 :rule cnf_or_pos :args (@t2214)) % 39.97/40.19 (step @p2328 :rule reordering :premises (@p2327) :args ((or @t2206 @t2213 (not @t2214)))) % 39.97/40.19 (step @p2329 :rule chain_m_resolution :premises (@p2328 @p2316 @p2326) :args (@t2213 @t272 (@list @t2202 @t2214))) % 39.97/40.19 (step @p2330 :rule instantiate :premises (@p108) :args (@t2201)) % 39.97/40.19 (step @p2331 :rule cnf_or_pos :args (@t2218)) % 39.97/40.19 (step @p2332 :rule reordering :premises (@p2331) :args ((or @t2215 @t2217 @t2216 @t2182 (not @t2218)))) % 39.97/40.19 (step @p2333 :rule chain_m_resolution :premises (@p2332 @p2330 @p2329 @p2325 @p2323 @p2293 @p2291 @p2322 @p2320 @p2319 @p2317 @p2316 @p2312 @p2310 @p2309 @p2307) :args (@t2196 @t294 (@list @t2218 @t2213 @t2211 @t2212 @t2182 @t2184 @t2208 @t2210 @t2171 @t2207 @t2202 @t2199 @t2200 @t2197 @t2198))) % 39.97/40.19 (step @p2334 :rule instantiate :premises (@p117) :args (@t2219)) % 39.97/40.19 (step @p2335 :rule instantiate :premises (@p116) :args (@t2220)) % 39.97/40.19 (step @p2336 :rule instantiate :premises (@p115) :args (@t2220)) % 39.97/40.19 (step @p2337 :rule cnf_or_pos :args (@t2224)) % 39.97/40.19 (step @p2338 :rule reordering :premises (@p2337) :args ((or @t2223 @t2222 (not @t2224)))) % 39.97/40.19 (step @p2339 :rule instantiate :premises (@p114) :args (@t2220)) % 39.97/40.19 (step @p2340 :rule cnf_or_pos :args (@t2226)) % 39.97/40.19 (step @p2341 :rule reordering :premises (@p2340) :args ((or @t2222 @t2225 (not @t2226)))) % 39.97/40.19 (step @p2342 :rule instantiate :premises (@p101) :args (@t2227)) % 39.97/40.19 (step @p2343 :rule cnf_or_pos :args (@t2230)) % 39.97/40.19 (step @p2344 :rule reordering :premises (@p2343) :args ((or @t2229 @t2228 (not @t2230)))) % 39.97/40.19 (step @p2345 :rule chain_m_resolution :premises (@p2344 @p24 @p2342) :args (@t2228 @t272 (@list @t24 @t2230))) % 39.97/40.19 (step @p2346 :rule instantiate :premises (@p112) :args (@t2219)) % 39.97/40.19 (step @p2347 :rule cnf_or_pos :args (@t2233)) % 39.97/40.19 (step @p2348 :rule reordering :premises (@p2347) :args ((or @t2232 @t2197 @t2231 (not @t2233)))) % 39.97/40.19 (step @p2349 :rule instantiate :premises (@p111) :args (@t2220)) % 39.97/40.19 (step @p2350 :rule cnf_or_pos :args (@t2236)) % 39.97/40.19 (step @p2351 :rule reordering :premises (@p2350) :args ((or @t2231 @t2235 (not @t2236)))) % 39.97/40.19 (step @p2352 :rule instantiate :premises (@p103) :args (@t2220)) % 39.97/40.19 (step @p2353 :rule cnf_or_pos :args (@t2238)) % 39.97/40.19 (step @p2354 :rule reordering :premises (@p2353) :args ((or @t2234 @t2237 (not @t2238)))) % 39.97/40.19 (step @p2355 :rule instantiate :premises (@p110) :args (@t2227)) % 39.97/40.19 (step @p2356 :rule cnf_or_pos :args (@t2240)) % 39.97/40.19 (step @p2357 :rule reordering :premises (@p2356) :args ((or @t2232 @t2239 (not @t2240)))) % 39.97/40.19 (step @p2358 :rule chain_m_resolution :premises (@p2357 @p2345 @p2355) :args (@t2239 @t272 (@list @t2228 @t2240))) % 39.97/40.19 (step @p2359 :rule instantiate :premises (@p108) :args (@t2227)) % 39.97/40.19 (step @p2360 :rule cnf_or_pos :args (@t2244)) % 39.97/40.19 (step @p2361 :rule reordering :premises (@p2360) :args ((or @t2241 @t2243 @t2242 @t2208 (not @t2244)))) % 39.97/40.19 (step @p2362 :rule chain_m_resolution :premises (@p2361 @p2359 @p2358 @p2354 @p2352 @p2322 @p2320 @p2351 @p2349 @p2348 @p2346 @p2345 @p2341 @p2339 @p2338 @p2336) :args (@t2222 @t294 (@list @t2244 @t2239 @t2237 @t2238 @t2208 @t2210 @t2234 @t2236 @t2197 @t2233 @t2228 @t2225 @t2226 @t2223 @t2224))) % 39.97/40.19 (step @p2363 :rule instantiate :premises (@p117) :args (@t2245)) % 39.97/40.19 (step @p2364 :rule instantiate :premises (@p116) :args (@t2246)) % 39.97/40.19 (step @p2365 :rule instantiate :premises (@p115) :args (@t2246)) % 39.97/40.19 (step @p2366 :rule cnf_or_pos :args (@t2250)) % 39.97/40.19 (step @p2367 :rule reordering :premises (@p2366) :args ((or @t2249 @t2248 (not @t2250)))) % 39.97/40.19 (step @p2368 :rule instantiate :premises (@p114) :args (@t2246)) % 39.97/40.19 (step @p2369 :rule cnf_or_pos :args (@t2252)) % 39.97/40.19 (step @p2370 :rule reordering :premises (@p2369) :args ((or @t2248 @t2251 (not @t2252)))) % 39.97/40.19 (step @p2371 :rule instantiate :premises (@p101) :args (@t2253)) % 39.97/40.19 (step @p2372 :rule cnf_or_pos :args (@t2256)) % 39.97/40.19 (step @p2373 :rule reordering :premises (@p2372) :args ((or @t2255 @t2254 (not @t2256)))) % 39.97/40.19 (step @p2374 :rule chain_m_resolution :premises (@p2373 @p23 @p2371) :args (@t2254 @t272 (@list @t23 @t2256))) % 39.97/40.19 (step @p2375 :rule instantiate :premises (@p112) :args (@t2245)) % 39.97/40.19 (step @p2376 :rule cnf_or_pos :args (@t2259)) % 39.97/40.19 (step @p2377 :rule reordering :premises (@p2376) :args ((or @t2258 @t2223 @t2257 (not @t2259)))) % 39.97/40.19 (step @p2378 :rule instantiate :premises (@p111) :args (@t2246)) % 39.97/40.19 (step @p2379 :rule cnf_or_pos :args (@t2262)) % 39.97/40.19 (step @p2380 :rule reordering :premises (@p2379) :args ((or @t2257 @t2261 (not @t2262)))) % 39.97/40.19 (step @p2381 :rule instantiate :premises (@p103) :args (@t2246)) % 39.97/40.19 (step @p2382 :rule cnf_or_pos :args (@t2264)) % 39.97/40.19 (step @p2383 :rule reordering :premises (@p2382) :args ((or @t2260 @t2263 (not @t2264)))) % 39.97/40.19 (step @p2384 :rule instantiate :premises (@p110) :args (@t2253)) % 39.97/40.19 (step @p2385 :rule cnf_or_pos :args (@t2266)) % 39.97/40.19 (step @p2386 :rule reordering :premises (@p2385) :args ((or @t2258 @t2265 (not @t2266)))) % 39.97/40.19 (step @p2387 :rule chain_m_resolution :premises (@p2386 @p2374 @p2384) :args (@t2265 @t272 (@list @t2254 @t2266))) % 39.97/40.19 (step @p2388 :rule instantiate :premises (@p108) :args (@t2253)) % 39.97/40.19 (step @p2389 :rule cnf_or_pos :args (@t2270)) % 39.97/40.19 (step @p2390 :rule reordering :premises (@p2389) :args ((or @t2267 @t2269 @t2268 @t2234 (not @t2270)))) % 39.97/40.19 (step @p2391 :rule chain_m_resolution :premises (@p2390 @p2388 @p2387 @p2383 @p2381 @p2351 @p2349 @p2380 @p2378 @p2377 @p2375 @p2374 @p2370 @p2368 @p2367 @p2365) :args (@t2248 @t294 (@list @t2270 @t2265 @t2263 @t2264 @t2234 @t2236 @t2260 @t2262 @t2223 @t2259 @t2254 @t2251 @t2252 @t2249 @t2250))) % 39.97/40.19 (step @p2392 :rule instantiate :premises (@p117) :args (@t2271)) % 39.97/40.19 (step @p2393 :rule instantiate :premises (@p116) :args (@t2272)) % 39.97/40.19 (step @p2394 :rule instantiate :premises (@p115) :args (@t2272)) % 39.97/40.19 (step @p2395 :rule cnf_or_pos :args (@t2276)) % 39.97/40.19 (step @p2396 :rule reordering :premises (@p2395) :args ((or @t2275 @t2274 (not @t2276)))) % 39.97/40.19 (step @p2397 :rule instantiate :premises (@p114) :args (@t2272)) % 39.97/40.19 (step @p2398 :rule cnf_or_pos :args (@t2278)) % 39.97/40.19 (step @p2399 :rule reordering :premises (@p2398) :args ((or @t2274 @t2277 (not @t2278)))) % 39.97/40.19 (step @p2400 :rule instantiate :premises (@p101) :args (@t2279)) % 39.97/40.19 (step @p2401 :rule cnf_or_pos :args (@t2282)) % 39.97/40.19 (step @p2402 :rule reordering :premises (@p2401) :args ((or @t2281 @t2280 (not @t2282)))) % 39.97/40.19 (step @p2403 :rule chain_m_resolution :premises (@p2402 @p22 @p2400) :args (@t2280 @t272 (@list @t22 @t2282))) % 39.97/40.19 (step @p2404 :rule instantiate :premises (@p112) :args (@t2271)) % 39.97/40.19 (step @p2405 :rule cnf_or_pos :args (@t2285)) % 39.97/40.19 (step @p2406 :rule reordering :premises (@p2405) :args ((or @t2284 @t2249 @t2283 (not @t2285)))) % 39.97/40.19 (step @p2407 :rule instantiate :premises (@p111) :args (@t2272)) % 39.97/40.19 (step @p2408 :rule cnf_or_pos :args (@t2288)) % 39.97/40.19 (step @p2409 :rule reordering :premises (@p2408) :args ((or @t2283 @t2287 (not @t2288)))) % 39.97/40.19 (step @p2410 :rule instantiate :premises (@p103) :args (@t2272)) % 39.97/40.19 (step @p2411 :rule cnf_or_pos :args (@t2290)) % 39.97/40.19 (step @p2412 :rule reordering :premises (@p2411) :args ((or @t2286 @t2289 (not @t2290)))) % 39.97/40.19 (step @p2413 :rule instantiate :premises (@p110) :args (@t2279)) % 39.97/40.19 (step @p2414 :rule cnf_or_pos :args (@t2292)) % 39.97/40.19 (step @p2415 :rule reordering :premises (@p2414) :args ((or @t2284 @t2291 (not @t2292)))) % 39.97/40.19 (step @p2416 :rule chain_m_resolution :premises (@p2415 @p2403 @p2413) :args (@t2291 @t272 (@list @t2280 @t2292))) % 39.97/40.19 (step @p2417 :rule instantiate :premises (@p108) :args (@t2279)) % 39.97/40.19 (step @p2418 :rule cnf_or_pos :args (@t2296)) % 39.97/40.19 (step @p2419 :rule reordering :premises (@p2418) :args ((or @t2293 @t2295 @t2294 @t2260 (not @t2296)))) % 39.97/40.19 (step @p2420 :rule chain_m_resolution :premises (@p2419 @p2417 @p2416 @p2412 @p2410 @p2380 @p2378 @p2409 @p2407 @p2406 @p2404 @p2403 @p2399 @p2397 @p2396 @p2394) :args (@t2274 @t294 (@list @t2296 @t2291 @t2289 @t2290 @t2260 @t2262 @t2286 @t2288 @t2249 @t2285 @t2280 @t2277 @t2278 @t2275 @t2276))) % 39.97/40.19 (step @p2421 :rule instantiate :premises (@p117) :args (@t2297)) % 39.97/40.19 (step @p2422 :rule instantiate :premises (@p116) :args (@t2298)) % 39.97/40.19 (step @p2423 :rule instantiate :premises (@p115) :args (@t2298)) % 39.97/40.19 (step @p2424 :rule cnf_or_pos :args (@t2302)) % 39.97/40.19 (step @p2425 :rule reordering :premises (@p2424) :args ((or @t2301 @t2300 (not @t2302)))) % 39.97/40.19 (step @p2426 :rule instantiate :premises (@p114) :args (@t2298)) % 39.97/40.19 (step @p2427 :rule cnf_or_pos :args (@t2304)) % 39.97/40.19 (step @p2428 :rule reordering :premises (@p2427) :args ((or @t2300 @t2303 (not @t2304)))) % 39.97/40.19 (step @p2429 :rule instantiate :premises (@p101) :args (@t2305)) % 39.97/40.19 (step @p2430 :rule cnf_or_pos :args (@t2308)) % 39.97/40.19 (step @p2431 :rule reordering :premises (@p2430) :args ((or @t2307 @t2306 (not @t2308)))) % 39.97/40.19 (step @p2432 :rule chain_m_resolution :premises (@p2431 @p21 @p2429) :args (@t2306 @t272 (@list @t21 @t2308))) % 39.97/40.19 (step @p2433 :rule instantiate :premises (@p112) :args (@t2297)) % 39.97/40.19 (step @p2434 :rule cnf_or_pos :args (@t2311)) % 39.97/40.19 (step @p2435 :rule reordering :premises (@p2434) :args ((or @t2310 @t2275 @t2309 (not @t2311)))) % 39.97/40.19 (step @p2436 :rule instantiate :premises (@p111) :args (@t2298)) % 39.97/40.19 (step @p2437 :rule cnf_or_pos :args (@t2314)) % 39.97/40.19 (step @p2438 :rule reordering :premises (@p2437) :args ((or @t2309 @t2313 (not @t2314)))) % 39.97/40.19 (step @p2439 :rule instantiate :premises (@p103) :args (@t2298)) % 39.97/40.19 (step @p2440 :rule cnf_or_pos :args (@t2316)) % 39.97/40.19 (step @p2441 :rule reordering :premises (@p2440) :args ((or @t2312 @t2315 (not @t2316)))) % 39.97/40.19 (step @p2442 :rule instantiate :premises (@p110) :args (@t2305)) % 39.97/40.19 (step @p2443 :rule cnf_or_pos :args (@t2318)) % 39.97/40.19 (step @p2444 :rule reordering :premises (@p2443) :args ((or @t2310 @t2317 (not @t2318)))) % 39.97/40.19 (step @p2445 :rule chain_m_resolution :premises (@p2444 @p2432 @p2442) :args (@t2317 @t272 (@list @t2306 @t2318))) % 39.97/40.19 (step @p2446 :rule instantiate :premises (@p108) :args (@t2305)) % 39.97/40.19 (step @p2447 :rule cnf_or_pos :args (@t2322)) % 39.97/40.19 (step @p2448 :rule reordering :premises (@p2447) :args ((or @t2319 @t2321 @t2320 @t2286 (not @t2322)))) % 39.97/40.19 (step @p2449 :rule chain_m_resolution :premises (@p2448 @p2446 @p2445 @p2441 @p2439 @p2409 @p2407 @p2438 @p2436 @p2435 @p2433 @p2432 @p2428 @p2426 @p2425 @p2423) :args (@t2300 @t294 (@list @t2322 @t2317 @t2315 @t2316 @t2286 @t2288 @t2312 @t2314 @t2275 @t2311 @t2306 @t2303 @t2304 @t2301 @t2302))) % 39.97/40.19 (step @p2450 :rule instantiate :premises (@p117) :args (@t2323)) % 39.97/40.19 (step @p2451 :rule instantiate :premises (@p116) :args (@t2324)) % 39.97/40.19 (step @p2452 :rule instantiate :premises (@p115) :args (@t2324)) % 39.97/40.19 (step @p2453 :rule cnf_or_pos :args (@t2328)) % 39.97/40.19 (step @p2454 :rule reordering :premises (@p2453) :args ((or @t2327 @t2326 (not @t2328)))) % 39.97/40.19 (step @p2455 :rule instantiate :premises (@p114) :args (@t2324)) % 39.97/40.19 (step @p2456 :rule cnf_or_pos :args (@t2330)) % 39.97/40.19 (step @p2457 :rule reordering :premises (@p2456) :args ((or @t2326 @t2329 (not @t2330)))) % 39.97/40.19 (step @p2458 :rule instantiate :premises (@p101) :args (@t2331)) % 39.97/40.19 (step @p2459 :rule cnf_or_pos :args (@t2334)) % 39.97/40.19 (step @p2460 :rule reordering :premises (@p2459) :args ((or @t2333 @t2332 (not @t2334)))) % 39.97/40.19 (step @p2461 :rule chain_m_resolution :premises (@p2460 @p20 @p2458) :args (@t2332 @t272 (@list @t20 @t2334))) % 39.97/40.19 (step @p2462 :rule instantiate :premises (@p112) :args (@t2323)) % 39.97/40.19 (step @p2463 :rule cnf_or_pos :args (@t2337)) % 39.97/40.19 (step @p2464 :rule reordering :premises (@p2463) :args ((or @t2336 @t2301 @t2335 (not @t2337)))) % 39.97/40.19 (step @p2465 :rule instantiate :premises (@p111) :args (@t2324)) % 39.97/40.19 (step @p2466 :rule cnf_or_pos :args (@t2340)) % 39.97/40.19 (step @p2467 :rule reordering :premises (@p2466) :args ((or @t2335 @t2339 (not @t2340)))) % 39.97/40.19 (step @p2468 :rule instantiate :premises (@p103) :args (@t2324)) % 39.97/40.19 (step @p2469 :rule cnf_or_pos :args (@t2342)) % 39.97/40.19 (step @p2470 :rule reordering :premises (@p2469) :args ((or @t2338 @t2341 (not @t2342)))) % 39.97/40.19 (step @p2471 :rule instantiate :premises (@p110) :args (@t2331)) % 39.97/40.19 (step @p2472 :rule cnf_or_pos :args (@t2344)) % 39.97/40.19 (step @p2473 :rule reordering :premises (@p2472) :args ((or @t2336 @t2343 (not @t2344)))) % 39.97/40.19 (step @p2474 :rule chain_m_resolution :premises (@p2473 @p2461 @p2471) :args (@t2343 @t272 (@list @t2332 @t2344))) % 39.97/40.19 (step @p2475 :rule instantiate :premises (@p108) :args (@t2331)) % 39.97/40.19 (step @p2476 :rule cnf_or_pos :args (@t2348)) % 39.97/40.19 (step @p2477 :rule reordering :premises (@p2476) :args ((or @t2345 @t2347 @t2346 @t2312 (not @t2348)))) % 39.97/40.19 (step @p2478 :rule chain_m_resolution :premises (@p2477 @p2475 @p2474 @p2470 @p2468 @p2438 @p2436 @p2467 @p2465 @p2464 @p2462 @p2461 @p2457 @p2455 @p2454 @p2452) :args (@t2326 @t294 (@list @t2348 @t2343 @t2341 @t2342 @t2312 @t2314 @t2338 @t2340 @t2301 @t2337 @t2332 @t2329 @t2330 @t2327 @t2328))) % 39.97/40.19 (step @p2479 :rule instantiate :premises (@p117) :args (@t2349)) % 39.97/40.19 (step @p2480 :rule instantiate :premises (@p116) :args (@t2350)) % 39.97/40.19 (step @p2481 :rule instantiate :premises (@p115) :args (@t2350)) % 39.97/40.19 (step @p2482 :rule cnf_or_pos :args (@t2354)) % 39.97/40.19 (step @p2483 :rule reordering :premises (@p2482) :args ((or @t2353 @t2352 (not @t2354)))) % 39.97/40.19 (step @p2484 :rule instantiate :premises (@p114) :args (@t2350)) % 39.97/40.19 (step @p2485 :rule cnf_or_pos :args (@t2356)) % 39.97/40.19 (step @p2486 :rule reordering :premises (@p2485) :args ((or @t2352 @t2355 (not @t2356)))) % 39.97/40.19 (step @p2487 :rule instantiate :premises (@p101) :args (@t2357)) % 39.97/40.19 (step @p2488 :rule cnf_or_pos :args (@t2360)) % 39.97/40.19 (step @p2489 :rule reordering :premises (@p2488) :args ((or @t2359 @t2358 (not @t2360)))) % 39.97/40.19 (step @p2490 :rule chain_m_resolution :premises (@p2489 @p19 @p2487) :args (@t2358 @t272 (@list @t19 @t2360))) % 39.97/40.19 (step @p2491 :rule instantiate :premises (@p112) :args (@t2349)) % 39.97/40.19 (step @p2492 :rule cnf_or_pos :args (@t2363)) % 39.97/40.19 (step @p2493 :rule reordering :premises (@p2492) :args ((or @t2362 @t2327 @t2361 (not @t2363)))) % 39.97/40.19 (step @p2494 :rule instantiate :premises (@p111) :args (@t2350)) % 39.97/40.19 (step @p2495 :rule cnf_or_pos :args (@t2366)) % 39.97/40.19 (step @p2496 :rule reordering :premises (@p2495) :args ((or @t2361 @t2365 (not @t2366)))) % 39.97/40.19 (step @p2497 :rule instantiate :premises (@p103) :args (@t2350)) % 39.97/40.19 (step @p2498 :rule cnf_or_pos :args (@t2368)) % 39.97/40.19 (step @p2499 :rule reordering :premises (@p2498) :args ((or @t2364 @t2367 (not @t2368)))) % 39.97/40.19 (step @p2500 :rule instantiate :premises (@p110) :args (@t2357)) % 39.97/40.19 (step @p2501 :rule cnf_or_pos :args (@t2370)) % 39.97/40.19 (step @p2502 :rule reordering :premises (@p2501) :args ((or @t2362 @t2369 (not @t2370)))) % 39.97/40.19 (step @p2503 :rule chain_m_resolution :premises (@p2502 @p2490 @p2500) :args (@t2369 @t272 (@list @t2358 @t2370))) % 39.97/40.19 (step @p2504 :rule instantiate :premises (@p108) :args (@t2357)) % 39.97/40.19 (step @p2505 :rule cnf_or_pos :args (@t2374)) % 39.97/40.19 (step @p2506 :rule reordering :premises (@p2505) :args ((or @t2371 @t2373 @t2372 @t2338 (not @t2374)))) % 39.97/40.19 (step @p2507 :rule chain_m_resolution :premises (@p2506 @p2504 @p2503 @p2499 @p2497 @p2467 @p2465 @p2496 @p2494 @p2493 @p2491 @p2490 @p2486 @p2484 @p2483 @p2481) :args (@t2352 @t294 (@list @t2374 @t2369 @t2367 @t2368 @t2338 @t2340 @t2364 @t2366 @t2327 @t2363 @t2358 @t2355 @t2356 @t2353 @t2354))) % 39.97/40.19 (step @p2508 :rule instantiate :premises (@p117) :args (@t2375)) % 39.97/40.19 (step @p2509 :rule instantiate :premises (@p116) :args (@t2376)) % 39.97/40.19 (step @p2510 :rule instantiate :premises (@p115) :args (@t2376)) % 39.97/40.19 (step @p2511 :rule cnf_or_pos :args (@t2380)) % 39.97/40.19 (step @p2512 :rule reordering :premises (@p2511) :args ((or @t2379 @t2378 (not @t2380)))) % 39.97/40.19 (step @p2513 :rule instantiate :premises (@p114) :args (@t2376)) % 39.97/40.19 (step @p2514 :rule cnf_or_pos :args (@t2382)) % 39.97/40.19 (step @p2515 :rule reordering :premises (@p2514) :args ((or @t2378 @t2381 (not @t2382)))) % 39.97/40.19 (step @p2516 :rule instantiate :premises (@p101) :args (@t2383)) % 39.97/40.19 (step @p2517 :rule cnf_or_pos :args (@t2386)) % 39.97/40.19 (step @p2518 :rule reordering :premises (@p2517) :args ((or @t2385 @t2384 (not @t2386)))) % 39.97/40.19 (step @p2519 :rule chain_m_resolution :premises (@p2518 @p18 @p2516) :args (@t2384 @t272 (@list @t18 @t2386))) % 39.97/40.19 (step @p2520 :rule instantiate :premises (@p112) :args (@t2375)) % 39.97/40.19 (step @p2521 :rule cnf_or_pos :args (@t2389)) % 39.97/40.19 (step @p2522 :rule reordering :premises (@p2521) :args ((or @t2388 @t2353 @t2387 (not @t2389)))) % 39.97/40.19 (step @p2523 :rule instantiate :premises (@p111) :args (@t2376)) % 39.97/40.19 (step @p2524 :rule cnf_or_pos :args (@t2392)) % 39.97/40.19 (step @p2525 :rule reordering :premises (@p2524) :args ((or @t2387 @t2391 (not @t2392)))) % 39.97/40.19 (step @p2526 :rule instantiate :premises (@p103) :args (@t2376)) % 39.97/40.19 (step @p2527 :rule cnf_or_pos :args (@t2394)) % 39.97/40.19 (step @p2528 :rule reordering :premises (@p2527) :args ((or @t2390 @t2393 (not @t2394)))) % 39.97/40.19 (step @p2529 :rule instantiate :premises (@p110) :args (@t2383)) % 39.97/40.19 (step @p2530 :rule cnf_or_pos :args (@t2396)) % 39.97/40.19 (step @p2531 :rule reordering :premises (@p2530) :args ((or @t2388 @t2395 (not @t2396)))) % 39.97/40.19 (step @p2532 :rule chain_m_resolution :premises (@p2531 @p2519 @p2529) :args (@t2395 @t272 (@list @t2384 @t2396))) % 39.97/40.19 (step @p2533 :rule instantiate :premises (@p108) :args (@t2383)) % 39.97/40.19 (step @p2534 :rule cnf_or_pos :args (@t2400)) % 39.97/40.19 (step @p2535 :rule reordering :premises (@p2534) :args ((or @t2397 @t2399 @t2398 @t2364 (not @t2400)))) % 39.97/40.19 (step @p2536 :rule chain_m_resolution :premises (@p2535 @p2533 @p2532 @p2528 @p2526 @p2496 @p2494 @p2525 @p2523 @p2522 @p2520 @p2519 @p2515 @p2513 @p2512 @p2510) :args (@t2378 @t294 (@list @t2400 @t2395 @t2393 @t2394 @t2364 @t2366 @t2390 @t2392 @t2353 @t2389 @t2384 @t2381 @t2382 @t2379 @t2380))) % 39.97/40.19 (step @p2537 :rule instantiate :premises (@p117) :args (@t2401)) % 39.97/40.19 (step @p2538 :rule instantiate :premises (@p116) :args (@t2402)) % 39.97/40.19 (step @p2539 :rule instantiate :premises (@p115) :args (@t2402)) % 39.97/40.19 (step @p2540 :rule cnf_or_pos :args (@t2406)) % 39.97/40.19 (step @p2541 :rule reordering :premises (@p2540) :args ((or @t2405 @t2404 (not @t2406)))) % 39.97/40.19 (step @p2542 :rule instantiate :premises (@p114) :args (@t2402)) % 39.97/40.19 (step @p2543 :rule cnf_or_pos :args (@t2408)) % 39.97/40.19 (step @p2544 :rule reordering :premises (@p2543) :args ((or @t2404 @t2407 (not @t2408)))) % 39.97/40.19 (step @p2545 :rule instantiate :premises (@p101) :args (@t2409)) % 39.97/40.19 (step @p2546 :rule cnf_or_pos :args (@t2412)) % 39.97/40.19 (step @p2547 :rule reordering :premises (@p2546) :args ((or @t2411 @t2410 (not @t2412)))) % 39.97/40.19 (step @p2548 :rule chain_m_resolution :premises (@p2547 @p17 @p2545) :args (@t2410 @t272 (@list @t17 @t2412))) % 39.97/40.19 (step @p2549 :rule instantiate :premises (@p112) :args (@t2401)) % 39.97/40.19 (step @p2550 :rule cnf_or_pos :args (@t2415)) % 39.97/40.19 (step @p2551 :rule reordering :premises (@p2550) :args ((or @t2414 @t2379 @t2413 (not @t2415)))) % 39.97/40.19 (step @p2552 :rule instantiate :premises (@p111) :args (@t2402)) % 39.97/40.19 (step @p2553 :rule cnf_or_pos :args (@t2418)) % 39.97/40.19 (step @p2554 :rule reordering :premises (@p2553) :args ((or @t2413 @t2417 (not @t2418)))) % 39.97/40.19 (step @p2555 :rule instantiate :premises (@p103) :args (@t2402)) % 39.97/40.19 (step @p2556 :rule cnf_or_pos :args (@t2420)) % 39.97/40.19 (step @p2557 :rule reordering :premises (@p2556) :args ((or @t2416 @t2419 (not @t2420)))) % 39.97/40.19 (step @p2558 :rule instantiate :premises (@p110) :args (@t2409)) % 39.97/40.19 (step @p2559 :rule cnf_or_pos :args (@t2422)) % 39.97/40.19 (step @p2560 :rule reordering :premises (@p2559) :args ((or @t2414 @t2421 (not @t2422)))) % 39.97/40.19 (step @p2561 :rule chain_m_resolution :premises (@p2560 @p2548 @p2558) :args (@t2421 @t272 (@list @t2410 @t2422))) % 39.97/40.19 (step @p2562 :rule instantiate :premises (@p108) :args (@t2409)) % 39.97/40.19 (step @p2563 :rule cnf_or_pos :args (@t2426)) % 39.97/40.19 (step @p2564 :rule reordering :premises (@p2563) :args ((or @t2423 @t2425 @t2424 @t2390 (not @t2426)))) % 39.97/40.19 (step @p2565 :rule chain_m_resolution :premises (@p2564 @p2562 @p2561 @p2557 @p2555 @p2525 @p2523 @p2554 @p2552 @p2551 @p2549 @p2548 @p2544 @p2542 @p2541 @p2539) :args (@t2404 @t294 (@list @t2426 @t2421 @t2419 @t2420 @t2390 @t2392 @t2416 @t2418 @t2379 @t2415 @t2410 @t2407 @t2408 @t2405 @t2406))) % 39.97/40.19 (step @p2566 :rule instantiate :premises (@p117) :args (@t2427)) % 39.97/40.19 (step @p2567 :rule instantiate :premises (@p116) :args (@t2428)) % 39.97/40.19 (step @p2568 :rule instantiate :premises (@p115) :args (@t2428)) % 39.97/40.19 (step @p2569 :rule cnf_or_pos :args (@t2432)) % 39.97/40.19 (step @p2570 :rule reordering :premises (@p2569) :args ((or @t2431 @t2430 (not @t2432)))) % 39.97/40.19 (step @p2571 :rule instantiate :premises (@p114) :args (@t2428)) % 39.97/40.19 (step @p2572 :rule cnf_or_pos :args (@t2434)) % 39.97/40.19 (step @p2573 :rule reordering :premises (@p2572) :args ((or @t2430 @t2433 (not @t2434)))) % 39.97/40.19 (step @p2574 :rule instantiate :premises (@p101) :args (@t2435)) % 39.97/40.19 (step @p2575 :rule cnf_or_pos :args (@t2438)) % 39.97/40.19 (step @p2576 :rule reordering :premises (@p2575) :args ((or @t2437 @t2436 (not @t2438)))) % 39.97/40.19 (step @p2577 :rule chain_m_resolution :premises (@p2576 @p16 @p2574) :args (@t2436 @t272 (@list @t16 @t2438))) % 39.97/40.19 (step @p2578 :rule instantiate :premises (@p112) :args (@t2427)) % 39.97/40.19 (step @p2579 :rule cnf_or_pos :args (@t2441)) % 39.97/40.19 (step @p2580 :rule reordering :premises (@p2579) :args ((or @t2440 @t2405 @t2439 (not @t2441)))) % 39.97/40.19 (step @p2581 :rule instantiate :premises (@p111) :args (@t2428)) % 39.97/40.19 (step @p2582 :rule cnf_or_pos :args (@t2444)) % 39.97/40.19 (step @p2583 :rule reordering :premises (@p2582) :args ((or @t2439 @t2443 (not @t2444)))) % 39.97/40.19 (step @p2584 :rule instantiate :premises (@p103) :args (@t2428)) % 39.97/40.19 (step @p2585 :rule cnf_or_pos :args (@t2446)) % 39.97/40.19 (step @p2586 :rule reordering :premises (@p2585) :args ((or @t2442 @t2445 (not @t2446)))) % 39.97/40.19 (step @p2587 :rule instantiate :premises (@p110) :args (@t2435)) % 39.97/40.19 (step @p2588 :rule cnf_or_pos :args (@t2448)) % 39.97/40.19 (step @p2589 :rule reordering :premises (@p2588) :args ((or @t2440 @t2447 (not @t2448)))) % 39.97/40.19 (step @p2590 :rule chain_m_resolution :premises (@p2589 @p2577 @p2587) :args (@t2447 @t272 (@list @t2436 @t2448))) % 39.97/40.19 (step @p2591 :rule instantiate :premises (@p108) :args (@t2435)) % 39.97/40.19 (step @p2592 :rule cnf_or_pos :args (@t2452)) % 39.97/40.19 (step @p2593 :rule reordering :premises (@p2592) :args ((or @t2449 @t2451 @t2450 @t2416 (not @t2452)))) % 39.97/40.19 (step @p2594 :rule chain_m_resolution :premises (@p2593 @p2591 @p2590 @p2586 @p2584 @p2554 @p2552 @p2583 @p2581 @p2580 @p2578 @p2577 @p2573 @p2571 @p2570 @p2568) :args (@t2430 @t294 (@list @t2452 @t2447 @t2445 @t2446 @t2416 @t2418 @t2442 @t2444 @t2405 @t2441 @t2436 @t2433 @t2434 @t2431 @t2432))) % 39.97/40.19 (step @p2595 :rule instantiate :premises (@p117) :args (@t2453)) % 39.97/40.19 (step @p2596 :rule instantiate :premises (@p116) :args (@t2454)) % 39.97/40.19 (step @p2597 :rule instantiate :premises (@p115) :args (@t2454)) % 39.97/40.19 (step @p2598 :rule cnf_or_pos :args (@t2458)) % 39.97/40.19 (step @p2599 :rule reordering :premises (@p2598) :args ((or @t2457 @t2456 (not @t2458)))) % 39.97/40.19 (step @p2600 :rule instantiate :premises (@p114) :args (@t2454)) % 39.97/40.19 (step @p2601 :rule cnf_or_pos :args (@t2460)) % 39.97/40.19 (step @p2602 :rule reordering :premises (@p2601) :args ((or @t2456 @t2459 (not @t2460)))) % 39.97/40.19 (step @p2603 :rule instantiate :premises (@p101) :args (@t2461)) % 39.97/40.19 (step @p2604 :rule cnf_or_pos :args (@t2464)) % 39.97/40.19 (step @p2605 :rule reordering :premises (@p2604) :args ((or @t2463 @t2462 (not @t2464)))) % 39.97/40.19 (step @p2606 :rule chain_m_resolution :premises (@p2605 @p15 @p2603) :args (@t2462 @t272 (@list @t15 @t2464))) % 39.97/40.19 (step @p2607 :rule instantiate :premises (@p112) :args (@t2453)) % 39.97/40.19 (step @p2608 :rule cnf_or_pos :args (@t2467)) % 39.97/40.19 (step @p2609 :rule reordering :premises (@p2608) :args ((or @t2466 @t2431 @t2465 (not @t2467)))) % 39.97/40.19 (step @p2610 :rule instantiate :premises (@p111) :args (@t2454)) % 39.97/40.19 (step @p2611 :rule cnf_or_pos :args (@t2470)) % 39.97/40.19 (step @p2612 :rule reordering :premises (@p2611) :args ((or @t2465 @t2469 (not @t2470)))) % 39.97/40.19 (step @p2613 :rule instantiate :premises (@p103) :args (@t2454)) % 39.97/40.19 (step @p2614 :rule cnf_or_pos :args (@t2472)) % 39.97/40.19 (step @p2615 :rule reordering :premises (@p2614) :args ((or @t2468 @t2471 (not @t2472)))) % 39.97/40.19 (step @p2616 :rule instantiate :premises (@p110) :args (@t2461)) % 39.97/40.19 (step @p2617 :rule cnf_or_pos :args (@t2474)) % 39.97/40.19 (step @p2618 :rule reordering :premises (@p2617) :args ((or @t2466 @t2473 (not @t2474)))) % 39.97/40.19 (step @p2619 :rule chain_m_resolution :premises (@p2618 @p2606 @p2616) :args (@t2473 @t272 (@list @t2462 @t2474))) % 39.97/40.19 (step @p2620 :rule instantiate :premises (@p108) :args (@t2461)) % 39.97/40.19 (step @p2621 :rule cnf_or_pos :args (@t2478)) % 39.97/40.19 (step @p2622 :rule reordering :premises (@p2621) :args ((or @t2475 @t2477 @t2476 @t2442 (not @t2478)))) % 39.97/40.19 (step @p2623 :rule chain_m_resolution :premises (@p2622 @p2620 @p2619 @p2615 @p2613 @p2583 @p2581 @p2612 @p2610 @p2609 @p2607 @p2606 @p2602 @p2600 @p2599 @p2597) :args (@t2456 @t294 (@list @t2478 @t2473 @t2471 @t2472 @t2442 @t2444 @t2468 @t2470 @t2431 @t2467 @t2462 @t2459 @t2460 @t2457 @t2458))) % 39.97/40.19 (step @p2624 :rule instantiate :premises (@p117) :args (@t2479)) % 39.97/40.19 (step @p2625 :rule instantiate :premises (@p116) :args (@t2480)) % 39.97/40.19 (step @p2626 :rule instantiate :premises (@p115) :args (@t2480)) % 39.97/40.19 (step @p2627 :rule cnf_or_pos :args (@t2484)) % 39.97/40.19 (step @p2628 :rule reordering :premises (@p2627) :args ((or @t2483 @t2482 (not @t2484)))) % 39.97/40.19 (step @p2629 :rule instantiate :premises (@p114) :args (@t2480)) % 39.97/40.19 (step @p2630 :rule cnf_or_pos :args (@t2486)) % 39.97/40.19 (step @p2631 :rule reordering :premises (@p2630) :args ((or @t2482 @t2485 (not @t2486)))) % 39.97/40.19 (step @p2632 :rule instantiate :premises (@p101) :args (@t2487)) % 39.97/40.19 (step @p2633 :rule cnf_or_pos :args (@t2490)) % 39.97/40.19 (step @p2634 :rule reordering :premises (@p2633) :args ((or @t2489 @t2488 (not @t2490)))) % 39.97/40.19 (step @p2635 :rule chain_m_resolution :premises (@p2634 @p14 @p2632) :args (@t2488 @t272 (@list @t14 @t2490))) % 39.97/40.19 (step @p2636 :rule instantiate :premises (@p112) :args (@t2479)) % 39.97/40.19 (step @p2637 :rule cnf_or_pos :args (@t2493)) % 39.97/40.19 (step @p2638 :rule reordering :premises (@p2637) :args ((or @t2492 @t2457 @t2491 (not @t2493)))) % 39.97/40.19 (step @p2639 :rule instantiate :premises (@p111) :args (@t2480)) % 39.97/40.19 (step @p2640 :rule cnf_or_pos :args (@t2496)) % 39.97/40.19 (step @p2641 :rule reordering :premises (@p2640) :args ((or @t2491 @t2495 (not @t2496)))) % 39.97/40.19 (step @p2642 :rule instantiate :premises (@p103) :args (@t2480)) % 39.97/40.19 (step @p2643 :rule cnf_or_pos :args (@t2498)) % 39.97/40.19 (step @p2644 :rule reordering :premises (@p2643) :args ((or @t2494 @t2497 (not @t2498)))) % 39.97/40.19 (step @p2645 :rule instantiate :premises (@p110) :args (@t2487)) % 39.97/40.19 (step @p2646 :rule cnf_or_pos :args (@t2500)) % 39.97/40.19 (step @p2647 :rule reordering :premises (@p2646) :args ((or @t2492 @t2499 (not @t2500)))) % 39.97/40.19 (step @p2648 :rule chain_m_resolution :premises (@p2647 @p2635 @p2645) :args (@t2499 @t272 (@list @t2488 @t2500))) % 39.97/40.19 (step @p2649 :rule instantiate :premises (@p108) :args (@t2487)) % 39.97/40.19 (step @p2650 :rule cnf_or_pos :args (@t2504)) % 39.97/40.19 (step @p2651 :rule reordering :premises (@p2650) :args ((or @t2501 @t2503 @t2502 @t2468 (not @t2504)))) % 39.97/40.19 (step @p2652 :rule chain_m_resolution :premises (@p2651 @p2649 @p2648 @p2644 @p2642 @p2612 @p2610 @p2641 @p2639 @p2638 @p2636 @p2635 @p2631 @p2629 @p2628 @p2626) :args (@t2482 @t294 (@list @t2504 @t2499 @t2497 @t2498 @t2468 @t2470 @t2494 @t2496 @t2457 @t2493 @t2488 @t2485 @t2486 @t2483 @t2484))) % 39.97/40.19 (step @p2653 :rule instantiate :premises (@p117) :args (@t2505)) % 39.97/40.19 (step @p2654 :rule instantiate :premises (@p116) :args (@t2506)) % 39.97/40.19 (step @p2655 :rule instantiate :premises (@p115) :args (@t2506)) % 39.97/40.19 (step @p2656 :rule cnf_or_pos :args (@t2510)) % 39.97/40.19 (step @p2657 :rule reordering :premises (@p2656) :args ((or @t2509 @t2508 (not @t2510)))) % 39.97/40.19 (step @p2658 :rule instantiate :premises (@p114) :args (@t2506)) % 39.97/40.19 (step @p2659 :rule cnf_or_pos :args (@t2512)) % 39.97/40.19 (step @p2660 :rule reordering :premises (@p2659) :args ((or @t2508 @t2511 (not @t2512)))) % 39.97/40.19 (step @p2661 :rule instantiate :premises (@p101) :args (@t2513)) % 39.97/40.19 (step @p2662 :rule cnf_or_pos :args (@t2516)) % 39.97/40.19 (step @p2663 :rule reordering :premises (@p2662) :args ((or @t2515 @t2514 (not @t2516)))) % 39.97/40.19 (step @p2664 :rule chain_m_resolution :premises (@p2663 @p13 @p2661) :args (@t2514 @t272 (@list @t13 @t2516))) % 39.97/40.19 (step @p2665 :rule instantiate :premises (@p112) :args (@t2505)) % 39.97/40.19 (step @p2666 :rule cnf_or_pos :args (@t2519)) % 39.97/40.19 (step @p2667 :rule reordering :premises (@p2666) :args ((or @t2518 @t2483 @t2517 (not @t2519)))) % 39.97/40.19 (step @p2668 :rule instantiate :premises (@p111) :args (@t2506)) % 39.97/40.19 (step @p2669 :rule cnf_or_pos :args (@t2522)) % 39.97/40.19 (step @p2670 :rule reordering :premises (@p2669) :args ((or @t2517 @t2521 (not @t2522)))) % 39.97/40.19 (step @p2671 :rule instantiate :premises (@p103) :args (@t2506)) % 39.97/40.19 (step @p2672 :rule cnf_or_pos :args (@t2524)) % 39.97/40.19 (step @p2673 :rule reordering :premises (@p2672) :args ((or @t2520 @t2523 (not @t2524)))) % 39.97/40.19 (step @p2674 :rule instantiate :premises (@p110) :args (@t2513)) % 39.97/40.19 (step @p2675 :rule cnf_or_pos :args (@t2526)) % 39.97/40.19 (step @p2676 :rule reordering :premises (@p2675) :args ((or @t2518 @t2525 (not @t2526)))) % 39.97/40.19 (step @p2677 :rule chain_m_resolution :premises (@p2676 @p2664 @p2674) :args (@t2525 @t272 (@list @t2514 @t2526))) % 39.97/40.19 (step @p2678 :rule instantiate :premises (@p108) :args (@t2513)) % 39.97/40.19 (step @p2679 :rule cnf_or_pos :args (@t2530)) % 39.97/40.19 (step @p2680 :rule reordering :premises (@p2679) :args ((or @t2527 @t2529 @t2528 @t2494 (not @t2530)))) % 39.97/40.19 (step @p2681 :rule chain_m_resolution :premises (@p2680 @p2678 @p2677 @p2673 @p2671 @p2641 @p2639 @p2670 @p2668 @p2667 @p2665 @p2664 @p2660 @p2658 @p2657 @p2655) :args (@t2508 @t294 (@list @t2530 @t2525 @t2523 @t2524 @t2494 @t2496 @t2520 @t2522 @t2483 @t2519 @t2514 @t2511 @t2512 @t2509 @t2510))) % 39.97/40.19 (step @p2682 :rule instantiate :premises (@p117) :args (@t2531)) % 39.97/40.19 (step @p2683 :rule instantiate :premises (@p116) :args (@t2532)) % 39.97/40.19 (step @p2684 :rule instantiate :premises (@p115) :args (@t2532)) % 39.97/40.19 (step @p2685 :rule cnf_or_pos :args (@t2536)) % 39.97/40.19 (step @p2686 :rule reordering :premises (@p2685) :args ((or @t2535 @t2534 (not @t2536)))) % 39.97/40.19 (step @p2687 :rule instantiate :premises (@p114) :args (@t2532)) % 39.97/40.19 (step @p2688 :rule cnf_or_pos :args (@t2538)) % 39.97/40.19 (step @p2689 :rule reordering :premises (@p2688) :args ((or @t2534 @t2537 (not @t2538)))) % 39.97/40.19 (step @p2690 :rule instantiate :premises (@p101) :args (@t2539)) % 39.97/40.19 (step @p2691 :rule cnf_or_pos :args (@t2542)) % 39.97/40.19 (step @p2692 :rule reordering :premises (@p2691) :args ((or @t2541 @t2540 (not @t2542)))) % 39.97/40.19 (step @p2693 :rule chain_m_resolution :premises (@p2692 @p12 @p2690) :args (@t2540 @t272 (@list @t12 @t2542))) % 39.97/40.19 (step @p2694 :rule instantiate :premises (@p112) :args (@t2531)) % 39.97/40.19 (step @p2695 :rule cnf_or_pos :args (@t2545)) % 39.97/40.19 (step @p2696 :rule reordering :premises (@p2695) :args ((or @t2544 @t2509 @t2543 (not @t2545)))) % 39.97/40.19 (step @p2697 :rule instantiate :premises (@p111) :args (@t2532)) % 39.97/40.19 (step @p2698 :rule cnf_or_pos :args (@t2548)) % 39.97/40.19 (step @p2699 :rule reordering :premises (@p2698) :args ((or @t2543 @t2547 (not @t2548)))) % 39.97/40.19 (step @p2700 :rule instantiate :premises (@p103) :args (@t2532)) % 39.97/40.19 (step @p2701 :rule cnf_or_pos :args (@t2550)) % 39.97/40.19 (step @p2702 :rule reordering :premises (@p2701) :args ((or @t2546 @t2549 (not @t2550)))) % 39.97/40.19 (step @p2703 :rule instantiate :premises (@p110) :args (@t2539)) % 39.97/40.19 (step @p2704 :rule cnf_or_pos :args (@t2552)) % 39.97/40.19 (step @p2705 :rule reordering :premises (@p2704) :args ((or @t2544 @t2551 (not @t2552)))) % 39.97/40.19 (step @p2706 :rule chain_m_resolution :premises (@p2705 @p2693 @p2703) :args (@t2551 @t272 (@list @t2540 @t2552))) % 39.97/40.19 (step @p2707 :rule instantiate :premises (@p108) :args (@t2539)) % 39.97/40.19 (step @p2708 :rule cnf_or_pos :args (@t2556)) % 39.97/40.19 (step @p2709 :rule reordering :premises (@p2708) :args ((or @t2553 @t2555 @t2554 @t2520 (not @t2556)))) % 39.97/40.19 (step @p2710 :rule chain_m_resolution :premises (@p2709 @p2707 @p2706 @p2702 @p2700 @p2670 @p2668 @p2699 @p2697 @p2696 @p2694 @p2693 @p2689 @p2687 @p2686 @p2684) :args (@t2534 @t294 (@list @t2556 @t2551 @t2549 @t2550 @t2520 @t2522 @t2546 @t2548 @t2509 @t2545 @t2540 @t2537 @t2538 @t2535 @t2536))) % 39.97/40.19 (step @p2711 :rule instantiate :premises (@p117) :args (@t2557)) % 39.97/40.19 (step @p2712 :rule instantiate :premises (@p116) :args (@t2558)) % 39.97/40.19 (step @p2713 :rule instantiate :premises (@p115) :args (@t2558)) % 39.97/40.19 (step @p2714 :rule cnf_or_pos :args (@t2562)) % 39.97/40.19 (step @p2715 :rule reordering :premises (@p2714) :args ((or @t2561 @t2560 (not @t2562)))) % 39.97/40.19 (step @p2716 :rule instantiate :premises (@p114) :args (@t2558)) % 39.97/40.19 (step @p2717 :rule cnf_or_pos :args (@t2564)) % 39.97/40.19 (step @p2718 :rule reordering :premises (@p2717) :args ((or @t2560 @t2563 (not @t2564)))) % 39.97/40.19 (step @p2719 :rule instantiate :premises (@p101) :args (@t2565)) % 39.97/40.19 (step @p2720 :rule cnf_or_pos :args (@t2568)) % 39.97/40.19 (step @p2721 :rule reordering :premises (@p2720) :args ((or @t2567 @t2566 (not @t2568)))) % 39.97/40.19 (step @p2722 :rule chain_m_resolution :premises (@p2721 @p11 @p2719) :args (@t2566 @t272 (@list @t11 @t2568))) % 39.97/40.19 (step @p2723 :rule instantiate :premises (@p112) :args (@t2557)) % 39.97/40.19 (step @p2724 :rule cnf_or_pos :args (@t2571)) % 39.97/40.19 (step @p2725 :rule reordering :premises (@p2724) :args ((or @t2570 @t2535 @t2569 (not @t2571)))) % 39.97/40.19 (step @p2726 :rule instantiate :premises (@p111) :args (@t2558)) % 39.97/40.19 (step @p2727 :rule cnf_or_pos :args (@t2574)) % 39.97/40.19 (step @p2728 :rule reordering :premises (@p2727) :args ((or @t2569 @t2573 (not @t2574)))) % 39.97/40.19 (step @p2729 :rule instantiate :premises (@p103) :args (@t2558)) % 39.97/40.19 (step @p2730 :rule cnf_or_pos :args (@t2576)) % 39.97/40.19 (step @p2731 :rule reordering :premises (@p2730) :args ((or @t2572 @t2575 (not @t2576)))) % 39.97/40.19 (step @p2732 :rule instantiate :premises (@p110) :args (@t2565)) % 39.97/40.19 (step @p2733 :rule cnf_or_pos :args (@t2578)) % 39.97/40.19 (step @p2734 :rule reordering :premises (@p2733) :args ((or @t2570 @t2577 (not @t2578)))) % 39.97/40.19 (step @p2735 :rule chain_m_resolution :premises (@p2734 @p2722 @p2732) :args (@t2577 @t272 (@list @t2566 @t2578))) % 39.97/40.19 (step @p2736 :rule instantiate :premises (@p108) :args (@t2565)) % 39.97/40.19 (step @p2737 :rule cnf_or_pos :args (@t2582)) % 39.97/40.19 (step @p2738 :rule reordering :premises (@p2737) :args ((or @t2579 @t2581 @t2580 @t2546 (not @t2582)))) % 39.97/40.19 (step @p2739 :rule chain_m_resolution :premises (@p2738 @p2736 @p2735 @p2731 @p2729 @p2699 @p2697 @p2728 @p2726 @p2725 @p2723 @p2722 @p2718 @p2716 @p2715 @p2713) :args (@t2560 @t294 (@list @t2582 @t2577 @t2575 @t2576 @t2546 @t2548 @t2572 @t2574 @t2535 @t2571 @t2566 @t2563 @t2564 @t2561 @t2562))) % 39.97/40.19 (step @p2740 :rule instantiate :premises (@p117) :args (@t2583)) % 39.97/40.19 (step @p2741 :rule instantiate :premises (@p116) :args (@t2584)) % 39.97/40.19 (step @p2742 :rule instantiate :premises (@p115) :args (@t2584)) % 39.97/40.19 (step @p2743 :rule cnf_or_pos :args (@t2588)) % 39.97/40.19 (step @p2744 :rule reordering :premises (@p2743) :args ((or @t2587 @t2586 (not @t2588)))) % 39.97/40.19 (step @p2745 :rule instantiate :premises (@p114) :args (@t2584)) % 39.97/40.19 (step @p2746 :rule cnf_or_pos :args (@t2590)) % 39.97/40.19 (step @p2747 :rule reordering :premises (@p2746) :args ((or @t2586 @t2589 (not @t2590)))) % 39.97/40.19 (step @p2748 :rule instantiate :premises (@p101) :args (@t2591)) % 39.97/40.19 (step @p2749 :rule cnf_or_pos :args (@t2594)) % 39.97/40.19 (step @p2750 :rule reordering :premises (@p2749) :args ((or @t2593 @t2592 (not @t2594)))) % 39.97/40.19 (step @p2751 :rule chain_m_resolution :premises (@p2750 @p10 @p2748) :args (@t2592 @t272 (@list @t10 @t2594))) % 39.97/40.19 (step @p2752 :rule instantiate :premises (@p112) :args (@t2583)) % 39.97/40.19 (step @p2753 :rule cnf_or_pos :args (@t2597)) % 39.97/40.19 (step @p2754 :rule reordering :premises (@p2753) :args ((or @t2596 @t2561 @t2595 (not @t2597)))) % 39.97/40.19 (step @p2755 :rule instantiate :premises (@p111) :args (@t2584)) % 39.97/40.19 (step @p2756 :rule cnf_or_pos :args (@t2600)) % 39.97/40.19 (step @p2757 :rule reordering :premises (@p2756) :args ((or @t2595 @t2599 (not @t2600)))) % 39.97/40.19 (step @p2758 :rule instantiate :premises (@p103) :args (@t2584)) % 39.97/40.19 (step @p2759 :rule cnf_or_pos :args (@t2602)) % 39.97/40.19 (step @p2760 :rule reordering :premises (@p2759) :args ((or @t2598 @t2601 (not @t2602)))) % 39.97/40.19 (step @p2761 :rule instantiate :premises (@p110) :args (@t2591)) % 39.97/40.19 (step @p2762 :rule cnf_or_pos :args (@t2604)) % 39.97/40.19 (step @p2763 :rule reordering :premises (@p2762) :args ((or @t2596 @t2603 (not @t2604)))) % 39.97/40.19 (step @p2764 :rule chain_m_resolution :premises (@p2763 @p2751 @p2761) :args (@t2603 @t272 (@list @t2592 @t2604))) % 39.97/40.19 (step @p2765 :rule instantiate :premises (@p108) :args (@t2591)) % 39.97/40.19 (step @p2766 :rule cnf_or_pos :args (@t2608)) % 39.97/40.19 (step @p2767 :rule reordering :premises (@p2766) :args ((or @t2605 @t2607 @t2606 @t2572 (not @t2608)))) % 39.97/40.19 (step @p2768 :rule chain_m_resolution :premises (@p2767 @p2765 @p2764 @p2760 @p2758 @p2728 @p2726 @p2757 @p2755 @p2754 @p2752 @p2751 @p2747 @p2745 @p2744 @p2742) :args (@t2586 @t294 (@list @t2608 @t2603 @t2601 @t2602 @t2572 @t2574 @t2598 @t2600 @t2561 @t2597 @t2592 @t2589 @t2590 @t2587 @t2588))) % 39.97/40.19 (step @p2769 :rule instantiate :premises (@p117) :args (@t2609)) % 39.97/40.19 (step @p2770 :rule instantiate :premises (@p116) :args (@t2610)) % 39.97/40.19 (step @p2771 :rule instantiate :premises (@p115) :args (@t2610)) % 39.97/40.19 (step @p2772 :rule cnf_or_pos :args (@t2614)) % 39.97/40.19 (step @p2773 :rule reordering :premises (@p2772) :args ((or @t2613 @t2612 (not @t2614)))) % 39.97/40.19 (step @p2774 :rule instantiate :premises (@p114) :args (@t2610)) % 39.97/40.19 (step @p2775 :rule cnf_or_pos :args (@t2616)) % 39.97/40.19 (step @p2776 :rule reordering :premises (@p2775) :args ((or @t2612 @t2615 (not @t2616)))) % 39.97/40.19 (step @p2777 :rule instantiate :premises (@p101) :args (@t2617)) % 39.97/40.19 (step @p2778 :rule cnf_or_pos :args (@t2620)) % 39.97/40.19 (step @p2779 :rule reordering :premises (@p2778) :args ((or @t2619 @t2618 (not @t2620)))) % 39.97/40.19 (step @p2780 :rule chain_m_resolution :premises (@p2779 @p9 @p2777) :args (@t2618 @t272 (@list @t9 @t2620))) % 39.97/40.19 (step @p2781 :rule instantiate :premises (@p112) :args (@t2609)) % 39.97/40.19 (step @p2782 :rule cnf_or_pos :args (@t2623)) % 39.97/40.19 (step @p2783 :rule reordering :premises (@p2782) :args ((or @t2622 @t2587 @t2621 (not @t2623)))) % 39.97/40.19 (step @p2784 :rule instantiate :premises (@p111) :args (@t2610)) % 39.97/40.19 (step @p2785 :rule cnf_or_pos :args (@t2626)) % 39.97/40.19 (step @p2786 :rule reordering :premises (@p2785) :args ((or @t2621 @t2625 (not @t2626)))) % 39.97/40.19 (step @p2787 :rule instantiate :premises (@p103) :args (@t2610)) % 39.97/40.19 (step @p2788 :rule cnf_or_pos :args (@t2628)) % 39.97/40.19 (step @p2789 :rule reordering :premises (@p2788) :args ((or @t2624 @t2627 (not @t2628)))) % 39.97/40.19 (step @p2790 :rule instantiate :premises (@p110) :args (@t2617)) % 39.97/40.19 (step @p2791 :rule cnf_or_pos :args (@t2630)) % 39.97/40.19 (step @p2792 :rule reordering :premises (@p2791) :args ((or @t2622 @t2629 (not @t2630)))) % 39.97/40.19 (step @p2793 :rule chain_m_resolution :premises (@p2792 @p2780 @p2790) :args (@t2629 @t272 (@list @t2618 @t2630))) % 39.97/40.19 (step @p2794 :rule instantiate :premises (@p108) :args (@t2617)) % 39.97/40.19 (step @p2795 :rule cnf_or_pos :args (@t2634)) % 39.97/40.19 (step @p2796 :rule reordering :premises (@p2795) :args ((or @t2631 @t2633 @t2632 @t2598 (not @t2634)))) % 39.97/40.19 (step @p2797 :rule chain_m_resolution :premises (@p2796 @p2794 @p2793 @p2789 @p2787 @p2757 @p2755 @p2786 @p2784 @p2783 @p2781 @p2780 @p2776 @p2774 @p2773 @p2771) :args (@t2612 @t294 (@list @t2634 @t2629 @t2627 @t2628 @t2598 @t2600 @t2624 @t2626 @t2587 @t2623 @t2618 @t2615 @t2616 @t2613 @t2614))) % 39.97/40.19 (step @p2798 :rule instantiate :premises (@p117) :args (@t2635)) % 39.97/40.19 (step @p2799 :rule instantiate :premises (@p116) :args (@t2636)) % 39.97/40.19 (step @p2800 :rule instantiate :premises (@p115) :args (@t2636)) % 39.97/40.19 (step @p2801 :rule cnf_or_pos :args (@t2640)) % 39.97/40.19 (step @p2802 :rule reordering :premises (@p2801) :args ((or @t2639 @t2638 (not @t2640)))) % 39.97/40.19 (step @p2803 :rule instantiate :premises (@p114) :args (@t2636)) % 39.97/40.19 (step @p2804 :rule cnf_or_pos :args (@t2642)) % 39.97/40.19 (step @p2805 :rule reordering :premises (@p2804) :args ((or @t2638 @t2641 (not @t2642)))) % 39.97/40.19 (step @p2806 :rule instantiate :premises (@p101) :args (@t2643)) % 39.97/40.19 (step @p2807 :rule cnf_or_pos :args (@t2646)) % 39.97/40.19 (step @p2808 :rule reordering :premises (@p2807) :args ((or @t2645 @t2644 (not @t2646)))) % 39.97/40.19 (step @p2809 :rule chain_m_resolution :premises (@p2808 @p8 @p2806) :args (@t2644 @t272 (@list @t8 @t2646))) % 39.97/40.19 (step @p2810 :rule instantiate :premises (@p112) :args (@t2635)) % 39.97/40.19 (step @p2811 :rule cnf_or_pos :args (@t2649)) % 39.97/40.19 (step @p2812 :rule reordering :premises (@p2811) :args ((or @t2648 @t2613 @t2647 (not @t2649)))) % 39.97/40.19 (step @p2813 :rule instantiate :premises (@p111) :args (@t2636)) % 39.97/40.19 (step @p2814 :rule cnf_or_pos :args (@t2652)) % 39.97/40.19 (step @p2815 :rule reordering :premises (@p2814) :args ((or @t2647 @t2651 (not @t2652)))) % 39.97/40.19 (step @p2816 :rule instantiate :premises (@p103) :args (@t2636)) % 39.97/40.19 (step @p2817 :rule cnf_or_pos :args (@t2654)) % 39.97/40.19 (step @p2818 :rule reordering :premises (@p2817) :args ((or @t2650 @t2653 (not @t2654)))) % 39.97/40.19 (step @p2819 :rule instantiate :premises (@p110) :args (@t2643)) % 39.97/40.19 (step @p2820 :rule cnf_or_pos :args (@t2656)) % 39.97/40.19 (step @p2821 :rule reordering :premises (@p2820) :args ((or @t2648 @t2655 (not @t2656)))) % 39.97/40.19 (step @p2822 :rule chain_m_resolution :premises (@p2821 @p2809 @p2819) :args (@t2655 @t272 (@list @t2644 @t2656))) % 39.97/40.19 (step @p2823 :rule instantiate :premises (@p108) :args (@t2643)) % 39.97/40.19 (step @p2824 :rule cnf_or_pos :args (@t2660)) % 39.97/40.19 (step @p2825 :rule reordering :premises (@p2824) :args ((or @t2657 @t2659 @t2658 @t2624 (not @t2660)))) % 39.97/40.19 (step @p2826 :rule chain_m_resolution :premises (@p2825 @p2823 @p2822 @p2818 @p2816 @p2786 @p2784 @p2815 @p2813 @p2812 @p2810 @p2809 @p2805 @p2803 @p2802 @p2800) :args (@t2638 @t294 (@list @t2660 @t2655 @t2653 @t2654 @t2624 @t2626 @t2650 @t2652 @t2613 @t2649 @t2644 @t2641 @t2642 @t2639 @t2640))) % 39.97/40.19 (step @p2827 :rule instantiate :premises (@p117) :args (@t2661)) % 39.97/40.19 (step @p2828 :rule instantiate :premises (@p116) :args (@t2662)) % 39.97/40.19 (step @p2829 :rule instantiate :premises (@p115) :args (@t2662)) % 39.97/40.19 (step @p2830 :rule cnf_or_pos :args (@t2666)) % 39.97/40.19 (step @p2831 :rule reordering :premises (@p2830) :args ((or @t2665 @t2664 (not @t2666)))) % 39.97/40.19 (step @p2832 :rule instantiate :premises (@p114) :args (@t2662)) % 39.97/40.19 (step @p2833 :rule cnf_or_pos :args (@t2668)) % 39.97/40.19 (step @p2834 :rule reordering :premises (@p2833) :args ((or @t2664 @t2667 (not @t2668)))) % 39.97/40.19 (step @p2835 :rule instantiate :premises (@p101) :args (@t2669)) % 39.97/40.19 (step @p2836 :rule cnf_or_pos :args (@t2672)) % 39.97/40.19 (step @p2837 :rule reordering :premises (@p2836) :args ((or @t2671 @t2670 (not @t2672)))) % 39.97/40.19 (step @p2838 :rule chain_m_resolution :premises (@p2837 @p7 @p2835) :args (@t2670 @t272 (@list @t7 @t2672))) % 39.97/40.19 (step @p2839 :rule instantiate :premises (@p112) :args (@t2661)) % 39.97/40.19 (step @p2840 :rule cnf_or_pos :args (@t2675)) % 39.97/40.19 (step @p2841 :rule reordering :premises (@p2840) :args ((or @t2674 @t2639 @t2673 (not @t2675)))) % 39.97/40.19 (step @p2842 :rule instantiate :premises (@p111) :args (@t2662)) % 39.97/40.19 (step @p2843 :rule cnf_or_pos :args (@t2678)) % 39.97/40.19 (step @p2844 :rule reordering :premises (@p2843) :args ((or @t2673 @t2677 (not @t2678)))) % 39.97/40.19 (step @p2845 :rule instantiate :premises (@p103) :args (@t2662)) % 39.97/40.19 (step @p2846 :rule cnf_or_pos :args (@t2680)) % 39.97/40.19 (step @p2847 :rule reordering :premises (@p2846) :args ((or @t2676 @t2679 (not @t2680)))) % 39.97/40.19 (step @p2848 :rule instantiate :premises (@p110) :args (@t2669)) % 39.97/40.19 (step @p2849 :rule cnf_or_pos :args (@t2682)) % 39.97/40.19 (step @p2850 :rule reordering :premises (@p2849) :args ((or @t2674 @t2681 (not @t2682)))) % 39.97/40.19 (step @p2851 :rule chain_m_resolution :premises (@p2850 @p2838 @p2848) :args (@t2681 @t272 (@list @t2670 @t2682))) % 39.97/40.19 (step @p2852 :rule instantiate :premises (@p108) :args (@t2669)) % 39.97/40.19 (step @p2853 :rule cnf_or_pos :args (@t2686)) % 39.97/40.19 (step @p2854 :rule reordering :premises (@p2853) :args ((or @t2683 @t2685 @t2684 @t2650 (not @t2686)))) % 39.97/40.19 (step @p2855 :rule chain_m_resolution :premises (@p2854 @p2852 @p2851 @p2847 @p2845 @p2815 @p2813 @p2844 @p2842 @p2841 @p2839 @p2838 @p2834 @p2832 @p2831 @p2829) :args (@t2664 @t294 (@list @t2686 @t2681 @t2679 @t2680 @t2650 @t2652 @t2676 @t2678 @t2639 @t2675 @t2670 @t2667 @t2668 @t2665 @t2666))) % 39.97/40.19 (step @p2856 :rule instantiate :premises (@p117) :args (@t2687)) % 39.97/40.19 (step @p2857 :rule instantiate :premises (@p116) :args (@t2688)) % 39.97/40.19 (step @p2858 :rule instantiate :premises (@p115) :args (@t2688)) % 39.97/40.19 (step @p2859 :rule cnf_or_pos :args (@t2692)) % 39.97/40.19 (step @p2860 :rule reordering :premises (@p2859) :args ((or @t2691 @t2690 (not @t2692)))) % 39.97/40.19 (step @p2861 :rule instantiate :premises (@p114) :args (@t2688)) % 39.97/40.19 (step @p2862 :rule cnf_or_pos :args (@t2694)) % 39.97/40.19 (step @p2863 :rule reordering :premises (@p2862) :args ((or @t2690 @t2693 (not @t2694)))) % 39.97/40.19 (step @p2864 :rule instantiate :premises (@p101) :args (@t2695)) % 39.97/40.19 (step @p2865 :rule cnf_or_pos :args (@t2698)) % 39.97/40.19 (step @p2866 :rule reordering :premises (@p2865) :args ((or @t2697 @t2696 (not @t2698)))) % 39.97/40.19 (step @p2867 :rule chain_m_resolution :premises (@p2866 @p6 @p2864) :args (@t2696 @t272 (@list @t6 @t2698))) % 39.97/40.19 (step @p2868 :rule instantiate :premises (@p112) :args (@t2687)) % 39.97/40.19 (step @p2869 :rule cnf_or_pos :args (@t2701)) % 39.97/40.19 (step @p2870 :rule reordering :premises (@p2869) :args ((or @t2700 @t2665 @t2699 (not @t2701)))) % 39.97/40.19 (step @p2871 :rule instantiate :premises (@p111) :args (@t2688)) % 39.97/40.19 (step @p2872 :rule cnf_or_pos :args (@t2704)) % 39.97/40.19 (step @p2873 :rule reordering :premises (@p2872) :args ((or @t2699 @t2703 (not @t2704)))) % 39.97/40.19 (step @p2874 :rule instantiate :premises (@p103) :args (@t2688)) % 39.97/40.19 (step @p2875 :rule cnf_or_pos :args (@t2706)) % 39.97/40.19 (step @p2876 :rule reordering :premises (@p2875) :args ((or @t2702 @t2705 (not @t2706)))) % 39.97/40.19 (step @p2877 :rule instantiate :premises (@p110) :args (@t2695)) % 39.97/40.19 (step @p2878 :rule cnf_or_pos :args (@t2708)) % 39.97/40.19 (step @p2879 :rule reordering :premises (@p2878) :args ((or @t2700 @t2707 (not @t2708)))) % 39.97/40.19 (step @p2880 :rule chain_m_resolution :premises (@p2879 @p2867 @p2877) :args (@t2707 @t272 (@list @t2696 @t2708))) % 39.97/40.19 (step @p2881 :rule instantiate :premises (@p108) :args (@t2695)) % 39.97/40.19 (step @p2882 :rule cnf_or_pos :args (@t2712)) % 39.97/40.19 (step @p2883 :rule reordering :premises (@p2882) :args ((or @t2709 @t2711 @t2710 @t2676 (not @t2712)))) % 39.97/40.19 (step @p2884 :rule chain_m_resolution :premises (@p2883 @p2881 @p2880 @p2876 @p2874 @p2844 @p2842 @p2873 @p2871 @p2870 @p2868 @p2867 @p2863 @p2861 @p2860 @p2858) :args (@t2690 @t294 (@list @t2712 @t2707 @t2705 @t2706 @t2676 @t2678 @t2702 @t2704 @t2665 @t2701 @t2696 @t2693 @t2694 @t2691 @t2692))) % 39.97/40.19 (step @p2885 :rule instantiate :premises (@p117) :args (@t2713)) % 39.97/40.19 (step @p2886 :rule instantiate :premises (@p116) :args (@t2714)) % 39.97/40.19 (step @p2887 :rule instantiate :premises (@p115) :args (@t2714)) % 39.97/40.19 (step @p2888 :rule cnf_or_pos :args (@t2718)) % 39.97/40.19 (step @p2889 :rule reordering :premises (@p2888) :args ((or @t2717 @t2716 (not @t2718)))) % 39.97/40.19 (step @p2890 :rule instantiate :premises (@p114) :args (@t2714)) % 39.97/40.19 (step @p2891 :rule cnf_or_pos :args (@t2720)) % 39.97/40.19 (step @p2892 :rule reordering :premises (@p2891) :args ((or @t2716 @t2719 (not @t2720)))) % 39.97/40.19 (step @p2893 :rule instantiate :premises (@p101) :args (@t2721)) % 39.97/40.19 (step @p2894 :rule cnf_or_pos :args (@t2724)) % 39.97/40.19 (step @p2895 :rule reordering :premises (@p2894) :args ((or @t2723 @t2722 (not @t2724)))) % 39.97/40.19 (step @p2896 :rule chain_m_resolution :premises (@p2895 @p5 @p2893) :args (@t2722 @t272 (@list @t5 @t2724))) % 39.97/40.19 (step @p2897 :rule instantiate :premises (@p112) :args (@t2713)) % 39.97/40.19 (step @p2898 :rule cnf_or_pos :args (@t2727)) % 39.97/40.19 (step @p2899 :rule reordering :premises (@p2898) :args ((or @t2726 @t2691 @t2725 (not @t2727)))) % 39.97/40.19 (step @p2900 :rule instantiate :premises (@p111) :args (@t2714)) % 39.97/40.19 (step @p2901 :rule cnf_or_pos :args (@t2730)) % 39.97/40.19 (step @p2902 :rule reordering :premises (@p2901) :args ((or @t2725 @t2729 (not @t2730)))) % 39.97/40.19 (step @p2903 :rule instantiate :premises (@p103) :args (@t2714)) % 39.97/40.19 (step @p2904 :rule cnf_or_pos :args (@t2732)) % 39.97/40.19 (step @p2905 :rule reordering :premises (@p2904) :args ((or @t2728 @t2731 (not @t2732)))) % 39.97/40.19 (step @p2906 :rule instantiate :premises (@p110) :args (@t2721)) % 39.97/40.19 (step @p2907 :rule cnf_or_pos :args (@t2734)) % 39.97/40.19 (step @p2908 :rule reordering :premises (@p2907) :args ((or @t2726 @t2733 (not @t2734)))) % 39.97/40.19 (step @p2909 :rule chain_m_resolution :premises (@p2908 @p2896 @p2906) :args (@t2733 @t272 (@list @t2722 @t2734))) % 39.97/40.19 (step @p2910 :rule instantiate :premises (@p108) :args (@t2721)) % 39.97/40.19 (step @p2911 :rule cnf_or_pos :args (@t2738)) % 39.97/40.19 (step @p2912 :rule reordering :premises (@p2911) :args ((or @t2735 @t2737 @t2736 @t2702 (not @t2738)))) % 39.97/40.19 (step @p2913 :rule chain_m_resolution :premises (@p2912 @p2910 @p2909 @p2905 @p2903 @p2873 @p2871 @p2902 @p2900 @p2899 @p2897 @p2896 @p2892 @p2890 @p2889 @p2887) :args (@t2716 @t294 (@list @t2738 @t2733 @t2731 @t2732 @t2702 @t2704 @t2728 @t2730 @t2691 @t2727 @t2722 @t2719 @t2720 @t2717 @t2718))) % 39.97/40.19 (step @p2914 :rule instantiate :premises (@p117) :args (@t2739)) % 39.97/40.19 (step @p2915 :rule instantiate :premises (@p116) :args (@t2740)) % 39.97/40.19 (step @p2916 :rule instantiate :premises (@p115) :args (@t2740)) % 39.97/40.19 (step @p2917 :rule cnf_or_pos :args (@t2744)) % 39.97/40.19 (step @p2918 :rule reordering :premises (@p2917) :args ((or @t2743 @t2742 (not @t2744)))) % 39.97/40.19 (step @p2919 :rule instantiate :premises (@p114) :args (@t2740)) % 39.97/40.19 (step @p2920 :rule cnf_or_pos :args (@t2746)) % 39.97/40.19 (step @p2921 :rule reordering :premises (@p2920) :args ((or @t2742 @t2745 (not @t2746)))) % 39.97/40.19 (step @p2922 :rule instantiate :premises (@p101) :args (@t2747)) % 39.97/40.19 (step @p2923 :rule cnf_or_pos :args (@t2750)) % 39.97/40.19 (step @p2924 :rule reordering :premises (@p2923) :args ((or @t2749 @t2748 (not @t2750)))) % 39.97/40.19 (step @p2925 :rule chain_m_resolution :premises (@p2924 @p4 @p2922) :args (@t2748 @t272 (@list @t4 @t2750))) % 39.97/40.19 (step @p2926 :rule instantiate :premises (@p112) :args (@t2739)) % 39.97/40.19 (step @p2927 :rule cnf_or_pos :args (@t2753)) % 39.97/40.19 (step @p2928 :rule reordering :premises (@p2927) :args ((or @t2752 @t2717 @t2751 (not @t2753)))) % 39.97/40.19 (step @p2929 :rule instantiate :premises (@p111) :args (@t2740)) % 39.97/40.19 (step @p2930 :rule cnf_or_pos :args (@t2756)) % 39.97/40.19 (step @p2931 :rule reordering :premises (@p2930) :args ((or @t2751 @t2755 (not @t2756)))) % 39.97/40.19 (step @p2932 :rule instantiate :premises (@p103) :args (@t2740)) % 39.97/40.19 (step @p2933 :rule cnf_or_pos :args (@t2758)) % 39.97/40.19 (step @p2934 :rule reordering :premises (@p2933) :args ((or @t2754 @t2757 (not @t2758)))) % 39.97/40.19 (step @p2935 :rule instantiate :premises (@p110) :args (@t2747)) % 39.97/40.19 (step @p2936 :rule cnf_or_pos :args (@t2760)) % 39.97/40.19 (step @p2937 :rule reordering :premises (@p2936) :args ((or @t2752 @t2759 (not @t2760)))) % 39.97/40.19 (step @p2938 :rule chain_m_resolution :premises (@p2937 @p2925 @p2935) :args (@t2759 @t272 (@list @t2748 @t2760))) % 39.97/40.19 (step @p2939 :rule instantiate :premises (@p108) :args (@t2747)) % 39.97/40.19 (step @p2940 :rule cnf_or_pos :args (@t2764)) % 39.97/40.19 (step @p2941 :rule reordering :premises (@p2940) :args ((or @t2761 @t2763 @t2762 @t2728 (not @t2764)))) % 39.97/40.19 (step @p2942 :rule chain_m_resolution :premises (@p2941 @p2939 @p2938 @p2934 @p2932 @p2902 @p2900 @p2931 @p2929 @p2928 @p2926 @p2925 @p2921 @p2919 @p2918 @p2916) :args (@t2742 @t294 (@list @t2764 @t2759 @t2757 @t2758 @t2728 @t2730 @t2754 @t2756 @t2717 @t2753 @t2748 @t2745 @t2746 @t2743 @t2744))) % 39.97/40.19 (step @p2943 :rule instantiate :premises (@p117) :args (@t2765)) % 39.97/40.19 (step @p2944 :rule instantiate :premises (@p116) :args (@t2766)) % 39.97/40.19 (step @p2945 :rule instantiate :premises (@p115) :args (@t2766)) % 39.97/40.19 (step @p2946 :rule cnf_or_pos :args (@t2770)) % 39.97/40.19 (step @p2947 :rule reordering :premises (@p2946) :args ((or @t2769 @t2768 (not @t2770)))) % 39.97/40.19 (step @p2948 :rule instantiate :premises (@p114) :args (@t2766)) % 39.97/40.19 (step @p2949 :rule cnf_or_pos :args (@t2772)) % 39.97/40.19 (step @p2950 :rule reordering :premises (@p2949) :args ((or @t2768 @t2771 (not @t2772)))) % 39.97/40.19 (step @p2951 :rule instantiate :premises (@p101) :args (@t2773)) % 39.97/40.19 (step @p2952 :rule cnf_or_pos :args (@t2776)) % 39.97/40.19 (step @p2953 :rule reordering :premises (@p2952) :args ((or @t2775 @t2774 (not @t2776)))) % 39.97/40.19 (step @p2954 :rule chain_m_resolution :premises (@p2953 @p3 @p2951) :args (@t2774 @t272 (@list @t3 @t2776))) % 39.97/40.19 (step @p2955 :rule instantiate :premises (@p112) :args (@t2765)) % 39.97/40.19 (step @p2956 :rule cnf_or_pos :args (@t2779)) % 39.97/40.19 (step @p2957 :rule reordering :premises (@p2956) :args ((or @t2778 @t2743 @t2777 (not @t2779)))) % 39.97/40.19 (step @p2958 :rule instantiate :premises (@p111) :args (@t2766)) % 39.97/40.19 (step @p2959 :rule cnf_or_pos :args (@t2782)) % 39.97/40.19 (step @p2960 :rule reordering :premises (@p2959) :args ((or @t2777 @t2781 (not @t2782)))) % 39.97/40.19 (step @p2961 :rule instantiate :premises (@p103) :args (@t2766)) % 39.97/40.19 (step @p2962 :rule cnf_or_pos :args (@t2784)) % 39.97/40.19 (step @p2963 :rule reordering :premises (@p2962) :args ((or @t2780 @t2783 (not @t2784)))) % 39.97/40.19 (step @p2964 :rule instantiate :premises (@p110) :args (@t2773)) % 39.97/40.19 (step @p2965 :rule cnf_or_pos :args (@t2786)) % 39.97/40.19 (step @p2966 :rule reordering :premises (@p2965) :args ((or @t2778 @t2785 (not @t2786)))) % 39.97/40.19 (step @p2967 :rule chain_m_resolution :premises (@p2966 @p2954 @p2964) :args (@t2785 @t272 (@list @t2774 @t2786))) % 39.97/40.19 (step @p2968 :rule instantiate :premises (@p108) :args (@t2773)) % 39.97/40.19 (step @p2969 :rule cnf_or_pos :args (@t2790)) % 39.97/40.19 (step @p2970 :rule reordering :premises (@p2969) :args ((or @t2787 @t2789 @t2788 @t2754 (not @t2790)))) % 39.97/40.19 (step @p2971 :rule chain_m_resolution :premises (@p2970 @p2968 @p2967 @p2963 @p2961 @p2931 @p2929 @p2960 @p2958 @p2957 @p2955 @p2954 @p2950 @p2948 @p2947 @p2945) :args (@t2768 @t294 (@list @t2790 @t2785 @t2783 @t2784 @t2754 @t2756 @t2780 @t2782 @t2743 @t2779 @t2774 @t2771 @t2772 @t2769 @t2770))) % 39.97/40.19 (step @p2972 :rule instantiate :premises (@p117) :args (@t2791)) % 39.97/40.19 (step @p2973 :rule instantiate :premises (@p116) :args (@t2792)) % 39.97/40.19 (step @p2974 :rule instantiate :premises (@p115) :args (@t2792)) % 39.97/40.19 (step @p2975 :rule cnf_or_pos :args (@t2796)) % 39.97/40.19 (step @p2976 :rule reordering :premises (@p2975) :args ((or @t2795 @t2794 (not @t2796)))) % 39.97/40.19 (step @p2977 :rule instantiate :premises (@p114) :args (@t2792)) % 39.97/40.19 (step @p2978 :rule cnf_or_pos :args (@t2798)) % 39.97/40.19 (step @p2979 :rule reordering :premises (@p2978) :args ((or @t2794 @t2797 (not @t2798)))) % 39.97/40.19 (step @p2980 :rule instantiate :premises (@p101) :args (@t2799)) % 39.97/40.19 (step @p2981 :rule cnf_or_pos :args (@t2802)) % 39.97/40.19 (step @p2982 :rule reordering :premises (@p2981) :args ((or @t2801 @t2800 (not @t2802)))) % 39.97/40.19 (step @p2983 :rule chain_m_resolution :premises (@p2982 @p2 @p2980) :args (@t2800 @t272 (@list @t2 @t2802))) % 39.97/40.19 (step @p2984 :rule instantiate :premises (@p112) :args (@t2791)) % 39.97/40.19 (step @p2985 :rule cnf_or_pos :args (@t2805)) % 39.97/40.19 (step @p2986 :rule reordering :premises (@p2985) :args ((or @t2804 @t2769 @t2803 (not @t2805)))) % 39.97/40.19 (step @p2987 :rule instantiate :premises (@p111) :args (@t2792)) % 39.97/40.19 (step @p2988 :rule cnf_or_pos :args (@t2808)) % 39.97/40.19 (step @p2989 :rule reordering :premises (@p2988) :args ((or @t2803 @t2807 (not @t2808)))) % 39.97/40.19 (step @p2990 :rule instantiate :premises (@p103) :args (@t2792)) % 39.97/40.19 (step @p2991 :rule cnf_or_pos :args (@t2810)) % 39.97/40.19 (step @p2992 :rule reordering :premises (@p2991) :args ((or @t2806 @t2809 (not @t2810)))) % 39.97/40.19 (step @p2993 :rule instantiate :premises (@p110) :args (@t2799)) % 39.97/40.19 (step @p2994 :rule cnf_or_pos :args (@t2812)) % 39.97/40.19 (step @p2995 :rule reordering :premises (@p2994) :args ((or @t2804 @t2811 (not @t2812)))) % 39.97/40.19 (step @p2996 :rule chain_m_resolution :premises (@p2995 @p2983 @p2993) :args (@t2811 @t272 (@list @t2800 @t2812))) % 39.97/40.19 (step @p2997 :rule instantiate :premises (@p108) :args (@t2799)) % 39.97/40.19 (step @p2998 :rule cnf_or_pos :args (@t2816)) % 39.97/40.19 (step @p2999 :rule reordering :premises (@p2998) :args ((or @t2813 @t2815 @t2814 @t2780 (not @t2816)))) % 39.97/40.19 (step @p3000 :rule chain_m_resolution :premises (@p2999 @p2997 @p2996 @p2992 @p2990 @p2960 @p2958 @p2989 @p2987 @p2986 @p2984 @p2983 @p2979 @p2977 @p2976 @p2974) :args (@t2794 @t294 (@list @t2816 @t2811 @t2809 @t2810 @t2780 @t2782 @t2806 @t2808 @t2769 @t2805 @t2800 @t2797 @t2798 @t2795 @t2796))) % 39.97/40.19 (step @p3001 :rule instantiate :premises (@p117) :args (@t2817)) % 39.97/40.19 (step @p3002 :rule instantiate :premises (@p116) :args (@t2818)) % 39.97/40.19 (step @p3003 :rule instantiate :premises (@p114) :args (@t2818)) % 39.97/40.19 (step @p3004 :rule cnf_or_pos :args (@t2822)) % 39.97/40.19 (step @p3005 :rule reordering :premises (@p3004) :args ((or @t2820 @t2821 (not @t2822)))) % 39.97/40.19 (step @p3006 :rule instantiate :premises (@p115) :args (@t2818)) % 39.97/40.19 (step @p3007 :rule cnf_or_pos :args (@t2824)) % 39.97/40.19 (step @p3008 :rule reordering :premises (@p3007) :args ((or @t2820 @t2823 (not @t2824)))) % 39.97/40.19 (step @p3009 :rule instantiate :premises (@p110) :args (@t2825)) % 39.97/40.19 (step @p3010 :rule instantiate :premises (@p101) :args (@t2825)) % 39.97/40.19 (step @p3011 :rule cnf_or_pos :args (@t2828)) % 39.97/40.19 (step @p3012 :rule reordering :premises (@p3011) :args ((or @t2827 @t2826 (not @t2828)))) % 39.97/40.19 (step @p3013 :rule chain_m_resolution :premises (@p3012 @p1 @p3010) :args (@t2826 @t272 (@list @t1 @t2828))) % 39.97/40.19 (step @p3014 :rule cnf_or_pos :args (@t2831)) % 39.97/40.19 (step @p3015 :rule reordering :premises (@p3014) :args ((or @t2830 @t2829 (not @t2831)))) % 39.97/40.19 (step @p3016 :rule chain_m_resolution :premises (@p3015 @p3013 @p3009) :args (@t2829 @t272 (@list @t2826 @t2831))) % 39.97/40.19 (step @p3017 :rule instantiate :premises (@p108) :args (@t2825)) % 39.97/40.19 (step @p3018 :rule cnf_or_pos :args (@t2835)) % 39.97/40.19 (step @p3019 :rule reordering :premises (@p3018) :args ((or @t2834 @t2833 @t2832 @t2806 (not @t2835)))) % 39.97/40.19 (step @p3020 :rule instantiate :premises (@p112) :args (@t2817)) % 39.97/40.19 (step @p3021 :rule cnf_or_pos :args (@t2837)) % 39.97/40.19 (step @p3022 :rule reordering :premises (@p3021) :args ((or @t2830 @t2795 @t2836 (not @t2837)))) % 39.97/40.19 (step @p3023 :rule chain_m_resolution :premises (@p2989 @p2987 @p3022 @p3020 @p3013 @p3019 @p3017 @p3016 @p105 @p3008 @p3006 @p3005 @p3003) :args (@t2820 (@list false false false false false false false false false false false false) (@list @t2808 @t2795 @t2837 @t2826 @t2806 @t2835 @t2829 @t211 @t2823 @t2824 @t2821 @t2822))) % 39.97/40.19 (step @p3024 :rule cnf_or_pos :args (@t2840)) % 39.97/40.19 (step @p3025 :rule reordering :premises (@p3024) :args ((or @t2838 @t2819 @t2839 (not @t2840)))) % 39.97/40.19 (step @p3026 :rule chain_m_resolution :premises (@p3025 @p123 @p3023 @p3002) :args (@t2839 @t2841 (@list @t236 @t2819 @t2840))) % 39.97/40.19 (step @p3027 :rule cnf_or_pos :args (@t2844)) % 39.97/40.19 (step @p3028 :rule reordering :premises (@p3027) :args ((or @t2827 @t2843 @t2842 (not @t2844)))) % 39.97/40.19 (step @p3029 :rule chain_m_resolution :premises (@p3028 @p1 @p3026 @p3001) :args (@t2843 @t2845 (@list @t1 @t2839 @t2844))) % 39.97/40.19 (step @p3030 :rule cnf_or_pos :args (@t2848)) % 39.97/40.19 (step @p3031 :rule reordering :premises (@p3030) :args ((or @t2847 @t2846 @t2793 (not @t2848)))) % 39.97/40.19 (step @p3032 :rule chain_m_resolution :premises (@p3031 @p3029 @p3000 @p2973) :args (@t2847 @t2841 (@list @t2843 @t2793 @t2848))) % 39.97/40.19 (step @p3033 :rule cnf_or_pos :args (@t2851)) % 39.97/40.19 (step @p3034 :rule reordering :premises (@p3033) :args ((or @t2801 @t2850 @t2849 (not @t2851)))) % 39.97/40.19 (step @p3035 :rule chain_m_resolution :premises (@p3034 @p2 @p3032 @p2972) :args (@t2850 @t2845 (@list @t2 @t2847 @t2851))) % 39.97/40.19 (step @p3036 :rule cnf_or_pos :args (@t2854)) % 39.97/40.19 (step @p3037 :rule reordering :premises (@p3036) :args ((or @t2853 @t2852 @t2767 (not @t2854)))) % 39.97/40.19 (step @p3038 :rule chain_m_resolution :premises (@p3037 @p3035 @p2971 @p2944) :args (@t2853 @t2841 (@list @t2850 @t2767 @t2854))) % 39.97/40.19 (step @p3039 :rule cnf_or_pos :args (@t2857)) % 39.97/40.19 (step @p3040 :rule reordering :premises (@p3039) :args ((or @t2775 @t2856 @t2855 (not @t2857)))) % 39.97/40.19 (step @p3041 :rule chain_m_resolution :premises (@p3040 @p3 @p3038 @p2943) :args (@t2856 @t2845 (@list @t3 @t2853 @t2857))) % 39.97/40.19 (step @p3042 :rule cnf_or_pos :args (@t2860)) % 39.97/40.19 (step @p3043 :rule reordering :premises (@p3042) :args ((or @t2859 @t2858 @t2741 (not @t2860)))) % 39.97/40.19 (step @p3044 :rule chain_m_resolution :premises (@p3043 @p3041 @p2942 @p2915) :args (@t2859 @t2841 (@list @t2856 @t2741 @t2860))) % 39.97/40.19 (step @p3045 :rule cnf_or_pos :args (@t2863)) % 39.97/40.19 (step @p3046 :rule reordering :premises (@p3045) :args ((or @t2749 @t2862 @t2861 (not @t2863)))) % 39.97/40.19 (step @p3047 :rule chain_m_resolution :premises (@p3046 @p4 @p3044 @p2914) :args (@t2862 @t2845 (@list @t4 @t2859 @t2863))) % 39.97/40.19 (step @p3048 :rule cnf_or_pos :args (@t2866)) % 39.97/40.19 (step @p3049 :rule reordering :premises (@p3048) :args ((or @t2865 @t2864 @t2715 (not @t2866)))) % 39.97/40.19 (step @p3050 :rule chain_m_resolution :premises (@p3049 @p3047 @p2913 @p2886) :args (@t2865 @t2841 (@list @t2862 @t2715 @t2866))) % 39.97/40.19 (step @p3051 :rule cnf_or_pos :args (@t2869)) % 39.97/40.19 (step @p3052 :rule reordering :premises (@p3051) :args ((or @t2723 @t2868 @t2867 (not @t2869)))) % 39.97/40.19 (step @p3053 :rule chain_m_resolution :premises (@p3052 @p5 @p3050 @p2885) :args (@t2868 @t2845 (@list @t5 @t2865 @t2869))) % 39.97/40.19 (step @p3054 :rule cnf_or_pos :args (@t2872)) % 39.97/40.19 (step @p3055 :rule reordering :premises (@p3054) :args ((or @t2871 @t2870 @t2689 (not @t2872)))) % 39.97/40.19 (step @p3056 :rule chain_m_resolution :premises (@p3055 @p3053 @p2884 @p2857) :args (@t2871 @t2841 (@list @t2868 @t2689 @t2872))) % 39.97/40.19 (step @p3057 :rule cnf_or_pos :args (@t2875)) % 39.97/40.19 (step @p3058 :rule reordering :premises (@p3057) :args ((or @t2697 @t2874 @t2873 (not @t2875)))) % 39.97/40.19 (step @p3059 :rule chain_m_resolution :premises (@p3058 @p6 @p3056 @p2856) :args (@t2874 @t2845 (@list @t6 @t2871 @t2875))) % 39.97/40.19 (step @p3060 :rule cnf_or_pos :args (@t2878)) % 39.97/40.19 (step @p3061 :rule reordering :premises (@p3060) :args ((or @t2877 @t2876 @t2663 (not @t2878)))) % 39.97/40.19 (step @p3062 :rule chain_m_resolution :premises (@p3061 @p3059 @p2855 @p2828) :args (@t2877 @t2841 (@list @t2874 @t2663 @t2878))) % 39.97/40.19 (step @p3063 :rule cnf_or_pos :args (@t2881)) % 39.97/40.19 (step @p3064 :rule reordering :premises (@p3063) :args ((or @t2671 @t2880 @t2879 (not @t2881)))) % 39.97/40.19 (step @p3065 :rule chain_m_resolution :premises (@p3064 @p7 @p3062 @p2827) :args (@t2880 @t2845 (@list @t7 @t2877 @t2881))) % 39.97/40.19 (step @p3066 :rule cnf_or_pos :args (@t2884)) % 39.97/40.19 (step @p3067 :rule reordering :premises (@p3066) :args ((or @t2883 @t2882 @t2637 (not @t2884)))) % 39.97/40.19 (step @p3068 :rule chain_m_resolution :premises (@p3067 @p3065 @p2826 @p2799) :args (@t2883 @t2841 (@list @t2880 @t2637 @t2884))) % 39.97/40.19 (step @p3069 :rule cnf_or_pos :args (@t2887)) % 39.97/40.19 (step @p3070 :rule reordering :premises (@p3069) :args ((or @t2645 @t2886 @t2885 (not @t2887)))) % 39.97/40.19 (step @p3071 :rule chain_m_resolution :premises (@p3070 @p8 @p3068 @p2798) :args (@t2886 @t2845 (@list @t8 @t2883 @t2887))) % 39.97/40.19 (step @p3072 :rule cnf_or_pos :args (@t2890)) % 39.97/40.19 (step @p3073 :rule reordering :premises (@p3072) :args ((or @t2889 @t2888 @t2611 (not @t2890)))) % 39.97/40.19 (step @p3074 :rule chain_m_resolution :premises (@p3073 @p3071 @p2797 @p2770) :args (@t2889 @t2841 (@list @t2886 @t2611 @t2890))) % 39.97/40.19 (step @p3075 :rule cnf_or_pos :args (@t2893)) % 39.97/40.19 (step @p3076 :rule reordering :premises (@p3075) :args ((or @t2619 @t2892 @t2891 (not @t2893)))) % 39.97/40.19 (step @p3077 :rule chain_m_resolution :premises (@p3076 @p9 @p3074 @p2769) :args (@t2892 @t2845 (@list @t9 @t2889 @t2893))) % 39.97/40.19 (step @p3078 :rule cnf_or_pos :args (@t2896)) % 39.97/40.19 (step @p3079 :rule reordering :premises (@p3078) :args ((or @t2895 @t2894 @t2585 (not @t2896)))) % 39.97/40.19 (step @p3080 :rule chain_m_resolution :premises (@p3079 @p3077 @p2768 @p2741) :args (@t2895 @t2841 (@list @t2892 @t2585 @t2896))) % 39.97/40.19 (step @p3081 :rule cnf_or_pos :args (@t2899)) % 39.97/40.19 (step @p3082 :rule reordering :premises (@p3081) :args ((or @t2593 @t2898 @t2897 (not @t2899)))) % 39.97/40.19 (step @p3083 :rule chain_m_resolution :premises (@p3082 @p10 @p3080 @p2740) :args (@t2898 @t2845 (@list @t10 @t2895 @t2899))) % 39.97/40.19 (step @p3084 :rule cnf_or_pos :args (@t2902)) % 39.97/40.19 (step @p3085 :rule reordering :premises (@p3084) :args ((or @t2901 @t2900 @t2559 (not @t2902)))) % 39.97/40.19 (step @p3086 :rule chain_m_resolution :premises (@p3085 @p3083 @p2739 @p2712) :args (@t2901 @t2841 (@list @t2898 @t2559 @t2902))) % 39.97/40.19 (step @p3087 :rule cnf_or_pos :args (@t2905)) % 39.97/40.19 (step @p3088 :rule reordering :premises (@p3087) :args ((or @t2567 @t2904 @t2903 (not @t2905)))) % 39.97/40.19 (step @p3089 :rule chain_m_resolution :premises (@p3088 @p11 @p3086 @p2711) :args (@t2904 @t2845 (@list @t11 @t2901 @t2905))) % 39.97/40.19 (step @p3090 :rule cnf_or_pos :args (@t2908)) % 39.97/40.19 (step @p3091 :rule reordering :premises (@p3090) :args ((or @t2907 @t2906 @t2533 (not @t2908)))) % 39.97/40.19 (step @p3092 :rule chain_m_resolution :premises (@p3091 @p3089 @p2710 @p2683) :args (@t2907 @t2841 (@list @t2904 @t2533 @t2908))) % 39.97/40.19 (step @p3093 :rule cnf_or_pos :args (@t2911)) % 39.97/40.19 (step @p3094 :rule reordering :premises (@p3093) :args ((or @t2541 @t2910 @t2909 (not @t2911)))) % 39.97/40.19 (step @p3095 :rule chain_m_resolution :premises (@p3094 @p12 @p3092 @p2682) :args (@t2910 @t2845 (@list @t12 @t2907 @t2911))) % 39.97/40.19 (step @p3096 :rule cnf_or_pos :args (@t2914)) % 39.97/40.19 (step @p3097 :rule reordering :premises (@p3096) :args ((or @t2913 @t2912 @t2507 (not @t2914)))) % 39.97/40.19 (step @p3098 :rule chain_m_resolution :premises (@p3097 @p3095 @p2681 @p2654) :args (@t2913 @t2841 (@list @t2910 @t2507 @t2914))) % 39.97/40.19 (step @p3099 :rule cnf_or_pos :args (@t2917)) % 39.97/40.19 (step @p3100 :rule reordering :premises (@p3099) :args ((or @t2515 @t2916 @t2915 (not @t2917)))) % 39.97/40.19 (step @p3101 :rule chain_m_resolution :premises (@p3100 @p13 @p3098 @p2653) :args (@t2916 @t2845 (@list @t13 @t2913 @t2917))) % 39.97/40.19 (step @p3102 :rule cnf_or_pos :args (@t2920)) % 39.97/40.19 (step @p3103 :rule reordering :premises (@p3102) :args ((or @t2919 @t2918 @t2481 (not @t2920)))) % 39.97/40.19 (step @p3104 :rule chain_m_resolution :premises (@p3103 @p3101 @p2652 @p2625) :args (@t2919 @t2841 (@list @t2916 @t2481 @t2920))) % 39.97/40.19 (step @p3105 :rule cnf_or_pos :args (@t2923)) % 39.97/40.19 (step @p3106 :rule reordering :premises (@p3105) :args ((or @t2489 @t2922 @t2921 (not @t2923)))) % 39.97/40.19 (step @p3107 :rule chain_m_resolution :premises (@p3106 @p14 @p3104 @p2624) :args (@t2922 @t2845 (@list @t14 @t2919 @t2923))) % 39.97/40.19 (step @p3108 :rule cnf_or_pos :args (@t2926)) % 39.97/40.19 (step @p3109 :rule reordering :premises (@p3108) :args ((or @t2925 @t2924 @t2455 (not @t2926)))) % 39.97/40.19 (step @p3110 :rule chain_m_resolution :premises (@p3109 @p3107 @p2623 @p2596) :args (@t2925 @t2841 (@list @t2922 @t2455 @t2926))) % 39.97/40.19 (step @p3111 :rule cnf_or_pos :args (@t2929)) % 39.97/40.19 (step @p3112 :rule reordering :premises (@p3111) :args ((or @t2463 @t2928 @t2927 (not @t2929)))) % 39.97/40.19 (step @p3113 :rule chain_m_resolution :premises (@p3112 @p15 @p3110 @p2595) :args (@t2928 @t2845 (@list @t15 @t2925 @t2929))) % 39.97/40.19 (step @p3114 :rule cnf_or_pos :args (@t2932)) % 39.97/40.19 (step @p3115 :rule reordering :premises (@p3114) :args ((or @t2931 @t2930 @t2429 (not @t2932)))) % 39.97/40.19 (step @p3116 :rule chain_m_resolution :premises (@p3115 @p3113 @p2594 @p2567) :args (@t2931 @t2841 (@list @t2928 @t2429 @t2932))) % 39.97/40.19 (step @p3117 :rule cnf_or_pos :args (@t2935)) % 39.97/40.19 (step @p3118 :rule reordering :premises (@p3117) :args ((or @t2437 @t2934 @t2933 (not @t2935)))) % 39.97/40.19 (step @p3119 :rule chain_m_resolution :premises (@p3118 @p16 @p3116 @p2566) :args (@t2934 @t2845 (@list @t16 @t2931 @t2935))) % 39.97/40.19 (step @p3120 :rule cnf_or_pos :args (@t2938)) % 39.97/40.19 (step @p3121 :rule reordering :premises (@p3120) :args ((or @t2937 @t2936 @t2403 (not @t2938)))) % 39.97/40.19 (step @p3122 :rule chain_m_resolution :premises (@p3121 @p3119 @p2565 @p2538) :args (@t2937 @t2841 (@list @t2934 @t2403 @t2938))) % 39.97/40.19 (step @p3123 :rule cnf_or_pos :args (@t2941)) % 39.97/40.19 (step @p3124 :rule reordering :premises (@p3123) :args ((or @t2411 @t2940 @t2939 (not @t2941)))) % 39.97/40.19 (step @p3125 :rule chain_m_resolution :premises (@p3124 @p17 @p3122 @p2537) :args (@t2940 @t2845 (@list @t17 @t2937 @t2941))) % 39.97/40.19 (step @p3126 :rule cnf_or_pos :args (@t2944)) % 39.97/40.19 (step @p3127 :rule reordering :premises (@p3126) :args ((or @t2943 @t2942 @t2377 (not @t2944)))) % 39.97/40.19 (step @p3128 :rule chain_m_resolution :premises (@p3127 @p3125 @p2536 @p2509) :args (@t2943 @t2841 (@list @t2940 @t2377 @t2944))) % 39.97/40.19 (step @p3129 :rule cnf_or_pos :args (@t2947)) % 39.97/40.19 (step @p3130 :rule reordering :premises (@p3129) :args ((or @t2385 @t2946 @t2945 (not @t2947)))) % 39.97/40.19 (step @p3131 :rule chain_m_resolution :premises (@p3130 @p18 @p3128 @p2508) :args (@t2946 @t2845 (@list @t18 @t2943 @t2947))) % 39.97/40.19 (step @p3132 :rule cnf_or_pos :args (@t2950)) % 39.97/40.19 (step @p3133 :rule reordering :premises (@p3132) :args ((or @t2949 @t2948 @t2351 (not @t2950)))) % 39.97/40.19 (step @p3134 :rule chain_m_resolution :premises (@p3133 @p3131 @p2507 @p2480) :args (@t2949 @t2841 (@list @t2946 @t2351 @t2950))) % 39.97/40.19 (step @p3135 :rule cnf_or_pos :args (@t2953)) % 39.97/40.19 (step @p3136 :rule reordering :premises (@p3135) :args ((or @t2359 @t2952 @t2951 (not @t2953)))) % 39.97/40.19 (step @p3137 :rule chain_m_resolution :premises (@p3136 @p19 @p3134 @p2479) :args (@t2952 @t2845 (@list @t19 @t2949 @t2953))) % 39.97/40.19 (step @p3138 :rule cnf_or_pos :args (@t2956)) % 39.97/40.19 (step @p3139 :rule reordering :premises (@p3138) :args ((or @t2955 @t2954 @t2325 (not @t2956)))) % 39.97/40.19 (step @p3140 :rule chain_m_resolution :premises (@p3139 @p3137 @p2478 @p2451) :args (@t2955 @t2841 (@list @t2952 @t2325 @t2956))) % 39.97/40.19 (step @p3141 :rule cnf_or_pos :args (@t2959)) % 39.97/40.19 (step @p3142 :rule reordering :premises (@p3141) :args ((or @t2333 @t2958 @t2957 (not @t2959)))) % 39.97/40.20 (step @p3143 :rule chain_m_resolution :premises (@p3142 @p20 @p3140 @p2450) :args (@t2958 @t2845 (@list @t20 @t2955 @t2959))) % 39.97/40.20 (step @p3144 :rule cnf_or_pos :args (@t2962)) % 39.97/40.20 (step @p3145 :rule reordering :premises (@p3144) :args ((or @t2961 @t2960 @t2299 (not @t2962)))) % 39.97/40.20 (step @p3146 :rule chain_m_resolution :premises (@p3145 @p3143 @p2449 @p2422) :args (@t2961 @t2841 (@list @t2958 @t2299 @t2962))) % 39.97/40.20 (step @p3147 :rule cnf_or_pos :args (@t2965)) % 39.97/40.20 (step @p3148 :rule reordering :premises (@p3147) :args ((or @t2307 @t2964 @t2963 (not @t2965)))) % 39.97/40.20 (step @p3149 :rule chain_m_resolution :premises (@p3148 @p21 @p3146 @p2421) :args (@t2964 @t2845 (@list @t21 @t2961 @t2965))) % 39.97/40.20 (step @p3150 :rule cnf_or_pos :args (@t2968)) % 39.97/40.20 (step @p3151 :rule reordering :premises (@p3150) :args ((or @t2967 @t2966 @t2273 (not @t2968)))) % 39.97/40.20 (step @p3152 :rule chain_m_resolution :premises (@p3151 @p3149 @p2420 @p2393) :args (@t2967 @t2841 (@list @t2964 @t2273 @t2968))) % 39.97/40.20 (step @p3153 :rule cnf_or_pos :args (@t2971)) % 39.97/40.20 (step @p3154 :rule reordering :premises (@p3153) :args ((or @t2281 @t2970 @t2969 (not @t2971)))) % 39.97/40.20 (step @p3155 :rule chain_m_resolution :premises (@p3154 @p22 @p3152 @p2392) :args (@t2970 @t2845 (@list @t22 @t2967 @t2971))) % 39.97/40.20 (step @p3156 :rule cnf_or_pos :args (@t2974)) % 39.97/40.20 (step @p3157 :rule reordering :premises (@p3156) :args ((or @t2973 @t2972 @t2247 (not @t2974)))) % 39.97/40.20 (step @p3158 :rule chain_m_resolution :premises (@p3157 @p3155 @p2391 @p2364) :args (@t2973 @t2841 (@list @t2970 @t2247 @t2974))) % 39.97/40.20 (step @p3159 :rule cnf_or_pos :args (@t2977)) % 39.97/40.20 (step @p3160 :rule reordering :premises (@p3159) :args ((or @t2255 @t2976 @t2975 (not @t2977)))) % 39.97/40.20 (step @p3161 :rule chain_m_resolution :premises (@p3160 @p23 @p3158 @p2363) :args (@t2976 @t2845 (@list @t23 @t2973 @t2977))) % 39.97/40.20 (step @p3162 :rule cnf_or_pos :args (@t2980)) % 39.97/40.20 (step @p3163 :rule reordering :premises (@p3162) :args ((or @t2979 @t2978 @t2221 (not @t2980)))) % 39.97/40.20 (step @p3164 :rule chain_m_resolution :premises (@p3163 @p3161 @p2362 @p2335) :args (@t2979 @t2841 (@list @t2976 @t2221 @t2980))) % 39.97/40.20 (step @p3165 :rule cnf_or_pos :args (@t2983)) % 39.97/40.20 (step @p3166 :rule reordering :premises (@p3165) :args ((or @t2229 @t2982 @t2981 (not @t2983)))) % 39.97/40.20 (step @p3167 :rule chain_m_resolution :premises (@p3166 @p24 @p3164 @p2334) :args (@t2982 @t2845 (@list @t24 @t2979 @t2983))) % 39.97/40.20 (step @p3168 :rule cnf_or_pos :args (@t2986)) % 39.97/40.20 (step @p3169 :rule reordering :premises (@p3168) :args ((or @t2985 @t2984 @t2195 (not @t2986)))) % 39.97/40.20 (step @p3170 :rule chain_m_resolution :premises (@p3169 @p3167 @p2333 @p2306) :args (@t2985 @t2841 (@list @t2982 @t2195 @t2986))) % 39.97/40.20 (step @p3171 :rule cnf_or_pos :args (@t2989)) % 39.97/40.20 (step @p3172 :rule reordering :premises (@p3171) :args ((or @t2203 @t2988 @t2987 (not @t2989)))) % 39.97/40.20 (step @p3173 :rule chain_m_resolution :premises (@p3172 @p25 @p3170 @p2305) :args (@t2988 @t2845 (@list @t25 @t2985 @t2989))) % 39.97/40.20 (step @p3174 :rule cnf_or_pos :args (@t2992)) % 39.97/40.20 (step @p3175 :rule reordering :premises (@p3174) :args ((or @t2991 @t2990 @t2169 (not @t2992)))) % 39.97/40.20 (step @p3176 :rule chain_m_resolution :premises (@p3175 @p3173 @p2304 @p2277) :args (@t2991 @t2841 (@list @t2988 @t2169 @t2992))) % 39.97/40.20 (step @p3177 :rule cnf_or_pos :args (@t2995)) % 39.97/40.20 (step @p3178 :rule reordering :premises (@p3177) :args ((or @t2177 @t2994 @t2993 (not @t2995)))) % 39.97/40.20 (step @p3179 :rule chain_m_resolution :premises (@p3178 @p26 @p3176 @p2276) :args (@t2994 @t2845 (@list @t26 @t2991 @t2995))) % 39.97/40.20 (step @p3180 :rule cnf_or_pos :args (@t2998)) % 39.97/40.20 (step @p3181 :rule reordering :premises (@p3180) :args ((or @t2997 @t2996 @t2143 (not @t2998)))) % 39.97/40.20 (step @p3182 :rule chain_m_resolution :premises (@p3181 @p3179 @p2275 @p2248) :args (@t2997 @t2841 (@list @t2994 @t2143 @t2998))) % 39.97/40.20 (step @p3183 :rule cnf_or_pos :args (@t3001)) % 39.97/40.20 (step @p3184 :rule reordering :premises (@p3183) :args ((or @t2151 @t3000 @t2999 (not @t3001)))) % 39.97/40.20 (step @p3185 :rule chain_m_resolution :premises (@p3184 @p27 @p3182 @p2247) :args (@t3000 @t2845 (@list @t27 @t2997 @t3001))) % 39.97/40.20 (step @p3186 :rule cnf_or_pos :args (@t3004)) % 39.97/40.20 (step @p3187 :rule reordering :premises (@p3186) :args ((or @t3003 @t3002 @t2117 (not @t3004)))) % 39.97/40.20 (step @p3188 :rule chain_m_resolution :premises (@p3187 @p3185 @p2246 @p2219) :args (@t3003 @t2841 (@list @t3000 @t2117 @t3004))) % 39.97/40.20 (step @p3189 :rule cnf_or_pos :args (@t3007)) % 39.97/40.20 (step @p3190 :rule reordering :premises (@p3189) :args ((or @t2125 @t3006 @t3005 (not @t3007)))) % 39.97/40.20 (step @p3191 :rule chain_m_resolution :premises (@p3190 @p28 @p3188 @p2218) :args (@t3006 @t2845 (@list @t28 @t3003 @t3007))) % 39.97/40.20 (step @p3192 :rule cnf_or_pos :args (@t3010)) % 39.97/40.20 (step @p3193 :rule reordering :premises (@p3192) :args ((or @t3009 @t3008 @t2091 (not @t3010)))) % 39.97/40.20 (step @p3194 :rule chain_m_resolution :premises (@p3193 @p3191 @p2217 @p2190) :args (@t3009 @t2841 (@list @t3006 @t2091 @t3010))) % 39.97/40.20 (step @p3195 :rule cnf_or_pos :args (@t3013)) % 39.97/40.20 (step @p3196 :rule reordering :premises (@p3195) :args ((or @t2099 @t3012 @t3011 (not @t3013)))) % 39.97/40.20 (step @p3197 :rule chain_m_resolution :premises (@p3196 @p29 @p3194 @p2189) :args (@t3012 @t2845 (@list @t29 @t3009 @t3013))) % 39.97/40.20 (step @p3198 :rule cnf_or_pos :args (@t3016)) % 39.97/40.20 (step @p3199 :rule reordering :premises (@p3198) :args ((or @t3015 @t3014 @t2065 (not @t3016)))) % 39.97/40.20 (step @p3200 :rule chain_m_resolution :premises (@p3199 @p3197 @p2188 @p2161) :args (@t3015 @t2841 (@list @t3012 @t2065 @t3016))) % 39.97/40.20 (step @p3201 :rule cnf_or_pos :args (@t3019)) % 39.97/40.20 (step @p3202 :rule reordering :premises (@p3201) :args ((or @t2073 @t3018 @t3017 (not @t3019)))) % 39.97/40.20 (step @p3203 :rule chain_m_resolution :premises (@p3202 @p30 @p3200 @p2160) :args (@t3018 @t2845 (@list @t30 @t3015 @t3019))) % 39.97/40.20 (step @p3204 :rule cnf_or_pos :args (@t3022)) % 39.97/40.20 (step @p3205 :rule reordering :premises (@p3204) :args ((or @t3021 @t3020 @t2039 (not @t3022)))) % 39.97/40.20 (step @p3206 :rule chain_m_resolution :premises (@p3205 @p3203 @p2159 @p2132) :args (@t3021 @t2841 (@list @t3018 @t2039 @t3022))) % 39.97/40.20 (step @p3207 :rule cnf_or_pos :args (@t3025)) % 39.97/40.20 (step @p3208 :rule reordering :premises (@p3207) :args ((or @t2047 @t3024 @t3023 (not @t3025)))) % 39.97/40.20 (step @p3209 :rule chain_m_resolution :premises (@p3208 @p31 @p3206 @p2131) :args (@t3024 @t2845 (@list @t31 @t3021 @t3025))) % 39.97/40.20 (step @p3210 :rule cnf_or_pos :args (@t3028)) % 39.97/40.20 (step @p3211 :rule reordering :premises (@p3210) :args ((or @t3027 @t3026 @t2013 (not @t3028)))) % 39.97/40.20 (step @p3212 :rule chain_m_resolution :premises (@p3211 @p3209 @p2130 @p2103) :args (@t3027 @t2841 (@list @t3024 @t2013 @t3028))) % 39.97/40.20 (step @p3213 :rule cnf_or_pos :args (@t3031)) % 39.97/40.20 (step @p3214 :rule reordering :premises (@p3213) :args ((or @t2021 @t3030 @t3029 (not @t3031)))) % 39.97/40.20 (step @p3215 :rule chain_m_resolution :premises (@p3214 @p32 @p3212 @p2102) :args (@t3030 @t2845 (@list @t32 @t3027 @t3031))) % 39.97/40.20 (step @p3216 :rule cnf_or_pos :args (@t3034)) % 39.97/40.20 (step @p3217 :rule reordering :premises (@p3216) :args ((or @t3033 @t3032 @t1987 (not @t3034)))) % 39.97/40.20 (step @p3218 :rule chain_m_resolution :premises (@p3217 @p3215 @p2101 @p2074) :args (@t3033 @t2841 (@list @t3030 @t1987 @t3034))) % 39.97/40.20 (step @p3219 :rule cnf_or_pos :args (@t3037)) % 39.97/40.20 (step @p3220 :rule reordering :premises (@p3219) :args ((or @t1995 @t3036 @t3035 (not @t3037)))) % 39.97/40.20 (step @p3221 :rule chain_m_resolution :premises (@p3220 @p33 @p3218 @p2073) :args (@t3036 @t2845 (@list @t33 @t3033 @t3037))) % 39.97/40.20 (step @p3222 :rule cnf_or_pos :args (@t3040)) % 39.97/40.20 (step @p3223 :rule reordering :premises (@p3222) :args ((or @t3039 @t3038 @t1961 (not @t3040)))) % 39.97/40.20 (step @p3224 :rule chain_m_resolution :premises (@p3223 @p3221 @p2072 @p2045) :args (@t3039 @t2841 (@list @t3036 @t1961 @t3040))) % 39.97/40.20 (step @p3225 :rule cnf_or_pos :args (@t3043)) % 39.97/40.20 (step @p3226 :rule reordering :premises (@p3225) :args ((or @t1969 @t3042 @t3041 (not @t3043)))) % 39.97/40.20 (step @p3227 :rule chain_m_resolution :premises (@p3226 @p34 @p3224 @p2044) :args (@t3042 @t2845 (@list @t34 @t3039 @t3043))) % 39.97/40.20 (step @p3228 :rule cnf_or_pos :args (@t3046)) % 39.97/40.20 (step @p3229 :rule reordering :premises (@p3228) :args ((or @t3045 @t3044 @t1935 (not @t3046)))) % 39.97/40.20 (step @p3230 :rule chain_m_resolution :premises (@p3229 @p3227 @p2043 @p2016) :args (@t3045 @t2841 (@list @t3042 @t1935 @t3046))) % 39.97/40.20 (step @p3231 :rule cnf_or_pos :args (@t3049)) % 39.97/40.20 (step @p3232 :rule reordering :premises (@p3231) :args ((or @t1943 @t3048 @t3047 (not @t3049)))) % 39.97/40.20 (step @p3233 :rule chain_m_resolution :premises (@p3232 @p35 @p3230 @p2015) :args (@t3048 @t2845 (@list @t35 @t3045 @t3049))) % 39.97/40.20 (step @p3234 :rule cnf_or_pos :args (@t3052)) % 39.97/40.20 (step @p3235 :rule reordering :premises (@p3234) :args ((or @t3051 @t3050 @t1909 (not @t3052)))) % 39.97/40.20 (step @p3236 :rule chain_m_resolution :premises (@p3235 @p3233 @p2014 @p1987) :args (@t3051 @t2841 (@list @t3048 @t1909 @t3052))) % 39.97/40.20 (step @p3237 :rule cnf_or_pos :args (@t3055)) % 39.97/40.20 (step @p3238 :rule reordering :premises (@p3237) :args ((or @t1917 @t3054 @t3053 (not @t3055)))) % 39.97/40.20 (step @p3239 :rule chain_m_resolution :premises (@p3238 @p36 @p3236 @p1986) :args (@t3054 @t2845 (@list @t36 @t3051 @t3055))) % 39.97/40.20 (step @p3240 :rule cnf_or_pos :args (@t3058)) % 39.97/40.20 (step @p3241 :rule reordering :premises (@p3240) :args ((or @t3057 @t3056 @t1883 (not @t3058)))) % 39.97/40.20 (step @p3242 :rule chain_m_resolution :premises (@p3241 @p3239 @p1985 @p1958) :args (@t3057 @t2841 (@list @t3054 @t1883 @t3058))) % 39.97/40.20 (step @p3243 :rule cnf_or_pos :args (@t3061)) % 39.97/40.20 (step @p3244 :rule reordering :premises (@p3243) :args ((or @t1891 @t3060 @t3059 (not @t3061)))) % 39.97/40.20 (step @p3245 :rule chain_m_resolution :premises (@p3244 @p37 @p3242 @p1957) :args (@t3060 @t2845 (@list @t37 @t3057 @t3061))) % 39.97/40.20 (step @p3246 :rule cnf_or_pos :args (@t3064)) % 39.97/40.20 (step @p3247 :rule reordering :premises (@p3246) :args ((or @t3063 @t3062 @t1857 (not @t3064)))) % 39.97/40.20 (step @p3248 :rule chain_m_resolution :premises (@p3247 @p3245 @p1956 @p1929) :args (@t3063 @t2841 (@list @t3060 @t1857 @t3064))) % 39.97/40.20 (step @p3249 :rule cnf_or_pos :args (@t3067)) % 39.97/40.20 (step @p3250 :rule reordering :premises (@p3249) :args ((or @t1865 @t3066 @t3065 (not @t3067)))) % 39.97/40.20 (step @p3251 :rule chain_m_resolution :premises (@p3250 @p38 @p3248 @p1928) :args (@t3066 @t2845 (@list @t38 @t3063 @t3067))) % 39.97/40.20 (step @p3252 :rule cnf_or_pos :args (@t3070)) % 39.97/40.20 (step @p3253 :rule reordering :premises (@p3252) :args ((or @t3069 @t3068 @t1831 (not @t3070)))) % 39.97/40.20 (step @p3254 :rule chain_m_resolution :premises (@p3253 @p3251 @p1927 @p1900) :args (@t3069 @t2841 (@list @t3066 @t1831 @t3070))) % 39.97/40.20 (step @p3255 :rule cnf_or_pos :args (@t3073)) % 39.97/40.20 (step @p3256 :rule reordering :premises (@p3255) :args ((or @t1839 @t3072 @t3071 (not @t3073)))) % 39.97/40.20 (step @p3257 :rule chain_m_resolution :premises (@p3256 @p39 @p3254 @p1899) :args (@t3072 @t2845 (@list @t39 @t3069 @t3073))) % 39.97/40.20 (step @p3258 :rule cnf_or_pos :args (@t3076)) % 39.97/40.20 (step @p3259 :rule reordering :premises (@p3258) :args ((or @t3075 @t3074 @t1805 (not @t3076)))) % 39.97/40.20 (step @p3260 :rule chain_m_resolution :premises (@p3259 @p3257 @p1898 @p1871) :args (@t3075 @t2841 (@list @t3072 @t1805 @t3076))) % 39.97/40.20 (step @p3261 :rule cnf_or_pos :args (@t3079)) % 39.97/40.20 (step @p3262 :rule reordering :premises (@p3261) :args ((or @t1813 @t3078 @t3077 (not @t3079)))) % 39.97/40.20 (step @p3263 :rule chain_m_resolution :premises (@p3262 @p40 @p3260 @p1870) :args (@t3078 @t2845 (@list @t40 @t3075 @t3079))) % 39.97/40.20 (step @p3264 :rule cnf_or_pos :args (@t3082)) % 39.97/40.20 (step @p3265 :rule reordering :premises (@p3264) :args ((or @t3081 @t3080 @t1779 (not @t3082)))) % 39.97/40.20 (step @p3266 :rule chain_m_resolution :premises (@p3265 @p3263 @p1869 @p1842) :args (@t3081 @t2841 (@list @t3078 @t1779 @t3082))) % 39.97/40.20 (step @p3267 :rule cnf_or_pos :args (@t3085)) % 39.97/40.20 (step @p3268 :rule reordering :premises (@p3267) :args ((or @t1787 @t3084 @t3083 (not @t3085)))) % 39.97/40.20 (step @p3269 :rule chain_m_resolution :premises (@p3268 @p41 @p3266 @p1841) :args (@t3084 @t2845 (@list @t41 @t3081 @t3085))) % 39.97/40.20 (step @p3270 :rule cnf_or_pos :args (@t3088)) % 39.97/40.20 (step @p3271 :rule reordering :premises (@p3270) :args ((or @t3087 @t3086 @t1753 (not @t3088)))) % 39.97/40.20 (step @p3272 :rule chain_m_resolution :premises (@p3271 @p3269 @p1840 @p1813) :args (@t3087 @t2841 (@list @t3084 @t1753 @t3088))) % 39.97/40.20 (step @p3273 :rule cnf_or_pos :args (@t3091)) % 39.97/40.20 (step @p3274 :rule reordering :premises (@p3273) :args ((or @t1761 @t3090 @t3089 (not @t3091)))) % 39.97/40.20 (step @p3275 :rule chain_m_resolution :premises (@p3274 @p42 @p3272 @p1812) :args (@t3090 @t2845 (@list @t42 @t3087 @t3091))) % 39.97/40.20 (step @p3276 :rule cnf_or_pos :args (@t3094)) % 39.97/40.20 (step @p3277 :rule reordering :premises (@p3276) :args ((or @t3093 @t3092 @t1727 (not @t3094)))) % 39.97/40.20 (step @p3278 :rule chain_m_resolution :premises (@p3277 @p3275 @p1811 @p1784) :args (@t3093 @t2841 (@list @t3090 @t1727 @t3094))) % 39.97/40.20 (step @p3279 :rule cnf_or_pos :args (@t3097)) % 39.97/40.20 (step @p3280 :rule reordering :premises (@p3279) :args ((or @t1735 @t3096 @t3095 (not @t3097)))) % 39.97/40.20 (step @p3281 :rule chain_m_resolution :premises (@p3280 @p43 @p3278 @p1783) :args (@t3096 @t2845 (@list @t43 @t3093 @t3097))) % 39.97/40.20 (step @p3282 :rule cnf_or_pos :args (@t3100)) % 39.97/40.20 (step @p3283 :rule reordering :premises (@p3282) :args ((or @t3099 @t3098 @t1701 (not @t3100)))) % 39.97/40.20 (step @p3284 :rule chain_m_resolution :premises (@p3283 @p3281 @p1782 @p1755) :args (@t3099 @t2841 (@list @t3096 @t1701 @t3100))) % 39.97/40.20 (step @p3285 :rule cnf_or_pos :args (@t3103)) % 39.97/40.20 (step @p3286 :rule reordering :premises (@p3285) :args ((or @t1709 @t3102 @t3101 (not @t3103)))) % 39.97/40.20 (step @p3287 :rule chain_m_resolution :premises (@p3286 @p44 @p3284 @p1754) :args (@t3102 @t2845 (@list @t44 @t3099 @t3103))) % 39.97/40.20 (step @p3288 :rule cnf_or_pos :args (@t3106)) % 39.97/40.20 (step @p3289 :rule reordering :premises (@p3288) :args ((or @t3105 @t3104 @t1675 (not @t3106)))) % 39.97/40.20 (step @p3290 :rule chain_m_resolution :premises (@p3289 @p3287 @p1753 @p1726) :args (@t3105 @t2841 (@list @t3102 @t1675 @t3106))) % 39.97/40.20 (step @p3291 :rule cnf_or_pos :args (@t3109)) % 39.97/40.20 (step @p3292 :rule reordering :premises (@p3291) :args ((or @t1683 @t3108 @t3107 (not @t3109)))) % 39.97/40.20 (step @p3293 :rule chain_m_resolution :premises (@p3292 @p45 @p3290 @p1725) :args (@t3108 @t2845 (@list @t45 @t3105 @t3109))) % 39.97/40.20 (step @p3294 :rule cnf_or_pos :args (@t3112)) % 39.97/40.20 (step @p3295 :rule reordering :premises (@p3294) :args ((or @t3111 @t3110 @t1649 (not @t3112)))) % 39.97/40.20 (step @p3296 :rule chain_m_resolution :premises (@p3295 @p3293 @p1724 @p1697) :args (@t3111 @t2841 (@list @t3108 @t1649 @t3112))) % 39.97/40.20 (step @p3297 :rule cnf_or_pos :args (@t3115)) % 39.97/40.20 (step @p3298 :rule reordering :premises (@p3297) :args ((or @t1657 @t3114 @t3113 (not @t3115)))) % 39.97/40.20 (step @p3299 :rule chain_m_resolution :premises (@p3298 @p46 @p3296 @p1696) :args (@t3114 @t2845 (@list @t46 @t3111 @t3115))) % 39.97/40.20 (step @p3300 :rule cnf_or_pos :args (@t3118)) % 39.97/40.20 (step @p3301 :rule reordering :premises (@p3300) :args ((or @t3117 @t3116 @t1623 (not @t3118)))) % 39.97/40.20 (step @p3302 :rule chain_m_resolution :premises (@p3301 @p3299 @p1695 @p1668) :args (@t3117 @t2841 (@list @t3114 @t1623 @t3118))) % 39.97/40.20 (step @p3303 :rule cnf_or_pos :args (@t3121)) % 39.97/40.20 (step @p3304 :rule reordering :premises (@p3303) :args ((or @t1631 @t3120 @t3119 (not @t3121)))) % 39.97/40.20 (step @p3305 :rule chain_m_resolution :premises (@p3304 @p47 @p3302 @p1667) :args (@t3120 @t2845 (@list @t47 @t3117 @t3121))) % 39.97/40.20 (step @p3306 :rule cnf_or_pos :args (@t3124)) % 39.97/40.20 (step @p3307 :rule reordering :premises (@p3306) :args ((or @t3123 @t3122 @t1597 (not @t3124)))) % 39.97/40.20 (step @p3308 :rule chain_m_resolution :premises (@p3307 @p3305 @p1666 @p1639) :args (@t3123 @t2841 (@list @t3120 @t1597 @t3124))) % 39.97/40.20 (step @p3309 :rule cnf_or_pos :args (@t3127)) % 39.97/40.20 (step @p3310 :rule reordering :premises (@p3309) :args ((or @t1605 @t3126 @t3125 (not @t3127)))) % 39.97/40.20 (step @p3311 :rule chain_m_resolution :premises (@p3310 @p48 @p3308 @p1638) :args (@t3126 @t2845 (@list @t48 @t3123 @t3127))) % 39.97/40.20 (step @p3312 :rule cnf_or_pos :args (@t3130)) % 39.97/40.20 (step @p3313 :rule reordering :premises (@p3312) :args ((or @t3129 @t3128 @t1571 (not @t3130)))) % 39.97/40.20 (step @p3314 :rule chain_m_resolution :premises (@p3313 @p3311 @p1637 @p1610) :args (@t3129 @t2841 (@list @t3126 @t1571 @t3130))) % 39.97/40.20 (step @p3315 :rule cnf_or_pos :args (@t3133)) % 39.97/40.20 (step @p3316 :rule reordering :premises (@p3315) :args ((or @t1579 @t3132 @t3131 (not @t3133)))) % 39.97/40.20 (step @p3317 :rule chain_m_resolution :premises (@p3316 @p49 @p3314 @p1609) :args (@t3132 @t2845 (@list @t49 @t3129 @t3133))) % 39.97/40.20 (step @p3318 :rule cnf_or_pos :args (@t3136)) % 39.97/40.20 (step @p3319 :rule reordering :premises (@p3318) :args ((or @t3135 @t3134 @t1545 (not @t3136)))) % 39.97/40.20 (step @p3320 :rule chain_m_resolution :premises (@p3319 @p3317 @p1608 @p1581) :args (@t3135 @t2841 (@list @t3132 @t1545 @t3136))) % 39.97/40.20 (step @p3321 :rule cnf_or_pos :args (@t3139)) % 39.97/40.20 (step @p3322 :rule reordering :premises (@p3321) :args ((or @t1553 @t3138 @t3137 (not @t3139)))) % 39.97/40.20 (step @p3323 :rule chain_m_resolution :premises (@p3322 @p50 @p3320 @p1580) :args (@t3138 @t2845 (@list @t50 @t3135 @t3139))) % 39.97/40.20 (step @p3324 :rule cnf_or_pos :args (@t3142)) % 39.97/40.20 (step @p3325 :rule reordering :premises (@p3324) :args ((or @t3141 @t3140 @t1519 (not @t3142)))) % 39.97/40.20 (step @p3326 :rule chain_m_resolution :premises (@p3325 @p3323 @p1579 @p1552) :args (@t3141 @t2841 (@list @t3138 @t1519 @t3142))) % 39.97/40.20 (step @p3327 :rule cnf_or_pos :args (@t3145)) % 39.97/40.20 (step @p3328 :rule reordering :premises (@p3327) :args ((or @t1527 @t3144 @t3143 (not @t3145)))) % 39.97/40.20 (step @p3329 :rule chain_m_resolution :premises (@p3328 @p51 @p3326 @p1551) :args (@t3144 @t2845 (@list @t51 @t3141 @t3145))) % 39.97/40.20 (step @p3330 :rule cnf_or_pos :args (@t3148)) % 39.97/40.20 (step @p3331 :rule reordering :premises (@p3330) :args ((or @t3147 @t3146 @t1493 (not @t3148)))) % 39.97/40.20 (step @p3332 :rule chain_m_resolution :premises (@p3331 @p3329 @p1550 @p1523) :args (@t3147 @t2841 (@list @t3144 @t1493 @t3148))) % 39.97/40.20 (step @p3333 :rule cnf_or_pos :args (@t3151)) % 39.97/40.20 (step @p3334 :rule reordering :premises (@p3333) :args ((or @t1501 @t3150 @t3149 (not @t3151)))) % 39.97/40.20 (step @p3335 :rule chain_m_resolution :premises (@p3334 @p52 @p3332 @p1522) :args (@t3150 @t2845 (@list @t52 @t3147 @t3151))) % 39.97/40.20 (step @p3336 :rule cnf_or_pos :args (@t3154)) % 39.97/40.20 (step @p3337 :rule reordering :premises (@p3336) :args ((or @t3153 @t3152 @t1467 (not @t3154)))) % 39.97/40.20 (step @p3338 :rule chain_m_resolution :premises (@p3337 @p3335 @p1521 @p1494) :args (@t3153 @t2841 (@list @t3150 @t1467 @t3154))) % 39.97/40.20 (step @p3339 :rule cnf_or_pos :args (@t3157)) % 39.97/40.20 (step @p3340 :rule reordering :premises (@p3339) :args ((or @t1475 @t3156 @t3155 (not @t3157)))) % 39.97/40.20 (step @p3341 :rule chain_m_resolution :premises (@p3340 @p53 @p3338 @p1493) :args (@t3156 @t2845 (@list @t53 @t3153 @t3157))) % 39.97/40.20 (step @p3342 :rule cnf_or_pos :args (@t3160)) % 39.97/40.20 (step @p3343 :rule reordering :premises (@p3342) :args ((or @t3159 @t3158 @t1441 (not @t3160)))) % 39.97/40.20 (step @p3344 :rule chain_m_resolution :premises (@p3343 @p3341 @p1492 @p1465) :args (@t3159 @t2841 (@list @t3156 @t1441 @t3160))) % 39.97/40.20 (step @p3345 :rule cnf_or_pos :args (@t3163)) % 39.97/40.20 (step @p3346 :rule reordering :premises (@p3345) :args ((or @t1449 @t3162 @t3161 (not @t3163)))) % 39.97/40.20 (step @p3347 :rule chain_m_resolution :premises (@p3346 @p54 @p3344 @p1464) :args (@t3162 @t2845 (@list @t54 @t3159 @t3163))) % 39.97/40.20 (step @p3348 :rule cnf_or_pos :args (@t3166)) % 39.97/40.20 (step @p3349 :rule reordering :premises (@p3348) :args ((or @t3165 @t3164 @t1415 (not @t3166)))) % 39.97/40.20 (step @p3350 :rule chain_m_resolution :premises (@p3349 @p3347 @p1463 @p1436) :args (@t3165 @t2841 (@list @t3162 @t1415 @t3166))) % 39.97/40.20 (step @p3351 :rule cnf_or_pos :args (@t3169)) % 39.97/40.20 (step @p3352 :rule reordering :premises (@p3351) :args ((or @t1423 @t3168 @t3167 (not @t3169)))) % 39.97/40.20 (step @p3353 :rule chain_m_resolution :premises (@p3352 @p55 @p3350 @p1435) :args (@t3168 @t2845 (@list @t55 @t3165 @t3169))) % 39.97/40.20 (step @p3354 :rule cnf_or_pos :args (@t3172)) % 39.97/40.20 (step @p3355 :rule reordering :premises (@p3354) :args ((or @t3171 @t3170 @t1389 (not @t3172)))) % 39.97/40.20 (step @p3356 :rule chain_m_resolution :premises (@p3355 @p3353 @p1434 @p1407) :args (@t3171 @t2841 (@list @t3168 @t1389 @t3172))) % 39.97/40.20 (step @p3357 :rule cnf_or_pos :args (@t3175)) % 39.97/40.20 (step @p3358 :rule reordering :premises (@p3357) :args ((or @t1397 @t3174 @t3173 (not @t3175)))) % 39.97/40.20 (step @p3359 :rule chain_m_resolution :premises (@p3358 @p56 @p3356 @p1406) :args (@t3174 @t2845 (@list @t56 @t3171 @t3175))) % 39.97/40.20 (step @p3360 :rule cnf_or_pos :args (@t3178)) % 39.97/40.20 (step @p3361 :rule reordering :premises (@p3360) :args ((or @t3177 @t3176 @t1363 (not @t3178)))) % 39.97/40.20 (step @p3362 :rule chain_m_resolution :premises (@p3361 @p3359 @p1405 @p1378) :args (@t3177 @t2841 (@list @t3174 @t1363 @t3178))) % 39.97/40.20 (step @p3363 :rule cnf_or_pos :args (@t3181)) % 39.97/40.20 (step @p3364 :rule reordering :premises (@p3363) :args ((or @t1371 @t3180 @t3179 (not @t3181)))) % 39.97/40.20 (step @p3365 :rule chain_m_resolution :premises (@p3364 @p57 @p3362 @p1377) :args (@t3180 @t2845 (@list @t57 @t3177 @t3181))) % 39.97/40.20 (step @p3366 :rule cnf_or_pos :args (@t3184)) % 39.97/40.20 (step @p3367 :rule reordering :premises (@p3366) :args ((or @t3183 @t3182 @t1337 (not @t3184)))) % 39.97/40.20 (step @p3368 :rule chain_m_resolution :premises (@p3367 @p3365 @p1376 @p1349) :args (@t3183 @t2841 (@list @t3180 @t1337 @t3184))) % 39.97/40.20 (step @p3369 :rule cnf_or_pos :args (@t3187)) % 39.97/40.20 (step @p3370 :rule reordering :premises (@p3369) :args ((or @t1345 @t3186 @t3185 (not @t3187)))) % 39.97/40.20 (step @p3371 :rule chain_m_resolution :premises (@p3370 @p58 @p3368 @p1348) :args (@t3186 @t2845 (@list @t58 @t3183 @t3187))) % 39.97/40.20 (step @p3372 :rule cnf_or_pos :args (@t3190)) % 39.97/40.20 (step @p3373 :rule reordering :premises (@p3372) :args ((or @t3189 @t3188 @t1311 (not @t3190)))) % 39.97/40.20 (step @p3374 :rule chain_m_resolution :premises (@p3373 @p3371 @p1347 @p1320) :args (@t3189 @t2841 (@list @t3186 @t1311 @t3190))) % 39.97/40.20 (step @p3375 :rule cnf_or_pos :args (@t3193)) % 39.97/40.20 (step @p3376 :rule reordering :premises (@p3375) :args ((or @t1319 @t3192 @t3191 (not @t3193)))) % 39.97/40.20 (step @p3377 :rule chain_m_resolution :premises (@p3376 @p59 @p3374 @p1319) :args (@t3192 @t2845 (@list @t59 @t3189 @t3193))) % 39.97/40.20 (step @p3378 :rule cnf_or_pos :args (@t3196)) % 39.97/40.20 (step @p3379 :rule reordering :premises (@p3378) :args ((or @t3195 @t3194 @t1285 (not @t3196)))) % 39.97/40.20 (step @p3380 :rule chain_m_resolution :premises (@p3379 @p3377 @p1318 @p1291) :args (@t3195 @t2841 (@list @t3192 @t1285 @t3196))) % 39.97/40.20 (step @p3381 :rule cnf_or_pos :args (@t3199)) % 39.97/40.20 (step @p3382 :rule reordering :premises (@p3381) :args ((or @t1293 @t3198 @t3197 (not @t3199)))) % 39.97/40.20 (step @p3383 :rule chain_m_resolution :premises (@p3382 @p60 @p3380 @p1290) :args (@t3198 @t2845 (@list @t60 @t3195 @t3199))) % 39.97/40.20 (step @p3384 :rule cnf_or_pos :args (@t3202)) % 39.97/40.20 (step @p3385 :rule reordering :premises (@p3384) :args ((or @t3201 @t3200 @t1259 (not @t3202)))) % 39.97/40.20 (step @p3386 :rule chain_m_resolution :premises (@p3385 @p3383 @p1289 @p1262) :args (@t3201 @t2841 (@list @t3198 @t1259 @t3202))) % 39.97/40.20 (step @p3387 :rule cnf_or_pos :args (@t3205)) % 39.97/40.20 (step @p3388 :rule reordering :premises (@p3387) :args ((or @t1267 @t3204 @t3203 (not @t3205)))) % 39.97/40.20 (step @p3389 :rule chain_m_resolution :premises (@p3388 @p61 @p3386 @p1261) :args (@t3204 @t2845 (@list @t61 @t3201 @t3205))) % 39.97/40.20 (step @p3390 :rule cnf_or_pos :args (@t3208)) % 39.97/40.20 (step @p3391 :rule reordering :premises (@p3390) :args ((or @t3207 @t3206 @t1233 (not @t3208)))) % 39.97/40.20 (step @p3392 :rule chain_m_resolution :premises (@p3391 @p3389 @p1260 @p1233) :args (@t3207 @t2841 (@list @t3204 @t1233 @t3208))) % 39.97/40.20 (step @p3393 :rule cnf_or_pos :args (@t3211)) % 39.97/40.20 (step @p3394 :rule reordering :premises (@p3393) :args ((or @t1241 @t3210 @t3209 (not @t3211)))) % 39.97/40.20 (step @p3395 :rule chain_m_resolution :premises (@p3394 @p62 @p3392 @p1232) :args (@t3210 @t2845 (@list @t62 @t3207 @t3211))) % 39.97/40.20 (step @p3396 :rule cnf_or_pos :args (@t3214)) % 39.97/40.20 (step @p3397 :rule reordering :premises (@p3396) :args ((or @t3213 @t3212 @t1207 (not @t3214)))) % 39.97/40.20 (step @p3398 :rule chain_m_resolution :premises (@p3397 @p3395 @p1231 @p1204) :args (@t3213 @t2841 (@list @t3210 @t1207 @t3214))) % 39.97/40.20 (step @p3399 :rule cnf_or_pos :args (@t3217)) % 39.97/40.20 (step @p3400 :rule reordering :premises (@p3399) :args ((or @t1215 @t3216 @t3215 (not @t3217)))) % 39.97/40.20 (step @p3401 :rule chain_m_resolution :premises (@p3400 @p63 @p3398 @p1203) :args (@t3216 @t2845 (@list @t63 @t3213 @t3217))) % 39.97/40.20 (step @p3402 :rule cnf_or_pos :args (@t3220)) % 39.97/40.20 (step @p3403 :rule reordering :premises (@p3402) :args ((or @t3219 @t3218 @t1181 (not @t3220)))) % 39.97/40.20 (step @p3404 :rule chain_m_resolution :premises (@p3403 @p3401 @p1202 @p1175) :args (@t3219 @t2841 (@list @t3216 @t1181 @t3220))) % 39.97/40.20 (step @p3405 :rule cnf_or_pos :args (@t3223)) % 39.97/40.20 (step @p3406 :rule reordering :premises (@p3405) :args ((or @t1189 @t3222 @t3221 (not @t3223)))) % 39.97/40.20 (step @p3407 :rule chain_m_resolution :premises (@p3406 @p64 @p3404 @p1174) :args (@t3222 @t2845 (@list @t64 @t3219 @t3223))) % 39.97/40.20 (step @p3408 :rule cnf_or_pos :args (@t3226)) % 39.97/40.20 (step @p3409 :rule reordering :premises (@p3408) :args ((or @t3225 @t3224 @t1155 (not @t3226)))) % 39.97/40.20 (step @p3410 :rule chain_m_resolution :premises (@p3409 @p3407 @p1173 @p1146) :args (@t3225 @t2841 (@list @t3222 @t1155 @t3226))) % 39.97/40.20 (step @p3411 :rule cnf_or_pos :args (@t3229)) % 39.97/40.20 (step @p3412 :rule reordering :premises (@p3411) :args ((or @t1163 @t3228 @t3227 (not @t3229)))) % 39.97/40.20 (step @p3413 :rule chain_m_resolution :premises (@p3412 @p65 @p3410 @p1145) :args (@t3228 @t2845 (@list @t65 @t3225 @t3229))) % 39.97/40.20 (step @p3414 :rule cnf_or_pos :args (@t3232)) % 39.97/40.20 (step @p3415 :rule reordering :premises (@p3414) :args ((or @t3231 @t3230 @t1129 (not @t3232)))) % 39.97/40.20 (step @p3416 :rule chain_m_resolution :premises (@p3415 @p3413 @p1144 @p1117) :args (@t3231 @t2841 (@list @t3228 @t1129 @t3232))) % 39.97/40.20 (step @p3417 :rule cnf_or_pos :args (@t3235)) % 39.97/40.20 (step @p3418 :rule reordering :premises (@p3417) :args ((or @t1137 @t3234 @t3233 (not @t3235)))) % 39.97/40.20 (step @p3419 :rule chain_m_resolution :premises (@p3418 @p66 @p3416 @p1116) :args (@t3234 @t2845 (@list @t66 @t3231 @t3235))) % 39.97/40.20 (step @p3420 :rule cnf_or_pos :args (@t3238)) % 39.97/40.20 (step @p3421 :rule reordering :premises (@p3420) :args ((or @t3237 @t3236 @t1103 (not @t3238)))) % 39.97/40.20 (step @p3422 :rule chain_m_resolution :premises (@p3421 @p3419 @p1115 @p1088) :args (@t3237 @t2841 (@list @t3234 @t1103 @t3238))) % 39.97/40.20 (step @p3423 :rule cnf_or_pos :args (@t3241)) % 39.97/40.20 (step @p3424 :rule reordering :premises (@p3423) :args ((or @t1111 @t3240 @t3239 (not @t3241)))) % 39.97/40.20 (step @p3425 :rule chain_m_resolution :premises (@p3424 @p67 @p3422 @p1087) :args (@t3240 @t2845 (@list @t67 @t3237 @t3241))) % 39.97/40.20 (step @p3426 :rule cnf_or_pos :args (@t3244)) % 39.97/40.20 (step @p3427 :rule reordering :premises (@p3426) :args ((or @t3243 @t3242 @t1077 (not @t3244)))) % 39.97/40.20 (step @p3428 :rule chain_m_resolution :premises (@p3427 @p3425 @p1086 @p1059) :args (@t3243 @t2841 (@list @t3240 @t1077 @t3244))) % 39.97/40.20 (step @p3429 :rule cnf_or_pos :args (@t3247)) % 39.97/40.20 (step @p3430 :rule reordering :premises (@p3429) :args ((or @t1085 @t3246 @t3245 (not @t3247)))) % 39.97/40.20 (step @p3431 :rule chain_m_resolution :premises (@p3430 @p68 @p3428 @p1058) :args (@t3246 @t2845 (@list @t68 @t3243 @t3247))) % 39.97/40.20 (step @p3432 :rule cnf_or_pos :args (@t3250)) % 39.97/40.20 (step @p3433 :rule reordering :premises (@p3432) :args ((or @t3249 @t3248 @t1051 (not @t3250)))) % 39.97/40.20 (step @p3434 :rule chain_m_resolution :premises (@p3433 @p3431 @p1057 @p1030) :args (@t3249 @t2841 (@list @t3246 @t1051 @t3250))) % 39.97/40.20 (step @p3435 :rule cnf_or_pos :args (@t3253)) % 39.97/40.20 (step @p3436 :rule reordering :premises (@p3435) :args ((or @t1059 @t3252 @t3251 (not @t3253)))) % 39.97/40.20 (step @p3437 :rule chain_m_resolution :premises (@p3436 @p69 @p3434 @p1029) :args (@t3252 @t2845 (@list @t69 @t3249 @t3253))) % 39.97/40.20 (step @p3438 :rule cnf_or_pos :args (@t3256)) % 39.97/40.20 (step @p3439 :rule reordering :premises (@p3438) :args ((or @t3255 @t3254 @t1025 (not @t3256)))) % 39.97/40.20 (step @p3440 :rule chain_m_resolution :premises (@p3439 @p3437 @p1028 @p1001) :args (@t3255 @t2841 (@list @t3252 @t1025 @t3256))) % 39.97/40.20 (step @p3441 :rule cnf_or_pos :args (@t3259)) % 39.97/40.20 (step @p3442 :rule reordering :premises (@p3441) :args ((or @t1033 @t3258 @t3257 (not @t3259)))) % 39.97/40.20 (step @p3443 :rule chain_m_resolution :premises (@p3442 @p70 @p3440 @p1000) :args (@t3258 @t2845 (@list @t70 @t3255 @t3259))) % 39.97/40.20 (step @p3444 :rule cnf_or_pos :args (@t3262)) % 39.97/40.20 (step @p3445 :rule reordering :premises (@p3444) :args ((or @t3261 @t3260 @t999 (not @t3262)))) % 39.97/40.20 (step @p3446 :rule chain_m_resolution :premises (@p3445 @p3443 @p999 @p972) :args (@t3261 @t2841 (@list @t3258 @t999 @t3262))) % 39.97/40.20 (step @p3447 :rule cnf_or_pos :args (@t3265)) % 39.97/40.20 (step @p3448 :rule reordering :premises (@p3447) :args ((or @t1007 @t3264 @t3263 (not @t3265)))) % 39.97/40.20 (step @p3449 :rule chain_m_resolution :premises (@p3448 @p71 @p3446 @p971) :args (@t3264 @t2845 (@list @t71 @t3261 @t3265))) % 39.97/40.20 (step @p3450 :rule cnf_or_pos :args (@t3268)) % 39.97/40.20 (step @p3451 :rule reordering :premises (@p3450) :args ((or @t3267 @t3266 @t973 (not @t3268)))) % 39.97/40.20 (step @p3452 :rule chain_m_resolution :premises (@p3451 @p3449 @p970 @p943) :args (@t3267 @t2841 (@list @t3264 @t973 @t3268))) % 39.97/40.20 (step @p3453 :rule cnf_or_pos :args (@t3271)) % 39.97/40.20 (step @p3454 :rule reordering :premises (@p3453) :args ((or @t981 @t3270 @t3269 (not @t3271)))) % 39.97/40.20 (step @p3455 :rule chain_m_resolution :premises (@p3454 @p72 @p3452 @p942) :args (@t3270 @t2845 (@list @t72 @t3267 @t3271))) % 39.97/40.20 (step @p3456 :rule cnf_or_pos :args (@t3274)) % 39.97/40.20 (step @p3457 :rule reordering :premises (@p3456) :args ((or @t3273 @t3272 @t947 (not @t3274)))) % 39.97/40.20 (step @p3458 :rule chain_m_resolution :premises (@p3457 @p3455 @p941 @p914) :args (@t3273 @t2841 (@list @t3270 @t947 @t3274))) % 39.97/40.20 (step @p3459 :rule cnf_or_pos :args (@t3277)) % 39.97/40.20 (step @p3460 :rule reordering :premises (@p3459) :args ((or @t955 @t3276 @t3275 (not @t3277)))) % 39.97/40.20 (step @p3461 :rule chain_m_resolution :premises (@p3460 @p73 @p3458 @p913) :args (@t3276 @t2845 (@list @t73 @t3273 @t3277))) % 39.97/40.20 (step @p3462 :rule cnf_or_pos :args (@t3280)) % 39.97/40.20 (step @p3463 :rule reordering :premises (@p3462) :args ((or @t3279 @t3278 @t921 (not @t3280)))) % 39.97/40.20 (step @p3464 :rule chain_m_resolution :premises (@p3463 @p3461 @p912 @p885) :args (@t3279 @t2841 (@list @t3276 @t921 @t3280))) % 39.97/40.20 (step @p3465 :rule cnf_or_pos :args (@t3283)) % 39.97/40.20 (step @p3466 :rule reordering :premises (@p3465) :args ((or @t929 @t3282 @t3281 (not @t3283)))) % 39.97/40.20 (step @p3467 :rule chain_m_resolution :premises (@p3466 @p74 @p3464 @p884) :args (@t3282 @t2845 (@list @t74 @t3279 @t3283))) % 39.97/40.20 (step @p3468 :rule cnf_or_pos :args (@t3286)) % 39.97/40.20 (step @p3469 :rule reordering :premises (@p3468) :args ((or @t3285 @t3284 @t895 (not @t3286)))) % 39.97/40.20 (step @p3470 :rule chain_m_resolution :premises (@p3469 @p3467 @p883 @p856) :args (@t3285 @t2841 (@list @t3282 @t895 @t3286))) % 39.97/40.20 (step @p3471 :rule cnf_or_pos :args (@t3289)) % 39.97/40.20 (step @p3472 :rule reordering :premises (@p3471) :args ((or @t903 @t3288 @t3287 (not @t3289)))) % 39.97/40.20 (step @p3473 :rule chain_m_resolution :premises (@p3472 @p75 @p3470 @p855) :args (@t3288 @t2845 (@list @t75 @t3285 @t3289))) % 39.97/40.20 (step @p3474 :rule cnf_or_pos :args (@t3292)) % 39.97/40.20 (step @p3475 :rule reordering :premises (@p3474) :args ((or @t3291 @t3290 @t869 (not @t3292)))) % 39.97/40.20 (step @p3476 :rule chain_m_resolution :premises (@p3475 @p3473 @p854 @p827) :args (@t3291 @t2841 (@list @t3288 @t869 @t3292))) % 39.97/40.20 (step @p3477 :rule cnf_or_pos :args (@t3295)) % 39.97/40.20 (step @p3478 :rule reordering :premises (@p3477) :args ((or @t877 @t3294 @t3293 (not @t3295)))) % 39.97/40.20 (step @p3479 :rule chain_m_resolution :premises (@p3478 @p76 @p3476 @p826) :args (@t3294 @t2845 (@list @t76 @t3291 @t3295))) % 39.97/40.20 (step @p3480 :rule cnf_or_pos :args (@t3298)) % 39.97/40.20 (step @p3481 :rule reordering :premises (@p3480) :args ((or @t3297 @t3296 @t843 (not @t3298)))) % 39.97/40.20 (step @p3482 :rule chain_m_resolution :premises (@p3481 @p3479 @p825 @p798) :args (@t3297 @t2841 (@list @t3294 @t843 @t3298))) % 39.97/40.20 (step @p3483 :rule cnf_or_pos :args (@t3301)) % 39.97/40.20 (step @p3484 :rule reordering :premises (@p3483) :args ((or @t851 @t3300 @t3299 (not @t3301)))) % 39.97/40.20 (step @p3485 :rule chain_m_resolution :premises (@p3484 @p77 @p3482 @p797) :args (@t3300 @t2845 (@list @t77 @t3297 @t3301))) % 39.97/40.20 (step @p3486 :rule cnf_or_pos :args (@t3304)) % 39.97/40.20 (step @p3487 :rule reordering :premises (@p3486) :args ((or @t3303 @t3302 @t817 (not @t3304)))) % 39.97/40.20 (step @p3488 :rule chain_m_resolution :premises (@p3487 @p3485 @p796 @p769) :args (@t3303 @t2841 (@list @t3300 @t817 @t3304))) % 39.97/40.20 (step @p3489 :rule cnf_or_pos :args (@t3307)) % 39.97/40.20 (step @p3490 :rule reordering :premises (@p3489) :args ((or @t825 @t3306 @t3305 (not @t3307)))) % 39.97/40.20 (step @p3491 :rule chain_m_resolution :premises (@p3490 @p78 @p3488 @p768) :args (@t3306 @t2845 (@list @t78 @t3303 @t3307))) % 39.97/40.20 (step @p3492 :rule cnf_or_pos :args (@t3310)) % 39.97/40.20 (step @p3493 :rule reordering :premises (@p3492) :args ((or @t3309 @t3308 @t791 (not @t3310)))) % 39.97/40.20 (step @p3494 :rule chain_m_resolution :premises (@p3493 @p3491 @p767 @p740) :args (@t3309 @t2841 (@list @t3306 @t791 @t3310))) % 39.97/40.20 (step @p3495 :rule cnf_or_pos :args (@t3313)) % 39.97/40.20 (step @p3496 :rule reordering :premises (@p3495) :args ((or @t799 @t3312 @t3311 (not @t3313)))) % 39.97/40.20 (step @p3497 :rule chain_m_resolution :premises (@p3496 @p79 @p3494 @p739) :args (@t3312 @t2845 (@list @t79 @t3309 @t3313))) % 39.97/40.20 (step @p3498 :rule cnf_or_pos :args (@t3316)) % 39.97/40.20 (step @p3499 :rule reordering :premises (@p3498) :args ((or @t3315 @t3314 @t765 (not @t3316)))) % 39.97/40.20 (step @p3500 :rule chain_m_resolution :premises (@p3499 @p3497 @p738 @p711) :args (@t3315 @t2841 (@list @t3312 @t765 @t3316))) % 39.97/40.20 (step @p3501 :rule cnf_or_pos :args (@t3319)) % 39.97/40.20 (step @p3502 :rule reordering :premises (@p3501) :args ((or @t773 @t3318 @t3317 (not @t3319)))) % 39.97/40.20 (step @p3503 :rule chain_m_resolution :premises (@p3502 @p80 @p3500 @p710) :args (@t3318 @t2845 (@list @t80 @t3315 @t3319))) % 39.97/40.20 (step @p3504 :rule cnf_or_pos :args (@t3322)) % 39.97/40.20 (step @p3505 :rule reordering :premises (@p3504) :args ((or @t3321 @t3320 @t739 (not @t3322)))) % 39.97/40.20 (step @p3506 :rule chain_m_resolution :premises (@p3505 @p3503 @p709 @p682) :args (@t3321 @t2841 (@list @t3318 @t739 @t3322))) % 39.97/40.20 (step @p3507 :rule cnf_or_pos :args (@t3325)) % 39.97/40.20 (step @p3508 :rule reordering :premises (@p3507) :args ((or @t747 @t3324 @t3323 (not @t3325)))) % 39.97/40.20 (step @p3509 :rule chain_m_resolution :premises (@p3508 @p81 @p3506 @p681) :args (@t3324 @t2845 (@list @t81 @t3321 @t3325))) % 39.97/40.20 (step @p3510 :rule cnf_or_pos :args (@t3328)) % 39.97/40.20 (step @p3511 :rule reordering :premises (@p3510) :args ((or @t3327 @t3326 @t713 (not @t3328)))) % 39.97/40.20 (step @p3512 :rule chain_m_resolution :premises (@p3511 @p3509 @p680 @p653) :args (@t3327 @t2841 (@list @t3324 @t713 @t3328))) % 39.97/40.20 (step @p3513 :rule cnf_or_pos :args (@t3331)) % 39.97/40.20 (step @p3514 :rule reordering :premises (@p3513) :args ((or @t721 @t3330 @t3329 (not @t3331)))) % 39.97/40.20 (step @p3515 :rule chain_m_resolution :premises (@p3514 @p82 @p3512 @p652) :args (@t3330 @t2845 (@list @t82 @t3327 @t3331))) % 39.97/40.20 (step @p3516 :rule cnf_or_pos :args (@t3334)) % 39.97/40.20 (step @p3517 :rule reordering :premises (@p3516) :args ((or @t3333 @t3332 @t687 (not @t3334)))) % 39.97/40.20 (step @p3518 :rule chain_m_resolution :premises (@p3517 @p3515 @p651 @p624) :args (@t3333 @t2841 (@list @t3330 @t687 @t3334))) % 39.97/40.20 (step @p3519 :rule cnf_or_pos :args (@t3337)) % 39.97/40.20 (step @p3520 :rule reordering :premises (@p3519) :args ((or @t695 @t3336 @t3335 (not @t3337)))) % 39.97/40.20 (step @p3521 :rule chain_m_resolution :premises (@p3520 @p83 @p3518 @p623) :args (@t3336 @t2845 (@list @t83 @t3333 @t3337))) % 39.97/40.20 (step @p3522 :rule cnf_or_pos :args (@t3340)) % 39.97/40.20 (step @p3523 :rule reordering :premises (@p3522) :args ((or @t3339 @t3338 @t661 (not @t3340)))) % 39.97/40.20 (step @p3524 :rule chain_m_resolution :premises (@p3523 @p3521 @p622 @p595) :args (@t3339 @t2841 (@list @t3336 @t661 @t3340))) % 39.97/40.20 (step @p3525 :rule cnf_or_pos :args (@t3343)) % 39.97/40.20 (step @p3526 :rule reordering :premises (@p3525) :args ((or @t669 @t3342 @t3341 (not @t3343)))) % 39.97/40.20 (step @p3527 :rule chain_m_resolution :premises (@p3526 @p84 @p3524 @p594) :args (@t3342 @t2845 (@list @t84 @t3339 @t3343))) % 39.97/40.20 (step @p3528 :rule cnf_or_pos :args (@t3346)) % 39.97/40.20 (step @p3529 :rule reordering :premises (@p3528) :args ((or @t3345 @t3344 @t635 (not @t3346)))) % 39.97/40.20 (step @p3530 :rule chain_m_resolution :premises (@p3529 @p3527 @p593 @p566) :args (@t3345 @t2841 (@list @t3342 @t635 @t3346))) % 39.97/40.20 (step @p3531 :rule cnf_or_pos :args (@t3349)) % 39.97/40.20 (step @p3532 :rule reordering :premises (@p3531) :args ((or @t643 @t3348 @t3347 (not @t3349)))) % 39.97/40.20 (step @p3533 :rule chain_m_resolution :premises (@p3532 @p85 @p3530 @p565) :args (@t3348 @t2845 (@list @t85 @t3345 @t3349))) % 39.97/40.20 (step @p3534 :rule cnf_or_pos :args (@t3352)) % 39.97/40.20 (step @p3535 :rule reordering :premises (@p3534) :args ((or @t3351 @t3350 @t609 (not @t3352)))) % 39.97/40.20 (step @p3536 :rule chain_m_resolution :premises (@p3535 @p3533 @p564 @p537) :args (@t3351 @t2841 (@list @t3348 @t609 @t3352))) % 39.97/40.20 (step @p3537 :rule cnf_or_pos :args (@t3355)) % 39.97/40.20 (step @p3538 :rule reordering :premises (@p3537) :args ((or @t617 @t3354 @t3353 (not @t3355)))) % 39.97/40.20 (step @p3539 :rule chain_m_resolution :premises (@p3538 @p86 @p3536 @p536) :args (@t3354 @t2845 (@list @t86 @t3351 @t3355))) % 39.97/40.20 (step @p3540 :rule cnf_or_pos :args (@t3358)) % 39.97/40.20 (step @p3541 :rule reordering :premises (@p3540) :args ((or @t3357 @t3356 @t583 (not @t3358)))) % 39.97/40.20 (step @p3542 :rule chain_m_resolution :premises (@p3541 @p3539 @p535 @p508) :args (@t3357 @t2841 (@list @t3354 @t583 @t3358))) % 39.97/40.20 (step @p3543 :rule cnf_or_pos :args (@t3361)) % 39.97/40.20 (step @p3544 :rule reordering :premises (@p3543) :args ((or @t591 @t3360 @t3359 (not @t3361)))) % 39.97/40.20 (step @p3545 :rule chain_m_resolution :premises (@p3544 @p87 @p3542 @p507) :args (@t3360 @t2845 (@list @t87 @t3357 @t3361))) % 39.97/40.20 (step @p3546 :rule cnf_or_pos :args (@t3364)) % 39.97/40.20 (step @p3547 :rule reordering :premises (@p3546) :args ((or @t3363 @t3362 @t557 (not @t3364)))) % 39.97/40.20 (step @p3548 :rule chain_m_resolution :premises (@p3547 @p3545 @p506 @p479) :args (@t3363 @t2841 (@list @t3360 @t557 @t3364))) % 39.97/40.20 (step @p3549 :rule cnf_or_pos :args (@t3367)) % 39.97/40.20 (step @p3550 :rule reordering :premises (@p3549) :args ((or @t565 @t3366 @t3365 (not @t3367)))) % 39.97/40.20 (step @p3551 :rule chain_m_resolution :premises (@p3550 @p88 @p3548 @p478) :args (@t3366 @t2845 (@list @t88 @t3363 @t3367))) % 39.97/40.20 (step @p3552 :rule cnf_or_pos :args (@t3370)) % 39.97/40.20 (step @p3553 :rule reordering :premises (@p3552) :args ((or @t3369 @t3368 @t531 (not @t3370)))) % 39.97/40.20 (step @p3554 :rule chain_m_resolution :premises (@p3553 @p3551 @p477 @p450) :args (@t3369 @t2841 (@list @t3366 @t531 @t3370))) % 39.97/40.20 (step @p3555 :rule cnf_or_pos :args (@t3373)) % 39.97/40.20 (step @p3556 :rule reordering :premises (@p3555) :args ((or @t539 @t3372 @t3371 (not @t3373)))) % 39.97/40.20 (step @p3557 :rule chain_m_resolution :premises (@p3556 @p89 @p3554 @p449) :args (@t3372 @t2845 (@list @t89 @t3369 @t3373))) % 39.97/40.20 (step @p3558 :rule cnf_or_pos :args (@t3376)) % 39.97/40.20 (step @p3559 :rule reordering :premises (@p3558) :args ((or @t3375 @t3374 @t505 (not @t3376)))) % 39.97/40.20 (step @p3560 :rule chain_m_resolution :premises (@p3559 @p3557 @p448 @p421) :args (@t3375 @t2841 (@list @t3372 @t505 @t3376))) % 39.97/40.20 (step @p3561 :rule cnf_or_pos :args (@t3379)) % 39.97/40.20 (step @p3562 :rule reordering :premises (@p3561) :args ((or @t513 @t3378 @t3377 (not @t3379)))) % 39.97/40.20 (step @p3563 :rule chain_m_resolution :premises (@p3562 @p90 @p3560 @p420) :args (@t3378 @t2845 (@list @t90 @t3375 @t3379))) % 39.97/40.20 (step @p3564 :rule cnf_or_pos :args (@t3382)) % 39.97/40.20 (step @p3565 :rule reordering :premises (@p3564) :args ((or @t3381 @t3380 @t479 (not @t3382)))) % 39.97/40.20 (step @p3566 :rule chain_m_resolution :premises (@p3565 @p3563 @p419 @p392) :args (@t3381 @t2841 (@list @t3378 @t479 @t3382))) % 39.97/40.20 (step @p3567 :rule cnf_or_pos :args (@t3385)) % 39.97/40.20 (step @p3568 :rule reordering :premises (@p3567) :args ((or @t487 @t3384 @t3383 (not @t3385)))) % 39.97/40.20 (step @p3569 :rule chain_m_resolution :premises (@p3568 @p91 @p3566 @p391) :args (@t3384 @t2845 (@list @t91 @t3381 @t3385))) % 39.97/40.20 (step @p3570 :rule cnf_or_pos :args (@t3388)) % 39.97/40.20 (step @p3571 :rule reordering :premises (@p3570) :args ((or @t3387 @t3386 @t453 (not @t3388)))) % 39.97/40.20 (step @p3572 :rule chain_m_resolution :premises (@p3571 @p3569 @p390 @p363) :args (@t3387 @t2841 (@list @t3384 @t453 @t3388))) % 39.97/40.20 (step @p3573 :rule cnf_or_pos :args (@t3391)) % 39.97/40.20 (step @p3574 :rule reordering :premises (@p3573) :args ((or @t461 @t3390 @t3389 (not @t3391)))) % 39.97/40.20 (step @p3575 :rule chain_m_resolution :premises (@p3574 @p92 @p3572 @p362) :args (@t3390 @t2845 (@list @t92 @t3387 @t3391))) % 39.97/40.20 (step @p3576 :rule cnf_or_pos :args (@t3394)) % 39.97/40.20 (step @p3577 :rule reordering :premises (@p3576) :args ((or @t3393 @t3392 @t427 (not @t3394)))) % 39.97/40.20 (step @p3578 :rule chain_m_resolution :premises (@p3577 @p3575 @p361 @p334) :args (@t3393 @t2841 (@list @t3390 @t427 @t3394))) % 39.97/40.20 (step @p3579 :rule cnf_or_pos :args (@t3397)) % 39.97/40.20 (step @p3580 :rule reordering :premises (@p3579) :args ((or @t435 @t3396 @t3395 (not @t3397)))) % 39.97/40.20 (step @p3581 :rule chain_m_resolution :premises (@p3580 @p93 @p3578 @p333) :args (@t3396 @t2845 (@list @t93 @t3393 @t3397))) % 39.97/40.20 (step @p3582 :rule cnf_or_pos :args (@t3400)) % 39.97/40.20 (step @p3583 :rule reordering :premises (@p3582) :args ((or @t3399 @t3398 @t401 (not @t3400)))) % 39.97/40.20 (step @p3584 :rule chain_m_resolution :premises (@p3583 @p3581 @p332 @p305) :args (@t3399 @t2841 (@list @t3396 @t401 @t3400))) % 39.97/40.20 (step @p3585 :rule cnf_or_pos :args (@t3403)) % 39.97/40.20 (step @p3586 :rule reordering :premises (@p3585) :args ((or @t409 @t3402 @t3401 (not @t3403)))) % 39.97/40.20 (step @p3587 :rule chain_m_resolution :premises (@p3586 @p94 @p3584 @p304) :args (@t3402 @t2845 (@list @t94 @t3399 @t3403))) % 39.97/40.20 (step @p3588 :rule cnf_or_pos :args (@t3406)) % 39.97/40.20 (step @p3589 :rule reordering :premises (@p3588) :args ((or @t3405 @t3404 @t375 (not @t3406)))) % 39.97/40.20 (step @p3590 :rule chain_m_resolution :premises (@p3589 @p3587 @p303 @p276) :args (@t3405 @t2841 (@list @t3402 @t375 @t3406))) % 39.97/40.20 (step @p3591 :rule cnf_or_pos :args (@t3409)) % 39.97/40.20 (step @p3592 :rule reordering :premises (@p3591) :args ((or @t383 @t3408 @t3407 (not @t3409)))) % 39.97/40.20 (step @p3593 :rule chain_m_resolution :premises (@p3592 @p95 @p3590 @p275) :args (@t3408 @t2845 (@list @t95 @t3405 @t3409))) % 39.97/40.20 (step @p3594 :rule cnf_or_pos :args (@t3412)) % 39.97/40.20 (step @p3595 :rule reordering :premises (@p3594) :args ((or @t3411 @t3410 @t349 (not @t3412)))) % 39.97/40.20 (step @p3596 :rule chain_m_resolution :premises (@p3595 @p3593 @p274 @p247) :args (@t3411 @t2841 (@list @t3408 @t349 @t3412))) % 39.97/40.20 (step @p3597 :rule cnf_or_pos :args (@t3415)) % 39.97/40.20 (step @p3598 :rule reordering :premises (@p3597) :args ((or @t357 @t3414 @t3413 (not @t3415)))) % 39.97/40.20 (step @p3599 :rule chain_m_resolution :premises (@p3598 @p96 @p3596 @p246) :args (@t3414 @t2845 (@list @t96 @t3411 @t3415))) % 39.97/40.20 (step @p3600 :rule cnf_or_pos :args (@t3418)) % 39.97/40.20 (step @p3601 :rule reordering :premises (@p3600) :args ((or @t3417 @t3416 @t323 (not @t3418)))) % 39.97/40.20 (step @p3602 :rule chain_m_resolution :premises (@p3601 @p3599 @p245 @p218) :args (@t3417 @t2841 (@list @t3414 @t323 @t3418))) % 39.97/40.20 (step @p3603 :rule cnf_or_pos :args (@t3421)) % 39.97/40.20 (step @p3604 :rule reordering :premises (@p3603) :args ((or @t331 @t3420 @t3419 (not @t3421)))) % 39.97/40.20 (step @p3605 :rule chain_m_resolution :premises (@p3604 @p97 @p3602 @p217) :args (@t3420 @t2845 (@list @t97 @t3417 @t3421))) % 39.97/40.20 (step @p3606 :rule cnf_or_pos :args (@t3424)) % 39.97/40.20 (step @p3607 :rule reordering :premises (@p3606) :args ((or @t3423 @t3422 @t297 (not @t3424)))) % 39.97/40.20 (step @p3608 :rule chain_m_resolution :premises (@p3607 @p3605 @p216 @p189) :args (@t3423 @t2841 (@list @t3420 @t297 @t3424))) % 39.97/40.20 (step @p3609 :rule cnf_or_pos :args (@t3427)) % 39.97/40.20 (step @p3610 :rule reordering :premises (@p3609) :args ((or @t305 @t3426 @t3425 (not @t3427)))) % 39.97/40.20 (step @p3611 :rule chain_m_resolution :premises (@p3610 @p98 @p3608 @p188) :args (@t3426 @t2845 (@list @t98 @t3423 @t3427))) % 39.97/40.20 (step @p3612 :rule cnf_or_pos :args (@t3430)) % 39.97/40.20 (step @p3613 :rule reordering :premises (@p3612) :args ((or @t3429 @t3428 @t276 (not @t3430)))) % 39.97/40.20 (step @p3614 :rule chain_m_resolution :premises (@p3613 @p3611 @p187 @p163) :args (@t3429 @t2841 (@list @t3426 @t276 @t3430))) % 39.97/40.20 (step @p3615 :rule cnf_or_pos :args (@t3433)) % 39.97/40.20 (step @p3616 :rule reordering :premises (@p3615) :args ((or @t282 @t3432 @t3431 (not @t3433)))) % 39.97/40.20 (step @p3617 :rule chain_m_resolution :premises (@p3616 @p99 @p3614 @p162) :args (@t3432 @t2845 (@list @t99 @t3429 @t3433))) % 39.97/40.20 (step @p3618 :rule cnf_or_pos :args (@t3436)) % 39.97/40.20 (step @p3619 :rule reordering :premises (@p3618) :args ((or @t3435 @t3434 @t238 (not @t3436)))) % 39.97/40.20 (step @p3620 :rule instantiate :premises (@p121) :args (@t251)) % 39.97/40.20 (step @p3621 :rule cnf_or_pos :args (@t3439)) % 39.97/40.20 (step @p3622 :rule reordering :premises (@p3621) :args ((or @t282 @t273 @t3438 (not @t3439)))) % 39.97/40.20 (step @p3623 :rule instantiate :premises (@p119) :args (@t255)) % 39.97/40.20 (step @p3624 :rule cnf_or_pos :args (@t3442)) % 39.97/40.20 (step @p3625 :rule reordering :premises (@p3624) :args ((or @t270 @t253 @t3441 @t3440 (not @t3442)))) % 39.97/40.20 (step @p3626 :rule instantiate :premises (@p120) :args (@t258)) % 39.97/40.20 (step @p3627 :rule cnf_or_pos :args (@t3444)) % 39.97/40.20 (step @p3628 :rule reordering :premises (@p3627) :args ((or @t3437 @t3443 @t276 (not @t3444)))) % 39.97/40.20 (step @p3629 :rule chain_m_resolution :premises (@p3628 @p3626 @p187 @p3625 @p3623 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p154) :args (@t253 (@list false true false false false true false false false false false true false true true) (@list @t3444 @t276 @t3441 @t3442 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 39.97/40.20 (assume-push @p6025 @t220) % 39.97/40.20 (step @p3631 :rule instantiate :premises (@p110) :args (@t3445)) % 39.97/40.20 (step-pop @p6026 :rule scope :premises (@p3631)) % 39.97/40.20 (step @p3632 :rule process_scope :premises (@p6026) :args (@t3448)) % 39.97/40.20 (step @p3634 :rule implies_elim :premises (@p3632)) % 39.97/40.20 (step @p3635 :rule cnf_or_pos :args (@t3448)) % 39.97/40.20 (step @p3636 :rule reordering :premises (@p3635) :args ((or @t3447 @t3446 (not @t3448)))) % 39.97/40.20 (step @p3637 :rule instantiate :premises (@p112) :args (@t3449)) % 39.97/40.20 (step @p3638 :rule cnf_or_pos :args (@t3450)) % 39.97/40.20 (step @p3639 :rule reordering :premises (@p3638) :args ((or @t3447 @t244 @t299 (not @t3450)))) % 39.97/40.20 (step @p3640 :rule instantiate :premises (@p108) :args (@t3445)) % 39.97/40.20 (step @p3641 :rule cnf_or_pos :args (@t3452)) % 39.97/40.20 (step @p3642 :rule reordering :premises (@p3641) :args ((or @t310 @t265 @t264 @t3451 (not @t3452)))) % 39.97/40.20 (step @p3643 :rule chain_m_resolution :premises (@p3642 @p3640 @p205 @p203 @p136 @p134 @p3639 @p3637 @p133 @p131 @p130 @p128 @p127 @p125 @p3636 @p3634 @p110) :args ((or @t3447 @t239) @t267 (@list @t3452 @t310 @t312 @t248 @t249 @t299 @t3450 @t245 @t247 @t242 @t243 @t240 @t241 @t3446 @t3448 @t220))) % 39.97/40.20 (step @p3644 :rule instantiate :premises (@p119) :args (@t3449)) % 39.97/40.20 (step @p3645 :rule cnf_or_pos :args (@t3454)) % 39.97/40.20 (step @p3646 :rule reordering :premises (@p3645) :args ((or @t270 @t3447 @t3453 @t3440 (not @t3454)))) % 39.97/40.20 (step @p3647 :rule instantiate :premises (@p120) :args (@t296)) % 39.97/40.20 (step @p3648 :rule cnf_or_pos :args (@t3457)) % 39.97/40.20 (step @p3649 :rule reordering :premises (@p3648) :args ((or @t3456 @t3455 @t297 (not @t3457)))) % 39.97/40.20 (step @p3650 :rule instantiate :premises (@p121) :args (@t295)) % 39.97/40.20 (step @p3651 :rule cnf_or_pos :args (@t3459)) % 39.97/40.20 (step @p3652 :rule reordering :premises (@p3651) :args ((or @t305 @t3441 @t3458 (not @t3459)))) % 39.97/40.20 (step @p3653 :rule chain_m_resolution :premises (@p3652 @p3650 @p98 @p3649 @p3647 @p216 @p3628 @p3626 @p187 @p3646 @p3644 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3643) :args (@t3447 (@list false false false false true true false true false false false true false false false false false true false true true) (@list @t3459 @t98 @t3456 @t3457 @t297 @t3441 @t3444 @t276 @t3453 @t3454 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 39.97/40.20 (assume-push @p6027 @t220) % 39.97/40.20 (step @p3655 :rule instantiate :premises (@p110) :args (@t3460)) % 39.97/40.20 (step-pop @p6028 :rule scope :premises (@p3655)) % 39.97/40.20 (step @p3656 :rule process_scope :premises (@p6028) :args (@t3463)) % 39.97/40.20 (step @p3658 :rule implies_elim :premises (@p3656)) % 39.97/40.20 (step @p3659 :rule cnf_or_pos :args (@t3463)) % 39.97/40.20 (step @p3660 :rule reordering :premises (@p3659) :args ((or @t3462 @t3461 (not @t3463)))) % 39.97/40.20 (step @p3661 :rule instantiate :premises (@p112) :args (@t3464)) % 39.97/40.20 (step @p3662 :rule cnf_or_pos :args (@t3465)) % 39.97/40.20 (step @p3663 :rule reordering :premises (@p3662) :args ((or @t3462 @t244 @t325 (not @t3465)))) % 39.97/40.20 (step @p3664 :rule instantiate :premises (@p108) :args (@t3460)) % 39.97/40.20 (step @p3665 :rule cnf_or_pos :args (@t3467)) % 39.97/40.20 (step @p3666 :rule reordering :premises (@p3665) :args ((or @t336 @t265 @t264 @t3466 (not @t3467)))) % 39.97/40.20 (step @p3667 :rule chain_m_resolution :premises (@p3666 @p3664 @p234 @p232 @p136 @p134 @p3663 @p3661 @p133 @p131 @p130 @p128 @p127 @p125 @p3660 @p3658 @p110) :args ((or @t3462 @t239) @t267 (@list @t3467 @t336 @t338 @t248 @t249 @t325 @t3465 @t245 @t247 @t242 @t243 @t240 @t241 @t3461 @t3463 @t220))) % 39.97/40.20 (step @p3668 :rule instantiate :premises (@p119) :args (@t3464)) % 39.97/40.20 (step @p3669 :rule cnf_or_pos :args (@t3469)) % 39.97/40.20 (step @p3670 :rule reordering :premises (@p3669) :args ((or @t270 @t3462 @t3468 @t3440 (not @t3469)))) % 39.97/40.20 (step @p3671 :rule instantiate :premises (@p120) :args (@t322)) % 39.97/40.20 (step @p3672 :rule cnf_or_pos :args (@t3472)) % 39.97/40.20 (step @p3673 :rule reordering :premises (@p3672) :args ((or @t3471 @t3470 @t323 (not @t3472)))) % 39.97/40.20 (step @p3674 :rule instantiate :premises (@p121) :args (@t321)) % 39.97/40.20 (step @p3675 :rule cnf_or_pos :args (@t3474)) % 39.97/40.20 (step @p3676 :rule reordering :premises (@p3675) :args ((or @t331 @t3453 @t3473 (not @t3474)))) % 39.97/40.20 (step @p3677 :rule chain_m_resolution :premises (@p3649 @p3647 @p216 @p3676 @p3674 @p97 @p3652 @p3650 @p98 @p3673 @p3671 @p245 @p3628 @p3626 @p187 @p3670 @p3668 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3667) :args (@t3462 (@list false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3457 @t297 @t3453 @t3474 @t97 @t3456 @t3459 @t98 @t3471 @t3472 @t323 @t3441 @t3444 @t276 @t3468 @t3469 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 39.97/40.20 (assume-push @p6029 @t220) % 39.97/40.20 (step @p3679 :rule instantiate :premises (@p110) :args (@t3475)) % 39.97/40.20 (step-pop @p6030 :rule scope :premises (@p3679)) % 39.97/40.20 (step @p3680 :rule process_scope :premises (@p6030) :args (@t3478)) % 39.97/40.20 (step @p3682 :rule implies_elim :premises (@p3680)) % 39.97/40.20 (step @p3683 :rule cnf_or_pos :args (@t3478)) % 39.97/40.20 (step @p3684 :rule reordering :premises (@p3683) :args ((or @t3477 @t3476 (not @t3478)))) % 39.97/40.20 (step @p3685 :rule instantiate :premises (@p112) :args (@t3479)) % 39.97/40.20 (step @p3686 :rule cnf_or_pos :args (@t3480)) % 39.97/40.20 (step @p3687 :rule reordering :premises (@p3686) :args ((or @t3477 @t244 @t351 (not @t3480)))) % 39.97/40.20 (step @p3688 :rule instantiate :premises (@p108) :args (@t3475)) % 39.97/40.20 (step @p3689 :rule cnf_or_pos :args (@t3482)) % 39.97/40.20 (step @p3690 :rule reordering :premises (@p3689) :args ((or @t362 @t265 @t264 @t3481 (not @t3482)))) % 39.97/40.20 (step @p3691 :rule chain_m_resolution :premises (@p3690 @p3688 @p263 @p261 @p136 @p134 @p3687 @p3685 @p133 @p131 @p130 @p128 @p127 @p125 @p3684 @p3682 @p110) :args ((or @t3477 @t239) @t267 (@list @t3482 @t362 @t364 @t248 @t249 @t351 @t3480 @t245 @t247 @t242 @t243 @t240 @t241 @t3476 @t3478 @t220))) % 39.97/40.20 (step @p3692 :rule instantiate :premises (@p119) :args (@t3479)) % 39.97/40.20 (step @p3693 :rule cnf_or_pos :args (@t3484)) % 39.97/40.20 (step @p3694 :rule reordering :premises (@p3693) :args ((or @t270 @t3477 @t3483 @t3440 (not @t3484)))) % 39.97/40.20 (step @p3695 :rule instantiate :premises (@p120) :args (@t348)) % 39.97/40.20 (step @p3696 :rule cnf_or_pos :args (@t3487)) % 39.97/40.20 (step @p3697 :rule reordering :premises (@p3696) :args ((or @t3486 @t3485 @t349 (not @t3487)))) % 39.97/40.20 (step @p3698 :rule instantiate :premises (@p121) :args (@t347)) % 39.97/40.20 (step @p3699 :rule cnf_or_pos :args (@t3489)) % 39.97/40.20 (step @p3700 :rule reordering :premises (@p3699) :args ((or @t357 @t3468 @t3488 (not @t3489)))) % 39.97/40.20 (step @p3701 :rule chain_m_resolution :premises (@p3676 @p3674 @p97 @p3673 @p3671 @p245 @p3649 @p3647 @p216 @p3700 @p3698 @p96 @p3652 @p3650 @p98 @p3697 @p3695 @p274 @p3628 @p3626 @p187 @p3694 @p3692 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3691) :args (@t3477 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3474 @t97 @t3471 @t3472 @t323 @t3453 @t3457 @t297 @t3468 @t3489 @t96 @t3456 @t3459 @t98 @t3486 @t3487 @t349 @t3441 @t3444 @t276 @t3483 @t3484 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 39.97/40.20 (assume-push @p6031 @t220) % 39.97/40.20 (step @p3703 :rule instantiate :premises (@p110) :args (@t3490)) % 39.97/40.20 (step-pop @p6032 :rule scope :premises (@p3703)) % 39.97/40.20 (step @p3704 :rule process_scope :premises (@p6032) :args (@t3493)) % 39.97/40.20 (step @p3706 :rule implies_elim :premises (@p3704)) % 39.97/40.20 (step @p3707 :rule cnf_or_pos :args (@t3493)) % 39.97/40.20 (step @p3708 :rule reordering :premises (@p3707) :args ((or @t3492 @t3491 (not @t3493)))) % 39.97/40.20 (step @p3709 :rule instantiate :premises (@p112) :args (@t3494)) % 39.97/40.20 (step @p3710 :rule cnf_or_pos :args (@t3495)) % 39.97/40.20 (step @p3711 :rule reordering :premises (@p3710) :args ((or @t3492 @t244 @t377 (not @t3495)))) % 39.97/40.20 (step @p3712 :rule instantiate :premises (@p108) :args (@t3490)) % 39.97/40.20 (step @p3713 :rule cnf_or_pos :args (@t3497)) % 39.97/40.20 (step @p3714 :rule reordering :premises (@p3713) :args ((or @t388 @t265 @t264 @t3496 (not @t3497)))) % 39.97/40.20 (step @p3715 :rule chain_m_resolution :premises (@p3714 @p3712 @p292 @p290 @p136 @p134 @p3711 @p3709 @p133 @p131 @p130 @p128 @p127 @p125 @p3708 @p3706 @p110) :args ((or @t3492 @t239) @t267 (@list @t3497 @t388 @t390 @t248 @t249 @t377 @t3495 @t245 @t247 @t242 @t243 @t240 @t241 @t3491 @t3493 @t220))) % 39.97/40.20 (step @p3716 :rule instantiate :premises (@p119) :args (@t3494)) % 39.97/40.20 (step @p3717 :rule cnf_or_pos :args (@t3499)) % 39.97/40.20 (step @p3718 :rule reordering :premises (@p3717) :args ((or @t270 @t3492 @t3498 @t3440 (not @t3499)))) % 39.97/40.20 (step @p3719 :rule instantiate :premises (@p120) :args (@t374)) % 39.97/40.20 (step @p3720 :rule cnf_or_pos :args (@t3502)) % 39.97/40.20 (step @p3721 :rule reordering :premises (@p3720) :args ((or @t3501 @t3500 @t375 (not @t3502)))) % 39.97/40.20 (step @p3722 :rule instantiate :premises (@p121) :args (@t373)) % 39.97/40.20 (step @p3723 :rule cnf_or_pos :args (@t3504)) % 39.97/40.20 (step @p3724 :rule reordering :premises (@p3723) :args ((or @t383 @t3483 @t3503 (not @t3504)))) % 39.97/40.20 (step @p3725 :rule chain_m_resolution :premises (@p3673 @p3671 @p245 @p3700 @p3698 @p96 @p3676 @p3674 @p97 @p3697 @p3695 @p274 @p3649 @p3647 @p216 @p3724 @p3722 @p95 @p3652 @p3650 @p98 @p3721 @p3719 @p303 @p3628 @p3626 @p187 @p3718 @p3716 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3715) :args (@t3492 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3472 @t323 @t3468 @t3489 @t96 @t3471 @t3474 @t97 @t3486 @t3487 @t349 @t3453 @t3457 @t297 @t3483 @t3504 @t95 @t3456 @t3459 @t98 @t3501 @t3502 @t375 @t3441 @t3444 @t276 @t3498 @t3499 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 39.97/40.20 (assume-push @p6033 @t220) % 39.97/40.20 (step @p3727 :rule instantiate :premises (@p110) :args (@t3505)) % 39.97/40.20 (step-pop @p6034 :rule scope :premises (@p3727)) % 39.97/40.20 (step @p3728 :rule process_scope :premises (@p6034) :args (@t3508)) % 39.97/40.20 (step @p3730 :rule implies_elim :premises (@p3728)) % 39.97/40.20 (step @p3731 :rule cnf_or_pos :args (@t3508)) % 39.97/40.20 (step @p3732 :rule reordering :premises (@p3731) :args ((or @t3507 @t3506 (not @t3508)))) % 39.97/40.20 (step @p3733 :rule instantiate :premises (@p112) :args (@t3509)) % 39.97/40.20 (step @p3734 :rule cnf_or_pos :args (@t3510)) % 39.97/40.20 (step @p3735 :rule reordering :premises (@p3734) :args ((or @t3507 @t244 @t403 (not @t3510)))) % 39.97/40.20 (step @p3736 :rule instantiate :premises (@p108) :args (@t3505)) % 39.97/40.20 (step @p3737 :rule cnf_or_pos :args (@t3512)) % 39.97/40.20 (step @p3738 :rule reordering :premises (@p3737) :args ((or @t414 @t265 @t264 @t3511 (not @t3512)))) % 39.97/40.20 (step @p3739 :rule chain_m_resolution :premises (@p3738 @p3736 @p321 @p319 @p136 @p134 @p3735 @p3733 @p133 @p131 @p130 @p128 @p127 @p125 @p3732 @p3730 @p110) :args ((or @t3507 @t239) @t267 (@list @t3512 @t414 @t416 @t248 @t249 @t403 @t3510 @t245 @t247 @t242 @t243 @t240 @t241 @t3506 @t3508 @t220))) % 39.97/40.20 (step @p3740 :rule instantiate :premises (@p119) :args (@t3509)) % 39.97/40.20 (step @p3741 :rule cnf_or_pos :args (@t3514)) % 39.97/40.20 (step @p3742 :rule reordering :premises (@p3741) :args ((or @t270 @t3507 @t3513 @t3440 (not @t3514)))) % 39.97/40.20 (step @p3743 :rule instantiate :premises (@p120) :args (@t400)) % 39.97/40.20 (step @p3744 :rule cnf_or_pos :args (@t3517)) % 39.97/40.20 (step @p3745 :rule reordering :premises (@p3744) :args ((or @t3516 @t3515 @t401 (not @t3517)))) % 39.97/40.20 (step @p3746 :rule instantiate :premises (@p121) :args (@t399)) % 39.97/40.20 (step @p3747 :rule cnf_or_pos :args (@t3519)) % 39.97/40.20 (step @p3748 :rule reordering :premises (@p3747) :args ((or @t409 @t3498 @t3518 (not @t3519)))) % 39.97/40.20 (step @p3749 :rule chain_m_resolution :premises (@p3700 @p3698 @p96 @p3697 @p3695 @p274 @p3673 @p3671 @p245 @p3724 @p3722 @p95 @p3676 @p3674 @p97 @p3721 @p3719 @p303 @p3649 @p3647 @p216 @p3748 @p3746 @p94 @p3652 @p3650 @p98 @p3745 @p3743 @p332 @p3628 @p3626 @p187 @p3742 @p3740 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3739) :args (@t3507 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3489 @t96 @t3486 @t3487 @t349 @t3468 @t3472 @t323 @t3483 @t3504 @t95 @t3471 @t3474 @t97 @t3501 @t3502 @t375 @t3453 @t3457 @t297 @t3498 @t3519 @t94 @t3456 @t3459 @t98 @t3516 @t3517 @t401 @t3441 @t3444 @t276 @t3513 @t3514 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 39.97/40.20 (assume-push @p6035 @t220) % 39.97/40.20 (step @p3751 :rule instantiate :premises (@p110) :args (@t3520)) % 39.97/40.20 (step-pop @p6036 :rule scope :premises (@p3751)) % 39.97/40.20 (step @p3752 :rule process_scope :premises (@p6036) :args (@t3523)) % 39.97/40.20 (step @p3754 :rule implies_elim :premises (@p3752)) % 39.97/40.20 (step @p3755 :rule cnf_or_pos :args (@t3523)) % 39.97/40.20 (step @p3756 :rule reordering :premises (@p3755) :args ((or @t3522 @t3521 (not @t3523)))) % 39.97/40.20 (step @p3757 :rule instantiate :premises (@p112) :args (@t3524)) % 39.97/40.20 (step @p3758 :rule cnf_or_pos :args (@t3525)) % 39.97/40.20 (step @p3759 :rule reordering :premises (@p3758) :args ((or @t3522 @t244 @t429 (not @t3525)))) % 39.97/40.20 (step @p3760 :rule instantiate :premises (@p108) :args (@t3520)) % 39.97/40.20 (step @p3761 :rule cnf_or_pos :args (@t3527)) % 39.97/40.20 (step @p3762 :rule reordering :premises (@p3761) :args ((or @t440 @t265 @t264 @t3526 (not @t3527)))) % 39.97/40.20 (step @p3763 :rule chain_m_resolution :premises (@p3762 @p3760 @p350 @p348 @p136 @p134 @p3759 @p3757 @p133 @p131 @p130 @p128 @p127 @p125 @p3756 @p3754 @p110) :args ((or @t3522 @t239) @t267 (@list @t3527 @t440 @t442 @t248 @t249 @t429 @t3525 @t245 @t247 @t242 @t243 @t240 @t241 @t3521 @t3523 @t220))) % 39.97/40.20 (step @p3764 :rule instantiate :premises (@p119) :args (@t3524)) % 39.97/40.20 (step @p3765 :rule cnf_or_pos :args (@t3529)) % 39.97/40.20 (step @p3766 :rule reordering :premises (@p3765) :args ((or @t270 @t3522 @t3528 @t3440 (not @t3529)))) % 39.97/40.20 (step @p3767 :rule instantiate :premises (@p120) :args (@t426)) % 39.97/40.20 (step @p3768 :rule cnf_or_pos :args (@t3532)) % 39.97/40.20 (step @p3769 :rule reordering :premises (@p3768) :args ((or @t3531 @t3530 @t427 (not @t3532)))) % 39.97/40.20 (step @p3770 :rule instantiate :premises (@p121) :args (@t425)) % 39.97/40.20 (step @p3771 :rule cnf_or_pos :args (@t3534)) % 39.97/40.20 (step @p3772 :rule reordering :premises (@p3771) :args ((or @t435 @t3513 @t3533 (not @t3534)))) % 39.97/40.20 (step @p3773 :rule chain_m_resolution :premises (@p3697 @p3695 @p274 @p3724 @p3722 @p95 @p3700 @p3698 @p96 @p3721 @p3719 @p303 @p3673 @p3671 @p245 @p3748 @p3746 @p94 @p3676 @p3674 @p97 @p3745 @p3743 @p332 @p3649 @p3647 @p216 @p3772 @p3770 @p93 @p3652 @p3650 @p98 @p3769 @p3767 @p361 @p3628 @p3626 @p187 @p3766 @p3764 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3763) :args (@t3522 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3487 @t349 @t3483 @t3504 @t95 @t3486 @t3489 @t96 @t3501 @t3502 @t375 @t3468 @t3472 @t323 @t3498 @t3519 @t94 @t3471 @t3474 @t97 @t3516 @t3517 @t401 @t3453 @t3457 @t297 @t3513 @t3534 @t93 @t3456 @t3459 @t98 @t3531 @t3532 @t427 @t3441 @t3444 @t276 @t3528 @t3529 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 39.97/40.20 (assume-push @p6037 @t220) % 39.97/40.20 (step @p3775 :rule instantiate :premises (@p110) :args (@t3535)) % 39.97/40.20 (step-pop @p6038 :rule scope :premises (@p3775)) % 39.97/40.20 (step @p3776 :rule process_scope :premises (@p6038) :args (@t3538)) % 39.97/40.20 (step @p3778 :rule implies_elim :premises (@p3776)) % 39.97/40.20 (step @p3779 :rule cnf_or_pos :args (@t3538)) % 39.97/40.20 (step @p3780 :rule reordering :premises (@p3779) :args ((or @t3537 @t3536 (not @t3538)))) % 39.97/40.20 (step @p3781 :rule instantiate :premises (@p112) :args (@t3539)) % 39.97/40.20 (step @p3782 :rule cnf_or_pos :args (@t3540)) % 39.97/40.20 (step @p3783 :rule reordering :premises (@p3782) :args ((or @t3537 @t244 @t455 (not @t3540)))) % 39.97/40.20 (step @p3784 :rule instantiate :premises (@p108) :args (@t3535)) % 39.97/40.20 (step @p3785 :rule cnf_or_pos :args (@t3542)) % 39.97/40.20 (step @p3786 :rule reordering :premises (@p3785) :args ((or @t466 @t265 @t264 @t3541 (not @t3542)))) % 39.97/40.20 (step @p3787 :rule chain_m_resolution :premises (@p3786 @p3784 @p379 @p377 @p136 @p134 @p3783 @p3781 @p133 @p131 @p130 @p128 @p127 @p125 @p3780 @p3778 @p110) :args ((or @t3537 @t239) @t267 (@list @t3542 @t466 @t468 @t248 @t249 @t455 @t3540 @t245 @t247 @t242 @t243 @t240 @t241 @t3536 @t3538 @t220))) % 39.97/40.20 (step @p3788 :rule instantiate :premises (@p119) :args (@t3539)) % 39.97/40.20 (step @p3789 :rule cnf_or_pos :args (@t3544)) % 39.97/40.20 (step @p3790 :rule reordering :premises (@p3789) :args ((or @t270 @t3537 @t3543 @t3440 (not @t3544)))) % 39.97/40.20 (step @p3791 :rule instantiate :premises (@p120) :args (@t452)) % 39.97/40.20 (step @p3792 :rule cnf_or_pos :args (@t3547)) % 39.97/40.20 (step @p3793 :rule reordering :premises (@p3792) :args ((or @t3546 @t3545 @t453 (not @t3547)))) % 39.97/40.20 (step @p3794 :rule instantiate :premises (@p121) :args (@t451)) % 39.97/40.20 (step @p3795 :rule cnf_or_pos :args (@t3549)) % 39.97/40.20 (step @p3796 :rule reordering :premises (@p3795) :args ((or @t461 @t3528 @t3548 (not @t3549)))) % 39.97/40.20 (step @p3797 :rule chain_m_resolution :premises (@p3724 @p3722 @p95 @p3721 @p3719 @p303 @p3697 @p3695 @p274 @p3748 @p3746 @p94 @p3700 @p3698 @p96 @p3745 @p3743 @p332 @p3673 @p3671 @p245 @p3772 @p3770 @p93 @p3676 @p3674 @p97 @p3769 @p3767 @p361 @p3649 @p3647 @p216 @p3796 @p3794 @p92 @p3652 @p3650 @p98 @p3793 @p3791 @p390 @p3628 @p3626 @p187 @p3790 @p3788 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3787) :args (@t3537 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3504 @t95 @t3501 @t3502 @t375 @t3483 @t3487 @t349 @t3498 @t3519 @t94 @t3486 @t3489 @t96 @t3516 @t3517 @t401 @t3468 @t3472 @t323 @t3513 @t3534 @t93 @t3471 @t3474 @t97 @t3531 @t3532 @t427 @t3453 @t3457 @t297 @t3528 @t3549 @t92 @t3456 @t3459 @t98 @t3546 @t3547 @t453 @t3441 @t3444 @t276 @t3543 @t3544 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 39.97/40.20 (assume-push @p6039 @t220) % 39.97/40.20 (step @p3799 :rule instantiate :premises (@p110) :args (@t3550)) % 39.97/40.20 (step-pop @p6040 :rule scope :premises (@p3799)) % 39.97/40.20 (step @p3800 :rule process_scope :premises (@p6040) :args (@t3553)) % 39.97/40.20 (step @p3802 :rule implies_elim :premises (@p3800)) % 39.97/40.20 (step @p3803 :rule cnf_or_pos :args (@t3553)) % 39.97/40.20 (step @p3804 :rule reordering :premises (@p3803) :args ((or @t3552 @t3551 (not @t3553)))) % 39.97/40.20 (step @p3805 :rule instantiate :premises (@p112) :args (@t3554)) % 39.97/40.20 (step @p3806 :rule cnf_or_pos :args (@t3555)) % 39.97/40.20 (step @p3807 :rule reordering :premises (@p3806) :args ((or @t3552 @t244 @t481 (not @t3555)))) % 39.97/40.20 (step @p3808 :rule instantiate :premises (@p108) :args (@t3550)) % 39.97/40.20 (step @p3809 :rule cnf_or_pos :args (@t3557)) % 39.97/40.20 (step @p3810 :rule reordering :premises (@p3809) :args ((or @t492 @t265 @t264 @t3556 (not @t3557)))) % 39.97/40.20 (step @p3811 :rule chain_m_resolution :premises (@p3810 @p3808 @p408 @p406 @p136 @p134 @p3807 @p3805 @p133 @p131 @p130 @p128 @p127 @p125 @p3804 @p3802 @p110) :args ((or @t3552 @t239) @t267 (@list @t3557 @t492 @t494 @t248 @t249 @t481 @t3555 @t245 @t247 @t242 @t243 @t240 @t241 @t3551 @t3553 @t220))) % 39.97/40.20 (step @p3812 :rule instantiate :premises (@p119) :args (@t3554)) % 39.97/40.20 (step @p3813 :rule cnf_or_pos :args (@t3559)) % 39.97/40.20 (step @p3814 :rule reordering :premises (@p3813) :args ((or @t270 @t3552 @t3558 @t3440 (not @t3559)))) % 39.97/40.20 (step @p3815 :rule instantiate :premises (@p120) :args (@t478)) % 39.97/40.20 (step @p3816 :rule cnf_or_pos :args (@t3562)) % 39.97/40.20 (step @p3817 :rule reordering :premises (@p3816) :args ((or @t3561 @t3560 @t479 (not @t3562)))) % 39.97/40.20 (step @p3818 :rule instantiate :premises (@p121) :args (@t477)) % 39.97/40.20 (step @p3819 :rule cnf_or_pos :args (@t3564)) % 39.97/40.20 (step @p3820 :rule reordering :premises (@p3819) :args ((or @t487 @t3543 @t3563 (not @t3564)))) % 39.97/40.20 (step @p3821 :rule chain_m_resolution :premises (@p3721 @p3719 @p303 @p3748 @p3746 @p94 @p3724 @p3722 @p95 @p3745 @p3743 @p332 @p3697 @p3695 @p274 @p3772 @p3770 @p93 @p3700 @p3698 @p96 @p3769 @p3767 @p361 @p3673 @p3671 @p245 @p3796 @p3794 @p92 @p3676 @p3674 @p97 @p3793 @p3791 @p390 @p3649 @p3647 @p216 @p3820 @p3818 @p91 @p3652 @p3650 @p98 @p3817 @p3815 @p419 @p3628 @p3626 @p187 @p3814 @p3812 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3811) :args (@t3552 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3502 @t375 @t3498 @t3519 @t94 @t3501 @t3504 @t95 @t3516 @t3517 @t401 @t3483 @t3487 @t349 @t3513 @t3534 @t93 @t3486 @t3489 @t96 @t3531 @t3532 @t427 @t3468 @t3472 @t323 @t3528 @t3549 @t92 @t3471 @t3474 @t97 @t3546 @t3547 @t453 @t3453 @t3457 @t297 @t3543 @t3564 @t91 @t3456 @t3459 @t98 @t3561 @t3562 @t479 @t3441 @t3444 @t276 @t3558 @t3559 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 39.97/40.20 (assume-push @p6041 @t220) % 39.97/40.20 (step @p3823 :rule instantiate :premises (@p110) :args (@t3565)) % 39.97/40.20 (step-pop @p6042 :rule scope :premises (@p3823)) % 39.97/40.20 (step @p3824 :rule process_scope :premises (@p6042) :args (@t3568)) % 39.97/40.20 (step @p3826 :rule implies_elim :premises (@p3824)) % 39.97/40.20 (step @p3827 :rule cnf_or_pos :args (@t3568)) % 39.97/40.20 (step @p3828 :rule reordering :premises (@p3827) :args ((or @t3567 @t3566 (not @t3568)))) % 39.97/40.20 (step @p3829 :rule instantiate :premises (@p112) :args (@t3569)) % 39.97/40.20 (step @p3830 :rule cnf_or_pos :args (@t3570)) % 39.97/40.20 (step @p3831 :rule reordering :premises (@p3830) :args ((or @t3567 @t244 @t507 (not @t3570)))) % 39.97/40.20 (step @p3832 :rule instantiate :premises (@p108) :args (@t3565)) % 39.97/40.20 (step @p3833 :rule cnf_or_pos :args (@t3572)) % 39.97/40.20 (step @p3834 :rule reordering :premises (@p3833) :args ((or @t518 @t265 @t264 @t3571 (not @t3572)))) % 39.97/40.20 (step @p3835 :rule chain_m_resolution :premises (@p3834 @p3832 @p437 @p435 @p136 @p134 @p3831 @p3829 @p133 @p131 @p130 @p128 @p127 @p125 @p3828 @p3826 @p110) :args ((or @t3567 @t239) @t267 (@list @t3572 @t518 @t520 @t248 @t249 @t507 @t3570 @t245 @t247 @t242 @t243 @t240 @t241 @t3566 @t3568 @t220))) % 39.97/40.20 (step @p3836 :rule instantiate :premises (@p119) :args (@t3569)) % 39.97/40.20 (step @p3837 :rule cnf_or_pos :args (@t3574)) % 39.97/40.20 (step @p3838 :rule reordering :premises (@p3837) :args ((or @t270 @t3567 @t3573 @t3440 (not @t3574)))) % 39.97/40.20 (step @p3839 :rule instantiate :premises (@p120) :args (@t504)) % 39.97/40.20 (step @p3840 :rule cnf_or_pos :args (@t3577)) % 39.97/40.20 (step @p3841 :rule reordering :premises (@p3840) :args ((or @t3576 @t3575 @t505 (not @t3577)))) % 39.97/40.20 (step @p3842 :rule instantiate :premises (@p121) :args (@t503)) % 39.97/40.20 (step @p3843 :rule cnf_or_pos :args (@t3579)) % 39.97/40.20 (step @p3844 :rule reordering :premises (@p3843) :args ((or @t513 @t3558 @t3578 (not @t3579)))) % 40.01/40.20 (step @p3845 :rule chain_m_resolution :premises (@p3748 @p3746 @p94 @p3745 @p3743 @p332 @p3721 @p3719 @p303 @p3772 @p3770 @p93 @p3724 @p3722 @p95 @p3769 @p3767 @p361 @p3697 @p3695 @p274 @p3796 @p3794 @p92 @p3700 @p3698 @p96 @p3793 @p3791 @p390 @p3673 @p3671 @p245 @p3820 @p3818 @p91 @p3676 @p3674 @p97 @p3817 @p3815 @p419 @p3649 @p3647 @p216 @p3844 @p3842 @p90 @p3652 @p3650 @p98 @p3841 @p3839 @p448 @p3628 @p3626 @p187 @p3838 @p3836 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3835) :args (@t3567 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3519 @t94 @t3516 @t3517 @t401 @t3498 @t3502 @t375 @t3513 @t3534 @t93 @t3501 @t3504 @t95 @t3531 @t3532 @t427 @t3483 @t3487 @t349 @t3528 @t3549 @t92 @t3486 @t3489 @t96 @t3546 @t3547 @t453 @t3468 @t3472 @t323 @t3543 @t3564 @t91 @t3471 @t3474 @t97 @t3561 @t3562 @t479 @t3453 @t3457 @t297 @t3558 @t3579 @t90 @t3456 @t3459 @t98 @t3576 @t3577 @t505 @t3441 @t3444 @t276 @t3573 @t3574 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6043 @t220) % 40.01/40.20 (step @p3847 :rule instantiate :premises (@p110) :args (@t3580)) % 40.01/40.20 (step-pop @p6044 :rule scope :premises (@p3847)) % 40.01/40.20 (step @p3848 :rule process_scope :premises (@p6044) :args (@t3583)) % 40.01/40.20 (step @p3850 :rule implies_elim :premises (@p3848)) % 40.01/40.20 (step @p3851 :rule cnf_or_pos :args (@t3583)) % 40.01/40.20 (step @p3852 :rule reordering :premises (@p3851) :args ((or @t3582 @t3581 (not @t3583)))) % 40.01/40.20 (step @p3853 :rule instantiate :premises (@p112) :args (@t3584)) % 40.01/40.20 (step @p3854 :rule cnf_or_pos :args (@t3585)) % 40.01/40.20 (step @p3855 :rule reordering :premises (@p3854) :args ((or @t3582 @t244 @t533 (not @t3585)))) % 40.01/40.20 (step @p3856 :rule instantiate :premises (@p108) :args (@t3580)) % 40.01/40.20 (step @p3857 :rule cnf_or_pos :args (@t3587)) % 40.01/40.20 (step @p3858 :rule reordering :premises (@p3857) :args ((or @t544 @t265 @t264 @t3586 (not @t3587)))) % 40.01/40.20 (step @p3859 :rule chain_m_resolution :premises (@p3858 @p3856 @p466 @p464 @p136 @p134 @p3855 @p3853 @p133 @p131 @p130 @p128 @p127 @p125 @p3852 @p3850 @p110) :args ((or @t3582 @t239) @t267 (@list @t3587 @t544 @t546 @t248 @t249 @t533 @t3585 @t245 @t247 @t242 @t243 @t240 @t241 @t3581 @t3583 @t220))) % 40.01/40.20 (step @p3860 :rule instantiate :premises (@p119) :args (@t3584)) % 40.01/40.20 (step @p3861 :rule cnf_or_pos :args (@t3589)) % 40.01/40.20 (step @p3862 :rule reordering :premises (@p3861) :args ((or @t270 @t3582 @t3588 @t3440 (not @t3589)))) % 40.01/40.20 (step @p3863 :rule instantiate :premises (@p120) :args (@t530)) % 40.01/40.20 (step @p3864 :rule cnf_or_pos :args (@t3592)) % 40.01/40.20 (step @p3865 :rule reordering :premises (@p3864) :args ((or @t3591 @t3590 @t531 (not @t3592)))) % 40.01/40.20 (step @p3866 :rule instantiate :premises (@p121) :args (@t529)) % 40.01/40.20 (step @p3867 :rule cnf_or_pos :args (@t3594)) % 40.01/40.20 (step @p3868 :rule reordering :premises (@p3867) :args ((or @t539 @t3573 @t3593 (not @t3594)))) % 40.01/40.20 (step @p3869 :rule chain_m_resolution :premises (@p3745 @p3743 @p332 @p3772 @p3770 @p93 @p3748 @p3746 @p94 @p3769 @p3767 @p361 @p3721 @p3719 @p303 @p3796 @p3794 @p92 @p3724 @p3722 @p95 @p3793 @p3791 @p390 @p3697 @p3695 @p274 @p3820 @p3818 @p91 @p3700 @p3698 @p96 @p3817 @p3815 @p419 @p3673 @p3671 @p245 @p3844 @p3842 @p90 @p3676 @p3674 @p97 @p3841 @p3839 @p448 @p3649 @p3647 @p216 @p3868 @p3866 @p89 @p3652 @p3650 @p98 @p3865 @p3863 @p477 @p3628 @p3626 @p187 @p3862 @p3860 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3859) :args (@t3582 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3517 @t401 @t3513 @t3534 @t93 @t3516 @t3519 @t94 @t3531 @t3532 @t427 @t3498 @t3502 @t375 @t3528 @t3549 @t92 @t3501 @t3504 @t95 @t3546 @t3547 @t453 @t3483 @t3487 @t349 @t3543 @t3564 @t91 @t3486 @t3489 @t96 @t3561 @t3562 @t479 @t3468 @t3472 @t323 @t3558 @t3579 @t90 @t3471 @t3474 @t97 @t3576 @t3577 @t505 @t3453 @t3457 @t297 @t3573 @t3594 @t89 @t3456 @t3459 @t98 @t3591 @t3592 @t531 @t3441 @t3444 @t276 @t3588 @t3589 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6045 @t220) % 40.01/40.20 (step @p3871 :rule instantiate :premises (@p110) :args (@t3595)) % 40.01/40.20 (step-pop @p6046 :rule scope :premises (@p3871)) % 40.01/40.20 (step @p3872 :rule process_scope :premises (@p6046) :args (@t3598)) % 40.01/40.20 (step @p3874 :rule implies_elim :premises (@p3872)) % 40.01/40.20 (step @p3875 :rule cnf_or_pos :args (@t3598)) % 40.01/40.20 (step @p3876 :rule reordering :premises (@p3875) :args ((or @t3597 @t3596 (not @t3598)))) % 40.01/40.20 (step @p3877 :rule instantiate :premises (@p112) :args (@t3599)) % 40.01/40.20 (step @p3878 :rule cnf_or_pos :args (@t3600)) % 40.01/40.20 (step @p3879 :rule reordering :premises (@p3878) :args ((or @t3597 @t244 @t559 (not @t3600)))) % 40.01/40.20 (step @p3880 :rule instantiate :premises (@p108) :args (@t3595)) % 40.01/40.20 (step @p3881 :rule cnf_or_pos :args (@t3602)) % 40.01/40.20 (step @p3882 :rule reordering :premises (@p3881) :args ((or @t570 @t265 @t264 @t3601 (not @t3602)))) % 40.01/40.20 (step @p3883 :rule chain_m_resolution :premises (@p3882 @p3880 @p495 @p493 @p136 @p134 @p3879 @p3877 @p133 @p131 @p130 @p128 @p127 @p125 @p3876 @p3874 @p110) :args ((or @t3597 @t239) @t267 (@list @t3602 @t570 @t572 @t248 @t249 @t559 @t3600 @t245 @t247 @t242 @t243 @t240 @t241 @t3596 @t3598 @t220))) % 40.01/40.20 (step @p3884 :rule instantiate :premises (@p119) :args (@t3599)) % 40.01/40.20 (step @p3885 :rule cnf_or_pos :args (@t3604)) % 40.01/40.20 (step @p3886 :rule reordering :premises (@p3885) :args ((or @t270 @t3597 @t3603 @t3440 (not @t3604)))) % 40.01/40.20 (step @p3887 :rule instantiate :premises (@p120) :args (@t556)) % 40.01/40.20 (step @p3888 :rule cnf_or_pos :args (@t3607)) % 40.01/40.20 (step @p3889 :rule reordering :premises (@p3888) :args ((or @t3606 @t3605 @t557 (not @t3607)))) % 40.01/40.20 (step @p3890 :rule instantiate :premises (@p121) :args (@t555)) % 40.01/40.20 (step @p3891 :rule cnf_or_pos :args (@t3609)) % 40.01/40.20 (step @p3892 :rule reordering :premises (@p3891) :args ((or @t565 @t3588 @t3608 (not @t3609)))) % 40.01/40.20 (step @p3893 :rule chain_m_resolution :premises (@p3772 @p3770 @p93 @p3769 @p3767 @p361 @p3745 @p3743 @p332 @p3796 @p3794 @p92 @p3748 @p3746 @p94 @p3793 @p3791 @p390 @p3721 @p3719 @p303 @p3820 @p3818 @p91 @p3724 @p3722 @p95 @p3817 @p3815 @p419 @p3697 @p3695 @p274 @p3844 @p3842 @p90 @p3700 @p3698 @p96 @p3841 @p3839 @p448 @p3673 @p3671 @p245 @p3868 @p3866 @p89 @p3676 @p3674 @p97 @p3865 @p3863 @p477 @p3649 @p3647 @p216 @p3892 @p3890 @p88 @p3652 @p3650 @p98 @p3889 @p3887 @p506 @p3628 @p3626 @p187 @p3886 @p3884 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3883) :args (@t3597 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3534 @t93 @t3531 @t3532 @t427 @t3513 @t3517 @t401 @t3528 @t3549 @t92 @t3516 @t3519 @t94 @t3546 @t3547 @t453 @t3498 @t3502 @t375 @t3543 @t3564 @t91 @t3501 @t3504 @t95 @t3561 @t3562 @t479 @t3483 @t3487 @t349 @t3558 @t3579 @t90 @t3486 @t3489 @t96 @t3576 @t3577 @t505 @t3468 @t3472 @t323 @t3573 @t3594 @t89 @t3471 @t3474 @t97 @t3591 @t3592 @t531 @t3453 @t3457 @t297 @t3588 @t3609 @t88 @t3456 @t3459 @t98 @t3606 @t3607 @t557 @t3441 @t3444 @t276 @t3603 @t3604 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6047 @t220) % 40.01/40.20 (step @p3895 :rule instantiate :premises (@p110) :args (@t3610)) % 40.01/40.20 (step-pop @p6048 :rule scope :premises (@p3895)) % 40.01/40.20 (step @p3896 :rule process_scope :premises (@p6048) :args (@t3613)) % 40.01/40.20 (step @p3898 :rule implies_elim :premises (@p3896)) % 40.01/40.20 (step @p3899 :rule cnf_or_pos :args (@t3613)) % 40.01/40.20 (step @p3900 :rule reordering :premises (@p3899) :args ((or @t3612 @t3611 (not @t3613)))) % 40.01/40.20 (step @p3901 :rule instantiate :premises (@p112) :args (@t3614)) % 40.01/40.20 (step @p3902 :rule cnf_or_pos :args (@t3615)) % 40.01/40.20 (step @p3903 :rule reordering :premises (@p3902) :args ((or @t3612 @t244 @t585 (not @t3615)))) % 40.01/40.20 (step @p3904 :rule instantiate :premises (@p108) :args (@t3610)) % 40.01/40.20 (step @p3905 :rule cnf_or_pos :args (@t3617)) % 40.01/40.20 (step @p3906 :rule reordering :premises (@p3905) :args ((or @t596 @t265 @t264 @t3616 (not @t3617)))) % 40.01/40.20 (step @p3907 :rule chain_m_resolution :premises (@p3906 @p3904 @p524 @p522 @p136 @p134 @p3903 @p3901 @p133 @p131 @p130 @p128 @p127 @p125 @p3900 @p3898 @p110) :args ((or @t3612 @t239) @t267 (@list @t3617 @t596 @t598 @t248 @t249 @t585 @t3615 @t245 @t247 @t242 @t243 @t240 @t241 @t3611 @t3613 @t220))) % 40.01/40.20 (step @p3908 :rule instantiate :premises (@p119) :args (@t3614)) % 40.01/40.20 (step @p3909 :rule cnf_or_pos :args (@t3619)) % 40.01/40.20 (step @p3910 :rule reordering :premises (@p3909) :args ((or @t270 @t3612 @t3618 @t3440 (not @t3619)))) % 40.01/40.20 (step @p3911 :rule instantiate :premises (@p120) :args (@t582)) % 40.01/40.20 (step @p3912 :rule cnf_or_pos :args (@t3622)) % 40.01/40.20 (step @p3913 :rule reordering :premises (@p3912) :args ((or @t3621 @t3620 @t583 (not @t3622)))) % 40.01/40.20 (step @p3914 :rule instantiate :premises (@p121) :args (@t581)) % 40.01/40.20 (step @p3915 :rule cnf_or_pos :args (@t3624)) % 40.01/40.20 (step @p3916 :rule reordering :premises (@p3915) :args ((or @t591 @t3603 @t3623 (not @t3624)))) % 40.01/40.20 (step @p3917 :rule chain_m_resolution :premises (@p3769 @p3767 @p361 @p3796 @p3794 @p92 @p3772 @p3770 @p93 @p3793 @p3791 @p390 @p3745 @p3743 @p332 @p3820 @p3818 @p91 @p3748 @p3746 @p94 @p3817 @p3815 @p419 @p3721 @p3719 @p303 @p3844 @p3842 @p90 @p3724 @p3722 @p95 @p3841 @p3839 @p448 @p3697 @p3695 @p274 @p3868 @p3866 @p89 @p3700 @p3698 @p96 @p3865 @p3863 @p477 @p3673 @p3671 @p245 @p3892 @p3890 @p88 @p3676 @p3674 @p97 @p3889 @p3887 @p506 @p3649 @p3647 @p216 @p3916 @p3914 @p87 @p3652 @p3650 @p98 @p3913 @p3911 @p535 @p3628 @p3626 @p187 @p3910 @p3908 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3907) :args (@t3612 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3532 @t427 @t3528 @t3549 @t92 @t3531 @t3534 @t93 @t3546 @t3547 @t453 @t3513 @t3517 @t401 @t3543 @t3564 @t91 @t3516 @t3519 @t94 @t3561 @t3562 @t479 @t3498 @t3502 @t375 @t3558 @t3579 @t90 @t3501 @t3504 @t95 @t3576 @t3577 @t505 @t3483 @t3487 @t349 @t3573 @t3594 @t89 @t3486 @t3489 @t96 @t3591 @t3592 @t531 @t3468 @t3472 @t323 @t3588 @t3609 @t88 @t3471 @t3474 @t97 @t3606 @t3607 @t557 @t3453 @t3457 @t297 @t3603 @t3624 @t87 @t3456 @t3459 @t98 @t3621 @t3622 @t583 @t3441 @t3444 @t276 @t3618 @t3619 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6049 @t220) % 40.01/40.20 (step @p3919 :rule instantiate :premises (@p110) :args (@t3625)) % 40.01/40.20 (step-pop @p6050 :rule scope :premises (@p3919)) % 40.01/40.20 (step @p3920 :rule process_scope :premises (@p6050) :args (@t3628)) % 40.01/40.20 (step @p3922 :rule implies_elim :premises (@p3920)) % 40.01/40.20 (step @p3923 :rule cnf_or_pos :args (@t3628)) % 40.01/40.20 (step @p3924 :rule reordering :premises (@p3923) :args ((or @t3627 @t3626 (not @t3628)))) % 40.01/40.20 (step @p3925 :rule instantiate :premises (@p112) :args (@t3629)) % 40.01/40.20 (step @p3926 :rule cnf_or_pos :args (@t3630)) % 40.01/40.20 (step @p3927 :rule reordering :premises (@p3926) :args ((or @t3627 @t244 @t611 (not @t3630)))) % 40.01/40.20 (step @p3928 :rule instantiate :premises (@p108) :args (@t3625)) % 40.01/40.20 (step @p3929 :rule cnf_or_pos :args (@t3632)) % 40.01/40.20 (step @p3930 :rule reordering :premises (@p3929) :args ((or @t622 @t265 @t264 @t3631 (not @t3632)))) % 40.01/40.20 (step @p3931 :rule chain_m_resolution :premises (@p3930 @p3928 @p553 @p551 @p136 @p134 @p3927 @p3925 @p133 @p131 @p130 @p128 @p127 @p125 @p3924 @p3922 @p110) :args ((or @t3627 @t239) @t267 (@list @t3632 @t622 @t624 @t248 @t249 @t611 @t3630 @t245 @t247 @t242 @t243 @t240 @t241 @t3626 @t3628 @t220))) % 40.01/40.20 (step @p3932 :rule instantiate :premises (@p119) :args (@t3629)) % 40.01/40.20 (step @p3933 :rule cnf_or_pos :args (@t3634)) % 40.01/40.20 (step @p3934 :rule reordering :premises (@p3933) :args ((or @t270 @t3627 @t3633 @t3440 (not @t3634)))) % 40.01/40.20 (step @p3935 :rule instantiate :premises (@p120) :args (@t608)) % 40.01/40.20 (step @p3936 :rule cnf_or_pos :args (@t3637)) % 40.01/40.20 (step @p3937 :rule reordering :premises (@p3936) :args ((or @t3636 @t3635 @t609 (not @t3637)))) % 40.01/40.20 (step @p3938 :rule instantiate :premises (@p121) :args (@t607)) % 40.01/40.20 (step @p3939 :rule cnf_or_pos :args (@t3639)) % 40.01/40.20 (step @p3940 :rule reordering :premises (@p3939) :args ((or @t617 @t3618 @t3638 (not @t3639)))) % 40.01/40.20 (step @p3941 :rule chain_m_resolution :premises (@p3796 @p3794 @p92 @p3793 @p3791 @p390 @p3769 @p3767 @p361 @p3820 @p3818 @p91 @p3772 @p3770 @p93 @p3817 @p3815 @p419 @p3745 @p3743 @p332 @p3844 @p3842 @p90 @p3748 @p3746 @p94 @p3841 @p3839 @p448 @p3721 @p3719 @p303 @p3868 @p3866 @p89 @p3724 @p3722 @p95 @p3865 @p3863 @p477 @p3697 @p3695 @p274 @p3892 @p3890 @p88 @p3700 @p3698 @p96 @p3889 @p3887 @p506 @p3673 @p3671 @p245 @p3916 @p3914 @p87 @p3676 @p3674 @p97 @p3913 @p3911 @p535 @p3649 @p3647 @p216 @p3940 @p3938 @p86 @p3652 @p3650 @p98 @p3937 @p3935 @p564 @p3628 @p3626 @p187 @p3934 @p3932 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3931) :args (@t3627 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3549 @t92 @t3546 @t3547 @t453 @t3528 @t3532 @t427 @t3543 @t3564 @t91 @t3531 @t3534 @t93 @t3561 @t3562 @t479 @t3513 @t3517 @t401 @t3558 @t3579 @t90 @t3516 @t3519 @t94 @t3576 @t3577 @t505 @t3498 @t3502 @t375 @t3573 @t3594 @t89 @t3501 @t3504 @t95 @t3591 @t3592 @t531 @t3483 @t3487 @t349 @t3588 @t3609 @t88 @t3486 @t3489 @t96 @t3606 @t3607 @t557 @t3468 @t3472 @t323 @t3603 @t3624 @t87 @t3471 @t3474 @t97 @t3621 @t3622 @t583 @t3453 @t3457 @t297 @t3618 @t3639 @t86 @t3456 @t3459 @t98 @t3636 @t3637 @t609 @t3441 @t3444 @t276 @t3633 @t3634 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6051 @t220) % 40.01/40.20 (step @p3943 :rule instantiate :premises (@p110) :args (@t3640)) % 40.01/40.20 (step-pop @p6052 :rule scope :premises (@p3943)) % 40.01/40.20 (step @p3944 :rule process_scope :premises (@p6052) :args (@t3643)) % 40.01/40.20 (step @p3946 :rule implies_elim :premises (@p3944)) % 40.01/40.20 (step @p3947 :rule cnf_or_pos :args (@t3643)) % 40.01/40.20 (step @p3948 :rule reordering :premises (@p3947) :args ((or @t3642 @t3641 (not @t3643)))) % 40.01/40.20 (step @p3949 :rule instantiate :premises (@p112) :args (@t3644)) % 40.01/40.20 (step @p3950 :rule cnf_or_pos :args (@t3645)) % 40.01/40.20 (step @p3951 :rule reordering :premises (@p3950) :args ((or @t3642 @t244 @t637 (not @t3645)))) % 40.01/40.20 (step @p3952 :rule instantiate :premises (@p108) :args (@t3640)) % 40.01/40.20 (step @p3953 :rule cnf_or_pos :args (@t3647)) % 40.01/40.20 (step @p3954 :rule reordering :premises (@p3953) :args ((or @t648 @t265 @t264 @t3646 (not @t3647)))) % 40.01/40.20 (step @p3955 :rule chain_m_resolution :premises (@p3954 @p3952 @p582 @p580 @p136 @p134 @p3951 @p3949 @p133 @p131 @p130 @p128 @p127 @p125 @p3948 @p3946 @p110) :args ((or @t3642 @t239) @t267 (@list @t3647 @t648 @t650 @t248 @t249 @t637 @t3645 @t245 @t247 @t242 @t243 @t240 @t241 @t3641 @t3643 @t220))) % 40.01/40.20 (step @p3956 :rule instantiate :premises (@p119) :args (@t3644)) % 40.01/40.20 (step @p3957 :rule cnf_or_pos :args (@t3649)) % 40.01/40.20 (step @p3958 :rule reordering :premises (@p3957) :args ((or @t270 @t3642 @t3648 @t3440 (not @t3649)))) % 40.01/40.20 (step @p3959 :rule instantiate :premises (@p120) :args (@t634)) % 40.01/40.20 (step @p3960 :rule cnf_or_pos :args (@t3652)) % 40.01/40.20 (step @p3961 :rule reordering :premises (@p3960) :args ((or @t3651 @t3650 @t635 (not @t3652)))) % 40.01/40.20 (step @p3962 :rule instantiate :premises (@p121) :args (@t633)) % 40.01/40.20 (step @p3963 :rule cnf_or_pos :args (@t3654)) % 40.01/40.20 (step @p3964 :rule reordering :premises (@p3963) :args ((or @t643 @t3633 @t3653 (not @t3654)))) % 40.01/40.20 (step @p3965 :rule chain_m_resolution :premises (@p3793 @p3791 @p390 @p3820 @p3818 @p91 @p3796 @p3794 @p92 @p3817 @p3815 @p419 @p3769 @p3767 @p361 @p3844 @p3842 @p90 @p3772 @p3770 @p93 @p3841 @p3839 @p448 @p3745 @p3743 @p332 @p3868 @p3866 @p89 @p3748 @p3746 @p94 @p3865 @p3863 @p477 @p3721 @p3719 @p303 @p3892 @p3890 @p88 @p3724 @p3722 @p95 @p3889 @p3887 @p506 @p3697 @p3695 @p274 @p3916 @p3914 @p87 @p3700 @p3698 @p96 @p3913 @p3911 @p535 @p3673 @p3671 @p245 @p3940 @p3938 @p86 @p3676 @p3674 @p97 @p3937 @p3935 @p564 @p3649 @p3647 @p216 @p3964 @p3962 @p85 @p3652 @p3650 @p98 @p3961 @p3959 @p593 @p3628 @p3626 @p187 @p3958 @p3956 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3955) :args (@t3642 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3547 @t453 @t3543 @t3564 @t91 @t3546 @t3549 @t92 @t3561 @t3562 @t479 @t3528 @t3532 @t427 @t3558 @t3579 @t90 @t3531 @t3534 @t93 @t3576 @t3577 @t505 @t3513 @t3517 @t401 @t3573 @t3594 @t89 @t3516 @t3519 @t94 @t3591 @t3592 @t531 @t3498 @t3502 @t375 @t3588 @t3609 @t88 @t3501 @t3504 @t95 @t3606 @t3607 @t557 @t3483 @t3487 @t349 @t3603 @t3624 @t87 @t3486 @t3489 @t96 @t3621 @t3622 @t583 @t3468 @t3472 @t323 @t3618 @t3639 @t86 @t3471 @t3474 @t97 @t3636 @t3637 @t609 @t3453 @t3457 @t297 @t3633 @t3654 @t85 @t3456 @t3459 @t98 @t3651 @t3652 @t635 @t3441 @t3444 @t276 @t3648 @t3649 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6053 @t220) % 40.01/40.20 (step @p3967 :rule instantiate :premises (@p110) :args (@t3655)) % 40.01/40.20 (step-pop @p6054 :rule scope :premises (@p3967)) % 40.01/40.20 (step @p3968 :rule process_scope :premises (@p6054) :args (@t3658)) % 40.01/40.20 (step @p3970 :rule implies_elim :premises (@p3968)) % 40.01/40.20 (step @p3971 :rule cnf_or_pos :args (@t3658)) % 40.01/40.20 (step @p3972 :rule reordering :premises (@p3971) :args ((or @t3657 @t3656 (not @t3658)))) % 40.01/40.20 (step @p3973 :rule instantiate :premises (@p112) :args (@t3659)) % 40.01/40.20 (step @p3974 :rule cnf_or_pos :args (@t3660)) % 40.01/40.20 (step @p3975 :rule reordering :premises (@p3974) :args ((or @t3657 @t244 @t663 (not @t3660)))) % 40.01/40.20 (step @p3976 :rule instantiate :premises (@p108) :args (@t3655)) % 40.01/40.20 (step @p3977 :rule cnf_or_pos :args (@t3662)) % 40.01/40.20 (step @p3978 :rule reordering :premises (@p3977) :args ((or @t674 @t265 @t264 @t3661 (not @t3662)))) % 40.01/40.20 (step @p3979 :rule chain_m_resolution :premises (@p3978 @p3976 @p611 @p609 @p136 @p134 @p3975 @p3973 @p133 @p131 @p130 @p128 @p127 @p125 @p3972 @p3970 @p110) :args ((or @t3657 @t239) @t267 (@list @t3662 @t674 @t676 @t248 @t249 @t663 @t3660 @t245 @t247 @t242 @t243 @t240 @t241 @t3656 @t3658 @t220))) % 40.01/40.20 (step @p3980 :rule instantiate :premises (@p119) :args (@t3659)) % 40.01/40.20 (step @p3981 :rule cnf_or_pos :args (@t3664)) % 40.01/40.20 (step @p3982 :rule reordering :premises (@p3981) :args ((or @t270 @t3657 @t3663 @t3440 (not @t3664)))) % 40.01/40.20 (step @p3983 :rule instantiate :premises (@p120) :args (@t660)) % 40.01/40.20 (step @p3984 :rule cnf_or_pos :args (@t3667)) % 40.01/40.20 (step @p3985 :rule reordering :premises (@p3984) :args ((or @t3666 @t3665 @t661 (not @t3667)))) % 40.01/40.20 (step @p3986 :rule instantiate :premises (@p121) :args (@t659)) % 40.01/40.20 (step @p3987 :rule cnf_or_pos :args (@t3669)) % 40.01/40.20 (step @p3988 :rule reordering :premises (@p3987) :args ((or @t669 @t3648 @t3668 (not @t3669)))) % 40.01/40.20 (step @p3989 :rule chain_m_resolution :premises (@p3820 @p3818 @p91 @p3817 @p3815 @p419 @p3793 @p3791 @p390 @p3844 @p3842 @p90 @p3796 @p3794 @p92 @p3841 @p3839 @p448 @p3769 @p3767 @p361 @p3868 @p3866 @p89 @p3772 @p3770 @p93 @p3865 @p3863 @p477 @p3745 @p3743 @p332 @p3892 @p3890 @p88 @p3748 @p3746 @p94 @p3889 @p3887 @p506 @p3721 @p3719 @p303 @p3916 @p3914 @p87 @p3724 @p3722 @p95 @p3913 @p3911 @p535 @p3697 @p3695 @p274 @p3940 @p3938 @p86 @p3700 @p3698 @p96 @p3937 @p3935 @p564 @p3673 @p3671 @p245 @p3964 @p3962 @p85 @p3676 @p3674 @p97 @p3961 @p3959 @p593 @p3649 @p3647 @p216 @p3988 @p3986 @p84 @p3652 @p3650 @p98 @p3985 @p3983 @p622 @p3628 @p3626 @p187 @p3982 @p3980 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p3979) :args (@t3657 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3564 @t91 @t3561 @t3562 @t479 @t3543 @t3547 @t453 @t3558 @t3579 @t90 @t3546 @t3549 @t92 @t3576 @t3577 @t505 @t3528 @t3532 @t427 @t3573 @t3594 @t89 @t3531 @t3534 @t93 @t3591 @t3592 @t531 @t3513 @t3517 @t401 @t3588 @t3609 @t88 @t3516 @t3519 @t94 @t3606 @t3607 @t557 @t3498 @t3502 @t375 @t3603 @t3624 @t87 @t3501 @t3504 @t95 @t3621 @t3622 @t583 @t3483 @t3487 @t349 @t3618 @t3639 @t86 @t3486 @t3489 @t96 @t3636 @t3637 @t609 @t3468 @t3472 @t323 @t3633 @t3654 @t85 @t3471 @t3474 @t97 @t3651 @t3652 @t635 @t3453 @t3457 @t297 @t3648 @t3669 @t84 @t3456 @t3459 @t98 @t3666 @t3667 @t661 @t3441 @t3444 @t276 @t3663 @t3664 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6055 @t220) % 40.01/40.20 (step @p3991 :rule instantiate :premises (@p110) :args (@t3670)) % 40.01/40.20 (step-pop @p6056 :rule scope :premises (@p3991)) % 40.01/40.20 (step @p3992 :rule process_scope :premises (@p6056) :args (@t3673)) % 40.01/40.20 (step @p3994 :rule implies_elim :premises (@p3992)) % 40.01/40.20 (step @p3995 :rule cnf_or_pos :args (@t3673)) % 40.01/40.20 (step @p3996 :rule reordering :premises (@p3995) :args ((or @t3672 @t3671 (not @t3673)))) % 40.01/40.20 (step @p3997 :rule instantiate :premises (@p112) :args (@t3674)) % 40.01/40.20 (step @p3998 :rule cnf_or_pos :args (@t3675)) % 40.01/40.20 (step @p3999 :rule reordering :premises (@p3998) :args ((or @t3672 @t244 @t689 (not @t3675)))) % 40.01/40.20 (step @p4000 :rule instantiate :premises (@p108) :args (@t3670)) % 40.01/40.20 (step @p4001 :rule cnf_or_pos :args (@t3677)) % 40.01/40.20 (step @p4002 :rule reordering :premises (@p4001) :args ((or @t700 @t265 @t264 @t3676 (not @t3677)))) % 40.01/40.20 (step @p4003 :rule chain_m_resolution :premises (@p4002 @p4000 @p640 @p638 @p136 @p134 @p3999 @p3997 @p133 @p131 @p130 @p128 @p127 @p125 @p3996 @p3994 @p110) :args ((or @t3672 @t239) @t267 (@list @t3677 @t700 @t702 @t248 @t249 @t689 @t3675 @t245 @t247 @t242 @t243 @t240 @t241 @t3671 @t3673 @t220))) % 40.01/40.20 (step @p4004 :rule instantiate :premises (@p119) :args (@t3674)) % 40.01/40.20 (step @p4005 :rule cnf_or_pos :args (@t3679)) % 40.01/40.20 (step @p4006 :rule reordering :premises (@p4005) :args ((or @t270 @t3672 @t3678 @t3440 (not @t3679)))) % 40.01/40.20 (step @p4007 :rule instantiate :premises (@p120) :args (@t686)) % 40.01/40.20 (step @p4008 :rule cnf_or_pos :args (@t3682)) % 40.01/40.20 (step @p4009 :rule reordering :premises (@p4008) :args ((or @t3681 @t3680 @t687 (not @t3682)))) % 40.01/40.20 (step @p4010 :rule instantiate :premises (@p121) :args (@t685)) % 40.01/40.20 (step @p4011 :rule cnf_or_pos :args (@t3684)) % 40.01/40.20 (step @p4012 :rule reordering :premises (@p4011) :args ((or @t695 @t3663 @t3683 (not @t3684)))) % 40.01/40.20 (step @p4013 :rule chain_m_resolution :premises (@p3817 @p3815 @p419 @p3844 @p3842 @p90 @p3820 @p3818 @p91 @p3841 @p3839 @p448 @p3793 @p3791 @p390 @p3868 @p3866 @p89 @p3796 @p3794 @p92 @p3865 @p3863 @p477 @p3769 @p3767 @p361 @p3892 @p3890 @p88 @p3772 @p3770 @p93 @p3889 @p3887 @p506 @p3745 @p3743 @p332 @p3916 @p3914 @p87 @p3748 @p3746 @p94 @p3913 @p3911 @p535 @p3721 @p3719 @p303 @p3940 @p3938 @p86 @p3724 @p3722 @p95 @p3937 @p3935 @p564 @p3697 @p3695 @p274 @p3964 @p3962 @p85 @p3700 @p3698 @p96 @p3961 @p3959 @p593 @p3673 @p3671 @p245 @p3988 @p3986 @p84 @p3676 @p3674 @p97 @p3985 @p3983 @p622 @p3649 @p3647 @p216 @p4012 @p4010 @p83 @p3652 @p3650 @p98 @p4009 @p4007 @p651 @p3628 @p3626 @p187 @p4006 @p4004 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4003) :args (@t3672 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3562 @t479 @t3558 @t3579 @t90 @t3561 @t3564 @t91 @t3576 @t3577 @t505 @t3543 @t3547 @t453 @t3573 @t3594 @t89 @t3546 @t3549 @t92 @t3591 @t3592 @t531 @t3528 @t3532 @t427 @t3588 @t3609 @t88 @t3531 @t3534 @t93 @t3606 @t3607 @t557 @t3513 @t3517 @t401 @t3603 @t3624 @t87 @t3516 @t3519 @t94 @t3621 @t3622 @t583 @t3498 @t3502 @t375 @t3618 @t3639 @t86 @t3501 @t3504 @t95 @t3636 @t3637 @t609 @t3483 @t3487 @t349 @t3633 @t3654 @t85 @t3486 @t3489 @t96 @t3651 @t3652 @t635 @t3468 @t3472 @t323 @t3648 @t3669 @t84 @t3471 @t3474 @t97 @t3666 @t3667 @t661 @t3453 @t3457 @t297 @t3663 @t3684 @t83 @t3456 @t3459 @t98 @t3681 @t3682 @t687 @t3441 @t3444 @t276 @t3678 @t3679 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6057 @t220) % 40.01/40.20 (step @p4015 :rule instantiate :premises (@p110) :args (@t3685)) % 40.01/40.20 (step-pop @p6058 :rule scope :premises (@p4015)) % 40.01/40.20 (step @p4016 :rule process_scope :premises (@p6058) :args (@t3688)) % 40.01/40.20 (step @p4018 :rule implies_elim :premises (@p4016)) % 40.01/40.20 (step @p4019 :rule cnf_or_pos :args (@t3688)) % 40.01/40.20 (step @p4020 :rule reordering :premises (@p4019) :args ((or @t3687 @t3686 (not @t3688)))) % 40.01/40.20 (step @p4021 :rule instantiate :premises (@p112) :args (@t3689)) % 40.01/40.20 (step @p4022 :rule cnf_or_pos :args (@t3690)) % 40.01/40.20 (step @p4023 :rule reordering :premises (@p4022) :args ((or @t3687 @t244 @t715 (not @t3690)))) % 40.01/40.20 (step @p4024 :rule instantiate :premises (@p108) :args (@t3685)) % 40.01/40.20 (step @p4025 :rule cnf_or_pos :args (@t3692)) % 40.01/40.20 (step @p4026 :rule reordering :premises (@p4025) :args ((or @t726 @t265 @t264 @t3691 (not @t3692)))) % 40.01/40.20 (step @p4027 :rule chain_m_resolution :premises (@p4026 @p4024 @p669 @p667 @p136 @p134 @p4023 @p4021 @p133 @p131 @p130 @p128 @p127 @p125 @p4020 @p4018 @p110) :args ((or @t3687 @t239) @t267 (@list @t3692 @t726 @t728 @t248 @t249 @t715 @t3690 @t245 @t247 @t242 @t243 @t240 @t241 @t3686 @t3688 @t220))) % 40.01/40.20 (step @p4028 :rule instantiate :premises (@p119) :args (@t3689)) % 40.01/40.20 (step @p4029 :rule cnf_or_pos :args (@t3694)) % 40.01/40.20 (step @p4030 :rule reordering :premises (@p4029) :args ((or @t270 @t3687 @t3693 @t3440 (not @t3694)))) % 40.01/40.20 (step @p4031 :rule instantiate :premises (@p120) :args (@t712)) % 40.01/40.20 (step @p4032 :rule cnf_or_pos :args (@t3697)) % 40.01/40.20 (step @p4033 :rule reordering :premises (@p4032) :args ((or @t3696 @t3695 @t713 (not @t3697)))) % 40.01/40.20 (step @p4034 :rule instantiate :premises (@p121) :args (@t711)) % 40.01/40.20 (step @p4035 :rule cnf_or_pos :args (@t3699)) % 40.01/40.20 (step @p4036 :rule reordering :premises (@p4035) :args ((or @t721 @t3678 @t3698 (not @t3699)))) % 40.01/40.20 (step @p4037 :rule chain_m_resolution :premises (@p3844 @p3842 @p90 @p3841 @p3839 @p448 @p3817 @p3815 @p419 @p3868 @p3866 @p89 @p3820 @p3818 @p91 @p3865 @p3863 @p477 @p3793 @p3791 @p390 @p3892 @p3890 @p88 @p3796 @p3794 @p92 @p3889 @p3887 @p506 @p3769 @p3767 @p361 @p3916 @p3914 @p87 @p3772 @p3770 @p93 @p3913 @p3911 @p535 @p3745 @p3743 @p332 @p3940 @p3938 @p86 @p3748 @p3746 @p94 @p3937 @p3935 @p564 @p3721 @p3719 @p303 @p3964 @p3962 @p85 @p3724 @p3722 @p95 @p3961 @p3959 @p593 @p3697 @p3695 @p274 @p3988 @p3986 @p84 @p3700 @p3698 @p96 @p3985 @p3983 @p622 @p3673 @p3671 @p245 @p4012 @p4010 @p83 @p3676 @p3674 @p97 @p4009 @p4007 @p651 @p3649 @p3647 @p216 @p4036 @p4034 @p82 @p3652 @p3650 @p98 @p4033 @p4031 @p680 @p3628 @p3626 @p187 @p4030 @p4028 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4027) :args (@t3687 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3579 @t90 @t3576 @t3577 @t505 @t3558 @t3562 @t479 @t3573 @t3594 @t89 @t3561 @t3564 @t91 @t3591 @t3592 @t531 @t3543 @t3547 @t453 @t3588 @t3609 @t88 @t3546 @t3549 @t92 @t3606 @t3607 @t557 @t3528 @t3532 @t427 @t3603 @t3624 @t87 @t3531 @t3534 @t93 @t3621 @t3622 @t583 @t3513 @t3517 @t401 @t3618 @t3639 @t86 @t3516 @t3519 @t94 @t3636 @t3637 @t609 @t3498 @t3502 @t375 @t3633 @t3654 @t85 @t3501 @t3504 @t95 @t3651 @t3652 @t635 @t3483 @t3487 @t349 @t3648 @t3669 @t84 @t3486 @t3489 @t96 @t3666 @t3667 @t661 @t3468 @t3472 @t323 @t3663 @t3684 @t83 @t3471 @t3474 @t97 @t3681 @t3682 @t687 @t3453 @t3457 @t297 @t3678 @t3699 @t82 @t3456 @t3459 @t98 @t3696 @t3697 @t713 @t3441 @t3444 @t276 @t3693 @t3694 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6059 @t220) % 40.01/40.20 (step @p4039 :rule instantiate :premises (@p110) :args (@t3700)) % 40.01/40.20 (step-pop @p6060 :rule scope :premises (@p4039)) % 40.01/40.20 (step @p4040 :rule process_scope :premises (@p6060) :args (@t3703)) % 40.01/40.20 (step @p4042 :rule implies_elim :premises (@p4040)) % 40.01/40.20 (step @p4043 :rule cnf_or_pos :args (@t3703)) % 40.01/40.20 (step @p4044 :rule reordering :premises (@p4043) :args ((or @t3702 @t3701 (not @t3703)))) % 40.01/40.20 (step @p4045 :rule instantiate :premises (@p112) :args (@t3704)) % 40.01/40.20 (step @p4046 :rule cnf_or_pos :args (@t3705)) % 40.01/40.20 (step @p4047 :rule reordering :premises (@p4046) :args ((or @t3702 @t244 @t741 (not @t3705)))) % 40.01/40.20 (step @p4048 :rule instantiate :premises (@p108) :args (@t3700)) % 40.01/40.20 (step @p4049 :rule cnf_or_pos :args (@t3707)) % 40.01/40.20 (step @p4050 :rule reordering :premises (@p4049) :args ((or @t752 @t265 @t264 @t3706 (not @t3707)))) % 40.01/40.20 (step @p4051 :rule chain_m_resolution :premises (@p4050 @p4048 @p698 @p696 @p136 @p134 @p4047 @p4045 @p133 @p131 @p130 @p128 @p127 @p125 @p4044 @p4042 @p110) :args ((or @t3702 @t239) @t267 (@list @t3707 @t752 @t754 @t248 @t249 @t741 @t3705 @t245 @t247 @t242 @t243 @t240 @t241 @t3701 @t3703 @t220))) % 40.01/40.20 (step @p4052 :rule instantiate :premises (@p119) :args (@t3704)) % 40.01/40.20 (step @p4053 :rule cnf_or_pos :args (@t3709)) % 40.01/40.20 (step @p4054 :rule reordering :premises (@p4053) :args ((or @t270 @t3702 @t3708 @t3440 (not @t3709)))) % 40.01/40.20 (step @p4055 :rule instantiate :premises (@p120) :args (@t738)) % 40.01/40.20 (step @p4056 :rule cnf_or_pos :args (@t3712)) % 40.01/40.20 (step @p4057 :rule reordering :premises (@p4056) :args ((or @t3711 @t3710 @t739 (not @t3712)))) % 40.01/40.20 (step @p4058 :rule instantiate :premises (@p121) :args (@t737)) % 40.01/40.20 (step @p4059 :rule cnf_or_pos :args (@t3714)) % 40.01/40.20 (step @p4060 :rule reordering :premises (@p4059) :args ((or @t747 @t3693 @t3713 (not @t3714)))) % 40.01/40.20 (step @p4061 :rule chain_m_resolution :premises (@p3841 @p3839 @p448 @p3868 @p3866 @p89 @p3844 @p3842 @p90 @p3865 @p3863 @p477 @p3817 @p3815 @p419 @p3892 @p3890 @p88 @p3820 @p3818 @p91 @p3889 @p3887 @p506 @p3793 @p3791 @p390 @p3916 @p3914 @p87 @p3796 @p3794 @p92 @p3913 @p3911 @p535 @p3769 @p3767 @p361 @p3940 @p3938 @p86 @p3772 @p3770 @p93 @p3937 @p3935 @p564 @p3745 @p3743 @p332 @p3964 @p3962 @p85 @p3748 @p3746 @p94 @p3961 @p3959 @p593 @p3721 @p3719 @p303 @p3988 @p3986 @p84 @p3724 @p3722 @p95 @p3985 @p3983 @p622 @p3697 @p3695 @p274 @p4012 @p4010 @p83 @p3700 @p3698 @p96 @p4009 @p4007 @p651 @p3673 @p3671 @p245 @p4036 @p4034 @p82 @p3676 @p3674 @p97 @p4033 @p4031 @p680 @p3649 @p3647 @p216 @p4060 @p4058 @p81 @p3652 @p3650 @p98 @p4057 @p4055 @p709 @p3628 @p3626 @p187 @p4054 @p4052 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4051) :args (@t3702 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3577 @t505 @t3573 @t3594 @t89 @t3576 @t3579 @t90 @t3591 @t3592 @t531 @t3558 @t3562 @t479 @t3588 @t3609 @t88 @t3561 @t3564 @t91 @t3606 @t3607 @t557 @t3543 @t3547 @t453 @t3603 @t3624 @t87 @t3546 @t3549 @t92 @t3621 @t3622 @t583 @t3528 @t3532 @t427 @t3618 @t3639 @t86 @t3531 @t3534 @t93 @t3636 @t3637 @t609 @t3513 @t3517 @t401 @t3633 @t3654 @t85 @t3516 @t3519 @t94 @t3651 @t3652 @t635 @t3498 @t3502 @t375 @t3648 @t3669 @t84 @t3501 @t3504 @t95 @t3666 @t3667 @t661 @t3483 @t3487 @t349 @t3663 @t3684 @t83 @t3486 @t3489 @t96 @t3681 @t3682 @t687 @t3468 @t3472 @t323 @t3678 @t3699 @t82 @t3471 @t3474 @t97 @t3696 @t3697 @t713 @t3453 @t3457 @t297 @t3693 @t3714 @t81 @t3456 @t3459 @t98 @t3711 @t3712 @t739 @t3441 @t3444 @t276 @t3708 @t3709 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6061 @t220) % 40.01/40.20 (step @p4063 :rule instantiate :premises (@p110) :args (@t3715)) % 40.01/40.20 (step-pop @p6062 :rule scope :premises (@p4063)) % 40.01/40.20 (step @p4064 :rule process_scope :premises (@p6062) :args (@t3718)) % 40.01/40.20 (step @p4066 :rule implies_elim :premises (@p4064)) % 40.01/40.20 (step @p4067 :rule cnf_or_pos :args (@t3718)) % 40.01/40.20 (step @p4068 :rule reordering :premises (@p4067) :args ((or @t3717 @t3716 (not @t3718)))) % 40.01/40.20 (step @p4069 :rule instantiate :premises (@p112) :args (@t3719)) % 40.01/40.20 (step @p4070 :rule cnf_or_pos :args (@t3720)) % 40.01/40.20 (step @p4071 :rule reordering :premises (@p4070) :args ((or @t3717 @t244 @t767 (not @t3720)))) % 40.01/40.20 (step @p4072 :rule instantiate :premises (@p108) :args (@t3715)) % 40.01/40.20 (step @p4073 :rule cnf_or_pos :args (@t3722)) % 40.01/40.20 (step @p4074 :rule reordering :premises (@p4073) :args ((or @t778 @t265 @t264 @t3721 (not @t3722)))) % 40.01/40.20 (step @p4075 :rule chain_m_resolution :premises (@p4074 @p4072 @p727 @p725 @p136 @p134 @p4071 @p4069 @p133 @p131 @p130 @p128 @p127 @p125 @p4068 @p4066 @p110) :args ((or @t3717 @t239) @t267 (@list @t3722 @t778 @t780 @t248 @t249 @t767 @t3720 @t245 @t247 @t242 @t243 @t240 @t241 @t3716 @t3718 @t220))) % 40.01/40.20 (step @p4076 :rule instantiate :premises (@p119) :args (@t3719)) % 40.01/40.20 (step @p4077 :rule cnf_or_pos :args (@t3724)) % 40.01/40.20 (step @p4078 :rule reordering :premises (@p4077) :args ((or @t270 @t3717 @t3723 @t3440 (not @t3724)))) % 40.01/40.20 (step @p4079 :rule instantiate :premises (@p120) :args (@t764)) % 40.01/40.20 (step @p4080 :rule cnf_or_pos :args (@t3727)) % 40.01/40.20 (step @p4081 :rule reordering :premises (@p4080) :args ((or @t3726 @t3725 @t765 (not @t3727)))) % 40.01/40.20 (step @p4082 :rule instantiate :premises (@p121) :args (@t763)) % 40.01/40.20 (step @p4083 :rule cnf_or_pos :args (@t3729)) % 40.01/40.20 (step @p4084 :rule reordering :premises (@p4083) :args ((or @t773 @t3708 @t3728 (not @t3729)))) % 40.01/40.20 (step @p4085 :rule chain_m_resolution :premises (@p3868 @p3866 @p89 @p3865 @p3863 @p477 @p3841 @p3839 @p448 @p3892 @p3890 @p88 @p3844 @p3842 @p90 @p3889 @p3887 @p506 @p3817 @p3815 @p419 @p3916 @p3914 @p87 @p3820 @p3818 @p91 @p3913 @p3911 @p535 @p3793 @p3791 @p390 @p3940 @p3938 @p86 @p3796 @p3794 @p92 @p3937 @p3935 @p564 @p3769 @p3767 @p361 @p3964 @p3962 @p85 @p3772 @p3770 @p93 @p3961 @p3959 @p593 @p3745 @p3743 @p332 @p3988 @p3986 @p84 @p3748 @p3746 @p94 @p3985 @p3983 @p622 @p3721 @p3719 @p303 @p4012 @p4010 @p83 @p3724 @p3722 @p95 @p4009 @p4007 @p651 @p3697 @p3695 @p274 @p4036 @p4034 @p82 @p3700 @p3698 @p96 @p4033 @p4031 @p680 @p3673 @p3671 @p245 @p4060 @p4058 @p81 @p3676 @p3674 @p97 @p4057 @p4055 @p709 @p3649 @p3647 @p216 @p4084 @p4082 @p80 @p3652 @p3650 @p98 @p4081 @p4079 @p738 @p3628 @p3626 @p187 @p4078 @p4076 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4075) :args (@t3717 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3594 @t89 @t3591 @t3592 @t531 @t3573 @t3577 @t505 @t3588 @t3609 @t88 @t3576 @t3579 @t90 @t3606 @t3607 @t557 @t3558 @t3562 @t479 @t3603 @t3624 @t87 @t3561 @t3564 @t91 @t3621 @t3622 @t583 @t3543 @t3547 @t453 @t3618 @t3639 @t86 @t3546 @t3549 @t92 @t3636 @t3637 @t609 @t3528 @t3532 @t427 @t3633 @t3654 @t85 @t3531 @t3534 @t93 @t3651 @t3652 @t635 @t3513 @t3517 @t401 @t3648 @t3669 @t84 @t3516 @t3519 @t94 @t3666 @t3667 @t661 @t3498 @t3502 @t375 @t3663 @t3684 @t83 @t3501 @t3504 @t95 @t3681 @t3682 @t687 @t3483 @t3487 @t349 @t3678 @t3699 @t82 @t3486 @t3489 @t96 @t3696 @t3697 @t713 @t3468 @t3472 @t323 @t3693 @t3714 @t81 @t3471 @t3474 @t97 @t3711 @t3712 @t739 @t3453 @t3457 @t297 @t3708 @t3729 @t80 @t3456 @t3459 @t98 @t3726 @t3727 @t765 @t3441 @t3444 @t276 @t3723 @t3724 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6063 @t220) % 40.01/40.20 (step @p4087 :rule instantiate :premises (@p110) :args (@t3730)) % 40.01/40.20 (step-pop @p6064 :rule scope :premises (@p4087)) % 40.01/40.20 (step @p4088 :rule process_scope :premises (@p6064) :args (@t3733)) % 40.01/40.20 (step @p4090 :rule implies_elim :premises (@p4088)) % 40.01/40.20 (step @p4091 :rule cnf_or_pos :args (@t3733)) % 40.01/40.20 (step @p4092 :rule reordering :premises (@p4091) :args ((or @t3732 @t3731 (not @t3733)))) % 40.01/40.20 (step @p4093 :rule instantiate :premises (@p112) :args (@t3734)) % 40.01/40.20 (step @p4094 :rule cnf_or_pos :args (@t3735)) % 40.01/40.20 (step @p4095 :rule reordering :premises (@p4094) :args ((or @t3732 @t244 @t793 (not @t3735)))) % 40.01/40.20 (step @p4096 :rule instantiate :premises (@p108) :args (@t3730)) % 40.01/40.20 (step @p4097 :rule cnf_or_pos :args (@t3737)) % 40.01/40.20 (step @p4098 :rule reordering :premises (@p4097) :args ((or @t804 @t265 @t264 @t3736 (not @t3737)))) % 40.01/40.20 (step @p4099 :rule chain_m_resolution :premises (@p4098 @p4096 @p756 @p754 @p136 @p134 @p4095 @p4093 @p133 @p131 @p130 @p128 @p127 @p125 @p4092 @p4090 @p110) :args ((or @t3732 @t239) @t267 (@list @t3737 @t804 @t806 @t248 @t249 @t793 @t3735 @t245 @t247 @t242 @t243 @t240 @t241 @t3731 @t3733 @t220))) % 40.01/40.20 (step @p4100 :rule instantiate :premises (@p119) :args (@t3734)) % 40.01/40.20 (step @p4101 :rule cnf_or_pos :args (@t3739)) % 40.01/40.20 (step @p4102 :rule reordering :premises (@p4101) :args ((or @t270 @t3732 @t3738 @t3440 (not @t3739)))) % 40.01/40.20 (step @p4103 :rule instantiate :premises (@p120) :args (@t790)) % 40.01/40.20 (step @p4104 :rule cnf_or_pos :args (@t3742)) % 40.01/40.20 (step @p4105 :rule reordering :premises (@p4104) :args ((or @t3741 @t3740 @t791 (not @t3742)))) % 40.01/40.20 (step @p4106 :rule instantiate :premises (@p121) :args (@t789)) % 40.01/40.20 (step @p4107 :rule cnf_or_pos :args (@t3744)) % 40.01/40.20 (step @p4108 :rule reordering :premises (@p4107) :args ((or @t799 @t3723 @t3743 (not @t3744)))) % 40.01/40.20 (step @p4109 :rule chain_m_resolution :premises (@p3865 @p3863 @p477 @p3892 @p3890 @p88 @p3868 @p3866 @p89 @p3889 @p3887 @p506 @p3841 @p3839 @p448 @p3916 @p3914 @p87 @p3844 @p3842 @p90 @p3913 @p3911 @p535 @p3817 @p3815 @p419 @p3940 @p3938 @p86 @p3820 @p3818 @p91 @p3937 @p3935 @p564 @p3793 @p3791 @p390 @p3964 @p3962 @p85 @p3796 @p3794 @p92 @p3961 @p3959 @p593 @p3769 @p3767 @p361 @p3988 @p3986 @p84 @p3772 @p3770 @p93 @p3985 @p3983 @p622 @p3745 @p3743 @p332 @p4012 @p4010 @p83 @p3748 @p3746 @p94 @p4009 @p4007 @p651 @p3721 @p3719 @p303 @p4036 @p4034 @p82 @p3724 @p3722 @p95 @p4033 @p4031 @p680 @p3697 @p3695 @p274 @p4060 @p4058 @p81 @p3700 @p3698 @p96 @p4057 @p4055 @p709 @p3673 @p3671 @p245 @p4084 @p4082 @p80 @p3676 @p3674 @p97 @p4081 @p4079 @p738 @p3649 @p3647 @p216 @p4108 @p4106 @p79 @p3652 @p3650 @p98 @p4105 @p4103 @p767 @p3628 @p3626 @p187 @p4102 @p4100 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4099) :args (@t3732 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3592 @t531 @t3588 @t3609 @t88 @t3591 @t3594 @t89 @t3606 @t3607 @t557 @t3573 @t3577 @t505 @t3603 @t3624 @t87 @t3576 @t3579 @t90 @t3621 @t3622 @t583 @t3558 @t3562 @t479 @t3618 @t3639 @t86 @t3561 @t3564 @t91 @t3636 @t3637 @t609 @t3543 @t3547 @t453 @t3633 @t3654 @t85 @t3546 @t3549 @t92 @t3651 @t3652 @t635 @t3528 @t3532 @t427 @t3648 @t3669 @t84 @t3531 @t3534 @t93 @t3666 @t3667 @t661 @t3513 @t3517 @t401 @t3663 @t3684 @t83 @t3516 @t3519 @t94 @t3681 @t3682 @t687 @t3498 @t3502 @t375 @t3678 @t3699 @t82 @t3501 @t3504 @t95 @t3696 @t3697 @t713 @t3483 @t3487 @t349 @t3693 @t3714 @t81 @t3486 @t3489 @t96 @t3711 @t3712 @t739 @t3468 @t3472 @t323 @t3708 @t3729 @t80 @t3471 @t3474 @t97 @t3726 @t3727 @t765 @t3453 @t3457 @t297 @t3723 @t3744 @t79 @t3456 @t3459 @t98 @t3741 @t3742 @t791 @t3441 @t3444 @t276 @t3738 @t3739 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6065 @t220) % 40.01/40.20 (step @p4111 :rule instantiate :premises (@p110) :args (@t3745)) % 40.01/40.20 (step-pop @p6066 :rule scope :premises (@p4111)) % 40.01/40.20 (step @p4112 :rule process_scope :premises (@p6066) :args (@t3748)) % 40.01/40.20 (step @p4114 :rule implies_elim :premises (@p4112)) % 40.01/40.20 (step @p4115 :rule cnf_or_pos :args (@t3748)) % 40.01/40.20 (step @p4116 :rule reordering :premises (@p4115) :args ((or @t3747 @t3746 (not @t3748)))) % 40.01/40.20 (step @p4117 :rule instantiate :premises (@p112) :args (@t3749)) % 40.01/40.20 (step @p4118 :rule cnf_or_pos :args (@t3750)) % 40.01/40.20 (step @p4119 :rule reordering :premises (@p4118) :args ((or @t3747 @t244 @t819 (not @t3750)))) % 40.01/40.20 (step @p4120 :rule instantiate :premises (@p108) :args (@t3745)) % 40.01/40.20 (step @p4121 :rule cnf_or_pos :args (@t3752)) % 40.01/40.20 (step @p4122 :rule reordering :premises (@p4121) :args ((or @t830 @t265 @t264 @t3751 (not @t3752)))) % 40.01/40.20 (step @p4123 :rule chain_m_resolution :premises (@p4122 @p4120 @p785 @p783 @p136 @p134 @p4119 @p4117 @p133 @p131 @p130 @p128 @p127 @p125 @p4116 @p4114 @p110) :args ((or @t3747 @t239) @t267 (@list @t3752 @t830 @t832 @t248 @t249 @t819 @t3750 @t245 @t247 @t242 @t243 @t240 @t241 @t3746 @t3748 @t220))) % 40.01/40.20 (step @p4124 :rule instantiate :premises (@p119) :args (@t3749)) % 40.01/40.20 (step @p4125 :rule cnf_or_pos :args (@t3754)) % 40.01/40.20 (step @p4126 :rule reordering :premises (@p4125) :args ((or @t270 @t3747 @t3753 @t3440 (not @t3754)))) % 40.01/40.20 (step @p4127 :rule instantiate :premises (@p120) :args (@t816)) % 40.01/40.20 (step @p4128 :rule cnf_or_pos :args (@t3757)) % 40.01/40.20 (step @p4129 :rule reordering :premises (@p4128) :args ((or @t3756 @t3755 @t817 (not @t3757)))) % 40.01/40.20 (step @p4130 :rule instantiate :premises (@p121) :args (@t815)) % 40.01/40.20 (step @p4131 :rule cnf_or_pos :args (@t3759)) % 40.01/40.20 (step @p4132 :rule reordering :premises (@p4131) :args ((or @t825 @t3738 @t3758 (not @t3759)))) % 40.01/40.20 (step @p4133 :rule chain_m_resolution :premises (@p3892 @p3890 @p88 @p3889 @p3887 @p506 @p3865 @p3863 @p477 @p3916 @p3914 @p87 @p3868 @p3866 @p89 @p3913 @p3911 @p535 @p3841 @p3839 @p448 @p3940 @p3938 @p86 @p3844 @p3842 @p90 @p3937 @p3935 @p564 @p3817 @p3815 @p419 @p3964 @p3962 @p85 @p3820 @p3818 @p91 @p3961 @p3959 @p593 @p3793 @p3791 @p390 @p3988 @p3986 @p84 @p3796 @p3794 @p92 @p3985 @p3983 @p622 @p3769 @p3767 @p361 @p4012 @p4010 @p83 @p3772 @p3770 @p93 @p4009 @p4007 @p651 @p3745 @p3743 @p332 @p4036 @p4034 @p82 @p3748 @p3746 @p94 @p4033 @p4031 @p680 @p3721 @p3719 @p303 @p4060 @p4058 @p81 @p3724 @p3722 @p95 @p4057 @p4055 @p709 @p3697 @p3695 @p274 @p4084 @p4082 @p80 @p3700 @p3698 @p96 @p4081 @p4079 @p738 @p3673 @p3671 @p245 @p4108 @p4106 @p79 @p3676 @p3674 @p97 @p4105 @p4103 @p767 @p3649 @p3647 @p216 @p4132 @p4130 @p78 @p3652 @p3650 @p98 @p4129 @p4127 @p796 @p3628 @p3626 @p187 @p4126 @p4124 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4123) :args (@t3747 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3609 @t88 @t3606 @t3607 @t557 @t3588 @t3592 @t531 @t3603 @t3624 @t87 @t3591 @t3594 @t89 @t3621 @t3622 @t583 @t3573 @t3577 @t505 @t3618 @t3639 @t86 @t3576 @t3579 @t90 @t3636 @t3637 @t609 @t3558 @t3562 @t479 @t3633 @t3654 @t85 @t3561 @t3564 @t91 @t3651 @t3652 @t635 @t3543 @t3547 @t453 @t3648 @t3669 @t84 @t3546 @t3549 @t92 @t3666 @t3667 @t661 @t3528 @t3532 @t427 @t3663 @t3684 @t83 @t3531 @t3534 @t93 @t3681 @t3682 @t687 @t3513 @t3517 @t401 @t3678 @t3699 @t82 @t3516 @t3519 @t94 @t3696 @t3697 @t713 @t3498 @t3502 @t375 @t3693 @t3714 @t81 @t3501 @t3504 @t95 @t3711 @t3712 @t739 @t3483 @t3487 @t349 @t3708 @t3729 @t80 @t3486 @t3489 @t96 @t3726 @t3727 @t765 @t3468 @t3472 @t323 @t3723 @t3744 @t79 @t3471 @t3474 @t97 @t3741 @t3742 @t791 @t3453 @t3457 @t297 @t3738 @t3759 @t78 @t3456 @t3459 @t98 @t3756 @t3757 @t817 @t3441 @t3444 @t276 @t3753 @t3754 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6067 @t220) % 40.01/40.20 (step @p4135 :rule instantiate :premises (@p110) :args (@t3760)) % 40.01/40.20 (step-pop @p6068 :rule scope :premises (@p4135)) % 40.01/40.20 (step @p4136 :rule process_scope :premises (@p6068) :args (@t3763)) % 40.01/40.20 (step @p4138 :rule implies_elim :premises (@p4136)) % 40.01/40.20 (step @p4139 :rule cnf_or_pos :args (@t3763)) % 40.01/40.20 (step @p4140 :rule reordering :premises (@p4139) :args ((or @t3762 @t3761 (not @t3763)))) % 40.01/40.20 (step @p4141 :rule instantiate :premises (@p112) :args (@t3764)) % 40.01/40.20 (step @p4142 :rule cnf_or_pos :args (@t3765)) % 40.01/40.20 (step @p4143 :rule reordering :premises (@p4142) :args ((or @t3762 @t244 @t845 (not @t3765)))) % 40.01/40.20 (step @p4144 :rule instantiate :premises (@p108) :args (@t3760)) % 40.01/40.20 (step @p4145 :rule cnf_or_pos :args (@t3767)) % 40.01/40.20 (step @p4146 :rule reordering :premises (@p4145) :args ((or @t856 @t265 @t264 @t3766 (not @t3767)))) % 40.01/40.20 (step @p4147 :rule chain_m_resolution :premises (@p4146 @p4144 @p814 @p812 @p136 @p134 @p4143 @p4141 @p133 @p131 @p130 @p128 @p127 @p125 @p4140 @p4138 @p110) :args ((or @t3762 @t239) @t267 (@list @t3767 @t856 @t858 @t248 @t249 @t845 @t3765 @t245 @t247 @t242 @t243 @t240 @t241 @t3761 @t3763 @t220))) % 40.01/40.20 (step @p4148 :rule instantiate :premises (@p119) :args (@t3764)) % 40.01/40.20 (step @p4149 :rule cnf_or_pos :args (@t3769)) % 40.01/40.20 (step @p4150 :rule reordering :premises (@p4149) :args ((or @t270 @t3762 @t3768 @t3440 (not @t3769)))) % 40.01/40.20 (step @p4151 :rule instantiate :premises (@p120) :args (@t842)) % 40.01/40.20 (step @p4152 :rule cnf_or_pos :args (@t3772)) % 40.01/40.20 (step @p4153 :rule reordering :premises (@p4152) :args ((or @t3771 @t3770 @t843 (not @t3772)))) % 40.01/40.20 (step @p4154 :rule instantiate :premises (@p121) :args (@t841)) % 40.01/40.20 (step @p4155 :rule cnf_or_pos :args (@t3774)) % 40.01/40.20 (step @p4156 :rule reordering :premises (@p4155) :args ((or @t851 @t3753 @t3773 (not @t3774)))) % 40.01/40.20 (step @p4157 :rule chain_m_resolution :premises (@p3889 @p3887 @p506 @p3916 @p3914 @p87 @p3892 @p3890 @p88 @p3913 @p3911 @p535 @p3865 @p3863 @p477 @p3940 @p3938 @p86 @p3868 @p3866 @p89 @p3937 @p3935 @p564 @p3841 @p3839 @p448 @p3964 @p3962 @p85 @p3844 @p3842 @p90 @p3961 @p3959 @p593 @p3817 @p3815 @p419 @p3988 @p3986 @p84 @p3820 @p3818 @p91 @p3985 @p3983 @p622 @p3793 @p3791 @p390 @p4012 @p4010 @p83 @p3796 @p3794 @p92 @p4009 @p4007 @p651 @p3769 @p3767 @p361 @p4036 @p4034 @p82 @p3772 @p3770 @p93 @p4033 @p4031 @p680 @p3745 @p3743 @p332 @p4060 @p4058 @p81 @p3748 @p3746 @p94 @p4057 @p4055 @p709 @p3721 @p3719 @p303 @p4084 @p4082 @p80 @p3724 @p3722 @p95 @p4081 @p4079 @p738 @p3697 @p3695 @p274 @p4108 @p4106 @p79 @p3700 @p3698 @p96 @p4105 @p4103 @p767 @p3673 @p3671 @p245 @p4132 @p4130 @p78 @p3676 @p3674 @p97 @p4129 @p4127 @p796 @p3649 @p3647 @p216 @p4156 @p4154 @p77 @p3652 @p3650 @p98 @p4153 @p4151 @p825 @p3628 @p3626 @p187 @p4150 @p4148 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4147) :args (@t3762 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3607 @t557 @t3603 @t3624 @t87 @t3606 @t3609 @t88 @t3621 @t3622 @t583 @t3588 @t3592 @t531 @t3618 @t3639 @t86 @t3591 @t3594 @t89 @t3636 @t3637 @t609 @t3573 @t3577 @t505 @t3633 @t3654 @t85 @t3576 @t3579 @t90 @t3651 @t3652 @t635 @t3558 @t3562 @t479 @t3648 @t3669 @t84 @t3561 @t3564 @t91 @t3666 @t3667 @t661 @t3543 @t3547 @t453 @t3663 @t3684 @t83 @t3546 @t3549 @t92 @t3681 @t3682 @t687 @t3528 @t3532 @t427 @t3678 @t3699 @t82 @t3531 @t3534 @t93 @t3696 @t3697 @t713 @t3513 @t3517 @t401 @t3693 @t3714 @t81 @t3516 @t3519 @t94 @t3711 @t3712 @t739 @t3498 @t3502 @t375 @t3708 @t3729 @t80 @t3501 @t3504 @t95 @t3726 @t3727 @t765 @t3483 @t3487 @t349 @t3723 @t3744 @t79 @t3486 @t3489 @t96 @t3741 @t3742 @t791 @t3468 @t3472 @t323 @t3738 @t3759 @t78 @t3471 @t3474 @t97 @t3756 @t3757 @t817 @t3453 @t3457 @t297 @t3753 @t3774 @t77 @t3456 @t3459 @t98 @t3771 @t3772 @t843 @t3441 @t3444 @t276 @t3768 @t3769 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6069 @t220) % 40.01/40.20 (step @p4159 :rule instantiate :premises (@p110) :args (@t3775)) % 40.01/40.20 (step-pop @p6070 :rule scope :premises (@p4159)) % 40.01/40.20 (step @p4160 :rule process_scope :premises (@p6070) :args (@t3778)) % 40.01/40.20 (step @p4162 :rule implies_elim :premises (@p4160)) % 40.01/40.20 (step @p4163 :rule cnf_or_pos :args (@t3778)) % 40.01/40.20 (step @p4164 :rule reordering :premises (@p4163) :args ((or @t3777 @t3776 (not @t3778)))) % 40.01/40.20 (step @p4165 :rule instantiate :premises (@p112) :args (@t3779)) % 40.01/40.20 (step @p4166 :rule cnf_or_pos :args (@t3780)) % 40.01/40.20 (step @p4167 :rule reordering :premises (@p4166) :args ((or @t3777 @t244 @t871 (not @t3780)))) % 40.01/40.20 (step @p4168 :rule instantiate :premises (@p108) :args (@t3775)) % 40.01/40.20 (step @p4169 :rule cnf_or_pos :args (@t3782)) % 40.01/40.20 (step @p4170 :rule reordering :premises (@p4169) :args ((or @t882 @t265 @t264 @t3781 (not @t3782)))) % 40.01/40.20 (step @p4171 :rule chain_m_resolution :premises (@p4170 @p4168 @p843 @p841 @p136 @p134 @p4167 @p4165 @p133 @p131 @p130 @p128 @p127 @p125 @p4164 @p4162 @p110) :args ((or @t3777 @t239) @t267 (@list @t3782 @t882 @t884 @t248 @t249 @t871 @t3780 @t245 @t247 @t242 @t243 @t240 @t241 @t3776 @t3778 @t220))) % 40.01/40.20 (step @p4172 :rule instantiate :premises (@p119) :args (@t3779)) % 40.01/40.20 (step @p4173 :rule cnf_or_pos :args (@t3784)) % 40.01/40.20 (step @p4174 :rule reordering :premises (@p4173) :args ((or @t270 @t3777 @t3783 @t3440 (not @t3784)))) % 40.01/40.20 (step @p4175 :rule instantiate :premises (@p120) :args (@t868)) % 40.01/40.20 (step @p4176 :rule cnf_or_pos :args (@t3787)) % 40.01/40.20 (step @p4177 :rule reordering :premises (@p4176) :args ((or @t3786 @t3785 @t869 (not @t3787)))) % 40.01/40.20 (step @p4178 :rule instantiate :premises (@p121) :args (@t867)) % 40.01/40.20 (step @p4179 :rule cnf_or_pos :args (@t3789)) % 40.01/40.20 (step @p4180 :rule reordering :premises (@p4179) :args ((or @t877 @t3768 @t3788 (not @t3789)))) % 40.01/40.20 (step @p4181 :rule chain_m_resolution :premises (@p3916 @p3914 @p87 @p3913 @p3911 @p535 @p3889 @p3887 @p506 @p3940 @p3938 @p86 @p3892 @p3890 @p88 @p3937 @p3935 @p564 @p3865 @p3863 @p477 @p3964 @p3962 @p85 @p3868 @p3866 @p89 @p3961 @p3959 @p593 @p3841 @p3839 @p448 @p3988 @p3986 @p84 @p3844 @p3842 @p90 @p3985 @p3983 @p622 @p3817 @p3815 @p419 @p4012 @p4010 @p83 @p3820 @p3818 @p91 @p4009 @p4007 @p651 @p3793 @p3791 @p390 @p4036 @p4034 @p82 @p3796 @p3794 @p92 @p4033 @p4031 @p680 @p3769 @p3767 @p361 @p4060 @p4058 @p81 @p3772 @p3770 @p93 @p4057 @p4055 @p709 @p3745 @p3743 @p332 @p4084 @p4082 @p80 @p3748 @p3746 @p94 @p4081 @p4079 @p738 @p3721 @p3719 @p303 @p4108 @p4106 @p79 @p3724 @p3722 @p95 @p4105 @p4103 @p767 @p3697 @p3695 @p274 @p4132 @p4130 @p78 @p3700 @p3698 @p96 @p4129 @p4127 @p796 @p3673 @p3671 @p245 @p4156 @p4154 @p77 @p3676 @p3674 @p97 @p4153 @p4151 @p825 @p3649 @p3647 @p216 @p4180 @p4178 @p76 @p3652 @p3650 @p98 @p4177 @p4175 @p854 @p3628 @p3626 @p187 @p4174 @p4172 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4171) :args (@t3777 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3624 @t87 @t3621 @t3622 @t583 @t3603 @t3607 @t557 @t3618 @t3639 @t86 @t3606 @t3609 @t88 @t3636 @t3637 @t609 @t3588 @t3592 @t531 @t3633 @t3654 @t85 @t3591 @t3594 @t89 @t3651 @t3652 @t635 @t3573 @t3577 @t505 @t3648 @t3669 @t84 @t3576 @t3579 @t90 @t3666 @t3667 @t661 @t3558 @t3562 @t479 @t3663 @t3684 @t83 @t3561 @t3564 @t91 @t3681 @t3682 @t687 @t3543 @t3547 @t453 @t3678 @t3699 @t82 @t3546 @t3549 @t92 @t3696 @t3697 @t713 @t3528 @t3532 @t427 @t3693 @t3714 @t81 @t3531 @t3534 @t93 @t3711 @t3712 @t739 @t3513 @t3517 @t401 @t3708 @t3729 @t80 @t3516 @t3519 @t94 @t3726 @t3727 @t765 @t3498 @t3502 @t375 @t3723 @t3744 @t79 @t3501 @t3504 @t95 @t3741 @t3742 @t791 @t3483 @t3487 @t349 @t3738 @t3759 @t78 @t3486 @t3489 @t96 @t3756 @t3757 @t817 @t3468 @t3472 @t323 @t3753 @t3774 @t77 @t3471 @t3474 @t97 @t3771 @t3772 @t843 @t3453 @t3457 @t297 @t3768 @t3789 @t76 @t3456 @t3459 @t98 @t3786 @t3787 @t869 @t3441 @t3444 @t276 @t3783 @t3784 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6071 @t220) % 40.01/40.20 (step @p4183 :rule instantiate :premises (@p110) :args (@t3790)) % 40.01/40.20 (step-pop @p6072 :rule scope :premises (@p4183)) % 40.01/40.20 (step @p4184 :rule process_scope :premises (@p6072) :args (@t3793)) % 40.01/40.20 (step @p4186 :rule implies_elim :premises (@p4184)) % 40.01/40.20 (step @p4187 :rule cnf_or_pos :args (@t3793)) % 40.01/40.20 (step @p4188 :rule reordering :premises (@p4187) :args ((or @t3792 @t3791 (not @t3793)))) % 40.01/40.20 (step @p4189 :rule instantiate :premises (@p112) :args (@t3794)) % 40.01/40.20 (step @p4190 :rule cnf_or_pos :args (@t3795)) % 40.01/40.20 (step @p4191 :rule reordering :premises (@p4190) :args ((or @t3792 @t244 @t897 (not @t3795)))) % 40.01/40.20 (step @p4192 :rule instantiate :premises (@p108) :args (@t3790)) % 40.01/40.20 (step @p4193 :rule cnf_or_pos :args (@t3797)) % 40.01/40.20 (step @p4194 :rule reordering :premises (@p4193) :args ((or @t908 @t265 @t264 @t3796 (not @t3797)))) % 40.01/40.20 (step @p4195 :rule chain_m_resolution :premises (@p4194 @p4192 @p872 @p870 @p136 @p134 @p4191 @p4189 @p133 @p131 @p130 @p128 @p127 @p125 @p4188 @p4186 @p110) :args ((or @t3792 @t239) @t267 (@list @t3797 @t908 @t910 @t248 @t249 @t897 @t3795 @t245 @t247 @t242 @t243 @t240 @t241 @t3791 @t3793 @t220))) % 40.01/40.20 (step @p4196 :rule instantiate :premises (@p119) :args (@t3794)) % 40.01/40.20 (step @p4197 :rule cnf_or_pos :args (@t3799)) % 40.01/40.20 (step @p4198 :rule reordering :premises (@p4197) :args ((or @t270 @t3792 @t3798 @t3440 (not @t3799)))) % 40.01/40.20 (step @p4199 :rule instantiate :premises (@p120) :args (@t894)) % 40.01/40.20 (step @p4200 :rule cnf_or_pos :args (@t3802)) % 40.01/40.20 (step @p4201 :rule reordering :premises (@p4200) :args ((or @t3801 @t3800 @t895 (not @t3802)))) % 40.01/40.20 (step @p4202 :rule instantiate :premises (@p121) :args (@t893)) % 40.01/40.20 (step @p4203 :rule cnf_or_pos :args (@t3804)) % 40.01/40.20 (step @p4204 :rule reordering :premises (@p4203) :args ((or @t903 @t3783 @t3803 (not @t3804)))) % 40.01/40.20 (step @p4205 :rule chain_m_resolution :premises (@p3913 @p3911 @p535 @p3940 @p3938 @p86 @p3916 @p3914 @p87 @p3937 @p3935 @p564 @p3889 @p3887 @p506 @p3964 @p3962 @p85 @p3892 @p3890 @p88 @p3961 @p3959 @p593 @p3865 @p3863 @p477 @p3988 @p3986 @p84 @p3868 @p3866 @p89 @p3985 @p3983 @p622 @p3841 @p3839 @p448 @p4012 @p4010 @p83 @p3844 @p3842 @p90 @p4009 @p4007 @p651 @p3817 @p3815 @p419 @p4036 @p4034 @p82 @p3820 @p3818 @p91 @p4033 @p4031 @p680 @p3793 @p3791 @p390 @p4060 @p4058 @p81 @p3796 @p3794 @p92 @p4057 @p4055 @p709 @p3769 @p3767 @p361 @p4084 @p4082 @p80 @p3772 @p3770 @p93 @p4081 @p4079 @p738 @p3745 @p3743 @p332 @p4108 @p4106 @p79 @p3748 @p3746 @p94 @p4105 @p4103 @p767 @p3721 @p3719 @p303 @p4132 @p4130 @p78 @p3724 @p3722 @p95 @p4129 @p4127 @p796 @p3697 @p3695 @p274 @p4156 @p4154 @p77 @p3700 @p3698 @p96 @p4153 @p4151 @p825 @p3673 @p3671 @p245 @p4180 @p4178 @p76 @p3676 @p3674 @p97 @p4177 @p4175 @p854 @p3649 @p3647 @p216 @p4204 @p4202 @p75 @p3652 @p3650 @p98 @p4201 @p4199 @p883 @p3628 @p3626 @p187 @p4198 @p4196 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4195) :args (@t3792 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3622 @t583 @t3618 @t3639 @t86 @t3621 @t3624 @t87 @t3636 @t3637 @t609 @t3603 @t3607 @t557 @t3633 @t3654 @t85 @t3606 @t3609 @t88 @t3651 @t3652 @t635 @t3588 @t3592 @t531 @t3648 @t3669 @t84 @t3591 @t3594 @t89 @t3666 @t3667 @t661 @t3573 @t3577 @t505 @t3663 @t3684 @t83 @t3576 @t3579 @t90 @t3681 @t3682 @t687 @t3558 @t3562 @t479 @t3678 @t3699 @t82 @t3561 @t3564 @t91 @t3696 @t3697 @t713 @t3543 @t3547 @t453 @t3693 @t3714 @t81 @t3546 @t3549 @t92 @t3711 @t3712 @t739 @t3528 @t3532 @t427 @t3708 @t3729 @t80 @t3531 @t3534 @t93 @t3726 @t3727 @t765 @t3513 @t3517 @t401 @t3723 @t3744 @t79 @t3516 @t3519 @t94 @t3741 @t3742 @t791 @t3498 @t3502 @t375 @t3738 @t3759 @t78 @t3501 @t3504 @t95 @t3756 @t3757 @t817 @t3483 @t3487 @t349 @t3753 @t3774 @t77 @t3486 @t3489 @t96 @t3771 @t3772 @t843 @t3468 @t3472 @t323 @t3768 @t3789 @t76 @t3471 @t3474 @t97 @t3786 @t3787 @t869 @t3453 @t3457 @t297 @t3783 @t3804 @t75 @t3456 @t3459 @t98 @t3801 @t3802 @t895 @t3441 @t3444 @t276 @t3798 @t3799 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6073 @t220) % 40.01/40.20 (step @p4207 :rule instantiate :premises (@p110) :args (@t3805)) % 40.01/40.20 (step-pop @p6074 :rule scope :premises (@p4207)) % 40.01/40.20 (step @p4208 :rule process_scope :premises (@p6074) :args (@t3808)) % 40.01/40.20 (step @p4210 :rule implies_elim :premises (@p4208)) % 40.01/40.20 (step @p4211 :rule cnf_or_pos :args (@t3808)) % 40.01/40.20 (step @p4212 :rule reordering :premises (@p4211) :args ((or @t3807 @t3806 (not @t3808)))) % 40.01/40.20 (step @p4213 :rule instantiate :premises (@p112) :args (@t3809)) % 40.01/40.20 (step @p4214 :rule cnf_or_pos :args (@t3810)) % 40.01/40.20 (step @p4215 :rule reordering :premises (@p4214) :args ((or @t3807 @t244 @t923 (not @t3810)))) % 40.01/40.20 (step @p4216 :rule instantiate :premises (@p108) :args (@t3805)) % 40.01/40.20 (step @p4217 :rule cnf_or_pos :args (@t3812)) % 40.01/40.20 (step @p4218 :rule reordering :premises (@p4217) :args ((or @t934 @t265 @t264 @t3811 (not @t3812)))) % 40.01/40.20 (step @p4219 :rule chain_m_resolution :premises (@p4218 @p4216 @p901 @p899 @p136 @p134 @p4215 @p4213 @p133 @p131 @p130 @p128 @p127 @p125 @p4212 @p4210 @p110) :args ((or @t3807 @t239) @t267 (@list @t3812 @t934 @t936 @t248 @t249 @t923 @t3810 @t245 @t247 @t242 @t243 @t240 @t241 @t3806 @t3808 @t220))) % 40.01/40.20 (step @p4220 :rule instantiate :premises (@p119) :args (@t3809)) % 40.01/40.20 (step @p4221 :rule cnf_or_pos :args (@t3814)) % 40.01/40.20 (step @p4222 :rule reordering :premises (@p4221) :args ((or @t270 @t3807 @t3813 @t3440 (not @t3814)))) % 40.01/40.20 (step @p4223 :rule instantiate :premises (@p120) :args (@t920)) % 40.01/40.20 (step @p4224 :rule cnf_or_pos :args (@t3817)) % 40.01/40.20 (step @p4225 :rule reordering :premises (@p4224) :args ((or @t3816 @t3815 @t921 (not @t3817)))) % 40.01/40.20 (step @p4226 :rule instantiate :premises (@p121) :args (@t919)) % 40.01/40.20 (step @p4227 :rule cnf_or_pos :args (@t3819)) % 40.01/40.20 (step @p4228 :rule reordering :premises (@p4227) :args ((or @t929 @t3798 @t3818 (not @t3819)))) % 40.01/40.20 (step @p4229 :rule chain_m_resolution :premises (@p3940 @p3938 @p86 @p3937 @p3935 @p564 @p3913 @p3911 @p535 @p3964 @p3962 @p85 @p3916 @p3914 @p87 @p3961 @p3959 @p593 @p3889 @p3887 @p506 @p3988 @p3986 @p84 @p3892 @p3890 @p88 @p3985 @p3983 @p622 @p3865 @p3863 @p477 @p4012 @p4010 @p83 @p3868 @p3866 @p89 @p4009 @p4007 @p651 @p3841 @p3839 @p448 @p4036 @p4034 @p82 @p3844 @p3842 @p90 @p4033 @p4031 @p680 @p3817 @p3815 @p419 @p4060 @p4058 @p81 @p3820 @p3818 @p91 @p4057 @p4055 @p709 @p3793 @p3791 @p390 @p4084 @p4082 @p80 @p3796 @p3794 @p92 @p4081 @p4079 @p738 @p3769 @p3767 @p361 @p4108 @p4106 @p79 @p3772 @p3770 @p93 @p4105 @p4103 @p767 @p3745 @p3743 @p332 @p4132 @p4130 @p78 @p3748 @p3746 @p94 @p4129 @p4127 @p796 @p3721 @p3719 @p303 @p4156 @p4154 @p77 @p3724 @p3722 @p95 @p4153 @p4151 @p825 @p3697 @p3695 @p274 @p4180 @p4178 @p76 @p3700 @p3698 @p96 @p4177 @p4175 @p854 @p3673 @p3671 @p245 @p4204 @p4202 @p75 @p3676 @p3674 @p97 @p4201 @p4199 @p883 @p3649 @p3647 @p216 @p4228 @p4226 @p74 @p3652 @p3650 @p98 @p4225 @p4223 @p912 @p3628 @p3626 @p187 @p4222 @p4220 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4219) :args (@t3807 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3639 @t86 @t3636 @t3637 @t609 @t3618 @t3622 @t583 @t3633 @t3654 @t85 @t3621 @t3624 @t87 @t3651 @t3652 @t635 @t3603 @t3607 @t557 @t3648 @t3669 @t84 @t3606 @t3609 @t88 @t3666 @t3667 @t661 @t3588 @t3592 @t531 @t3663 @t3684 @t83 @t3591 @t3594 @t89 @t3681 @t3682 @t687 @t3573 @t3577 @t505 @t3678 @t3699 @t82 @t3576 @t3579 @t90 @t3696 @t3697 @t713 @t3558 @t3562 @t479 @t3693 @t3714 @t81 @t3561 @t3564 @t91 @t3711 @t3712 @t739 @t3543 @t3547 @t453 @t3708 @t3729 @t80 @t3546 @t3549 @t92 @t3726 @t3727 @t765 @t3528 @t3532 @t427 @t3723 @t3744 @t79 @t3531 @t3534 @t93 @t3741 @t3742 @t791 @t3513 @t3517 @t401 @t3738 @t3759 @t78 @t3516 @t3519 @t94 @t3756 @t3757 @t817 @t3498 @t3502 @t375 @t3753 @t3774 @t77 @t3501 @t3504 @t95 @t3771 @t3772 @t843 @t3483 @t3487 @t349 @t3768 @t3789 @t76 @t3486 @t3489 @t96 @t3786 @t3787 @t869 @t3468 @t3472 @t323 @t3783 @t3804 @t75 @t3471 @t3474 @t97 @t3801 @t3802 @t895 @t3453 @t3457 @t297 @t3798 @t3819 @t74 @t3456 @t3459 @t98 @t3816 @t3817 @t921 @t3441 @t3444 @t276 @t3813 @t3814 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6075 @t220) % 40.01/40.20 (step @p4231 :rule instantiate :premises (@p110) :args (@t3820)) % 40.01/40.20 (step-pop @p6076 :rule scope :premises (@p4231)) % 40.01/40.20 (step @p4232 :rule process_scope :premises (@p6076) :args (@t3823)) % 40.01/40.20 (step @p4234 :rule implies_elim :premises (@p4232)) % 40.01/40.20 (step @p4235 :rule cnf_or_pos :args (@t3823)) % 40.01/40.20 (step @p4236 :rule reordering :premises (@p4235) :args ((or @t3822 @t3821 (not @t3823)))) % 40.01/40.20 (step @p4237 :rule instantiate :premises (@p112) :args (@t3824)) % 40.01/40.20 (step @p4238 :rule cnf_or_pos :args (@t3825)) % 40.01/40.20 (step @p4239 :rule reordering :premises (@p4238) :args ((or @t3822 @t244 @t949 (not @t3825)))) % 40.01/40.20 (step @p4240 :rule instantiate :premises (@p108) :args (@t3820)) % 40.01/40.20 (step @p4241 :rule cnf_or_pos :args (@t3827)) % 40.01/40.20 (step @p4242 :rule reordering :premises (@p4241) :args ((or @t960 @t265 @t264 @t3826 (not @t3827)))) % 40.01/40.20 (step @p4243 :rule chain_m_resolution :premises (@p4242 @p4240 @p930 @p928 @p136 @p134 @p4239 @p4237 @p133 @p131 @p130 @p128 @p127 @p125 @p4236 @p4234 @p110) :args ((or @t3822 @t239) @t267 (@list @t3827 @t960 @t962 @t248 @t249 @t949 @t3825 @t245 @t247 @t242 @t243 @t240 @t241 @t3821 @t3823 @t220))) % 40.01/40.20 (step @p4244 :rule instantiate :premises (@p119) :args (@t3824)) % 40.01/40.20 (step @p4245 :rule cnf_or_pos :args (@t3829)) % 40.01/40.20 (step @p4246 :rule reordering :premises (@p4245) :args ((or @t270 @t3822 @t3828 @t3440 (not @t3829)))) % 40.01/40.20 (step @p4247 :rule instantiate :premises (@p120) :args (@t946)) % 40.01/40.20 (step @p4248 :rule cnf_or_pos :args (@t3832)) % 40.01/40.20 (step @p4249 :rule reordering :premises (@p4248) :args ((or @t3831 @t3830 @t947 (not @t3832)))) % 40.01/40.20 (step @p4250 :rule instantiate :premises (@p121) :args (@t945)) % 40.01/40.20 (step @p4251 :rule cnf_or_pos :args (@t3834)) % 40.01/40.20 (step @p4252 :rule reordering :premises (@p4251) :args ((or @t955 @t3813 @t3833 (not @t3834)))) % 40.01/40.20 (step @p4253 :rule chain_m_resolution :premises (@p3937 @p3935 @p564 @p3964 @p3962 @p85 @p3940 @p3938 @p86 @p3961 @p3959 @p593 @p3913 @p3911 @p535 @p3988 @p3986 @p84 @p3916 @p3914 @p87 @p3985 @p3983 @p622 @p3889 @p3887 @p506 @p4012 @p4010 @p83 @p3892 @p3890 @p88 @p4009 @p4007 @p651 @p3865 @p3863 @p477 @p4036 @p4034 @p82 @p3868 @p3866 @p89 @p4033 @p4031 @p680 @p3841 @p3839 @p448 @p4060 @p4058 @p81 @p3844 @p3842 @p90 @p4057 @p4055 @p709 @p3817 @p3815 @p419 @p4084 @p4082 @p80 @p3820 @p3818 @p91 @p4081 @p4079 @p738 @p3793 @p3791 @p390 @p4108 @p4106 @p79 @p3796 @p3794 @p92 @p4105 @p4103 @p767 @p3769 @p3767 @p361 @p4132 @p4130 @p78 @p3772 @p3770 @p93 @p4129 @p4127 @p796 @p3745 @p3743 @p332 @p4156 @p4154 @p77 @p3748 @p3746 @p94 @p4153 @p4151 @p825 @p3721 @p3719 @p303 @p4180 @p4178 @p76 @p3724 @p3722 @p95 @p4177 @p4175 @p854 @p3697 @p3695 @p274 @p4204 @p4202 @p75 @p3700 @p3698 @p96 @p4201 @p4199 @p883 @p3673 @p3671 @p245 @p4228 @p4226 @p74 @p3676 @p3674 @p97 @p4225 @p4223 @p912 @p3649 @p3647 @p216 @p4252 @p4250 @p73 @p3652 @p3650 @p98 @p4249 @p4247 @p941 @p3628 @p3626 @p187 @p4246 @p4244 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4243) :args (@t3822 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3637 @t609 @t3633 @t3654 @t85 @t3636 @t3639 @t86 @t3651 @t3652 @t635 @t3618 @t3622 @t583 @t3648 @t3669 @t84 @t3621 @t3624 @t87 @t3666 @t3667 @t661 @t3603 @t3607 @t557 @t3663 @t3684 @t83 @t3606 @t3609 @t88 @t3681 @t3682 @t687 @t3588 @t3592 @t531 @t3678 @t3699 @t82 @t3591 @t3594 @t89 @t3696 @t3697 @t713 @t3573 @t3577 @t505 @t3693 @t3714 @t81 @t3576 @t3579 @t90 @t3711 @t3712 @t739 @t3558 @t3562 @t479 @t3708 @t3729 @t80 @t3561 @t3564 @t91 @t3726 @t3727 @t765 @t3543 @t3547 @t453 @t3723 @t3744 @t79 @t3546 @t3549 @t92 @t3741 @t3742 @t791 @t3528 @t3532 @t427 @t3738 @t3759 @t78 @t3531 @t3534 @t93 @t3756 @t3757 @t817 @t3513 @t3517 @t401 @t3753 @t3774 @t77 @t3516 @t3519 @t94 @t3771 @t3772 @t843 @t3498 @t3502 @t375 @t3768 @t3789 @t76 @t3501 @t3504 @t95 @t3786 @t3787 @t869 @t3483 @t3487 @t349 @t3783 @t3804 @t75 @t3486 @t3489 @t96 @t3801 @t3802 @t895 @t3468 @t3472 @t323 @t3798 @t3819 @t74 @t3471 @t3474 @t97 @t3816 @t3817 @t921 @t3453 @t3457 @t297 @t3813 @t3834 @t73 @t3456 @t3459 @t98 @t3831 @t3832 @t947 @t3441 @t3444 @t276 @t3828 @t3829 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6077 @t220) % 40.01/40.20 (step @p4255 :rule instantiate :premises (@p110) :args (@t3835)) % 40.01/40.20 (step-pop @p6078 :rule scope :premises (@p4255)) % 40.01/40.20 (step @p4256 :rule process_scope :premises (@p6078) :args (@t3838)) % 40.01/40.20 (step @p4258 :rule implies_elim :premises (@p4256)) % 40.01/40.20 (step @p4259 :rule cnf_or_pos :args (@t3838)) % 40.01/40.20 (step @p4260 :rule reordering :premises (@p4259) :args ((or @t3837 @t3836 (not @t3838)))) % 40.01/40.20 (step @p4261 :rule instantiate :premises (@p112) :args (@t3839)) % 40.01/40.20 (step @p4262 :rule cnf_or_pos :args (@t3840)) % 40.01/40.20 (step @p4263 :rule reordering :premises (@p4262) :args ((or @t3837 @t244 @t975 (not @t3840)))) % 40.01/40.20 (step @p4264 :rule instantiate :premises (@p108) :args (@t3835)) % 40.01/40.20 (step @p4265 :rule cnf_or_pos :args (@t3842)) % 40.01/40.20 (step @p4266 :rule reordering :premises (@p4265) :args ((or @t986 @t265 @t264 @t3841 (not @t3842)))) % 40.01/40.20 (step @p4267 :rule chain_m_resolution :premises (@p4266 @p4264 @p959 @p957 @p136 @p134 @p4263 @p4261 @p133 @p131 @p130 @p128 @p127 @p125 @p4260 @p4258 @p110) :args ((or @t3837 @t239) @t267 (@list @t3842 @t986 @t988 @t248 @t249 @t975 @t3840 @t245 @t247 @t242 @t243 @t240 @t241 @t3836 @t3838 @t220))) % 40.01/40.20 (step @p4268 :rule instantiate :premises (@p119) :args (@t3839)) % 40.01/40.20 (step @p4269 :rule cnf_or_pos :args (@t3844)) % 40.01/40.20 (step @p4270 :rule reordering :premises (@p4269) :args ((or @t270 @t3837 @t3843 @t3440 (not @t3844)))) % 40.01/40.20 (step @p4271 :rule instantiate :premises (@p120) :args (@t972)) % 40.01/40.20 (step @p4272 :rule cnf_or_pos :args (@t3847)) % 40.01/40.20 (step @p4273 :rule reordering :premises (@p4272) :args ((or @t3846 @t3845 @t973 (not @t3847)))) % 40.01/40.20 (step @p4274 :rule instantiate :premises (@p121) :args (@t971)) % 40.01/40.20 (step @p4275 :rule cnf_or_pos :args (@t3849)) % 40.01/40.20 (step @p4276 :rule reordering :premises (@p4275) :args ((or @t981 @t3828 @t3848 (not @t3849)))) % 40.01/40.20 (step @p4277 :rule chain_m_resolution :premises (@p3964 @p3962 @p85 @p3961 @p3959 @p593 @p3937 @p3935 @p564 @p3988 @p3986 @p84 @p3940 @p3938 @p86 @p3985 @p3983 @p622 @p3913 @p3911 @p535 @p4012 @p4010 @p83 @p3916 @p3914 @p87 @p4009 @p4007 @p651 @p3889 @p3887 @p506 @p4036 @p4034 @p82 @p3892 @p3890 @p88 @p4033 @p4031 @p680 @p3865 @p3863 @p477 @p4060 @p4058 @p81 @p3868 @p3866 @p89 @p4057 @p4055 @p709 @p3841 @p3839 @p448 @p4084 @p4082 @p80 @p3844 @p3842 @p90 @p4081 @p4079 @p738 @p3817 @p3815 @p419 @p4108 @p4106 @p79 @p3820 @p3818 @p91 @p4105 @p4103 @p767 @p3793 @p3791 @p390 @p4132 @p4130 @p78 @p3796 @p3794 @p92 @p4129 @p4127 @p796 @p3769 @p3767 @p361 @p4156 @p4154 @p77 @p3772 @p3770 @p93 @p4153 @p4151 @p825 @p3745 @p3743 @p332 @p4180 @p4178 @p76 @p3748 @p3746 @p94 @p4177 @p4175 @p854 @p3721 @p3719 @p303 @p4204 @p4202 @p75 @p3724 @p3722 @p95 @p4201 @p4199 @p883 @p3697 @p3695 @p274 @p4228 @p4226 @p74 @p3700 @p3698 @p96 @p4225 @p4223 @p912 @p3673 @p3671 @p245 @p4252 @p4250 @p73 @p3676 @p3674 @p97 @p4249 @p4247 @p941 @p3649 @p3647 @p216 @p4276 @p4274 @p72 @p3652 @p3650 @p98 @p4273 @p4271 @p970 @p3628 @p3626 @p187 @p4270 @p4268 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4267) :args (@t3837 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3654 @t85 @t3651 @t3652 @t635 @t3633 @t3637 @t609 @t3648 @t3669 @t84 @t3636 @t3639 @t86 @t3666 @t3667 @t661 @t3618 @t3622 @t583 @t3663 @t3684 @t83 @t3621 @t3624 @t87 @t3681 @t3682 @t687 @t3603 @t3607 @t557 @t3678 @t3699 @t82 @t3606 @t3609 @t88 @t3696 @t3697 @t713 @t3588 @t3592 @t531 @t3693 @t3714 @t81 @t3591 @t3594 @t89 @t3711 @t3712 @t739 @t3573 @t3577 @t505 @t3708 @t3729 @t80 @t3576 @t3579 @t90 @t3726 @t3727 @t765 @t3558 @t3562 @t479 @t3723 @t3744 @t79 @t3561 @t3564 @t91 @t3741 @t3742 @t791 @t3543 @t3547 @t453 @t3738 @t3759 @t78 @t3546 @t3549 @t92 @t3756 @t3757 @t817 @t3528 @t3532 @t427 @t3753 @t3774 @t77 @t3531 @t3534 @t93 @t3771 @t3772 @t843 @t3513 @t3517 @t401 @t3768 @t3789 @t76 @t3516 @t3519 @t94 @t3786 @t3787 @t869 @t3498 @t3502 @t375 @t3783 @t3804 @t75 @t3501 @t3504 @t95 @t3801 @t3802 @t895 @t3483 @t3487 @t349 @t3798 @t3819 @t74 @t3486 @t3489 @t96 @t3816 @t3817 @t921 @t3468 @t3472 @t323 @t3813 @t3834 @t73 @t3471 @t3474 @t97 @t3831 @t3832 @t947 @t3453 @t3457 @t297 @t3828 @t3849 @t72 @t3456 @t3459 @t98 @t3846 @t3847 @t973 @t3441 @t3444 @t276 @t3843 @t3844 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6079 @t220) % 40.01/40.20 (step @p4279 :rule instantiate :premises (@p110) :args (@t3850)) % 40.01/40.20 (step-pop @p6080 :rule scope :premises (@p4279)) % 40.01/40.20 (step @p4280 :rule process_scope :premises (@p6080) :args (@t3853)) % 40.01/40.20 (step @p4282 :rule implies_elim :premises (@p4280)) % 40.01/40.20 (step @p4283 :rule cnf_or_pos :args (@t3853)) % 40.01/40.20 (step @p4284 :rule reordering :premises (@p4283) :args ((or @t3852 @t3851 (not @t3853)))) % 40.01/40.20 (step @p4285 :rule instantiate :premises (@p112) :args (@t3854)) % 40.01/40.20 (step @p4286 :rule cnf_or_pos :args (@t3855)) % 40.01/40.20 (step @p4287 :rule reordering :premises (@p4286) :args ((or @t3852 @t244 @t1001 (not @t3855)))) % 40.01/40.20 (step @p4288 :rule instantiate :premises (@p108) :args (@t3850)) % 40.01/40.20 (step @p4289 :rule cnf_or_pos :args (@t3857)) % 40.01/40.20 (step @p4290 :rule reordering :premises (@p4289) :args ((or @t1012 @t265 @t264 @t3856 (not @t3857)))) % 40.01/40.20 (step @p4291 :rule chain_m_resolution :premises (@p4290 @p4288 @p988 @p986 @p136 @p134 @p4287 @p4285 @p133 @p131 @p130 @p128 @p127 @p125 @p4284 @p4282 @p110) :args ((or @t3852 @t239) @t267 (@list @t3857 @t1012 @t1014 @t248 @t249 @t1001 @t3855 @t245 @t247 @t242 @t243 @t240 @t241 @t3851 @t3853 @t220))) % 40.01/40.20 (step @p4292 :rule instantiate :premises (@p119) :args (@t3854)) % 40.01/40.20 (step @p4293 :rule cnf_or_pos :args (@t3859)) % 40.01/40.20 (step @p4294 :rule reordering :premises (@p4293) :args ((or @t270 @t3852 @t3858 @t3440 (not @t3859)))) % 40.01/40.20 (step @p4295 :rule instantiate :premises (@p120) :args (@t998)) % 40.01/40.20 (step @p4296 :rule cnf_or_pos :args (@t3862)) % 40.01/40.20 (step @p4297 :rule reordering :premises (@p4296) :args ((or @t3861 @t3860 @t999 (not @t3862)))) % 40.01/40.20 (step @p4298 :rule instantiate :premises (@p121) :args (@t997)) % 40.01/40.20 (step @p4299 :rule cnf_or_pos :args (@t3864)) % 40.01/40.20 (step @p4300 :rule reordering :premises (@p4299) :args ((or @t1007 @t3843 @t3863 (not @t3864)))) % 40.01/40.20 (step @p4301 :rule chain_m_resolution :premises (@p3961 @p3959 @p593 @p3988 @p3986 @p84 @p3964 @p3962 @p85 @p3985 @p3983 @p622 @p3937 @p3935 @p564 @p4012 @p4010 @p83 @p3940 @p3938 @p86 @p4009 @p4007 @p651 @p3913 @p3911 @p535 @p4036 @p4034 @p82 @p3916 @p3914 @p87 @p4033 @p4031 @p680 @p3889 @p3887 @p506 @p4060 @p4058 @p81 @p3892 @p3890 @p88 @p4057 @p4055 @p709 @p3865 @p3863 @p477 @p4084 @p4082 @p80 @p3868 @p3866 @p89 @p4081 @p4079 @p738 @p3841 @p3839 @p448 @p4108 @p4106 @p79 @p3844 @p3842 @p90 @p4105 @p4103 @p767 @p3817 @p3815 @p419 @p4132 @p4130 @p78 @p3820 @p3818 @p91 @p4129 @p4127 @p796 @p3793 @p3791 @p390 @p4156 @p4154 @p77 @p3796 @p3794 @p92 @p4153 @p4151 @p825 @p3769 @p3767 @p361 @p4180 @p4178 @p76 @p3772 @p3770 @p93 @p4177 @p4175 @p854 @p3745 @p3743 @p332 @p4204 @p4202 @p75 @p3748 @p3746 @p94 @p4201 @p4199 @p883 @p3721 @p3719 @p303 @p4228 @p4226 @p74 @p3724 @p3722 @p95 @p4225 @p4223 @p912 @p3697 @p3695 @p274 @p4252 @p4250 @p73 @p3700 @p3698 @p96 @p4249 @p4247 @p941 @p3673 @p3671 @p245 @p4276 @p4274 @p72 @p3676 @p3674 @p97 @p4273 @p4271 @p970 @p3649 @p3647 @p216 @p4300 @p4298 @p71 @p3652 @p3650 @p98 @p4297 @p4295 @p999 @p3628 @p3626 @p187 @p4294 @p4292 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4291) :args (@t3852 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3652 @t635 @t3648 @t3669 @t84 @t3651 @t3654 @t85 @t3666 @t3667 @t661 @t3633 @t3637 @t609 @t3663 @t3684 @t83 @t3636 @t3639 @t86 @t3681 @t3682 @t687 @t3618 @t3622 @t583 @t3678 @t3699 @t82 @t3621 @t3624 @t87 @t3696 @t3697 @t713 @t3603 @t3607 @t557 @t3693 @t3714 @t81 @t3606 @t3609 @t88 @t3711 @t3712 @t739 @t3588 @t3592 @t531 @t3708 @t3729 @t80 @t3591 @t3594 @t89 @t3726 @t3727 @t765 @t3573 @t3577 @t505 @t3723 @t3744 @t79 @t3576 @t3579 @t90 @t3741 @t3742 @t791 @t3558 @t3562 @t479 @t3738 @t3759 @t78 @t3561 @t3564 @t91 @t3756 @t3757 @t817 @t3543 @t3547 @t453 @t3753 @t3774 @t77 @t3546 @t3549 @t92 @t3771 @t3772 @t843 @t3528 @t3532 @t427 @t3768 @t3789 @t76 @t3531 @t3534 @t93 @t3786 @t3787 @t869 @t3513 @t3517 @t401 @t3783 @t3804 @t75 @t3516 @t3519 @t94 @t3801 @t3802 @t895 @t3498 @t3502 @t375 @t3798 @t3819 @t74 @t3501 @t3504 @t95 @t3816 @t3817 @t921 @t3483 @t3487 @t349 @t3813 @t3834 @t73 @t3486 @t3489 @t96 @t3831 @t3832 @t947 @t3468 @t3472 @t323 @t3828 @t3849 @t72 @t3471 @t3474 @t97 @t3846 @t3847 @t973 @t3453 @t3457 @t297 @t3843 @t3864 @t71 @t3456 @t3459 @t98 @t3861 @t3862 @t999 @t3441 @t3444 @t276 @t3858 @t3859 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6081 @t220) % 40.01/40.20 (step @p4303 :rule instantiate :premises (@p110) :args (@t3865)) % 40.01/40.20 (step-pop @p6082 :rule scope :premises (@p4303)) % 40.01/40.20 (step @p4304 :rule process_scope :premises (@p6082) :args (@t3868)) % 40.01/40.20 (step @p4306 :rule implies_elim :premises (@p4304)) % 40.01/40.20 (step @p4307 :rule cnf_or_pos :args (@t3868)) % 40.01/40.20 (step @p4308 :rule reordering :premises (@p4307) :args ((or @t3867 @t3866 (not @t3868)))) % 40.01/40.20 (step @p4309 :rule instantiate :premises (@p112) :args (@t3869)) % 40.01/40.20 (step @p4310 :rule cnf_or_pos :args (@t3870)) % 40.01/40.20 (step @p4311 :rule reordering :premises (@p4310) :args ((or @t3867 @t244 @t1027 (not @t3870)))) % 40.01/40.20 (step @p4312 :rule instantiate :premises (@p108) :args (@t3865)) % 40.01/40.20 (step @p4313 :rule cnf_or_pos :args (@t3872)) % 40.01/40.20 (step @p4314 :rule reordering :premises (@p4313) :args ((or @t1038 @t265 @t264 @t3871 (not @t3872)))) % 40.01/40.20 (step @p4315 :rule chain_m_resolution :premises (@p4314 @p4312 @p1017 @p1015 @p136 @p134 @p4311 @p4309 @p133 @p131 @p130 @p128 @p127 @p125 @p4308 @p4306 @p110) :args ((or @t3867 @t239) @t267 (@list @t3872 @t1038 @t1040 @t248 @t249 @t1027 @t3870 @t245 @t247 @t242 @t243 @t240 @t241 @t3866 @t3868 @t220))) % 40.01/40.20 (step @p4316 :rule instantiate :premises (@p119) :args (@t3869)) % 40.01/40.20 (step @p4317 :rule cnf_or_pos :args (@t3874)) % 40.01/40.20 (step @p4318 :rule reordering :premises (@p4317) :args ((or @t270 @t3867 @t3873 @t3440 (not @t3874)))) % 40.01/40.20 (step @p4319 :rule instantiate :premises (@p120) :args (@t1024)) % 40.01/40.20 (step @p4320 :rule cnf_or_pos :args (@t3877)) % 40.01/40.20 (step @p4321 :rule reordering :premises (@p4320) :args ((or @t3876 @t3875 @t1025 (not @t3877)))) % 40.01/40.20 (step @p4322 :rule instantiate :premises (@p121) :args (@t1023)) % 40.01/40.20 (step @p4323 :rule cnf_or_pos :args (@t3879)) % 40.01/40.20 (step @p4324 :rule reordering :premises (@p4323) :args ((or @t1033 @t3858 @t3878 (not @t3879)))) % 40.01/40.20 (step @p4325 :rule chain_m_resolution :premises (@p3988 @p3986 @p84 @p3985 @p3983 @p622 @p3961 @p3959 @p593 @p4012 @p4010 @p83 @p3964 @p3962 @p85 @p4009 @p4007 @p651 @p3937 @p3935 @p564 @p4036 @p4034 @p82 @p3940 @p3938 @p86 @p4033 @p4031 @p680 @p3913 @p3911 @p535 @p4060 @p4058 @p81 @p3916 @p3914 @p87 @p4057 @p4055 @p709 @p3889 @p3887 @p506 @p4084 @p4082 @p80 @p3892 @p3890 @p88 @p4081 @p4079 @p738 @p3865 @p3863 @p477 @p4108 @p4106 @p79 @p3868 @p3866 @p89 @p4105 @p4103 @p767 @p3841 @p3839 @p448 @p4132 @p4130 @p78 @p3844 @p3842 @p90 @p4129 @p4127 @p796 @p3817 @p3815 @p419 @p4156 @p4154 @p77 @p3820 @p3818 @p91 @p4153 @p4151 @p825 @p3793 @p3791 @p390 @p4180 @p4178 @p76 @p3796 @p3794 @p92 @p4177 @p4175 @p854 @p3769 @p3767 @p361 @p4204 @p4202 @p75 @p3772 @p3770 @p93 @p4201 @p4199 @p883 @p3745 @p3743 @p332 @p4228 @p4226 @p74 @p3748 @p3746 @p94 @p4225 @p4223 @p912 @p3721 @p3719 @p303 @p4252 @p4250 @p73 @p3724 @p3722 @p95 @p4249 @p4247 @p941 @p3697 @p3695 @p274 @p4276 @p4274 @p72 @p3700 @p3698 @p96 @p4273 @p4271 @p970 @p3673 @p3671 @p245 @p4300 @p4298 @p71 @p3676 @p3674 @p97 @p4297 @p4295 @p999 @p3649 @p3647 @p216 @p4324 @p4322 @p70 @p3652 @p3650 @p98 @p4321 @p4319 @p1028 @p3628 @p3626 @p187 @p4318 @p4316 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4315) :args (@t3867 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3669 @t84 @t3666 @t3667 @t661 @t3648 @t3652 @t635 @t3663 @t3684 @t83 @t3651 @t3654 @t85 @t3681 @t3682 @t687 @t3633 @t3637 @t609 @t3678 @t3699 @t82 @t3636 @t3639 @t86 @t3696 @t3697 @t713 @t3618 @t3622 @t583 @t3693 @t3714 @t81 @t3621 @t3624 @t87 @t3711 @t3712 @t739 @t3603 @t3607 @t557 @t3708 @t3729 @t80 @t3606 @t3609 @t88 @t3726 @t3727 @t765 @t3588 @t3592 @t531 @t3723 @t3744 @t79 @t3591 @t3594 @t89 @t3741 @t3742 @t791 @t3573 @t3577 @t505 @t3738 @t3759 @t78 @t3576 @t3579 @t90 @t3756 @t3757 @t817 @t3558 @t3562 @t479 @t3753 @t3774 @t77 @t3561 @t3564 @t91 @t3771 @t3772 @t843 @t3543 @t3547 @t453 @t3768 @t3789 @t76 @t3546 @t3549 @t92 @t3786 @t3787 @t869 @t3528 @t3532 @t427 @t3783 @t3804 @t75 @t3531 @t3534 @t93 @t3801 @t3802 @t895 @t3513 @t3517 @t401 @t3798 @t3819 @t74 @t3516 @t3519 @t94 @t3816 @t3817 @t921 @t3498 @t3502 @t375 @t3813 @t3834 @t73 @t3501 @t3504 @t95 @t3831 @t3832 @t947 @t3483 @t3487 @t349 @t3828 @t3849 @t72 @t3486 @t3489 @t96 @t3846 @t3847 @t973 @t3468 @t3472 @t323 @t3843 @t3864 @t71 @t3471 @t3474 @t97 @t3861 @t3862 @t999 @t3453 @t3457 @t297 @t3858 @t3879 @t70 @t3456 @t3459 @t98 @t3876 @t3877 @t1025 @t3441 @t3444 @t276 @t3873 @t3874 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6083 @t220) % 40.01/40.20 (step @p4327 :rule instantiate :premises (@p110) :args (@t3880)) % 40.01/40.20 (step-pop @p6084 :rule scope :premises (@p4327)) % 40.01/40.20 (step @p4328 :rule process_scope :premises (@p6084) :args (@t3883)) % 40.01/40.20 (step @p4330 :rule implies_elim :premises (@p4328)) % 40.01/40.20 (step @p4331 :rule cnf_or_pos :args (@t3883)) % 40.01/40.20 (step @p4332 :rule reordering :premises (@p4331) :args ((or @t3882 @t3881 (not @t3883)))) % 40.01/40.20 (step @p4333 :rule instantiate :premises (@p112) :args (@t3884)) % 40.01/40.20 (step @p4334 :rule cnf_or_pos :args (@t3885)) % 40.01/40.20 (step @p4335 :rule reordering :premises (@p4334) :args ((or @t3882 @t244 @t1053 (not @t3885)))) % 40.01/40.20 (step @p4336 :rule instantiate :premises (@p108) :args (@t3880)) % 40.01/40.20 (step @p4337 :rule cnf_or_pos :args (@t3887)) % 40.01/40.20 (step @p4338 :rule reordering :premises (@p4337) :args ((or @t1064 @t265 @t264 @t3886 (not @t3887)))) % 40.01/40.20 (step @p4339 :rule chain_m_resolution :premises (@p4338 @p4336 @p1046 @p1044 @p136 @p134 @p4335 @p4333 @p133 @p131 @p130 @p128 @p127 @p125 @p4332 @p4330 @p110) :args ((or @t3882 @t239) @t267 (@list @t3887 @t1064 @t1066 @t248 @t249 @t1053 @t3885 @t245 @t247 @t242 @t243 @t240 @t241 @t3881 @t3883 @t220))) % 40.01/40.20 (step @p4340 :rule instantiate :premises (@p119) :args (@t3884)) % 40.01/40.20 (step @p4341 :rule cnf_or_pos :args (@t3889)) % 40.01/40.20 (step @p4342 :rule reordering :premises (@p4341) :args ((or @t270 @t3882 @t3888 @t3440 (not @t3889)))) % 40.01/40.20 (step @p4343 :rule instantiate :premises (@p120) :args (@t1050)) % 40.01/40.20 (step @p4344 :rule cnf_or_pos :args (@t3892)) % 40.01/40.20 (step @p4345 :rule reordering :premises (@p4344) :args ((or @t3891 @t3890 @t1051 (not @t3892)))) % 40.01/40.20 (step @p4346 :rule instantiate :premises (@p121) :args (@t1049)) % 40.01/40.20 (step @p4347 :rule cnf_or_pos :args (@t3894)) % 40.01/40.20 (step @p4348 :rule reordering :premises (@p4347) :args ((or @t1059 @t3873 @t3893 (not @t3894)))) % 40.01/40.20 (step @p4349 :rule chain_m_resolution :premises (@p3985 @p3983 @p622 @p4012 @p4010 @p83 @p3988 @p3986 @p84 @p4009 @p4007 @p651 @p3961 @p3959 @p593 @p4036 @p4034 @p82 @p3964 @p3962 @p85 @p4033 @p4031 @p680 @p3937 @p3935 @p564 @p4060 @p4058 @p81 @p3940 @p3938 @p86 @p4057 @p4055 @p709 @p3913 @p3911 @p535 @p4084 @p4082 @p80 @p3916 @p3914 @p87 @p4081 @p4079 @p738 @p3889 @p3887 @p506 @p4108 @p4106 @p79 @p3892 @p3890 @p88 @p4105 @p4103 @p767 @p3865 @p3863 @p477 @p4132 @p4130 @p78 @p3868 @p3866 @p89 @p4129 @p4127 @p796 @p3841 @p3839 @p448 @p4156 @p4154 @p77 @p3844 @p3842 @p90 @p4153 @p4151 @p825 @p3817 @p3815 @p419 @p4180 @p4178 @p76 @p3820 @p3818 @p91 @p4177 @p4175 @p854 @p3793 @p3791 @p390 @p4204 @p4202 @p75 @p3796 @p3794 @p92 @p4201 @p4199 @p883 @p3769 @p3767 @p361 @p4228 @p4226 @p74 @p3772 @p3770 @p93 @p4225 @p4223 @p912 @p3745 @p3743 @p332 @p4252 @p4250 @p73 @p3748 @p3746 @p94 @p4249 @p4247 @p941 @p3721 @p3719 @p303 @p4276 @p4274 @p72 @p3724 @p3722 @p95 @p4273 @p4271 @p970 @p3697 @p3695 @p274 @p4300 @p4298 @p71 @p3700 @p3698 @p96 @p4297 @p4295 @p999 @p3673 @p3671 @p245 @p4324 @p4322 @p70 @p3676 @p3674 @p97 @p4321 @p4319 @p1028 @p3649 @p3647 @p216 @p4348 @p4346 @p69 @p3652 @p3650 @p98 @p4345 @p4343 @p1057 @p3628 @p3626 @p187 @p4342 @p4340 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4339) :args (@t3882 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3667 @t661 @t3663 @t3684 @t83 @t3666 @t3669 @t84 @t3681 @t3682 @t687 @t3648 @t3652 @t635 @t3678 @t3699 @t82 @t3651 @t3654 @t85 @t3696 @t3697 @t713 @t3633 @t3637 @t609 @t3693 @t3714 @t81 @t3636 @t3639 @t86 @t3711 @t3712 @t739 @t3618 @t3622 @t583 @t3708 @t3729 @t80 @t3621 @t3624 @t87 @t3726 @t3727 @t765 @t3603 @t3607 @t557 @t3723 @t3744 @t79 @t3606 @t3609 @t88 @t3741 @t3742 @t791 @t3588 @t3592 @t531 @t3738 @t3759 @t78 @t3591 @t3594 @t89 @t3756 @t3757 @t817 @t3573 @t3577 @t505 @t3753 @t3774 @t77 @t3576 @t3579 @t90 @t3771 @t3772 @t843 @t3558 @t3562 @t479 @t3768 @t3789 @t76 @t3561 @t3564 @t91 @t3786 @t3787 @t869 @t3543 @t3547 @t453 @t3783 @t3804 @t75 @t3546 @t3549 @t92 @t3801 @t3802 @t895 @t3528 @t3532 @t427 @t3798 @t3819 @t74 @t3531 @t3534 @t93 @t3816 @t3817 @t921 @t3513 @t3517 @t401 @t3813 @t3834 @t73 @t3516 @t3519 @t94 @t3831 @t3832 @t947 @t3498 @t3502 @t375 @t3828 @t3849 @t72 @t3501 @t3504 @t95 @t3846 @t3847 @t973 @t3483 @t3487 @t349 @t3843 @t3864 @t71 @t3486 @t3489 @t96 @t3861 @t3862 @t999 @t3468 @t3472 @t323 @t3858 @t3879 @t70 @t3471 @t3474 @t97 @t3876 @t3877 @t1025 @t3453 @t3457 @t297 @t3873 @t3894 @t69 @t3456 @t3459 @t98 @t3891 @t3892 @t1051 @t3441 @t3444 @t276 @t3888 @t3889 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6085 @t220) % 40.01/40.20 (step @p4351 :rule instantiate :premises (@p110) :args (@t3895)) % 40.01/40.20 (step-pop @p6086 :rule scope :premises (@p4351)) % 40.01/40.20 (step @p4352 :rule process_scope :premises (@p6086) :args (@t3898)) % 40.01/40.20 (step @p4354 :rule implies_elim :premises (@p4352)) % 40.01/40.20 (step @p4355 :rule cnf_or_pos :args (@t3898)) % 40.01/40.20 (step @p4356 :rule reordering :premises (@p4355) :args ((or @t3897 @t3896 (not @t3898)))) % 40.01/40.20 (step @p4357 :rule instantiate :premises (@p112) :args (@t3899)) % 40.01/40.20 (step @p4358 :rule cnf_or_pos :args (@t3900)) % 40.01/40.20 (step @p4359 :rule reordering :premises (@p4358) :args ((or @t3897 @t244 @t1079 (not @t3900)))) % 40.01/40.20 (step @p4360 :rule instantiate :premises (@p108) :args (@t3895)) % 40.01/40.20 (step @p4361 :rule cnf_or_pos :args (@t3902)) % 40.01/40.20 (step @p4362 :rule reordering :premises (@p4361) :args ((or @t1090 @t265 @t264 @t3901 (not @t3902)))) % 40.01/40.20 (step @p4363 :rule chain_m_resolution :premises (@p4362 @p4360 @p1075 @p1073 @p136 @p134 @p4359 @p4357 @p133 @p131 @p130 @p128 @p127 @p125 @p4356 @p4354 @p110) :args ((or @t3897 @t239) @t267 (@list @t3902 @t1090 @t1092 @t248 @t249 @t1079 @t3900 @t245 @t247 @t242 @t243 @t240 @t241 @t3896 @t3898 @t220))) % 40.01/40.20 (step @p4364 :rule instantiate :premises (@p119) :args (@t3899)) % 40.01/40.20 (step @p4365 :rule cnf_or_pos :args (@t3904)) % 40.01/40.20 (step @p4366 :rule reordering :premises (@p4365) :args ((or @t270 @t3897 @t3903 @t3440 (not @t3904)))) % 40.01/40.20 (step @p4367 :rule instantiate :premises (@p120) :args (@t1076)) % 40.01/40.20 (step @p4368 :rule cnf_or_pos :args (@t3907)) % 40.01/40.20 (step @p4369 :rule reordering :premises (@p4368) :args ((or @t3906 @t3905 @t1077 (not @t3907)))) % 40.01/40.20 (step @p4370 :rule instantiate :premises (@p121) :args (@t1075)) % 40.01/40.20 (step @p4371 :rule cnf_or_pos :args (@t3909)) % 40.01/40.20 (step @p4372 :rule reordering :premises (@p4371) :args ((or @t1085 @t3888 @t3908 (not @t3909)))) % 40.01/40.20 (step @p4373 :rule chain_m_resolution :premises (@p4012 @p4010 @p83 @p4009 @p4007 @p651 @p3985 @p3983 @p622 @p4036 @p4034 @p82 @p3988 @p3986 @p84 @p4033 @p4031 @p680 @p3961 @p3959 @p593 @p4060 @p4058 @p81 @p3964 @p3962 @p85 @p4057 @p4055 @p709 @p3937 @p3935 @p564 @p4084 @p4082 @p80 @p3940 @p3938 @p86 @p4081 @p4079 @p738 @p3913 @p3911 @p535 @p4108 @p4106 @p79 @p3916 @p3914 @p87 @p4105 @p4103 @p767 @p3889 @p3887 @p506 @p4132 @p4130 @p78 @p3892 @p3890 @p88 @p4129 @p4127 @p796 @p3865 @p3863 @p477 @p4156 @p4154 @p77 @p3868 @p3866 @p89 @p4153 @p4151 @p825 @p3841 @p3839 @p448 @p4180 @p4178 @p76 @p3844 @p3842 @p90 @p4177 @p4175 @p854 @p3817 @p3815 @p419 @p4204 @p4202 @p75 @p3820 @p3818 @p91 @p4201 @p4199 @p883 @p3793 @p3791 @p390 @p4228 @p4226 @p74 @p3796 @p3794 @p92 @p4225 @p4223 @p912 @p3769 @p3767 @p361 @p4252 @p4250 @p73 @p3772 @p3770 @p93 @p4249 @p4247 @p941 @p3745 @p3743 @p332 @p4276 @p4274 @p72 @p3748 @p3746 @p94 @p4273 @p4271 @p970 @p3721 @p3719 @p303 @p4300 @p4298 @p71 @p3724 @p3722 @p95 @p4297 @p4295 @p999 @p3697 @p3695 @p274 @p4324 @p4322 @p70 @p3700 @p3698 @p96 @p4321 @p4319 @p1028 @p3673 @p3671 @p245 @p4348 @p4346 @p69 @p3676 @p3674 @p97 @p4345 @p4343 @p1057 @p3649 @p3647 @p216 @p4372 @p4370 @p68 @p3652 @p3650 @p98 @p4369 @p4367 @p1086 @p3628 @p3626 @p187 @p4366 @p4364 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4363) :args (@t3897 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3684 @t83 @t3681 @t3682 @t687 @t3663 @t3667 @t661 @t3678 @t3699 @t82 @t3666 @t3669 @t84 @t3696 @t3697 @t713 @t3648 @t3652 @t635 @t3693 @t3714 @t81 @t3651 @t3654 @t85 @t3711 @t3712 @t739 @t3633 @t3637 @t609 @t3708 @t3729 @t80 @t3636 @t3639 @t86 @t3726 @t3727 @t765 @t3618 @t3622 @t583 @t3723 @t3744 @t79 @t3621 @t3624 @t87 @t3741 @t3742 @t791 @t3603 @t3607 @t557 @t3738 @t3759 @t78 @t3606 @t3609 @t88 @t3756 @t3757 @t817 @t3588 @t3592 @t531 @t3753 @t3774 @t77 @t3591 @t3594 @t89 @t3771 @t3772 @t843 @t3573 @t3577 @t505 @t3768 @t3789 @t76 @t3576 @t3579 @t90 @t3786 @t3787 @t869 @t3558 @t3562 @t479 @t3783 @t3804 @t75 @t3561 @t3564 @t91 @t3801 @t3802 @t895 @t3543 @t3547 @t453 @t3798 @t3819 @t74 @t3546 @t3549 @t92 @t3816 @t3817 @t921 @t3528 @t3532 @t427 @t3813 @t3834 @t73 @t3531 @t3534 @t93 @t3831 @t3832 @t947 @t3513 @t3517 @t401 @t3828 @t3849 @t72 @t3516 @t3519 @t94 @t3846 @t3847 @t973 @t3498 @t3502 @t375 @t3843 @t3864 @t71 @t3501 @t3504 @t95 @t3861 @t3862 @t999 @t3483 @t3487 @t349 @t3858 @t3879 @t70 @t3486 @t3489 @t96 @t3876 @t3877 @t1025 @t3468 @t3472 @t323 @t3873 @t3894 @t69 @t3471 @t3474 @t97 @t3891 @t3892 @t1051 @t3453 @t3457 @t297 @t3888 @t3909 @t68 @t3456 @t3459 @t98 @t3906 @t3907 @t1077 @t3441 @t3444 @t276 @t3903 @t3904 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6087 @t220) % 40.01/40.20 (step @p4375 :rule instantiate :premises (@p110) :args (@t3910)) % 40.01/40.20 (step-pop @p6088 :rule scope :premises (@p4375)) % 40.01/40.20 (step @p4376 :rule process_scope :premises (@p6088) :args (@t3913)) % 40.01/40.20 (step @p4378 :rule implies_elim :premises (@p4376)) % 40.01/40.20 (step @p4379 :rule cnf_or_pos :args (@t3913)) % 40.01/40.20 (step @p4380 :rule reordering :premises (@p4379) :args ((or @t3912 @t3911 (not @t3913)))) % 40.01/40.20 (step @p4381 :rule instantiate :premises (@p112) :args (@t3914)) % 40.01/40.20 (step @p4382 :rule cnf_or_pos :args (@t3915)) % 40.01/40.20 (step @p4383 :rule reordering :premises (@p4382) :args ((or @t3912 @t244 @t1105 (not @t3915)))) % 40.01/40.20 (step @p4384 :rule instantiate :premises (@p108) :args (@t3910)) % 40.01/40.20 (step @p4385 :rule cnf_or_pos :args (@t3917)) % 40.01/40.20 (step @p4386 :rule reordering :premises (@p4385) :args ((or @t1116 @t265 @t264 @t3916 (not @t3917)))) % 40.01/40.20 (step @p4387 :rule chain_m_resolution :premises (@p4386 @p4384 @p1104 @p1102 @p136 @p134 @p4383 @p4381 @p133 @p131 @p130 @p128 @p127 @p125 @p4380 @p4378 @p110) :args ((or @t3912 @t239) @t267 (@list @t3917 @t1116 @t1118 @t248 @t249 @t1105 @t3915 @t245 @t247 @t242 @t243 @t240 @t241 @t3911 @t3913 @t220))) % 40.01/40.20 (step @p4388 :rule instantiate :premises (@p119) :args (@t3914)) % 40.01/40.20 (step @p4389 :rule cnf_or_pos :args (@t3919)) % 40.01/40.20 (step @p4390 :rule reordering :premises (@p4389) :args ((or @t270 @t3912 @t3918 @t3440 (not @t3919)))) % 40.01/40.20 (step @p4391 :rule instantiate :premises (@p120) :args (@t1102)) % 40.01/40.20 (step @p4392 :rule cnf_or_pos :args (@t3922)) % 40.01/40.20 (step @p4393 :rule reordering :premises (@p4392) :args ((or @t3921 @t3920 @t1103 (not @t3922)))) % 40.01/40.20 (step @p4394 :rule instantiate :premises (@p121) :args (@t1101)) % 40.01/40.20 (step @p4395 :rule cnf_or_pos :args (@t3924)) % 40.01/40.20 (step @p4396 :rule reordering :premises (@p4395) :args ((or @t1111 @t3903 @t3923 (not @t3924)))) % 40.01/40.20 (step @p4397 :rule chain_m_resolution :premises (@p4009 @p4007 @p651 @p4036 @p4034 @p82 @p4012 @p4010 @p83 @p4033 @p4031 @p680 @p3985 @p3983 @p622 @p4060 @p4058 @p81 @p3988 @p3986 @p84 @p4057 @p4055 @p709 @p3961 @p3959 @p593 @p4084 @p4082 @p80 @p3964 @p3962 @p85 @p4081 @p4079 @p738 @p3937 @p3935 @p564 @p4108 @p4106 @p79 @p3940 @p3938 @p86 @p4105 @p4103 @p767 @p3913 @p3911 @p535 @p4132 @p4130 @p78 @p3916 @p3914 @p87 @p4129 @p4127 @p796 @p3889 @p3887 @p506 @p4156 @p4154 @p77 @p3892 @p3890 @p88 @p4153 @p4151 @p825 @p3865 @p3863 @p477 @p4180 @p4178 @p76 @p3868 @p3866 @p89 @p4177 @p4175 @p854 @p3841 @p3839 @p448 @p4204 @p4202 @p75 @p3844 @p3842 @p90 @p4201 @p4199 @p883 @p3817 @p3815 @p419 @p4228 @p4226 @p74 @p3820 @p3818 @p91 @p4225 @p4223 @p912 @p3793 @p3791 @p390 @p4252 @p4250 @p73 @p3796 @p3794 @p92 @p4249 @p4247 @p941 @p3769 @p3767 @p361 @p4276 @p4274 @p72 @p3772 @p3770 @p93 @p4273 @p4271 @p970 @p3745 @p3743 @p332 @p4300 @p4298 @p71 @p3748 @p3746 @p94 @p4297 @p4295 @p999 @p3721 @p3719 @p303 @p4324 @p4322 @p70 @p3724 @p3722 @p95 @p4321 @p4319 @p1028 @p3697 @p3695 @p274 @p4348 @p4346 @p69 @p3700 @p3698 @p96 @p4345 @p4343 @p1057 @p3673 @p3671 @p245 @p4372 @p4370 @p68 @p3676 @p3674 @p97 @p4369 @p4367 @p1086 @p3649 @p3647 @p216 @p4396 @p4394 @p67 @p3652 @p3650 @p98 @p4393 @p4391 @p1115 @p3628 @p3626 @p187 @p4390 @p4388 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4387) :args (@t3912 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3682 @t687 @t3678 @t3699 @t82 @t3681 @t3684 @t83 @t3696 @t3697 @t713 @t3663 @t3667 @t661 @t3693 @t3714 @t81 @t3666 @t3669 @t84 @t3711 @t3712 @t739 @t3648 @t3652 @t635 @t3708 @t3729 @t80 @t3651 @t3654 @t85 @t3726 @t3727 @t765 @t3633 @t3637 @t609 @t3723 @t3744 @t79 @t3636 @t3639 @t86 @t3741 @t3742 @t791 @t3618 @t3622 @t583 @t3738 @t3759 @t78 @t3621 @t3624 @t87 @t3756 @t3757 @t817 @t3603 @t3607 @t557 @t3753 @t3774 @t77 @t3606 @t3609 @t88 @t3771 @t3772 @t843 @t3588 @t3592 @t531 @t3768 @t3789 @t76 @t3591 @t3594 @t89 @t3786 @t3787 @t869 @t3573 @t3577 @t505 @t3783 @t3804 @t75 @t3576 @t3579 @t90 @t3801 @t3802 @t895 @t3558 @t3562 @t479 @t3798 @t3819 @t74 @t3561 @t3564 @t91 @t3816 @t3817 @t921 @t3543 @t3547 @t453 @t3813 @t3834 @t73 @t3546 @t3549 @t92 @t3831 @t3832 @t947 @t3528 @t3532 @t427 @t3828 @t3849 @t72 @t3531 @t3534 @t93 @t3846 @t3847 @t973 @t3513 @t3517 @t401 @t3843 @t3864 @t71 @t3516 @t3519 @t94 @t3861 @t3862 @t999 @t3498 @t3502 @t375 @t3858 @t3879 @t70 @t3501 @t3504 @t95 @t3876 @t3877 @t1025 @t3483 @t3487 @t349 @t3873 @t3894 @t69 @t3486 @t3489 @t96 @t3891 @t3892 @t1051 @t3468 @t3472 @t323 @t3888 @t3909 @t68 @t3471 @t3474 @t97 @t3906 @t3907 @t1077 @t3453 @t3457 @t297 @t3903 @t3924 @t67 @t3456 @t3459 @t98 @t3921 @t3922 @t1103 @t3441 @t3444 @t276 @t3918 @t3919 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6089 @t220) % 40.01/40.20 (step @p4399 :rule instantiate :premises (@p110) :args (@t3925)) % 40.01/40.20 (step-pop @p6090 :rule scope :premises (@p4399)) % 40.01/40.20 (step @p4400 :rule process_scope :premises (@p6090) :args (@t3928)) % 40.01/40.20 (step @p4402 :rule implies_elim :premises (@p4400)) % 40.01/40.20 (step @p4403 :rule cnf_or_pos :args (@t3928)) % 40.01/40.20 (step @p4404 :rule reordering :premises (@p4403) :args ((or @t3927 @t3926 (not @t3928)))) % 40.01/40.20 (step @p4405 :rule instantiate :premises (@p112) :args (@t3929)) % 40.01/40.20 (step @p4406 :rule cnf_or_pos :args (@t3930)) % 40.01/40.20 (step @p4407 :rule reordering :premises (@p4406) :args ((or @t3927 @t244 @t1131 (not @t3930)))) % 40.01/40.20 (step @p4408 :rule instantiate :premises (@p108) :args (@t3925)) % 40.01/40.20 (step @p4409 :rule cnf_or_pos :args (@t3932)) % 40.01/40.20 (step @p4410 :rule reordering :premises (@p4409) :args ((or @t1142 @t265 @t264 @t3931 (not @t3932)))) % 40.01/40.20 (step @p4411 :rule chain_m_resolution :premises (@p4410 @p4408 @p1133 @p1131 @p136 @p134 @p4407 @p4405 @p133 @p131 @p130 @p128 @p127 @p125 @p4404 @p4402 @p110) :args ((or @t3927 @t239) @t267 (@list @t3932 @t1142 @t1144 @t248 @t249 @t1131 @t3930 @t245 @t247 @t242 @t243 @t240 @t241 @t3926 @t3928 @t220))) % 40.01/40.20 (step @p4412 :rule instantiate :premises (@p119) :args (@t3929)) % 40.01/40.20 (step @p4413 :rule cnf_or_pos :args (@t3934)) % 40.01/40.20 (step @p4414 :rule reordering :premises (@p4413) :args ((or @t270 @t3927 @t3933 @t3440 (not @t3934)))) % 40.01/40.20 (step @p4415 :rule instantiate :premises (@p120) :args (@t1128)) % 40.01/40.20 (step @p4416 :rule cnf_or_pos :args (@t3937)) % 40.01/40.20 (step @p4417 :rule reordering :premises (@p4416) :args ((or @t3936 @t3935 @t1129 (not @t3937)))) % 40.01/40.20 (step @p4418 :rule instantiate :premises (@p121) :args (@t1127)) % 40.01/40.20 (step @p4419 :rule cnf_or_pos :args (@t3939)) % 40.01/40.20 (step @p4420 :rule reordering :premises (@p4419) :args ((or @t1137 @t3918 @t3938 (not @t3939)))) % 40.01/40.20 (step @p4421 :rule chain_m_resolution :premises (@p4036 @p4034 @p82 @p4033 @p4031 @p680 @p4009 @p4007 @p651 @p4060 @p4058 @p81 @p4012 @p4010 @p83 @p4057 @p4055 @p709 @p3985 @p3983 @p622 @p4084 @p4082 @p80 @p3988 @p3986 @p84 @p4081 @p4079 @p738 @p3961 @p3959 @p593 @p4108 @p4106 @p79 @p3964 @p3962 @p85 @p4105 @p4103 @p767 @p3937 @p3935 @p564 @p4132 @p4130 @p78 @p3940 @p3938 @p86 @p4129 @p4127 @p796 @p3913 @p3911 @p535 @p4156 @p4154 @p77 @p3916 @p3914 @p87 @p4153 @p4151 @p825 @p3889 @p3887 @p506 @p4180 @p4178 @p76 @p3892 @p3890 @p88 @p4177 @p4175 @p854 @p3865 @p3863 @p477 @p4204 @p4202 @p75 @p3868 @p3866 @p89 @p4201 @p4199 @p883 @p3841 @p3839 @p448 @p4228 @p4226 @p74 @p3844 @p3842 @p90 @p4225 @p4223 @p912 @p3817 @p3815 @p419 @p4252 @p4250 @p73 @p3820 @p3818 @p91 @p4249 @p4247 @p941 @p3793 @p3791 @p390 @p4276 @p4274 @p72 @p3796 @p3794 @p92 @p4273 @p4271 @p970 @p3769 @p3767 @p361 @p4300 @p4298 @p71 @p3772 @p3770 @p93 @p4297 @p4295 @p999 @p3745 @p3743 @p332 @p4324 @p4322 @p70 @p3748 @p3746 @p94 @p4321 @p4319 @p1028 @p3721 @p3719 @p303 @p4348 @p4346 @p69 @p3724 @p3722 @p95 @p4345 @p4343 @p1057 @p3697 @p3695 @p274 @p4372 @p4370 @p68 @p3700 @p3698 @p96 @p4369 @p4367 @p1086 @p3673 @p3671 @p245 @p4396 @p4394 @p67 @p3676 @p3674 @p97 @p4393 @p4391 @p1115 @p3649 @p3647 @p216 @p4420 @p4418 @p66 @p3652 @p3650 @p98 @p4417 @p4415 @p1144 @p3628 @p3626 @p187 @p4414 @p4412 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4411) :args (@t3927 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3699 @t82 @t3696 @t3697 @t713 @t3678 @t3682 @t687 @t3693 @t3714 @t81 @t3681 @t3684 @t83 @t3711 @t3712 @t739 @t3663 @t3667 @t661 @t3708 @t3729 @t80 @t3666 @t3669 @t84 @t3726 @t3727 @t765 @t3648 @t3652 @t635 @t3723 @t3744 @t79 @t3651 @t3654 @t85 @t3741 @t3742 @t791 @t3633 @t3637 @t609 @t3738 @t3759 @t78 @t3636 @t3639 @t86 @t3756 @t3757 @t817 @t3618 @t3622 @t583 @t3753 @t3774 @t77 @t3621 @t3624 @t87 @t3771 @t3772 @t843 @t3603 @t3607 @t557 @t3768 @t3789 @t76 @t3606 @t3609 @t88 @t3786 @t3787 @t869 @t3588 @t3592 @t531 @t3783 @t3804 @t75 @t3591 @t3594 @t89 @t3801 @t3802 @t895 @t3573 @t3577 @t505 @t3798 @t3819 @t74 @t3576 @t3579 @t90 @t3816 @t3817 @t921 @t3558 @t3562 @t479 @t3813 @t3834 @t73 @t3561 @t3564 @t91 @t3831 @t3832 @t947 @t3543 @t3547 @t453 @t3828 @t3849 @t72 @t3546 @t3549 @t92 @t3846 @t3847 @t973 @t3528 @t3532 @t427 @t3843 @t3864 @t71 @t3531 @t3534 @t93 @t3861 @t3862 @t999 @t3513 @t3517 @t401 @t3858 @t3879 @t70 @t3516 @t3519 @t94 @t3876 @t3877 @t1025 @t3498 @t3502 @t375 @t3873 @t3894 @t69 @t3501 @t3504 @t95 @t3891 @t3892 @t1051 @t3483 @t3487 @t349 @t3888 @t3909 @t68 @t3486 @t3489 @t96 @t3906 @t3907 @t1077 @t3468 @t3472 @t323 @t3903 @t3924 @t67 @t3471 @t3474 @t97 @t3921 @t3922 @t1103 @t3453 @t3457 @t297 @t3918 @t3939 @t66 @t3456 @t3459 @t98 @t3936 @t3937 @t1129 @t3441 @t3444 @t276 @t3933 @t3934 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6091 @t220) % 40.01/40.20 (step @p4423 :rule instantiate :premises (@p110) :args (@t3940)) % 40.01/40.20 (step-pop @p6092 :rule scope :premises (@p4423)) % 40.01/40.20 (step @p4424 :rule process_scope :premises (@p6092) :args (@t3943)) % 40.01/40.20 (step @p4426 :rule implies_elim :premises (@p4424)) % 40.01/40.20 (step @p4427 :rule cnf_or_pos :args (@t3943)) % 40.01/40.20 (step @p4428 :rule reordering :premises (@p4427) :args ((or @t3942 @t3941 (not @t3943)))) % 40.01/40.20 (step @p4429 :rule instantiate :premises (@p112) :args (@t3944)) % 40.01/40.20 (step @p4430 :rule cnf_or_pos :args (@t3945)) % 40.01/40.20 (step @p4431 :rule reordering :premises (@p4430) :args ((or @t3942 @t244 @t1157 (not @t3945)))) % 40.01/40.20 (step @p4432 :rule instantiate :premises (@p108) :args (@t3940)) % 40.01/40.20 (step @p4433 :rule cnf_or_pos :args (@t3947)) % 40.01/40.20 (step @p4434 :rule reordering :premises (@p4433) :args ((or @t1168 @t265 @t264 @t3946 (not @t3947)))) % 40.01/40.20 (step @p4435 :rule chain_m_resolution :premises (@p4434 @p4432 @p1162 @p1160 @p136 @p134 @p4431 @p4429 @p133 @p131 @p130 @p128 @p127 @p125 @p4428 @p4426 @p110) :args ((or @t3942 @t239) @t267 (@list @t3947 @t1168 @t1170 @t248 @t249 @t1157 @t3945 @t245 @t247 @t242 @t243 @t240 @t241 @t3941 @t3943 @t220))) % 40.01/40.20 (step @p4436 :rule instantiate :premises (@p119) :args (@t3944)) % 40.01/40.20 (step @p4437 :rule cnf_or_pos :args (@t3949)) % 40.01/40.20 (step @p4438 :rule reordering :premises (@p4437) :args ((or @t270 @t3942 @t3948 @t3440 (not @t3949)))) % 40.01/40.20 (step @p4439 :rule instantiate :premises (@p120) :args (@t1154)) % 40.01/40.20 (step @p4440 :rule cnf_or_pos :args (@t3952)) % 40.01/40.20 (step @p4441 :rule reordering :premises (@p4440) :args ((or @t3951 @t3950 @t1155 (not @t3952)))) % 40.01/40.20 (step @p4442 :rule instantiate :premises (@p121) :args (@t1153)) % 40.01/40.20 (step @p4443 :rule cnf_or_pos :args (@t3954)) % 40.01/40.20 (step @p4444 :rule reordering :premises (@p4443) :args ((or @t1163 @t3933 @t3953 (not @t3954)))) % 40.01/40.20 (step @p4445 :rule chain_m_resolution :premises (@p4033 @p4031 @p680 @p4060 @p4058 @p81 @p4036 @p4034 @p82 @p4057 @p4055 @p709 @p4009 @p4007 @p651 @p4084 @p4082 @p80 @p4012 @p4010 @p83 @p4081 @p4079 @p738 @p3985 @p3983 @p622 @p4108 @p4106 @p79 @p3988 @p3986 @p84 @p4105 @p4103 @p767 @p3961 @p3959 @p593 @p4132 @p4130 @p78 @p3964 @p3962 @p85 @p4129 @p4127 @p796 @p3937 @p3935 @p564 @p4156 @p4154 @p77 @p3940 @p3938 @p86 @p4153 @p4151 @p825 @p3913 @p3911 @p535 @p4180 @p4178 @p76 @p3916 @p3914 @p87 @p4177 @p4175 @p854 @p3889 @p3887 @p506 @p4204 @p4202 @p75 @p3892 @p3890 @p88 @p4201 @p4199 @p883 @p3865 @p3863 @p477 @p4228 @p4226 @p74 @p3868 @p3866 @p89 @p4225 @p4223 @p912 @p3841 @p3839 @p448 @p4252 @p4250 @p73 @p3844 @p3842 @p90 @p4249 @p4247 @p941 @p3817 @p3815 @p419 @p4276 @p4274 @p72 @p3820 @p3818 @p91 @p4273 @p4271 @p970 @p3793 @p3791 @p390 @p4300 @p4298 @p71 @p3796 @p3794 @p92 @p4297 @p4295 @p999 @p3769 @p3767 @p361 @p4324 @p4322 @p70 @p3772 @p3770 @p93 @p4321 @p4319 @p1028 @p3745 @p3743 @p332 @p4348 @p4346 @p69 @p3748 @p3746 @p94 @p4345 @p4343 @p1057 @p3721 @p3719 @p303 @p4372 @p4370 @p68 @p3724 @p3722 @p95 @p4369 @p4367 @p1086 @p3697 @p3695 @p274 @p4396 @p4394 @p67 @p3700 @p3698 @p96 @p4393 @p4391 @p1115 @p3673 @p3671 @p245 @p4420 @p4418 @p66 @p3676 @p3674 @p97 @p4417 @p4415 @p1144 @p3649 @p3647 @p216 @p4444 @p4442 @p65 @p3652 @p3650 @p98 @p4441 @p4439 @p1173 @p3628 @p3626 @p187 @p4438 @p4436 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4435) :args (@t3942 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3697 @t713 @t3693 @t3714 @t81 @t3696 @t3699 @t82 @t3711 @t3712 @t739 @t3678 @t3682 @t687 @t3708 @t3729 @t80 @t3681 @t3684 @t83 @t3726 @t3727 @t765 @t3663 @t3667 @t661 @t3723 @t3744 @t79 @t3666 @t3669 @t84 @t3741 @t3742 @t791 @t3648 @t3652 @t635 @t3738 @t3759 @t78 @t3651 @t3654 @t85 @t3756 @t3757 @t817 @t3633 @t3637 @t609 @t3753 @t3774 @t77 @t3636 @t3639 @t86 @t3771 @t3772 @t843 @t3618 @t3622 @t583 @t3768 @t3789 @t76 @t3621 @t3624 @t87 @t3786 @t3787 @t869 @t3603 @t3607 @t557 @t3783 @t3804 @t75 @t3606 @t3609 @t88 @t3801 @t3802 @t895 @t3588 @t3592 @t531 @t3798 @t3819 @t74 @t3591 @t3594 @t89 @t3816 @t3817 @t921 @t3573 @t3577 @t505 @t3813 @t3834 @t73 @t3576 @t3579 @t90 @t3831 @t3832 @t947 @t3558 @t3562 @t479 @t3828 @t3849 @t72 @t3561 @t3564 @t91 @t3846 @t3847 @t973 @t3543 @t3547 @t453 @t3843 @t3864 @t71 @t3546 @t3549 @t92 @t3861 @t3862 @t999 @t3528 @t3532 @t427 @t3858 @t3879 @t70 @t3531 @t3534 @t93 @t3876 @t3877 @t1025 @t3513 @t3517 @t401 @t3873 @t3894 @t69 @t3516 @t3519 @t94 @t3891 @t3892 @t1051 @t3498 @t3502 @t375 @t3888 @t3909 @t68 @t3501 @t3504 @t95 @t3906 @t3907 @t1077 @t3483 @t3487 @t349 @t3903 @t3924 @t67 @t3486 @t3489 @t96 @t3921 @t3922 @t1103 @t3468 @t3472 @t323 @t3918 @t3939 @t66 @t3471 @t3474 @t97 @t3936 @t3937 @t1129 @t3453 @t3457 @t297 @t3933 @t3954 @t65 @t3456 @t3459 @t98 @t3951 @t3952 @t1155 @t3441 @t3444 @t276 @t3948 @t3949 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6093 @t220) % 40.01/40.20 (step @p4447 :rule instantiate :premises (@p110) :args (@t3955)) % 40.01/40.20 (step-pop @p6094 :rule scope :premises (@p4447)) % 40.01/40.20 (step @p4448 :rule process_scope :premises (@p6094) :args (@t3958)) % 40.01/40.20 (step @p4450 :rule implies_elim :premises (@p4448)) % 40.01/40.20 (step @p4451 :rule cnf_or_pos :args (@t3958)) % 40.01/40.20 (step @p4452 :rule reordering :premises (@p4451) :args ((or @t3957 @t3956 (not @t3958)))) % 40.01/40.20 (step @p4453 :rule instantiate :premises (@p112) :args (@t3959)) % 40.01/40.20 (step @p4454 :rule cnf_or_pos :args (@t3960)) % 40.01/40.20 (step @p4455 :rule reordering :premises (@p4454) :args ((or @t3957 @t244 @t1183 (not @t3960)))) % 40.01/40.20 (step @p4456 :rule instantiate :premises (@p108) :args (@t3955)) % 40.01/40.20 (step @p4457 :rule cnf_or_pos :args (@t3962)) % 40.01/40.20 (step @p4458 :rule reordering :premises (@p4457) :args ((or @t1194 @t265 @t264 @t3961 (not @t3962)))) % 40.01/40.20 (step @p4459 :rule chain_m_resolution :premises (@p4458 @p4456 @p1191 @p1189 @p136 @p134 @p4455 @p4453 @p133 @p131 @p130 @p128 @p127 @p125 @p4452 @p4450 @p110) :args ((or @t3957 @t239) @t267 (@list @t3962 @t1194 @t1196 @t248 @t249 @t1183 @t3960 @t245 @t247 @t242 @t243 @t240 @t241 @t3956 @t3958 @t220))) % 40.01/40.20 (step @p4460 :rule instantiate :premises (@p119) :args (@t3959)) % 40.01/40.20 (step @p4461 :rule cnf_or_pos :args (@t3964)) % 40.01/40.20 (step @p4462 :rule reordering :premises (@p4461) :args ((or @t270 @t3957 @t3963 @t3440 (not @t3964)))) % 40.01/40.20 (step @p4463 :rule instantiate :premises (@p120) :args (@t1180)) % 40.01/40.20 (step @p4464 :rule cnf_or_pos :args (@t3967)) % 40.01/40.20 (step @p4465 :rule reordering :premises (@p4464) :args ((or @t3966 @t3965 @t1181 (not @t3967)))) % 40.01/40.20 (step @p4466 :rule instantiate :premises (@p121) :args (@t1179)) % 40.01/40.20 (step @p4467 :rule cnf_or_pos :args (@t3969)) % 40.01/40.20 (step @p4468 :rule reordering :premises (@p4467) :args ((or @t1189 @t3948 @t3968 (not @t3969)))) % 40.01/40.20 (step @p4469 :rule chain_m_resolution :premises (@p4060 @p4058 @p81 @p4057 @p4055 @p709 @p4033 @p4031 @p680 @p4084 @p4082 @p80 @p4036 @p4034 @p82 @p4081 @p4079 @p738 @p4009 @p4007 @p651 @p4108 @p4106 @p79 @p4012 @p4010 @p83 @p4105 @p4103 @p767 @p3985 @p3983 @p622 @p4132 @p4130 @p78 @p3988 @p3986 @p84 @p4129 @p4127 @p796 @p3961 @p3959 @p593 @p4156 @p4154 @p77 @p3964 @p3962 @p85 @p4153 @p4151 @p825 @p3937 @p3935 @p564 @p4180 @p4178 @p76 @p3940 @p3938 @p86 @p4177 @p4175 @p854 @p3913 @p3911 @p535 @p4204 @p4202 @p75 @p3916 @p3914 @p87 @p4201 @p4199 @p883 @p3889 @p3887 @p506 @p4228 @p4226 @p74 @p3892 @p3890 @p88 @p4225 @p4223 @p912 @p3865 @p3863 @p477 @p4252 @p4250 @p73 @p3868 @p3866 @p89 @p4249 @p4247 @p941 @p3841 @p3839 @p448 @p4276 @p4274 @p72 @p3844 @p3842 @p90 @p4273 @p4271 @p970 @p3817 @p3815 @p419 @p4300 @p4298 @p71 @p3820 @p3818 @p91 @p4297 @p4295 @p999 @p3793 @p3791 @p390 @p4324 @p4322 @p70 @p3796 @p3794 @p92 @p4321 @p4319 @p1028 @p3769 @p3767 @p361 @p4348 @p4346 @p69 @p3772 @p3770 @p93 @p4345 @p4343 @p1057 @p3745 @p3743 @p332 @p4372 @p4370 @p68 @p3748 @p3746 @p94 @p4369 @p4367 @p1086 @p3721 @p3719 @p303 @p4396 @p4394 @p67 @p3724 @p3722 @p95 @p4393 @p4391 @p1115 @p3697 @p3695 @p274 @p4420 @p4418 @p66 @p3700 @p3698 @p96 @p4417 @p4415 @p1144 @p3673 @p3671 @p245 @p4444 @p4442 @p65 @p3676 @p3674 @p97 @p4441 @p4439 @p1173 @p3649 @p3647 @p216 @p4468 @p4466 @p64 @p3652 @p3650 @p98 @p4465 @p4463 @p1202 @p3628 @p3626 @p187 @p4462 @p4460 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4459) :args (@t3957 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3714 @t81 @t3711 @t3712 @t739 @t3693 @t3697 @t713 @t3708 @t3729 @t80 @t3696 @t3699 @t82 @t3726 @t3727 @t765 @t3678 @t3682 @t687 @t3723 @t3744 @t79 @t3681 @t3684 @t83 @t3741 @t3742 @t791 @t3663 @t3667 @t661 @t3738 @t3759 @t78 @t3666 @t3669 @t84 @t3756 @t3757 @t817 @t3648 @t3652 @t635 @t3753 @t3774 @t77 @t3651 @t3654 @t85 @t3771 @t3772 @t843 @t3633 @t3637 @t609 @t3768 @t3789 @t76 @t3636 @t3639 @t86 @t3786 @t3787 @t869 @t3618 @t3622 @t583 @t3783 @t3804 @t75 @t3621 @t3624 @t87 @t3801 @t3802 @t895 @t3603 @t3607 @t557 @t3798 @t3819 @t74 @t3606 @t3609 @t88 @t3816 @t3817 @t921 @t3588 @t3592 @t531 @t3813 @t3834 @t73 @t3591 @t3594 @t89 @t3831 @t3832 @t947 @t3573 @t3577 @t505 @t3828 @t3849 @t72 @t3576 @t3579 @t90 @t3846 @t3847 @t973 @t3558 @t3562 @t479 @t3843 @t3864 @t71 @t3561 @t3564 @t91 @t3861 @t3862 @t999 @t3543 @t3547 @t453 @t3858 @t3879 @t70 @t3546 @t3549 @t92 @t3876 @t3877 @t1025 @t3528 @t3532 @t427 @t3873 @t3894 @t69 @t3531 @t3534 @t93 @t3891 @t3892 @t1051 @t3513 @t3517 @t401 @t3888 @t3909 @t68 @t3516 @t3519 @t94 @t3906 @t3907 @t1077 @t3498 @t3502 @t375 @t3903 @t3924 @t67 @t3501 @t3504 @t95 @t3921 @t3922 @t1103 @t3483 @t3487 @t349 @t3918 @t3939 @t66 @t3486 @t3489 @t96 @t3936 @t3937 @t1129 @t3468 @t3472 @t323 @t3933 @t3954 @t65 @t3471 @t3474 @t97 @t3951 @t3952 @t1155 @t3453 @t3457 @t297 @t3948 @t3969 @t64 @t3456 @t3459 @t98 @t3966 @t3967 @t1181 @t3441 @t3444 @t276 @t3963 @t3964 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6095 @t220) % 40.01/40.20 (step @p4471 :rule instantiate :premises (@p110) :args (@t3970)) % 40.01/40.20 (step-pop @p6096 :rule scope :premises (@p4471)) % 40.01/40.20 (step @p4472 :rule process_scope :premises (@p6096) :args (@t3973)) % 40.01/40.20 (step @p4474 :rule implies_elim :premises (@p4472)) % 40.01/40.20 (step @p4475 :rule cnf_or_pos :args (@t3973)) % 40.01/40.20 (step @p4476 :rule reordering :premises (@p4475) :args ((or @t3972 @t3971 (not @t3973)))) % 40.01/40.20 (step @p4477 :rule instantiate :premises (@p112) :args (@t3974)) % 40.01/40.20 (step @p4478 :rule cnf_or_pos :args (@t3975)) % 40.01/40.20 (step @p4479 :rule reordering :premises (@p4478) :args ((or @t3972 @t244 @t1209 (not @t3975)))) % 40.01/40.20 (step @p4480 :rule instantiate :premises (@p108) :args (@t3970)) % 40.01/40.20 (step @p4481 :rule cnf_or_pos :args (@t3977)) % 40.01/40.20 (step @p4482 :rule reordering :premises (@p4481) :args ((or @t1220 @t265 @t264 @t3976 (not @t3977)))) % 40.01/40.20 (step @p4483 :rule chain_m_resolution :premises (@p4482 @p4480 @p1220 @p1218 @p136 @p134 @p4479 @p4477 @p133 @p131 @p130 @p128 @p127 @p125 @p4476 @p4474 @p110) :args ((or @t3972 @t239) @t267 (@list @t3977 @t1220 @t1222 @t248 @t249 @t1209 @t3975 @t245 @t247 @t242 @t243 @t240 @t241 @t3971 @t3973 @t220))) % 40.01/40.20 (step @p4484 :rule instantiate :premises (@p119) :args (@t3974)) % 40.01/40.20 (step @p4485 :rule cnf_or_pos :args (@t3979)) % 40.01/40.20 (step @p4486 :rule reordering :premises (@p4485) :args ((or @t270 @t3972 @t3978 @t3440 (not @t3979)))) % 40.01/40.20 (step @p4487 :rule instantiate :premises (@p120) :args (@t1206)) % 40.01/40.20 (step @p4488 :rule cnf_or_pos :args (@t3982)) % 40.01/40.20 (step @p4489 :rule reordering :premises (@p4488) :args ((or @t3981 @t3980 @t1207 (not @t3982)))) % 40.01/40.20 (step @p4490 :rule instantiate :premises (@p121) :args (@t1205)) % 40.01/40.20 (step @p4491 :rule cnf_or_pos :args (@t3984)) % 40.01/40.20 (step @p4492 :rule reordering :premises (@p4491) :args ((or @t1215 @t3963 @t3983 (not @t3984)))) % 40.01/40.20 (step @p4493 :rule chain_m_resolution :premises (@p4057 @p4055 @p709 @p4084 @p4082 @p80 @p4060 @p4058 @p81 @p4081 @p4079 @p738 @p4033 @p4031 @p680 @p4108 @p4106 @p79 @p4036 @p4034 @p82 @p4105 @p4103 @p767 @p4009 @p4007 @p651 @p4132 @p4130 @p78 @p4012 @p4010 @p83 @p4129 @p4127 @p796 @p3985 @p3983 @p622 @p4156 @p4154 @p77 @p3988 @p3986 @p84 @p4153 @p4151 @p825 @p3961 @p3959 @p593 @p4180 @p4178 @p76 @p3964 @p3962 @p85 @p4177 @p4175 @p854 @p3937 @p3935 @p564 @p4204 @p4202 @p75 @p3940 @p3938 @p86 @p4201 @p4199 @p883 @p3913 @p3911 @p535 @p4228 @p4226 @p74 @p3916 @p3914 @p87 @p4225 @p4223 @p912 @p3889 @p3887 @p506 @p4252 @p4250 @p73 @p3892 @p3890 @p88 @p4249 @p4247 @p941 @p3865 @p3863 @p477 @p4276 @p4274 @p72 @p3868 @p3866 @p89 @p4273 @p4271 @p970 @p3841 @p3839 @p448 @p4300 @p4298 @p71 @p3844 @p3842 @p90 @p4297 @p4295 @p999 @p3817 @p3815 @p419 @p4324 @p4322 @p70 @p3820 @p3818 @p91 @p4321 @p4319 @p1028 @p3793 @p3791 @p390 @p4348 @p4346 @p69 @p3796 @p3794 @p92 @p4345 @p4343 @p1057 @p3769 @p3767 @p361 @p4372 @p4370 @p68 @p3772 @p3770 @p93 @p4369 @p4367 @p1086 @p3745 @p3743 @p332 @p4396 @p4394 @p67 @p3748 @p3746 @p94 @p4393 @p4391 @p1115 @p3721 @p3719 @p303 @p4420 @p4418 @p66 @p3724 @p3722 @p95 @p4417 @p4415 @p1144 @p3697 @p3695 @p274 @p4444 @p4442 @p65 @p3700 @p3698 @p96 @p4441 @p4439 @p1173 @p3673 @p3671 @p245 @p4468 @p4466 @p64 @p3676 @p3674 @p97 @p4465 @p4463 @p1202 @p3649 @p3647 @p216 @p4492 @p4490 @p63 @p3652 @p3650 @p98 @p4489 @p4487 @p1231 @p3628 @p3626 @p187 @p4486 @p4484 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4483) :args (@t3972 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3712 @t739 @t3708 @t3729 @t80 @t3711 @t3714 @t81 @t3726 @t3727 @t765 @t3693 @t3697 @t713 @t3723 @t3744 @t79 @t3696 @t3699 @t82 @t3741 @t3742 @t791 @t3678 @t3682 @t687 @t3738 @t3759 @t78 @t3681 @t3684 @t83 @t3756 @t3757 @t817 @t3663 @t3667 @t661 @t3753 @t3774 @t77 @t3666 @t3669 @t84 @t3771 @t3772 @t843 @t3648 @t3652 @t635 @t3768 @t3789 @t76 @t3651 @t3654 @t85 @t3786 @t3787 @t869 @t3633 @t3637 @t609 @t3783 @t3804 @t75 @t3636 @t3639 @t86 @t3801 @t3802 @t895 @t3618 @t3622 @t583 @t3798 @t3819 @t74 @t3621 @t3624 @t87 @t3816 @t3817 @t921 @t3603 @t3607 @t557 @t3813 @t3834 @t73 @t3606 @t3609 @t88 @t3831 @t3832 @t947 @t3588 @t3592 @t531 @t3828 @t3849 @t72 @t3591 @t3594 @t89 @t3846 @t3847 @t973 @t3573 @t3577 @t505 @t3843 @t3864 @t71 @t3576 @t3579 @t90 @t3861 @t3862 @t999 @t3558 @t3562 @t479 @t3858 @t3879 @t70 @t3561 @t3564 @t91 @t3876 @t3877 @t1025 @t3543 @t3547 @t453 @t3873 @t3894 @t69 @t3546 @t3549 @t92 @t3891 @t3892 @t1051 @t3528 @t3532 @t427 @t3888 @t3909 @t68 @t3531 @t3534 @t93 @t3906 @t3907 @t1077 @t3513 @t3517 @t401 @t3903 @t3924 @t67 @t3516 @t3519 @t94 @t3921 @t3922 @t1103 @t3498 @t3502 @t375 @t3918 @t3939 @t66 @t3501 @t3504 @t95 @t3936 @t3937 @t1129 @t3483 @t3487 @t349 @t3933 @t3954 @t65 @t3486 @t3489 @t96 @t3951 @t3952 @t1155 @t3468 @t3472 @t323 @t3948 @t3969 @t64 @t3471 @t3474 @t97 @t3966 @t3967 @t1181 @t3453 @t3457 @t297 @t3963 @t3984 @t63 @t3456 @t3459 @t98 @t3981 @t3982 @t1207 @t3441 @t3444 @t276 @t3978 @t3979 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6097 @t220) % 40.01/40.20 (step @p4495 :rule instantiate :premises (@p110) :args (@t3985)) % 40.01/40.20 (step-pop @p6098 :rule scope :premises (@p4495)) % 40.01/40.20 (step @p4496 :rule process_scope :premises (@p6098) :args (@t3988)) % 40.01/40.20 (step @p4498 :rule implies_elim :premises (@p4496)) % 40.01/40.20 (step @p4499 :rule cnf_or_pos :args (@t3988)) % 40.01/40.20 (step @p4500 :rule reordering :premises (@p4499) :args ((or @t3987 @t3986 (not @t3988)))) % 40.01/40.20 (step @p4501 :rule instantiate :premises (@p112) :args (@t3989)) % 40.01/40.20 (step @p4502 :rule cnf_or_pos :args (@t3990)) % 40.01/40.20 (step @p4503 :rule reordering :premises (@p4502) :args ((or @t3987 @t244 @t1235 (not @t3990)))) % 40.01/40.20 (step @p4504 :rule instantiate :premises (@p108) :args (@t3985)) % 40.01/40.20 (step @p4505 :rule cnf_or_pos :args (@t3992)) % 40.01/40.20 (step @p4506 :rule reordering :premises (@p4505) :args ((or @t1246 @t265 @t264 @t3991 (not @t3992)))) % 40.01/40.20 (step @p4507 :rule chain_m_resolution :premises (@p4506 @p4504 @p1249 @p1247 @p136 @p134 @p4503 @p4501 @p133 @p131 @p130 @p128 @p127 @p125 @p4500 @p4498 @p110) :args ((or @t3987 @t239) @t267 (@list @t3992 @t1246 @t1248 @t248 @t249 @t1235 @t3990 @t245 @t247 @t242 @t243 @t240 @t241 @t3986 @t3988 @t220))) % 40.01/40.20 (step @p4508 :rule instantiate :premises (@p119) :args (@t3989)) % 40.01/40.20 (step @p4509 :rule cnf_or_pos :args (@t3994)) % 40.01/40.20 (step @p4510 :rule reordering :premises (@p4509) :args ((or @t270 @t3987 @t3993 @t3440 (not @t3994)))) % 40.01/40.20 (step @p4511 :rule instantiate :premises (@p120) :args (@t1232)) % 40.01/40.20 (step @p4512 :rule cnf_or_pos :args (@t3997)) % 40.01/40.20 (step @p4513 :rule reordering :premises (@p4512) :args ((or @t3996 @t3995 @t1233 (not @t3997)))) % 40.01/40.20 (step @p4514 :rule instantiate :premises (@p121) :args (@t1231)) % 40.01/40.20 (step @p4515 :rule cnf_or_pos :args (@t3999)) % 40.01/40.20 (step @p4516 :rule reordering :premises (@p4515) :args ((or @t1241 @t3978 @t3998 (not @t3999)))) % 40.01/40.20 (step @p4517 :rule chain_m_resolution :premises (@p4084 @p4082 @p80 @p4081 @p4079 @p738 @p4057 @p4055 @p709 @p4108 @p4106 @p79 @p4060 @p4058 @p81 @p4105 @p4103 @p767 @p4033 @p4031 @p680 @p4132 @p4130 @p78 @p4036 @p4034 @p82 @p4129 @p4127 @p796 @p4009 @p4007 @p651 @p4156 @p4154 @p77 @p4012 @p4010 @p83 @p4153 @p4151 @p825 @p3985 @p3983 @p622 @p4180 @p4178 @p76 @p3988 @p3986 @p84 @p4177 @p4175 @p854 @p3961 @p3959 @p593 @p4204 @p4202 @p75 @p3964 @p3962 @p85 @p4201 @p4199 @p883 @p3937 @p3935 @p564 @p4228 @p4226 @p74 @p3940 @p3938 @p86 @p4225 @p4223 @p912 @p3913 @p3911 @p535 @p4252 @p4250 @p73 @p3916 @p3914 @p87 @p4249 @p4247 @p941 @p3889 @p3887 @p506 @p4276 @p4274 @p72 @p3892 @p3890 @p88 @p4273 @p4271 @p970 @p3865 @p3863 @p477 @p4300 @p4298 @p71 @p3868 @p3866 @p89 @p4297 @p4295 @p999 @p3841 @p3839 @p448 @p4324 @p4322 @p70 @p3844 @p3842 @p90 @p4321 @p4319 @p1028 @p3817 @p3815 @p419 @p4348 @p4346 @p69 @p3820 @p3818 @p91 @p4345 @p4343 @p1057 @p3793 @p3791 @p390 @p4372 @p4370 @p68 @p3796 @p3794 @p92 @p4369 @p4367 @p1086 @p3769 @p3767 @p361 @p4396 @p4394 @p67 @p3772 @p3770 @p93 @p4393 @p4391 @p1115 @p3745 @p3743 @p332 @p4420 @p4418 @p66 @p3748 @p3746 @p94 @p4417 @p4415 @p1144 @p3721 @p3719 @p303 @p4444 @p4442 @p65 @p3724 @p3722 @p95 @p4441 @p4439 @p1173 @p3697 @p3695 @p274 @p4468 @p4466 @p64 @p3700 @p3698 @p96 @p4465 @p4463 @p1202 @p3673 @p3671 @p245 @p4492 @p4490 @p63 @p3676 @p3674 @p97 @p4489 @p4487 @p1231 @p3649 @p3647 @p216 @p4516 @p4514 @p62 @p3652 @p3650 @p98 @p4513 @p4511 @p1260 @p3628 @p3626 @p187 @p4510 @p4508 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4507) :args (@t3987 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3729 @t80 @t3726 @t3727 @t765 @t3708 @t3712 @t739 @t3723 @t3744 @t79 @t3711 @t3714 @t81 @t3741 @t3742 @t791 @t3693 @t3697 @t713 @t3738 @t3759 @t78 @t3696 @t3699 @t82 @t3756 @t3757 @t817 @t3678 @t3682 @t687 @t3753 @t3774 @t77 @t3681 @t3684 @t83 @t3771 @t3772 @t843 @t3663 @t3667 @t661 @t3768 @t3789 @t76 @t3666 @t3669 @t84 @t3786 @t3787 @t869 @t3648 @t3652 @t635 @t3783 @t3804 @t75 @t3651 @t3654 @t85 @t3801 @t3802 @t895 @t3633 @t3637 @t609 @t3798 @t3819 @t74 @t3636 @t3639 @t86 @t3816 @t3817 @t921 @t3618 @t3622 @t583 @t3813 @t3834 @t73 @t3621 @t3624 @t87 @t3831 @t3832 @t947 @t3603 @t3607 @t557 @t3828 @t3849 @t72 @t3606 @t3609 @t88 @t3846 @t3847 @t973 @t3588 @t3592 @t531 @t3843 @t3864 @t71 @t3591 @t3594 @t89 @t3861 @t3862 @t999 @t3573 @t3577 @t505 @t3858 @t3879 @t70 @t3576 @t3579 @t90 @t3876 @t3877 @t1025 @t3558 @t3562 @t479 @t3873 @t3894 @t69 @t3561 @t3564 @t91 @t3891 @t3892 @t1051 @t3543 @t3547 @t453 @t3888 @t3909 @t68 @t3546 @t3549 @t92 @t3906 @t3907 @t1077 @t3528 @t3532 @t427 @t3903 @t3924 @t67 @t3531 @t3534 @t93 @t3921 @t3922 @t1103 @t3513 @t3517 @t401 @t3918 @t3939 @t66 @t3516 @t3519 @t94 @t3936 @t3937 @t1129 @t3498 @t3502 @t375 @t3933 @t3954 @t65 @t3501 @t3504 @t95 @t3951 @t3952 @t1155 @t3483 @t3487 @t349 @t3948 @t3969 @t64 @t3486 @t3489 @t96 @t3966 @t3967 @t1181 @t3468 @t3472 @t323 @t3963 @t3984 @t63 @t3471 @t3474 @t97 @t3981 @t3982 @t1207 @t3453 @t3457 @t297 @t3978 @t3999 @t62 @t3456 @t3459 @t98 @t3996 @t3997 @t1233 @t3441 @t3444 @t276 @t3993 @t3994 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6099 @t220) % 40.01/40.20 (step @p4519 :rule instantiate :premises (@p110) :args (@t4000)) % 40.01/40.20 (step-pop @p6100 :rule scope :premises (@p4519)) % 40.01/40.20 (step @p4520 :rule process_scope :premises (@p6100) :args (@t4003)) % 40.01/40.20 (step @p4522 :rule implies_elim :premises (@p4520)) % 40.01/40.20 (step @p4523 :rule cnf_or_pos :args (@t4003)) % 40.01/40.20 (step @p4524 :rule reordering :premises (@p4523) :args ((or @t4002 @t4001 (not @t4003)))) % 40.01/40.20 (step @p4525 :rule instantiate :premises (@p112) :args (@t4004)) % 40.01/40.20 (step @p4526 :rule cnf_or_pos :args (@t4005)) % 40.01/40.20 (step @p4527 :rule reordering :premises (@p4526) :args ((or @t4002 @t244 @t1261 (not @t4005)))) % 40.01/40.20 (step @p4528 :rule instantiate :premises (@p108) :args (@t4000)) % 40.01/40.20 (step @p4529 :rule cnf_or_pos :args (@t4007)) % 40.01/40.20 (step @p4530 :rule reordering :premises (@p4529) :args ((or @t1272 @t265 @t264 @t4006 (not @t4007)))) % 40.01/40.20 (step @p4531 :rule chain_m_resolution :premises (@p4530 @p4528 @p1278 @p1276 @p136 @p134 @p4527 @p4525 @p133 @p131 @p130 @p128 @p127 @p125 @p4524 @p4522 @p110) :args ((or @t4002 @t239) @t267 (@list @t4007 @t1272 @t1274 @t248 @t249 @t1261 @t4005 @t245 @t247 @t242 @t243 @t240 @t241 @t4001 @t4003 @t220))) % 40.01/40.20 (step @p4532 :rule instantiate :premises (@p119) :args (@t4004)) % 40.01/40.20 (step @p4533 :rule cnf_or_pos :args (@t4009)) % 40.01/40.20 (step @p4534 :rule reordering :premises (@p4533) :args ((or @t270 @t4002 @t4008 @t3440 (not @t4009)))) % 40.01/40.20 (step @p4535 :rule instantiate :premises (@p120) :args (@t1258)) % 40.01/40.20 (step @p4536 :rule cnf_or_pos :args (@t4012)) % 40.01/40.20 (step @p4537 :rule reordering :premises (@p4536) :args ((or @t4011 @t4010 @t1259 (not @t4012)))) % 40.01/40.20 (step @p4538 :rule instantiate :premises (@p121) :args (@t1257)) % 40.01/40.20 (step @p4539 :rule cnf_or_pos :args (@t4014)) % 40.01/40.20 (step @p4540 :rule reordering :premises (@p4539) :args ((or @t1267 @t3993 @t4013 (not @t4014)))) % 40.01/40.20 (step @p4541 :rule chain_m_resolution :premises (@p4081 @p4079 @p738 @p4108 @p4106 @p79 @p4084 @p4082 @p80 @p4105 @p4103 @p767 @p4057 @p4055 @p709 @p4132 @p4130 @p78 @p4060 @p4058 @p81 @p4129 @p4127 @p796 @p4033 @p4031 @p680 @p4156 @p4154 @p77 @p4036 @p4034 @p82 @p4153 @p4151 @p825 @p4009 @p4007 @p651 @p4180 @p4178 @p76 @p4012 @p4010 @p83 @p4177 @p4175 @p854 @p3985 @p3983 @p622 @p4204 @p4202 @p75 @p3988 @p3986 @p84 @p4201 @p4199 @p883 @p3961 @p3959 @p593 @p4228 @p4226 @p74 @p3964 @p3962 @p85 @p4225 @p4223 @p912 @p3937 @p3935 @p564 @p4252 @p4250 @p73 @p3940 @p3938 @p86 @p4249 @p4247 @p941 @p3913 @p3911 @p535 @p4276 @p4274 @p72 @p3916 @p3914 @p87 @p4273 @p4271 @p970 @p3889 @p3887 @p506 @p4300 @p4298 @p71 @p3892 @p3890 @p88 @p4297 @p4295 @p999 @p3865 @p3863 @p477 @p4324 @p4322 @p70 @p3868 @p3866 @p89 @p4321 @p4319 @p1028 @p3841 @p3839 @p448 @p4348 @p4346 @p69 @p3844 @p3842 @p90 @p4345 @p4343 @p1057 @p3817 @p3815 @p419 @p4372 @p4370 @p68 @p3820 @p3818 @p91 @p4369 @p4367 @p1086 @p3793 @p3791 @p390 @p4396 @p4394 @p67 @p3796 @p3794 @p92 @p4393 @p4391 @p1115 @p3769 @p3767 @p361 @p4420 @p4418 @p66 @p3772 @p3770 @p93 @p4417 @p4415 @p1144 @p3745 @p3743 @p332 @p4444 @p4442 @p65 @p3748 @p3746 @p94 @p4441 @p4439 @p1173 @p3721 @p3719 @p303 @p4468 @p4466 @p64 @p3724 @p3722 @p95 @p4465 @p4463 @p1202 @p3697 @p3695 @p274 @p4492 @p4490 @p63 @p3700 @p3698 @p96 @p4489 @p4487 @p1231 @p3673 @p3671 @p245 @p4516 @p4514 @p62 @p3676 @p3674 @p97 @p4513 @p4511 @p1260 @p3649 @p3647 @p216 @p4540 @p4538 @p61 @p3652 @p3650 @p98 @p4537 @p4535 @p1289 @p3628 @p3626 @p187 @p4534 @p4532 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4531) :args (@t4002 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3727 @t765 @t3723 @t3744 @t79 @t3726 @t3729 @t80 @t3741 @t3742 @t791 @t3708 @t3712 @t739 @t3738 @t3759 @t78 @t3711 @t3714 @t81 @t3756 @t3757 @t817 @t3693 @t3697 @t713 @t3753 @t3774 @t77 @t3696 @t3699 @t82 @t3771 @t3772 @t843 @t3678 @t3682 @t687 @t3768 @t3789 @t76 @t3681 @t3684 @t83 @t3786 @t3787 @t869 @t3663 @t3667 @t661 @t3783 @t3804 @t75 @t3666 @t3669 @t84 @t3801 @t3802 @t895 @t3648 @t3652 @t635 @t3798 @t3819 @t74 @t3651 @t3654 @t85 @t3816 @t3817 @t921 @t3633 @t3637 @t609 @t3813 @t3834 @t73 @t3636 @t3639 @t86 @t3831 @t3832 @t947 @t3618 @t3622 @t583 @t3828 @t3849 @t72 @t3621 @t3624 @t87 @t3846 @t3847 @t973 @t3603 @t3607 @t557 @t3843 @t3864 @t71 @t3606 @t3609 @t88 @t3861 @t3862 @t999 @t3588 @t3592 @t531 @t3858 @t3879 @t70 @t3591 @t3594 @t89 @t3876 @t3877 @t1025 @t3573 @t3577 @t505 @t3873 @t3894 @t69 @t3576 @t3579 @t90 @t3891 @t3892 @t1051 @t3558 @t3562 @t479 @t3888 @t3909 @t68 @t3561 @t3564 @t91 @t3906 @t3907 @t1077 @t3543 @t3547 @t453 @t3903 @t3924 @t67 @t3546 @t3549 @t92 @t3921 @t3922 @t1103 @t3528 @t3532 @t427 @t3918 @t3939 @t66 @t3531 @t3534 @t93 @t3936 @t3937 @t1129 @t3513 @t3517 @t401 @t3933 @t3954 @t65 @t3516 @t3519 @t94 @t3951 @t3952 @t1155 @t3498 @t3502 @t375 @t3948 @t3969 @t64 @t3501 @t3504 @t95 @t3966 @t3967 @t1181 @t3483 @t3487 @t349 @t3963 @t3984 @t63 @t3486 @t3489 @t96 @t3981 @t3982 @t1207 @t3468 @t3472 @t323 @t3978 @t3999 @t62 @t3471 @t3474 @t97 @t3996 @t3997 @t1233 @t3453 @t3457 @t297 @t3993 @t4014 @t61 @t3456 @t3459 @t98 @t4011 @t4012 @t1259 @t3441 @t3444 @t276 @t4008 @t4009 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6101 @t220) % 40.01/40.20 (step @p4543 :rule instantiate :premises (@p110) :args (@t4015)) % 40.01/40.20 (step-pop @p6102 :rule scope :premises (@p4543)) % 40.01/40.20 (step @p4544 :rule process_scope :premises (@p6102) :args (@t4018)) % 40.01/40.20 (step @p4546 :rule implies_elim :premises (@p4544)) % 40.01/40.20 (step @p4547 :rule cnf_or_pos :args (@t4018)) % 40.01/40.20 (step @p4548 :rule reordering :premises (@p4547) :args ((or @t4017 @t4016 (not @t4018)))) % 40.01/40.20 (step @p4549 :rule instantiate :premises (@p112) :args (@t4019)) % 40.01/40.20 (step @p4550 :rule cnf_or_pos :args (@t4020)) % 40.01/40.20 (step @p4551 :rule reordering :premises (@p4550) :args ((or @t4017 @t244 @t1287 (not @t4020)))) % 40.01/40.20 (step @p4552 :rule instantiate :premises (@p108) :args (@t4015)) % 40.01/40.20 (step @p4553 :rule cnf_or_pos :args (@t4022)) % 40.01/40.20 (step @p4554 :rule reordering :premises (@p4553) :args ((or @t1298 @t265 @t264 @t4021 (not @t4022)))) % 40.01/40.20 (step @p4555 :rule chain_m_resolution :premises (@p4554 @p4552 @p1307 @p1305 @p136 @p134 @p4551 @p4549 @p133 @p131 @p130 @p128 @p127 @p125 @p4548 @p4546 @p110) :args ((or @t4017 @t239) @t267 (@list @t4022 @t1298 @t1300 @t248 @t249 @t1287 @t4020 @t245 @t247 @t242 @t243 @t240 @t241 @t4016 @t4018 @t220))) % 40.01/40.20 (step @p4556 :rule instantiate :premises (@p119) :args (@t4019)) % 40.01/40.20 (step @p4557 :rule cnf_or_pos :args (@t4024)) % 40.01/40.20 (step @p4558 :rule reordering :premises (@p4557) :args ((or @t270 @t4017 @t4023 @t3440 (not @t4024)))) % 40.01/40.20 (step @p4559 :rule instantiate :premises (@p120) :args (@t1284)) % 40.01/40.20 (step @p4560 :rule cnf_or_pos :args (@t4027)) % 40.01/40.20 (step @p4561 :rule reordering :premises (@p4560) :args ((or @t4026 @t4025 @t1285 (not @t4027)))) % 40.01/40.20 (step @p4562 :rule instantiate :premises (@p121) :args (@t1283)) % 40.01/40.20 (step @p4563 :rule cnf_or_pos :args (@t4029)) % 40.01/40.20 (step @p4564 :rule reordering :premises (@p4563) :args ((or @t1293 @t4008 @t4028 (not @t4029)))) % 40.01/40.20 (step @p4565 :rule chain_m_resolution :premises (@p4108 @p4106 @p79 @p4105 @p4103 @p767 @p4081 @p4079 @p738 @p4132 @p4130 @p78 @p4084 @p4082 @p80 @p4129 @p4127 @p796 @p4057 @p4055 @p709 @p4156 @p4154 @p77 @p4060 @p4058 @p81 @p4153 @p4151 @p825 @p4033 @p4031 @p680 @p4180 @p4178 @p76 @p4036 @p4034 @p82 @p4177 @p4175 @p854 @p4009 @p4007 @p651 @p4204 @p4202 @p75 @p4012 @p4010 @p83 @p4201 @p4199 @p883 @p3985 @p3983 @p622 @p4228 @p4226 @p74 @p3988 @p3986 @p84 @p4225 @p4223 @p912 @p3961 @p3959 @p593 @p4252 @p4250 @p73 @p3964 @p3962 @p85 @p4249 @p4247 @p941 @p3937 @p3935 @p564 @p4276 @p4274 @p72 @p3940 @p3938 @p86 @p4273 @p4271 @p970 @p3913 @p3911 @p535 @p4300 @p4298 @p71 @p3916 @p3914 @p87 @p4297 @p4295 @p999 @p3889 @p3887 @p506 @p4324 @p4322 @p70 @p3892 @p3890 @p88 @p4321 @p4319 @p1028 @p3865 @p3863 @p477 @p4348 @p4346 @p69 @p3868 @p3866 @p89 @p4345 @p4343 @p1057 @p3841 @p3839 @p448 @p4372 @p4370 @p68 @p3844 @p3842 @p90 @p4369 @p4367 @p1086 @p3817 @p3815 @p419 @p4396 @p4394 @p67 @p3820 @p3818 @p91 @p4393 @p4391 @p1115 @p3793 @p3791 @p390 @p4420 @p4418 @p66 @p3796 @p3794 @p92 @p4417 @p4415 @p1144 @p3769 @p3767 @p361 @p4444 @p4442 @p65 @p3772 @p3770 @p93 @p4441 @p4439 @p1173 @p3745 @p3743 @p332 @p4468 @p4466 @p64 @p3748 @p3746 @p94 @p4465 @p4463 @p1202 @p3721 @p3719 @p303 @p4492 @p4490 @p63 @p3724 @p3722 @p95 @p4489 @p4487 @p1231 @p3697 @p3695 @p274 @p4516 @p4514 @p62 @p3700 @p3698 @p96 @p4513 @p4511 @p1260 @p3673 @p3671 @p245 @p4540 @p4538 @p61 @p3676 @p3674 @p97 @p4537 @p4535 @p1289 @p3649 @p3647 @p216 @p4564 @p4562 @p60 @p3652 @p3650 @p98 @p4561 @p4559 @p1318 @p3628 @p3626 @p187 @p4558 @p4556 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4555) :args (@t4017 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3744 @t79 @t3741 @t3742 @t791 @t3723 @t3727 @t765 @t3738 @t3759 @t78 @t3726 @t3729 @t80 @t3756 @t3757 @t817 @t3708 @t3712 @t739 @t3753 @t3774 @t77 @t3711 @t3714 @t81 @t3771 @t3772 @t843 @t3693 @t3697 @t713 @t3768 @t3789 @t76 @t3696 @t3699 @t82 @t3786 @t3787 @t869 @t3678 @t3682 @t687 @t3783 @t3804 @t75 @t3681 @t3684 @t83 @t3801 @t3802 @t895 @t3663 @t3667 @t661 @t3798 @t3819 @t74 @t3666 @t3669 @t84 @t3816 @t3817 @t921 @t3648 @t3652 @t635 @t3813 @t3834 @t73 @t3651 @t3654 @t85 @t3831 @t3832 @t947 @t3633 @t3637 @t609 @t3828 @t3849 @t72 @t3636 @t3639 @t86 @t3846 @t3847 @t973 @t3618 @t3622 @t583 @t3843 @t3864 @t71 @t3621 @t3624 @t87 @t3861 @t3862 @t999 @t3603 @t3607 @t557 @t3858 @t3879 @t70 @t3606 @t3609 @t88 @t3876 @t3877 @t1025 @t3588 @t3592 @t531 @t3873 @t3894 @t69 @t3591 @t3594 @t89 @t3891 @t3892 @t1051 @t3573 @t3577 @t505 @t3888 @t3909 @t68 @t3576 @t3579 @t90 @t3906 @t3907 @t1077 @t3558 @t3562 @t479 @t3903 @t3924 @t67 @t3561 @t3564 @t91 @t3921 @t3922 @t1103 @t3543 @t3547 @t453 @t3918 @t3939 @t66 @t3546 @t3549 @t92 @t3936 @t3937 @t1129 @t3528 @t3532 @t427 @t3933 @t3954 @t65 @t3531 @t3534 @t93 @t3951 @t3952 @t1155 @t3513 @t3517 @t401 @t3948 @t3969 @t64 @t3516 @t3519 @t94 @t3966 @t3967 @t1181 @t3498 @t3502 @t375 @t3963 @t3984 @t63 @t3501 @t3504 @t95 @t3981 @t3982 @t1207 @t3483 @t3487 @t349 @t3978 @t3999 @t62 @t3486 @t3489 @t96 @t3996 @t3997 @t1233 @t3468 @t3472 @t323 @t3993 @t4014 @t61 @t3471 @t3474 @t97 @t4011 @t4012 @t1259 @t3453 @t3457 @t297 @t4008 @t4029 @t60 @t3456 @t3459 @t98 @t4026 @t4027 @t1285 @t3441 @t3444 @t276 @t4023 @t4024 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6103 @t220) % 40.01/40.20 (step @p4567 :rule instantiate :premises (@p110) :args (@t4030)) % 40.01/40.20 (step-pop @p6104 :rule scope :premises (@p4567)) % 40.01/40.20 (step @p4568 :rule process_scope :premises (@p6104) :args (@t4033)) % 40.01/40.20 (step @p4570 :rule implies_elim :premises (@p4568)) % 40.01/40.20 (step @p4571 :rule cnf_or_pos :args (@t4033)) % 40.01/40.20 (step @p4572 :rule reordering :premises (@p4571) :args ((or @t4032 @t4031 (not @t4033)))) % 40.01/40.20 (step @p4573 :rule instantiate :premises (@p112) :args (@t4034)) % 40.01/40.20 (step @p4574 :rule cnf_or_pos :args (@t4035)) % 40.01/40.20 (step @p4575 :rule reordering :premises (@p4574) :args ((or @t4032 @t244 @t1313 (not @t4035)))) % 40.01/40.20 (step @p4576 :rule instantiate :premises (@p108) :args (@t4030)) % 40.01/40.20 (step @p4577 :rule cnf_or_pos :args (@t4037)) % 40.01/40.20 (step @p4578 :rule reordering :premises (@p4577) :args ((or @t1324 @t265 @t264 @t4036 (not @t4037)))) % 40.01/40.20 (step @p4579 :rule chain_m_resolution :premises (@p4578 @p4576 @p1336 @p1334 @p136 @p134 @p4575 @p4573 @p133 @p131 @p130 @p128 @p127 @p125 @p4572 @p4570 @p110) :args ((or @t4032 @t239) @t267 (@list @t4037 @t1324 @t1326 @t248 @t249 @t1313 @t4035 @t245 @t247 @t242 @t243 @t240 @t241 @t4031 @t4033 @t220))) % 40.01/40.20 (step @p4580 :rule instantiate :premises (@p119) :args (@t4034)) % 40.01/40.20 (step @p4581 :rule cnf_or_pos :args (@t4039)) % 40.01/40.20 (step @p4582 :rule reordering :premises (@p4581) :args ((or @t270 @t4032 @t4038 @t3440 (not @t4039)))) % 40.01/40.20 (step @p4583 :rule instantiate :premises (@p120) :args (@t1310)) % 40.01/40.20 (step @p4584 :rule cnf_or_pos :args (@t4042)) % 40.01/40.20 (step @p4585 :rule reordering :premises (@p4584) :args ((or @t4041 @t4040 @t1311 (not @t4042)))) % 40.01/40.20 (step @p4586 :rule instantiate :premises (@p121) :args (@t1309)) % 40.01/40.20 (step @p4587 :rule cnf_or_pos :args (@t4044)) % 40.01/40.20 (step @p4588 :rule reordering :premises (@p4587) :args ((or @t1319 @t4023 @t4043 (not @t4044)))) % 40.01/40.20 (step @p4589 :rule chain_m_resolution :premises (@p4105 @p4103 @p767 @p4132 @p4130 @p78 @p4108 @p4106 @p79 @p4129 @p4127 @p796 @p4081 @p4079 @p738 @p4156 @p4154 @p77 @p4084 @p4082 @p80 @p4153 @p4151 @p825 @p4057 @p4055 @p709 @p4180 @p4178 @p76 @p4060 @p4058 @p81 @p4177 @p4175 @p854 @p4033 @p4031 @p680 @p4204 @p4202 @p75 @p4036 @p4034 @p82 @p4201 @p4199 @p883 @p4009 @p4007 @p651 @p4228 @p4226 @p74 @p4012 @p4010 @p83 @p4225 @p4223 @p912 @p3985 @p3983 @p622 @p4252 @p4250 @p73 @p3988 @p3986 @p84 @p4249 @p4247 @p941 @p3961 @p3959 @p593 @p4276 @p4274 @p72 @p3964 @p3962 @p85 @p4273 @p4271 @p970 @p3937 @p3935 @p564 @p4300 @p4298 @p71 @p3940 @p3938 @p86 @p4297 @p4295 @p999 @p3913 @p3911 @p535 @p4324 @p4322 @p70 @p3916 @p3914 @p87 @p4321 @p4319 @p1028 @p3889 @p3887 @p506 @p4348 @p4346 @p69 @p3892 @p3890 @p88 @p4345 @p4343 @p1057 @p3865 @p3863 @p477 @p4372 @p4370 @p68 @p3868 @p3866 @p89 @p4369 @p4367 @p1086 @p3841 @p3839 @p448 @p4396 @p4394 @p67 @p3844 @p3842 @p90 @p4393 @p4391 @p1115 @p3817 @p3815 @p419 @p4420 @p4418 @p66 @p3820 @p3818 @p91 @p4417 @p4415 @p1144 @p3793 @p3791 @p390 @p4444 @p4442 @p65 @p3796 @p3794 @p92 @p4441 @p4439 @p1173 @p3769 @p3767 @p361 @p4468 @p4466 @p64 @p3772 @p3770 @p93 @p4465 @p4463 @p1202 @p3745 @p3743 @p332 @p4492 @p4490 @p63 @p3748 @p3746 @p94 @p4489 @p4487 @p1231 @p3721 @p3719 @p303 @p4516 @p4514 @p62 @p3724 @p3722 @p95 @p4513 @p4511 @p1260 @p3697 @p3695 @p274 @p4540 @p4538 @p61 @p3700 @p3698 @p96 @p4537 @p4535 @p1289 @p3673 @p3671 @p245 @p4564 @p4562 @p60 @p3676 @p3674 @p97 @p4561 @p4559 @p1318 @p3649 @p3647 @p216 @p4588 @p4586 @p59 @p3652 @p3650 @p98 @p4585 @p4583 @p1347 @p3628 @p3626 @p187 @p4582 @p4580 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4579) :args (@t4032 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3742 @t791 @t3738 @t3759 @t78 @t3741 @t3744 @t79 @t3756 @t3757 @t817 @t3723 @t3727 @t765 @t3753 @t3774 @t77 @t3726 @t3729 @t80 @t3771 @t3772 @t843 @t3708 @t3712 @t739 @t3768 @t3789 @t76 @t3711 @t3714 @t81 @t3786 @t3787 @t869 @t3693 @t3697 @t713 @t3783 @t3804 @t75 @t3696 @t3699 @t82 @t3801 @t3802 @t895 @t3678 @t3682 @t687 @t3798 @t3819 @t74 @t3681 @t3684 @t83 @t3816 @t3817 @t921 @t3663 @t3667 @t661 @t3813 @t3834 @t73 @t3666 @t3669 @t84 @t3831 @t3832 @t947 @t3648 @t3652 @t635 @t3828 @t3849 @t72 @t3651 @t3654 @t85 @t3846 @t3847 @t973 @t3633 @t3637 @t609 @t3843 @t3864 @t71 @t3636 @t3639 @t86 @t3861 @t3862 @t999 @t3618 @t3622 @t583 @t3858 @t3879 @t70 @t3621 @t3624 @t87 @t3876 @t3877 @t1025 @t3603 @t3607 @t557 @t3873 @t3894 @t69 @t3606 @t3609 @t88 @t3891 @t3892 @t1051 @t3588 @t3592 @t531 @t3888 @t3909 @t68 @t3591 @t3594 @t89 @t3906 @t3907 @t1077 @t3573 @t3577 @t505 @t3903 @t3924 @t67 @t3576 @t3579 @t90 @t3921 @t3922 @t1103 @t3558 @t3562 @t479 @t3918 @t3939 @t66 @t3561 @t3564 @t91 @t3936 @t3937 @t1129 @t3543 @t3547 @t453 @t3933 @t3954 @t65 @t3546 @t3549 @t92 @t3951 @t3952 @t1155 @t3528 @t3532 @t427 @t3948 @t3969 @t64 @t3531 @t3534 @t93 @t3966 @t3967 @t1181 @t3513 @t3517 @t401 @t3963 @t3984 @t63 @t3516 @t3519 @t94 @t3981 @t3982 @t1207 @t3498 @t3502 @t375 @t3978 @t3999 @t62 @t3501 @t3504 @t95 @t3996 @t3997 @t1233 @t3483 @t3487 @t349 @t3993 @t4014 @t61 @t3486 @t3489 @t96 @t4011 @t4012 @t1259 @t3468 @t3472 @t323 @t4008 @t4029 @t60 @t3471 @t3474 @t97 @t4026 @t4027 @t1285 @t3453 @t3457 @t297 @t4023 @t4044 @t59 @t3456 @t3459 @t98 @t4041 @t4042 @t1311 @t3441 @t3444 @t276 @t4038 @t4039 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6105 @t220) % 40.01/40.20 (step @p4591 :rule instantiate :premises (@p110) :args (@t4045)) % 40.01/40.20 (step-pop @p6106 :rule scope :premises (@p4591)) % 40.01/40.20 (step @p4592 :rule process_scope :premises (@p6106) :args (@t4048)) % 40.01/40.20 (step @p4594 :rule implies_elim :premises (@p4592)) % 40.01/40.20 (step @p4595 :rule cnf_or_pos :args (@t4048)) % 40.01/40.20 (step @p4596 :rule reordering :premises (@p4595) :args ((or @t4047 @t4046 (not @t4048)))) % 40.01/40.20 (step @p4597 :rule instantiate :premises (@p112) :args (@t4049)) % 40.01/40.20 (step @p4598 :rule cnf_or_pos :args (@t4050)) % 40.01/40.20 (step @p4599 :rule reordering :premises (@p4598) :args ((or @t4047 @t244 @t1339 (not @t4050)))) % 40.01/40.20 (step @p4600 :rule instantiate :premises (@p108) :args (@t4045)) % 40.01/40.20 (step @p4601 :rule cnf_or_pos :args (@t4052)) % 40.01/40.20 (step @p4602 :rule reordering :premises (@p4601) :args ((or @t1350 @t265 @t264 @t4051 (not @t4052)))) % 40.01/40.20 (step @p4603 :rule chain_m_resolution :premises (@p4602 @p4600 @p1365 @p1363 @p136 @p134 @p4599 @p4597 @p133 @p131 @p130 @p128 @p127 @p125 @p4596 @p4594 @p110) :args ((or @t4047 @t239) @t267 (@list @t4052 @t1350 @t1352 @t248 @t249 @t1339 @t4050 @t245 @t247 @t242 @t243 @t240 @t241 @t4046 @t4048 @t220))) % 40.01/40.20 (step @p4604 :rule instantiate :premises (@p119) :args (@t4049)) % 40.01/40.20 (step @p4605 :rule cnf_or_pos :args (@t4054)) % 40.01/40.20 (step @p4606 :rule reordering :premises (@p4605) :args ((or @t270 @t4047 @t4053 @t3440 (not @t4054)))) % 40.01/40.20 (step @p4607 :rule instantiate :premises (@p120) :args (@t1336)) % 40.01/40.20 (step @p4608 :rule cnf_or_pos :args (@t4057)) % 40.01/40.20 (step @p4609 :rule reordering :premises (@p4608) :args ((or @t4056 @t4055 @t1337 (not @t4057)))) % 40.01/40.20 (step @p4610 :rule instantiate :premises (@p121) :args (@t1335)) % 40.01/40.20 (step @p4611 :rule cnf_or_pos :args (@t4059)) % 40.01/40.20 (step @p4612 :rule reordering :premises (@p4611) :args ((or @t1345 @t4038 @t4058 (not @t4059)))) % 40.01/40.20 (step @p4613 :rule chain_m_resolution :premises (@p4132 @p4130 @p78 @p4129 @p4127 @p796 @p4105 @p4103 @p767 @p4156 @p4154 @p77 @p4108 @p4106 @p79 @p4153 @p4151 @p825 @p4081 @p4079 @p738 @p4180 @p4178 @p76 @p4084 @p4082 @p80 @p4177 @p4175 @p854 @p4057 @p4055 @p709 @p4204 @p4202 @p75 @p4060 @p4058 @p81 @p4201 @p4199 @p883 @p4033 @p4031 @p680 @p4228 @p4226 @p74 @p4036 @p4034 @p82 @p4225 @p4223 @p912 @p4009 @p4007 @p651 @p4252 @p4250 @p73 @p4012 @p4010 @p83 @p4249 @p4247 @p941 @p3985 @p3983 @p622 @p4276 @p4274 @p72 @p3988 @p3986 @p84 @p4273 @p4271 @p970 @p3961 @p3959 @p593 @p4300 @p4298 @p71 @p3964 @p3962 @p85 @p4297 @p4295 @p999 @p3937 @p3935 @p564 @p4324 @p4322 @p70 @p3940 @p3938 @p86 @p4321 @p4319 @p1028 @p3913 @p3911 @p535 @p4348 @p4346 @p69 @p3916 @p3914 @p87 @p4345 @p4343 @p1057 @p3889 @p3887 @p506 @p4372 @p4370 @p68 @p3892 @p3890 @p88 @p4369 @p4367 @p1086 @p3865 @p3863 @p477 @p4396 @p4394 @p67 @p3868 @p3866 @p89 @p4393 @p4391 @p1115 @p3841 @p3839 @p448 @p4420 @p4418 @p66 @p3844 @p3842 @p90 @p4417 @p4415 @p1144 @p3817 @p3815 @p419 @p4444 @p4442 @p65 @p3820 @p3818 @p91 @p4441 @p4439 @p1173 @p3793 @p3791 @p390 @p4468 @p4466 @p64 @p3796 @p3794 @p92 @p4465 @p4463 @p1202 @p3769 @p3767 @p361 @p4492 @p4490 @p63 @p3772 @p3770 @p93 @p4489 @p4487 @p1231 @p3745 @p3743 @p332 @p4516 @p4514 @p62 @p3748 @p3746 @p94 @p4513 @p4511 @p1260 @p3721 @p3719 @p303 @p4540 @p4538 @p61 @p3724 @p3722 @p95 @p4537 @p4535 @p1289 @p3697 @p3695 @p274 @p4564 @p4562 @p60 @p3700 @p3698 @p96 @p4561 @p4559 @p1318 @p3673 @p3671 @p245 @p4588 @p4586 @p59 @p3676 @p3674 @p97 @p4585 @p4583 @p1347 @p3649 @p3647 @p216 @p4612 @p4610 @p58 @p3652 @p3650 @p98 @p4609 @p4607 @p1376 @p3628 @p3626 @p187 @p4606 @p4604 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4603) :args (@t4047 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3759 @t78 @t3756 @t3757 @t817 @t3738 @t3742 @t791 @t3753 @t3774 @t77 @t3741 @t3744 @t79 @t3771 @t3772 @t843 @t3723 @t3727 @t765 @t3768 @t3789 @t76 @t3726 @t3729 @t80 @t3786 @t3787 @t869 @t3708 @t3712 @t739 @t3783 @t3804 @t75 @t3711 @t3714 @t81 @t3801 @t3802 @t895 @t3693 @t3697 @t713 @t3798 @t3819 @t74 @t3696 @t3699 @t82 @t3816 @t3817 @t921 @t3678 @t3682 @t687 @t3813 @t3834 @t73 @t3681 @t3684 @t83 @t3831 @t3832 @t947 @t3663 @t3667 @t661 @t3828 @t3849 @t72 @t3666 @t3669 @t84 @t3846 @t3847 @t973 @t3648 @t3652 @t635 @t3843 @t3864 @t71 @t3651 @t3654 @t85 @t3861 @t3862 @t999 @t3633 @t3637 @t609 @t3858 @t3879 @t70 @t3636 @t3639 @t86 @t3876 @t3877 @t1025 @t3618 @t3622 @t583 @t3873 @t3894 @t69 @t3621 @t3624 @t87 @t3891 @t3892 @t1051 @t3603 @t3607 @t557 @t3888 @t3909 @t68 @t3606 @t3609 @t88 @t3906 @t3907 @t1077 @t3588 @t3592 @t531 @t3903 @t3924 @t67 @t3591 @t3594 @t89 @t3921 @t3922 @t1103 @t3573 @t3577 @t505 @t3918 @t3939 @t66 @t3576 @t3579 @t90 @t3936 @t3937 @t1129 @t3558 @t3562 @t479 @t3933 @t3954 @t65 @t3561 @t3564 @t91 @t3951 @t3952 @t1155 @t3543 @t3547 @t453 @t3948 @t3969 @t64 @t3546 @t3549 @t92 @t3966 @t3967 @t1181 @t3528 @t3532 @t427 @t3963 @t3984 @t63 @t3531 @t3534 @t93 @t3981 @t3982 @t1207 @t3513 @t3517 @t401 @t3978 @t3999 @t62 @t3516 @t3519 @t94 @t3996 @t3997 @t1233 @t3498 @t3502 @t375 @t3993 @t4014 @t61 @t3501 @t3504 @t95 @t4011 @t4012 @t1259 @t3483 @t3487 @t349 @t4008 @t4029 @t60 @t3486 @t3489 @t96 @t4026 @t4027 @t1285 @t3468 @t3472 @t323 @t4023 @t4044 @t59 @t3471 @t3474 @t97 @t4041 @t4042 @t1311 @t3453 @t3457 @t297 @t4038 @t4059 @t58 @t3456 @t3459 @t98 @t4056 @t4057 @t1337 @t3441 @t3444 @t276 @t4053 @t4054 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6107 @t220) % 40.01/40.20 (step @p4615 :rule instantiate :premises (@p110) :args (@t4060)) % 40.01/40.20 (step-pop @p6108 :rule scope :premises (@p4615)) % 40.01/40.20 (step @p4616 :rule process_scope :premises (@p6108) :args (@t4063)) % 40.01/40.20 (step @p4618 :rule implies_elim :premises (@p4616)) % 40.01/40.20 (step @p4619 :rule cnf_or_pos :args (@t4063)) % 40.01/40.20 (step @p4620 :rule reordering :premises (@p4619) :args ((or @t4062 @t4061 (not @t4063)))) % 40.01/40.20 (step @p4621 :rule instantiate :premises (@p112) :args (@t4064)) % 40.01/40.20 (step @p4622 :rule cnf_or_pos :args (@t4065)) % 40.01/40.20 (step @p4623 :rule reordering :premises (@p4622) :args ((or @t4062 @t244 @t1365 (not @t4065)))) % 40.01/40.20 (step @p4624 :rule instantiate :premises (@p108) :args (@t4060)) % 40.01/40.20 (step @p4625 :rule cnf_or_pos :args (@t4067)) % 40.01/40.20 (step @p4626 :rule reordering :premises (@p4625) :args ((or @t1376 @t265 @t264 @t4066 (not @t4067)))) % 40.01/40.20 (step @p4627 :rule chain_m_resolution :premises (@p4626 @p4624 @p1394 @p1392 @p136 @p134 @p4623 @p4621 @p133 @p131 @p130 @p128 @p127 @p125 @p4620 @p4618 @p110) :args ((or @t4062 @t239) @t267 (@list @t4067 @t1376 @t1378 @t248 @t249 @t1365 @t4065 @t245 @t247 @t242 @t243 @t240 @t241 @t4061 @t4063 @t220))) % 40.01/40.20 (step @p4628 :rule instantiate :premises (@p119) :args (@t4064)) % 40.01/40.20 (step @p4629 :rule cnf_or_pos :args (@t4069)) % 40.01/40.20 (step @p4630 :rule reordering :premises (@p4629) :args ((or @t270 @t4062 @t4068 @t3440 (not @t4069)))) % 40.01/40.20 (step @p4631 :rule instantiate :premises (@p120) :args (@t1362)) % 40.01/40.20 (step @p4632 :rule cnf_or_pos :args (@t4072)) % 40.01/40.20 (step @p4633 :rule reordering :premises (@p4632) :args ((or @t4071 @t4070 @t1363 (not @t4072)))) % 40.01/40.20 (step @p4634 :rule instantiate :premises (@p121) :args (@t1361)) % 40.01/40.20 (step @p4635 :rule cnf_or_pos :args (@t4074)) % 40.01/40.20 (step @p4636 :rule reordering :premises (@p4635) :args ((or @t1371 @t4053 @t4073 (not @t4074)))) % 40.01/40.20 (step @p4637 :rule chain_m_resolution :premises (@p4129 @p4127 @p796 @p4156 @p4154 @p77 @p4132 @p4130 @p78 @p4153 @p4151 @p825 @p4105 @p4103 @p767 @p4180 @p4178 @p76 @p4108 @p4106 @p79 @p4177 @p4175 @p854 @p4081 @p4079 @p738 @p4204 @p4202 @p75 @p4084 @p4082 @p80 @p4201 @p4199 @p883 @p4057 @p4055 @p709 @p4228 @p4226 @p74 @p4060 @p4058 @p81 @p4225 @p4223 @p912 @p4033 @p4031 @p680 @p4252 @p4250 @p73 @p4036 @p4034 @p82 @p4249 @p4247 @p941 @p4009 @p4007 @p651 @p4276 @p4274 @p72 @p4012 @p4010 @p83 @p4273 @p4271 @p970 @p3985 @p3983 @p622 @p4300 @p4298 @p71 @p3988 @p3986 @p84 @p4297 @p4295 @p999 @p3961 @p3959 @p593 @p4324 @p4322 @p70 @p3964 @p3962 @p85 @p4321 @p4319 @p1028 @p3937 @p3935 @p564 @p4348 @p4346 @p69 @p3940 @p3938 @p86 @p4345 @p4343 @p1057 @p3913 @p3911 @p535 @p4372 @p4370 @p68 @p3916 @p3914 @p87 @p4369 @p4367 @p1086 @p3889 @p3887 @p506 @p4396 @p4394 @p67 @p3892 @p3890 @p88 @p4393 @p4391 @p1115 @p3865 @p3863 @p477 @p4420 @p4418 @p66 @p3868 @p3866 @p89 @p4417 @p4415 @p1144 @p3841 @p3839 @p448 @p4444 @p4442 @p65 @p3844 @p3842 @p90 @p4441 @p4439 @p1173 @p3817 @p3815 @p419 @p4468 @p4466 @p64 @p3820 @p3818 @p91 @p4465 @p4463 @p1202 @p3793 @p3791 @p390 @p4492 @p4490 @p63 @p3796 @p3794 @p92 @p4489 @p4487 @p1231 @p3769 @p3767 @p361 @p4516 @p4514 @p62 @p3772 @p3770 @p93 @p4513 @p4511 @p1260 @p3745 @p3743 @p332 @p4540 @p4538 @p61 @p3748 @p3746 @p94 @p4537 @p4535 @p1289 @p3721 @p3719 @p303 @p4564 @p4562 @p60 @p3724 @p3722 @p95 @p4561 @p4559 @p1318 @p3697 @p3695 @p274 @p4588 @p4586 @p59 @p3700 @p3698 @p96 @p4585 @p4583 @p1347 @p3673 @p3671 @p245 @p4612 @p4610 @p58 @p3676 @p3674 @p97 @p4609 @p4607 @p1376 @p3649 @p3647 @p216 @p4636 @p4634 @p57 @p3652 @p3650 @p98 @p4633 @p4631 @p1405 @p3628 @p3626 @p187 @p4630 @p4628 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4627) :args (@t4062 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3757 @t817 @t3753 @t3774 @t77 @t3756 @t3759 @t78 @t3771 @t3772 @t843 @t3738 @t3742 @t791 @t3768 @t3789 @t76 @t3741 @t3744 @t79 @t3786 @t3787 @t869 @t3723 @t3727 @t765 @t3783 @t3804 @t75 @t3726 @t3729 @t80 @t3801 @t3802 @t895 @t3708 @t3712 @t739 @t3798 @t3819 @t74 @t3711 @t3714 @t81 @t3816 @t3817 @t921 @t3693 @t3697 @t713 @t3813 @t3834 @t73 @t3696 @t3699 @t82 @t3831 @t3832 @t947 @t3678 @t3682 @t687 @t3828 @t3849 @t72 @t3681 @t3684 @t83 @t3846 @t3847 @t973 @t3663 @t3667 @t661 @t3843 @t3864 @t71 @t3666 @t3669 @t84 @t3861 @t3862 @t999 @t3648 @t3652 @t635 @t3858 @t3879 @t70 @t3651 @t3654 @t85 @t3876 @t3877 @t1025 @t3633 @t3637 @t609 @t3873 @t3894 @t69 @t3636 @t3639 @t86 @t3891 @t3892 @t1051 @t3618 @t3622 @t583 @t3888 @t3909 @t68 @t3621 @t3624 @t87 @t3906 @t3907 @t1077 @t3603 @t3607 @t557 @t3903 @t3924 @t67 @t3606 @t3609 @t88 @t3921 @t3922 @t1103 @t3588 @t3592 @t531 @t3918 @t3939 @t66 @t3591 @t3594 @t89 @t3936 @t3937 @t1129 @t3573 @t3577 @t505 @t3933 @t3954 @t65 @t3576 @t3579 @t90 @t3951 @t3952 @t1155 @t3558 @t3562 @t479 @t3948 @t3969 @t64 @t3561 @t3564 @t91 @t3966 @t3967 @t1181 @t3543 @t3547 @t453 @t3963 @t3984 @t63 @t3546 @t3549 @t92 @t3981 @t3982 @t1207 @t3528 @t3532 @t427 @t3978 @t3999 @t62 @t3531 @t3534 @t93 @t3996 @t3997 @t1233 @t3513 @t3517 @t401 @t3993 @t4014 @t61 @t3516 @t3519 @t94 @t4011 @t4012 @t1259 @t3498 @t3502 @t375 @t4008 @t4029 @t60 @t3501 @t3504 @t95 @t4026 @t4027 @t1285 @t3483 @t3487 @t349 @t4023 @t4044 @t59 @t3486 @t3489 @t96 @t4041 @t4042 @t1311 @t3468 @t3472 @t323 @t4038 @t4059 @t58 @t3471 @t3474 @t97 @t4056 @t4057 @t1337 @t3453 @t3457 @t297 @t4053 @t4074 @t57 @t3456 @t3459 @t98 @t4071 @t4072 @t1363 @t3441 @t3444 @t276 @t4068 @t4069 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6109 @t220) % 40.01/40.20 (step @p4639 :rule instantiate :premises (@p110) :args (@t4075)) % 40.01/40.20 (step-pop @p6110 :rule scope :premises (@p4639)) % 40.01/40.20 (step @p4640 :rule process_scope :premises (@p6110) :args (@t4078)) % 40.01/40.20 (step @p4642 :rule implies_elim :premises (@p4640)) % 40.01/40.20 (step @p4643 :rule cnf_or_pos :args (@t4078)) % 40.01/40.20 (step @p4644 :rule reordering :premises (@p4643) :args ((or @t4077 @t4076 (not @t4078)))) % 40.01/40.20 (step @p4645 :rule instantiate :premises (@p112) :args (@t4079)) % 40.01/40.20 (step @p4646 :rule cnf_or_pos :args (@t4080)) % 40.01/40.20 (step @p4647 :rule reordering :premises (@p4646) :args ((or @t4077 @t244 @t1391 (not @t4080)))) % 40.01/40.20 (step @p4648 :rule instantiate :premises (@p108) :args (@t4075)) % 40.01/40.20 (step @p4649 :rule cnf_or_pos :args (@t4082)) % 40.01/40.20 (step @p4650 :rule reordering :premises (@p4649) :args ((or @t1402 @t265 @t264 @t4081 (not @t4082)))) % 40.01/40.20 (step @p4651 :rule chain_m_resolution :premises (@p4650 @p4648 @p1423 @p1421 @p136 @p134 @p4647 @p4645 @p133 @p131 @p130 @p128 @p127 @p125 @p4644 @p4642 @p110) :args ((or @t4077 @t239) @t267 (@list @t4082 @t1402 @t1404 @t248 @t249 @t1391 @t4080 @t245 @t247 @t242 @t243 @t240 @t241 @t4076 @t4078 @t220))) % 40.01/40.20 (step @p4652 :rule instantiate :premises (@p119) :args (@t4079)) % 40.01/40.20 (step @p4653 :rule cnf_or_pos :args (@t4084)) % 40.01/40.20 (step @p4654 :rule reordering :premises (@p4653) :args ((or @t270 @t4077 @t4083 @t3440 (not @t4084)))) % 40.01/40.20 (step @p4655 :rule instantiate :premises (@p120) :args (@t1388)) % 40.01/40.20 (step @p4656 :rule cnf_or_pos :args (@t4087)) % 40.01/40.20 (step @p4657 :rule reordering :premises (@p4656) :args ((or @t4086 @t4085 @t1389 (not @t4087)))) % 40.01/40.20 (step @p4658 :rule instantiate :premises (@p121) :args (@t1387)) % 40.01/40.20 (step @p4659 :rule cnf_or_pos :args (@t4089)) % 40.01/40.20 (step @p4660 :rule reordering :premises (@p4659) :args ((or @t1397 @t4068 @t4088 (not @t4089)))) % 40.01/40.20 (step @p4661 :rule chain_m_resolution :premises (@p4156 @p4154 @p77 @p4153 @p4151 @p825 @p4129 @p4127 @p796 @p4180 @p4178 @p76 @p4132 @p4130 @p78 @p4177 @p4175 @p854 @p4105 @p4103 @p767 @p4204 @p4202 @p75 @p4108 @p4106 @p79 @p4201 @p4199 @p883 @p4081 @p4079 @p738 @p4228 @p4226 @p74 @p4084 @p4082 @p80 @p4225 @p4223 @p912 @p4057 @p4055 @p709 @p4252 @p4250 @p73 @p4060 @p4058 @p81 @p4249 @p4247 @p941 @p4033 @p4031 @p680 @p4276 @p4274 @p72 @p4036 @p4034 @p82 @p4273 @p4271 @p970 @p4009 @p4007 @p651 @p4300 @p4298 @p71 @p4012 @p4010 @p83 @p4297 @p4295 @p999 @p3985 @p3983 @p622 @p4324 @p4322 @p70 @p3988 @p3986 @p84 @p4321 @p4319 @p1028 @p3961 @p3959 @p593 @p4348 @p4346 @p69 @p3964 @p3962 @p85 @p4345 @p4343 @p1057 @p3937 @p3935 @p564 @p4372 @p4370 @p68 @p3940 @p3938 @p86 @p4369 @p4367 @p1086 @p3913 @p3911 @p535 @p4396 @p4394 @p67 @p3916 @p3914 @p87 @p4393 @p4391 @p1115 @p3889 @p3887 @p506 @p4420 @p4418 @p66 @p3892 @p3890 @p88 @p4417 @p4415 @p1144 @p3865 @p3863 @p477 @p4444 @p4442 @p65 @p3868 @p3866 @p89 @p4441 @p4439 @p1173 @p3841 @p3839 @p448 @p4468 @p4466 @p64 @p3844 @p3842 @p90 @p4465 @p4463 @p1202 @p3817 @p3815 @p419 @p4492 @p4490 @p63 @p3820 @p3818 @p91 @p4489 @p4487 @p1231 @p3793 @p3791 @p390 @p4516 @p4514 @p62 @p3796 @p3794 @p92 @p4513 @p4511 @p1260 @p3769 @p3767 @p361 @p4540 @p4538 @p61 @p3772 @p3770 @p93 @p4537 @p4535 @p1289 @p3745 @p3743 @p332 @p4564 @p4562 @p60 @p3748 @p3746 @p94 @p4561 @p4559 @p1318 @p3721 @p3719 @p303 @p4588 @p4586 @p59 @p3724 @p3722 @p95 @p4585 @p4583 @p1347 @p3697 @p3695 @p274 @p4612 @p4610 @p58 @p3700 @p3698 @p96 @p4609 @p4607 @p1376 @p3673 @p3671 @p245 @p4636 @p4634 @p57 @p3676 @p3674 @p97 @p4633 @p4631 @p1405 @p3649 @p3647 @p216 @p4660 @p4658 @p56 @p3652 @p3650 @p98 @p4657 @p4655 @p1434 @p3628 @p3626 @p187 @p4654 @p4652 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4651) :args (@t4077 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3774 @t77 @t3771 @t3772 @t843 @t3753 @t3757 @t817 @t3768 @t3789 @t76 @t3756 @t3759 @t78 @t3786 @t3787 @t869 @t3738 @t3742 @t791 @t3783 @t3804 @t75 @t3741 @t3744 @t79 @t3801 @t3802 @t895 @t3723 @t3727 @t765 @t3798 @t3819 @t74 @t3726 @t3729 @t80 @t3816 @t3817 @t921 @t3708 @t3712 @t739 @t3813 @t3834 @t73 @t3711 @t3714 @t81 @t3831 @t3832 @t947 @t3693 @t3697 @t713 @t3828 @t3849 @t72 @t3696 @t3699 @t82 @t3846 @t3847 @t973 @t3678 @t3682 @t687 @t3843 @t3864 @t71 @t3681 @t3684 @t83 @t3861 @t3862 @t999 @t3663 @t3667 @t661 @t3858 @t3879 @t70 @t3666 @t3669 @t84 @t3876 @t3877 @t1025 @t3648 @t3652 @t635 @t3873 @t3894 @t69 @t3651 @t3654 @t85 @t3891 @t3892 @t1051 @t3633 @t3637 @t609 @t3888 @t3909 @t68 @t3636 @t3639 @t86 @t3906 @t3907 @t1077 @t3618 @t3622 @t583 @t3903 @t3924 @t67 @t3621 @t3624 @t87 @t3921 @t3922 @t1103 @t3603 @t3607 @t557 @t3918 @t3939 @t66 @t3606 @t3609 @t88 @t3936 @t3937 @t1129 @t3588 @t3592 @t531 @t3933 @t3954 @t65 @t3591 @t3594 @t89 @t3951 @t3952 @t1155 @t3573 @t3577 @t505 @t3948 @t3969 @t64 @t3576 @t3579 @t90 @t3966 @t3967 @t1181 @t3558 @t3562 @t479 @t3963 @t3984 @t63 @t3561 @t3564 @t91 @t3981 @t3982 @t1207 @t3543 @t3547 @t453 @t3978 @t3999 @t62 @t3546 @t3549 @t92 @t3996 @t3997 @t1233 @t3528 @t3532 @t427 @t3993 @t4014 @t61 @t3531 @t3534 @t93 @t4011 @t4012 @t1259 @t3513 @t3517 @t401 @t4008 @t4029 @t60 @t3516 @t3519 @t94 @t4026 @t4027 @t1285 @t3498 @t3502 @t375 @t4023 @t4044 @t59 @t3501 @t3504 @t95 @t4041 @t4042 @t1311 @t3483 @t3487 @t349 @t4038 @t4059 @t58 @t3486 @t3489 @t96 @t4056 @t4057 @t1337 @t3468 @t3472 @t323 @t4053 @t4074 @t57 @t3471 @t3474 @t97 @t4071 @t4072 @t1363 @t3453 @t3457 @t297 @t4068 @t4089 @t56 @t3456 @t3459 @t98 @t4086 @t4087 @t1389 @t3441 @t3444 @t276 @t4083 @t4084 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6111 @t220) % 40.01/40.20 (step @p4663 :rule instantiate :premises (@p110) :args (@t4090)) % 40.01/40.20 (step-pop @p6112 :rule scope :premises (@p4663)) % 40.01/40.20 (step @p4664 :rule process_scope :premises (@p6112) :args (@t4093)) % 40.01/40.20 (step @p4666 :rule implies_elim :premises (@p4664)) % 40.01/40.20 (step @p4667 :rule cnf_or_pos :args (@t4093)) % 40.01/40.20 (step @p4668 :rule reordering :premises (@p4667) :args ((or @t4092 @t4091 (not @t4093)))) % 40.01/40.20 (step @p4669 :rule instantiate :premises (@p112) :args (@t4094)) % 40.01/40.20 (step @p4670 :rule cnf_or_pos :args (@t4095)) % 40.01/40.20 (step @p4671 :rule reordering :premises (@p4670) :args ((or @t4092 @t244 @t1417 (not @t4095)))) % 40.01/40.20 (step @p4672 :rule instantiate :premises (@p108) :args (@t4090)) % 40.01/40.20 (step @p4673 :rule cnf_or_pos :args (@t4097)) % 40.01/40.20 (step @p4674 :rule reordering :premises (@p4673) :args ((or @t1428 @t265 @t264 @t4096 (not @t4097)))) % 40.01/40.20 (step @p4675 :rule chain_m_resolution :premises (@p4674 @p4672 @p1452 @p1450 @p136 @p134 @p4671 @p4669 @p133 @p131 @p130 @p128 @p127 @p125 @p4668 @p4666 @p110) :args ((or @t4092 @t239) @t267 (@list @t4097 @t1428 @t1430 @t248 @t249 @t1417 @t4095 @t245 @t247 @t242 @t243 @t240 @t241 @t4091 @t4093 @t220))) % 40.01/40.20 (step @p4676 :rule instantiate :premises (@p119) :args (@t4094)) % 40.01/40.20 (step @p4677 :rule cnf_or_pos :args (@t4099)) % 40.01/40.20 (step @p4678 :rule reordering :premises (@p4677) :args ((or @t270 @t4092 @t4098 @t3440 (not @t4099)))) % 40.01/40.20 (step @p4679 :rule instantiate :premises (@p120) :args (@t1414)) % 40.01/40.20 (step @p4680 :rule cnf_or_pos :args (@t4102)) % 40.01/40.20 (step @p4681 :rule reordering :premises (@p4680) :args ((or @t4101 @t4100 @t1415 (not @t4102)))) % 40.01/40.20 (step @p4682 :rule instantiate :premises (@p121) :args (@t1413)) % 40.01/40.20 (step @p4683 :rule cnf_or_pos :args (@t4104)) % 40.01/40.20 (step @p4684 :rule reordering :premises (@p4683) :args ((or @t1423 @t4083 @t4103 (not @t4104)))) % 40.01/40.20 (step @p4685 :rule chain_m_resolution :premises (@p4153 @p4151 @p825 @p4180 @p4178 @p76 @p4156 @p4154 @p77 @p4177 @p4175 @p854 @p4129 @p4127 @p796 @p4204 @p4202 @p75 @p4132 @p4130 @p78 @p4201 @p4199 @p883 @p4105 @p4103 @p767 @p4228 @p4226 @p74 @p4108 @p4106 @p79 @p4225 @p4223 @p912 @p4081 @p4079 @p738 @p4252 @p4250 @p73 @p4084 @p4082 @p80 @p4249 @p4247 @p941 @p4057 @p4055 @p709 @p4276 @p4274 @p72 @p4060 @p4058 @p81 @p4273 @p4271 @p970 @p4033 @p4031 @p680 @p4300 @p4298 @p71 @p4036 @p4034 @p82 @p4297 @p4295 @p999 @p4009 @p4007 @p651 @p4324 @p4322 @p70 @p4012 @p4010 @p83 @p4321 @p4319 @p1028 @p3985 @p3983 @p622 @p4348 @p4346 @p69 @p3988 @p3986 @p84 @p4345 @p4343 @p1057 @p3961 @p3959 @p593 @p4372 @p4370 @p68 @p3964 @p3962 @p85 @p4369 @p4367 @p1086 @p3937 @p3935 @p564 @p4396 @p4394 @p67 @p3940 @p3938 @p86 @p4393 @p4391 @p1115 @p3913 @p3911 @p535 @p4420 @p4418 @p66 @p3916 @p3914 @p87 @p4417 @p4415 @p1144 @p3889 @p3887 @p506 @p4444 @p4442 @p65 @p3892 @p3890 @p88 @p4441 @p4439 @p1173 @p3865 @p3863 @p477 @p4468 @p4466 @p64 @p3868 @p3866 @p89 @p4465 @p4463 @p1202 @p3841 @p3839 @p448 @p4492 @p4490 @p63 @p3844 @p3842 @p90 @p4489 @p4487 @p1231 @p3817 @p3815 @p419 @p4516 @p4514 @p62 @p3820 @p3818 @p91 @p4513 @p4511 @p1260 @p3793 @p3791 @p390 @p4540 @p4538 @p61 @p3796 @p3794 @p92 @p4537 @p4535 @p1289 @p3769 @p3767 @p361 @p4564 @p4562 @p60 @p3772 @p3770 @p93 @p4561 @p4559 @p1318 @p3745 @p3743 @p332 @p4588 @p4586 @p59 @p3748 @p3746 @p94 @p4585 @p4583 @p1347 @p3721 @p3719 @p303 @p4612 @p4610 @p58 @p3724 @p3722 @p95 @p4609 @p4607 @p1376 @p3697 @p3695 @p274 @p4636 @p4634 @p57 @p3700 @p3698 @p96 @p4633 @p4631 @p1405 @p3673 @p3671 @p245 @p4660 @p4658 @p56 @p3676 @p3674 @p97 @p4657 @p4655 @p1434 @p3649 @p3647 @p216 @p4684 @p4682 @p55 @p3652 @p3650 @p98 @p4681 @p4679 @p1463 @p3628 @p3626 @p187 @p4678 @p4676 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4675) :args (@t4092 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3772 @t843 @t3768 @t3789 @t76 @t3771 @t3774 @t77 @t3786 @t3787 @t869 @t3753 @t3757 @t817 @t3783 @t3804 @t75 @t3756 @t3759 @t78 @t3801 @t3802 @t895 @t3738 @t3742 @t791 @t3798 @t3819 @t74 @t3741 @t3744 @t79 @t3816 @t3817 @t921 @t3723 @t3727 @t765 @t3813 @t3834 @t73 @t3726 @t3729 @t80 @t3831 @t3832 @t947 @t3708 @t3712 @t739 @t3828 @t3849 @t72 @t3711 @t3714 @t81 @t3846 @t3847 @t973 @t3693 @t3697 @t713 @t3843 @t3864 @t71 @t3696 @t3699 @t82 @t3861 @t3862 @t999 @t3678 @t3682 @t687 @t3858 @t3879 @t70 @t3681 @t3684 @t83 @t3876 @t3877 @t1025 @t3663 @t3667 @t661 @t3873 @t3894 @t69 @t3666 @t3669 @t84 @t3891 @t3892 @t1051 @t3648 @t3652 @t635 @t3888 @t3909 @t68 @t3651 @t3654 @t85 @t3906 @t3907 @t1077 @t3633 @t3637 @t609 @t3903 @t3924 @t67 @t3636 @t3639 @t86 @t3921 @t3922 @t1103 @t3618 @t3622 @t583 @t3918 @t3939 @t66 @t3621 @t3624 @t87 @t3936 @t3937 @t1129 @t3603 @t3607 @t557 @t3933 @t3954 @t65 @t3606 @t3609 @t88 @t3951 @t3952 @t1155 @t3588 @t3592 @t531 @t3948 @t3969 @t64 @t3591 @t3594 @t89 @t3966 @t3967 @t1181 @t3573 @t3577 @t505 @t3963 @t3984 @t63 @t3576 @t3579 @t90 @t3981 @t3982 @t1207 @t3558 @t3562 @t479 @t3978 @t3999 @t62 @t3561 @t3564 @t91 @t3996 @t3997 @t1233 @t3543 @t3547 @t453 @t3993 @t4014 @t61 @t3546 @t3549 @t92 @t4011 @t4012 @t1259 @t3528 @t3532 @t427 @t4008 @t4029 @t60 @t3531 @t3534 @t93 @t4026 @t4027 @t1285 @t3513 @t3517 @t401 @t4023 @t4044 @t59 @t3516 @t3519 @t94 @t4041 @t4042 @t1311 @t3498 @t3502 @t375 @t4038 @t4059 @t58 @t3501 @t3504 @t95 @t4056 @t4057 @t1337 @t3483 @t3487 @t349 @t4053 @t4074 @t57 @t3486 @t3489 @t96 @t4071 @t4072 @t1363 @t3468 @t3472 @t323 @t4068 @t4089 @t56 @t3471 @t3474 @t97 @t4086 @t4087 @t1389 @t3453 @t3457 @t297 @t4083 @t4104 @t55 @t3456 @t3459 @t98 @t4101 @t4102 @t1415 @t3441 @t3444 @t276 @t4098 @t4099 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6113 @t220) % 40.01/40.20 (step @p4687 :rule instantiate :premises (@p110) :args (@t4105)) % 40.01/40.20 (step-pop @p6114 :rule scope :premises (@p4687)) % 40.01/40.20 (step @p4688 :rule process_scope :premises (@p6114) :args (@t4108)) % 40.01/40.20 (step @p4690 :rule implies_elim :premises (@p4688)) % 40.01/40.20 (step @p4691 :rule cnf_or_pos :args (@t4108)) % 40.01/40.20 (step @p4692 :rule reordering :premises (@p4691) :args ((or @t4107 @t4106 (not @t4108)))) % 40.01/40.20 (step @p4693 :rule instantiate :premises (@p112) :args (@t4109)) % 40.01/40.20 (step @p4694 :rule cnf_or_pos :args (@t4110)) % 40.01/40.20 (step @p4695 :rule reordering :premises (@p4694) :args ((or @t4107 @t244 @t1443 (not @t4110)))) % 40.01/40.20 (step @p4696 :rule instantiate :premises (@p108) :args (@t4105)) % 40.01/40.20 (step @p4697 :rule cnf_or_pos :args (@t4112)) % 40.01/40.20 (step @p4698 :rule reordering :premises (@p4697) :args ((or @t1454 @t265 @t264 @t4111 (not @t4112)))) % 40.01/40.20 (step @p4699 :rule chain_m_resolution :premises (@p4698 @p4696 @p1481 @p1479 @p136 @p134 @p4695 @p4693 @p133 @p131 @p130 @p128 @p127 @p125 @p4692 @p4690 @p110) :args ((or @t4107 @t239) @t267 (@list @t4112 @t1454 @t1456 @t248 @t249 @t1443 @t4110 @t245 @t247 @t242 @t243 @t240 @t241 @t4106 @t4108 @t220))) % 40.01/40.20 (step @p4700 :rule instantiate :premises (@p119) :args (@t4109)) % 40.01/40.20 (step @p4701 :rule cnf_or_pos :args (@t4114)) % 40.01/40.20 (step @p4702 :rule reordering :premises (@p4701) :args ((or @t270 @t4107 @t4113 @t3440 (not @t4114)))) % 40.01/40.20 (step @p4703 :rule instantiate :premises (@p120) :args (@t1440)) % 40.01/40.20 (step @p4704 :rule cnf_or_pos :args (@t4117)) % 40.01/40.20 (step @p4705 :rule reordering :premises (@p4704) :args ((or @t4116 @t4115 @t1441 (not @t4117)))) % 40.01/40.20 (step @p4706 :rule instantiate :premises (@p121) :args (@t1439)) % 40.01/40.20 (step @p4707 :rule cnf_or_pos :args (@t4119)) % 40.01/40.20 (step @p4708 :rule reordering :premises (@p4707) :args ((or @t1449 @t4098 @t4118 (not @t4119)))) % 40.01/40.20 (step @p4709 :rule chain_m_resolution :premises (@p4180 @p4178 @p76 @p4177 @p4175 @p854 @p4153 @p4151 @p825 @p4204 @p4202 @p75 @p4156 @p4154 @p77 @p4201 @p4199 @p883 @p4129 @p4127 @p796 @p4228 @p4226 @p74 @p4132 @p4130 @p78 @p4225 @p4223 @p912 @p4105 @p4103 @p767 @p4252 @p4250 @p73 @p4108 @p4106 @p79 @p4249 @p4247 @p941 @p4081 @p4079 @p738 @p4276 @p4274 @p72 @p4084 @p4082 @p80 @p4273 @p4271 @p970 @p4057 @p4055 @p709 @p4300 @p4298 @p71 @p4060 @p4058 @p81 @p4297 @p4295 @p999 @p4033 @p4031 @p680 @p4324 @p4322 @p70 @p4036 @p4034 @p82 @p4321 @p4319 @p1028 @p4009 @p4007 @p651 @p4348 @p4346 @p69 @p4012 @p4010 @p83 @p4345 @p4343 @p1057 @p3985 @p3983 @p622 @p4372 @p4370 @p68 @p3988 @p3986 @p84 @p4369 @p4367 @p1086 @p3961 @p3959 @p593 @p4396 @p4394 @p67 @p3964 @p3962 @p85 @p4393 @p4391 @p1115 @p3937 @p3935 @p564 @p4420 @p4418 @p66 @p3940 @p3938 @p86 @p4417 @p4415 @p1144 @p3913 @p3911 @p535 @p4444 @p4442 @p65 @p3916 @p3914 @p87 @p4441 @p4439 @p1173 @p3889 @p3887 @p506 @p4468 @p4466 @p64 @p3892 @p3890 @p88 @p4465 @p4463 @p1202 @p3865 @p3863 @p477 @p4492 @p4490 @p63 @p3868 @p3866 @p89 @p4489 @p4487 @p1231 @p3841 @p3839 @p448 @p4516 @p4514 @p62 @p3844 @p3842 @p90 @p4513 @p4511 @p1260 @p3817 @p3815 @p419 @p4540 @p4538 @p61 @p3820 @p3818 @p91 @p4537 @p4535 @p1289 @p3793 @p3791 @p390 @p4564 @p4562 @p60 @p3796 @p3794 @p92 @p4561 @p4559 @p1318 @p3769 @p3767 @p361 @p4588 @p4586 @p59 @p3772 @p3770 @p93 @p4585 @p4583 @p1347 @p3745 @p3743 @p332 @p4612 @p4610 @p58 @p3748 @p3746 @p94 @p4609 @p4607 @p1376 @p3721 @p3719 @p303 @p4636 @p4634 @p57 @p3724 @p3722 @p95 @p4633 @p4631 @p1405 @p3697 @p3695 @p274 @p4660 @p4658 @p56 @p3700 @p3698 @p96 @p4657 @p4655 @p1434 @p3673 @p3671 @p245 @p4684 @p4682 @p55 @p3676 @p3674 @p97 @p4681 @p4679 @p1463 @p3649 @p3647 @p216 @p4708 @p4706 @p54 @p3652 @p3650 @p98 @p4705 @p4703 @p1492 @p3628 @p3626 @p187 @p4702 @p4700 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4699) :args (@t4107 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3789 @t76 @t3786 @t3787 @t869 @t3768 @t3772 @t843 @t3783 @t3804 @t75 @t3771 @t3774 @t77 @t3801 @t3802 @t895 @t3753 @t3757 @t817 @t3798 @t3819 @t74 @t3756 @t3759 @t78 @t3816 @t3817 @t921 @t3738 @t3742 @t791 @t3813 @t3834 @t73 @t3741 @t3744 @t79 @t3831 @t3832 @t947 @t3723 @t3727 @t765 @t3828 @t3849 @t72 @t3726 @t3729 @t80 @t3846 @t3847 @t973 @t3708 @t3712 @t739 @t3843 @t3864 @t71 @t3711 @t3714 @t81 @t3861 @t3862 @t999 @t3693 @t3697 @t713 @t3858 @t3879 @t70 @t3696 @t3699 @t82 @t3876 @t3877 @t1025 @t3678 @t3682 @t687 @t3873 @t3894 @t69 @t3681 @t3684 @t83 @t3891 @t3892 @t1051 @t3663 @t3667 @t661 @t3888 @t3909 @t68 @t3666 @t3669 @t84 @t3906 @t3907 @t1077 @t3648 @t3652 @t635 @t3903 @t3924 @t67 @t3651 @t3654 @t85 @t3921 @t3922 @t1103 @t3633 @t3637 @t609 @t3918 @t3939 @t66 @t3636 @t3639 @t86 @t3936 @t3937 @t1129 @t3618 @t3622 @t583 @t3933 @t3954 @t65 @t3621 @t3624 @t87 @t3951 @t3952 @t1155 @t3603 @t3607 @t557 @t3948 @t3969 @t64 @t3606 @t3609 @t88 @t3966 @t3967 @t1181 @t3588 @t3592 @t531 @t3963 @t3984 @t63 @t3591 @t3594 @t89 @t3981 @t3982 @t1207 @t3573 @t3577 @t505 @t3978 @t3999 @t62 @t3576 @t3579 @t90 @t3996 @t3997 @t1233 @t3558 @t3562 @t479 @t3993 @t4014 @t61 @t3561 @t3564 @t91 @t4011 @t4012 @t1259 @t3543 @t3547 @t453 @t4008 @t4029 @t60 @t3546 @t3549 @t92 @t4026 @t4027 @t1285 @t3528 @t3532 @t427 @t4023 @t4044 @t59 @t3531 @t3534 @t93 @t4041 @t4042 @t1311 @t3513 @t3517 @t401 @t4038 @t4059 @t58 @t3516 @t3519 @t94 @t4056 @t4057 @t1337 @t3498 @t3502 @t375 @t4053 @t4074 @t57 @t3501 @t3504 @t95 @t4071 @t4072 @t1363 @t3483 @t3487 @t349 @t4068 @t4089 @t56 @t3486 @t3489 @t96 @t4086 @t4087 @t1389 @t3468 @t3472 @t323 @t4083 @t4104 @t55 @t3471 @t3474 @t97 @t4101 @t4102 @t1415 @t3453 @t3457 @t297 @t4098 @t4119 @t54 @t3456 @t3459 @t98 @t4116 @t4117 @t1441 @t3441 @t3444 @t276 @t4113 @t4114 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6115 @t220) % 40.01/40.20 (step @p4711 :rule instantiate :premises (@p110) :args (@t4120)) % 40.01/40.20 (step-pop @p6116 :rule scope :premises (@p4711)) % 40.01/40.20 (step @p4712 :rule process_scope :premises (@p6116) :args (@t4123)) % 40.01/40.20 (step @p4714 :rule implies_elim :premises (@p4712)) % 40.01/40.20 (step @p4715 :rule cnf_or_pos :args (@t4123)) % 40.01/40.20 (step @p4716 :rule reordering :premises (@p4715) :args ((or @t4122 @t4121 (not @t4123)))) % 40.01/40.20 (step @p4717 :rule instantiate :premises (@p112) :args (@t4124)) % 40.01/40.20 (step @p4718 :rule cnf_or_pos :args (@t4125)) % 40.01/40.20 (step @p4719 :rule reordering :premises (@p4718) :args ((or @t4122 @t244 @t1469 (not @t4125)))) % 40.01/40.20 (step @p4720 :rule instantiate :premises (@p108) :args (@t4120)) % 40.01/40.20 (step @p4721 :rule cnf_or_pos :args (@t4127)) % 40.01/40.20 (step @p4722 :rule reordering :premises (@p4721) :args ((or @t1480 @t265 @t264 @t4126 (not @t4127)))) % 40.01/40.20 (step @p4723 :rule chain_m_resolution :premises (@p4722 @p4720 @p1510 @p1508 @p136 @p134 @p4719 @p4717 @p133 @p131 @p130 @p128 @p127 @p125 @p4716 @p4714 @p110) :args ((or @t4122 @t239) @t267 (@list @t4127 @t1480 @t1482 @t248 @t249 @t1469 @t4125 @t245 @t247 @t242 @t243 @t240 @t241 @t4121 @t4123 @t220))) % 40.01/40.20 (step @p4724 :rule instantiate :premises (@p119) :args (@t4124)) % 40.01/40.20 (step @p4725 :rule cnf_or_pos :args (@t4129)) % 40.01/40.20 (step @p4726 :rule reordering :premises (@p4725) :args ((or @t270 @t4122 @t4128 @t3440 (not @t4129)))) % 40.01/40.20 (step @p4727 :rule instantiate :premises (@p120) :args (@t1466)) % 40.01/40.20 (step @p4728 :rule cnf_or_pos :args (@t4132)) % 40.01/40.20 (step @p4729 :rule reordering :premises (@p4728) :args ((or @t4131 @t4130 @t1467 (not @t4132)))) % 40.01/40.20 (step @p4730 :rule instantiate :premises (@p121) :args (@t1465)) % 40.01/40.20 (step @p4731 :rule cnf_or_pos :args (@t4134)) % 40.01/40.20 (step @p4732 :rule reordering :premises (@p4731) :args ((or @t1475 @t4113 @t4133 (not @t4134)))) % 40.01/40.20 (step @p4733 :rule chain_m_resolution :premises (@p4177 @p4175 @p854 @p4204 @p4202 @p75 @p4180 @p4178 @p76 @p4201 @p4199 @p883 @p4153 @p4151 @p825 @p4228 @p4226 @p74 @p4156 @p4154 @p77 @p4225 @p4223 @p912 @p4129 @p4127 @p796 @p4252 @p4250 @p73 @p4132 @p4130 @p78 @p4249 @p4247 @p941 @p4105 @p4103 @p767 @p4276 @p4274 @p72 @p4108 @p4106 @p79 @p4273 @p4271 @p970 @p4081 @p4079 @p738 @p4300 @p4298 @p71 @p4084 @p4082 @p80 @p4297 @p4295 @p999 @p4057 @p4055 @p709 @p4324 @p4322 @p70 @p4060 @p4058 @p81 @p4321 @p4319 @p1028 @p4033 @p4031 @p680 @p4348 @p4346 @p69 @p4036 @p4034 @p82 @p4345 @p4343 @p1057 @p4009 @p4007 @p651 @p4372 @p4370 @p68 @p4012 @p4010 @p83 @p4369 @p4367 @p1086 @p3985 @p3983 @p622 @p4396 @p4394 @p67 @p3988 @p3986 @p84 @p4393 @p4391 @p1115 @p3961 @p3959 @p593 @p4420 @p4418 @p66 @p3964 @p3962 @p85 @p4417 @p4415 @p1144 @p3937 @p3935 @p564 @p4444 @p4442 @p65 @p3940 @p3938 @p86 @p4441 @p4439 @p1173 @p3913 @p3911 @p535 @p4468 @p4466 @p64 @p3916 @p3914 @p87 @p4465 @p4463 @p1202 @p3889 @p3887 @p506 @p4492 @p4490 @p63 @p3892 @p3890 @p88 @p4489 @p4487 @p1231 @p3865 @p3863 @p477 @p4516 @p4514 @p62 @p3868 @p3866 @p89 @p4513 @p4511 @p1260 @p3841 @p3839 @p448 @p4540 @p4538 @p61 @p3844 @p3842 @p90 @p4537 @p4535 @p1289 @p3817 @p3815 @p419 @p4564 @p4562 @p60 @p3820 @p3818 @p91 @p4561 @p4559 @p1318 @p3793 @p3791 @p390 @p4588 @p4586 @p59 @p3796 @p3794 @p92 @p4585 @p4583 @p1347 @p3769 @p3767 @p361 @p4612 @p4610 @p58 @p3772 @p3770 @p93 @p4609 @p4607 @p1376 @p3745 @p3743 @p332 @p4636 @p4634 @p57 @p3748 @p3746 @p94 @p4633 @p4631 @p1405 @p3721 @p3719 @p303 @p4660 @p4658 @p56 @p3724 @p3722 @p95 @p4657 @p4655 @p1434 @p3697 @p3695 @p274 @p4684 @p4682 @p55 @p3700 @p3698 @p96 @p4681 @p4679 @p1463 @p3673 @p3671 @p245 @p4708 @p4706 @p54 @p3676 @p3674 @p97 @p4705 @p4703 @p1492 @p3649 @p3647 @p216 @p4732 @p4730 @p53 @p3652 @p3650 @p98 @p4729 @p4727 @p1521 @p3628 @p3626 @p187 @p4726 @p4724 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4723) :args (@t4122 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3787 @t869 @t3783 @t3804 @t75 @t3786 @t3789 @t76 @t3801 @t3802 @t895 @t3768 @t3772 @t843 @t3798 @t3819 @t74 @t3771 @t3774 @t77 @t3816 @t3817 @t921 @t3753 @t3757 @t817 @t3813 @t3834 @t73 @t3756 @t3759 @t78 @t3831 @t3832 @t947 @t3738 @t3742 @t791 @t3828 @t3849 @t72 @t3741 @t3744 @t79 @t3846 @t3847 @t973 @t3723 @t3727 @t765 @t3843 @t3864 @t71 @t3726 @t3729 @t80 @t3861 @t3862 @t999 @t3708 @t3712 @t739 @t3858 @t3879 @t70 @t3711 @t3714 @t81 @t3876 @t3877 @t1025 @t3693 @t3697 @t713 @t3873 @t3894 @t69 @t3696 @t3699 @t82 @t3891 @t3892 @t1051 @t3678 @t3682 @t687 @t3888 @t3909 @t68 @t3681 @t3684 @t83 @t3906 @t3907 @t1077 @t3663 @t3667 @t661 @t3903 @t3924 @t67 @t3666 @t3669 @t84 @t3921 @t3922 @t1103 @t3648 @t3652 @t635 @t3918 @t3939 @t66 @t3651 @t3654 @t85 @t3936 @t3937 @t1129 @t3633 @t3637 @t609 @t3933 @t3954 @t65 @t3636 @t3639 @t86 @t3951 @t3952 @t1155 @t3618 @t3622 @t583 @t3948 @t3969 @t64 @t3621 @t3624 @t87 @t3966 @t3967 @t1181 @t3603 @t3607 @t557 @t3963 @t3984 @t63 @t3606 @t3609 @t88 @t3981 @t3982 @t1207 @t3588 @t3592 @t531 @t3978 @t3999 @t62 @t3591 @t3594 @t89 @t3996 @t3997 @t1233 @t3573 @t3577 @t505 @t3993 @t4014 @t61 @t3576 @t3579 @t90 @t4011 @t4012 @t1259 @t3558 @t3562 @t479 @t4008 @t4029 @t60 @t3561 @t3564 @t91 @t4026 @t4027 @t1285 @t3543 @t3547 @t453 @t4023 @t4044 @t59 @t3546 @t3549 @t92 @t4041 @t4042 @t1311 @t3528 @t3532 @t427 @t4038 @t4059 @t58 @t3531 @t3534 @t93 @t4056 @t4057 @t1337 @t3513 @t3517 @t401 @t4053 @t4074 @t57 @t3516 @t3519 @t94 @t4071 @t4072 @t1363 @t3498 @t3502 @t375 @t4068 @t4089 @t56 @t3501 @t3504 @t95 @t4086 @t4087 @t1389 @t3483 @t3487 @t349 @t4083 @t4104 @t55 @t3486 @t3489 @t96 @t4101 @t4102 @t1415 @t3468 @t3472 @t323 @t4098 @t4119 @t54 @t3471 @t3474 @t97 @t4116 @t4117 @t1441 @t3453 @t3457 @t297 @t4113 @t4134 @t53 @t3456 @t3459 @t98 @t4131 @t4132 @t1467 @t3441 @t3444 @t276 @t4128 @t4129 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6117 @t220) % 40.01/40.20 (step @p4735 :rule instantiate :premises (@p110) :args (@t4135)) % 40.01/40.20 (step-pop @p6118 :rule scope :premises (@p4735)) % 40.01/40.20 (step @p4736 :rule process_scope :premises (@p6118) :args (@t4138)) % 40.01/40.20 (step @p4738 :rule implies_elim :premises (@p4736)) % 40.01/40.20 (step @p4739 :rule cnf_or_pos :args (@t4138)) % 40.01/40.20 (step @p4740 :rule reordering :premises (@p4739) :args ((or @t4137 @t4136 (not @t4138)))) % 40.01/40.20 (step @p4741 :rule instantiate :premises (@p112) :args (@t4139)) % 40.01/40.20 (step @p4742 :rule cnf_or_pos :args (@t4140)) % 40.01/40.20 (step @p4743 :rule reordering :premises (@p4742) :args ((or @t4137 @t244 @t1495 (not @t4140)))) % 40.01/40.20 (step @p4744 :rule instantiate :premises (@p108) :args (@t4135)) % 40.01/40.20 (step @p4745 :rule cnf_or_pos :args (@t4142)) % 40.01/40.20 (step @p4746 :rule reordering :premises (@p4745) :args ((or @t1506 @t265 @t264 @t4141 (not @t4142)))) % 40.01/40.20 (step @p4747 :rule chain_m_resolution :premises (@p4746 @p4744 @p1539 @p1537 @p136 @p134 @p4743 @p4741 @p133 @p131 @p130 @p128 @p127 @p125 @p4740 @p4738 @p110) :args ((or @t4137 @t239) @t267 (@list @t4142 @t1506 @t1508 @t248 @t249 @t1495 @t4140 @t245 @t247 @t242 @t243 @t240 @t241 @t4136 @t4138 @t220))) % 40.01/40.20 (step @p4748 :rule instantiate :premises (@p119) :args (@t4139)) % 40.01/40.20 (step @p4749 :rule cnf_or_pos :args (@t4144)) % 40.01/40.20 (step @p4750 :rule reordering :premises (@p4749) :args ((or @t270 @t4137 @t4143 @t3440 (not @t4144)))) % 40.01/40.20 (step @p4751 :rule instantiate :premises (@p120) :args (@t1492)) % 40.01/40.20 (step @p4752 :rule cnf_or_pos :args (@t4147)) % 40.01/40.20 (step @p4753 :rule reordering :premises (@p4752) :args ((or @t4146 @t4145 @t1493 (not @t4147)))) % 40.01/40.20 (step @p4754 :rule instantiate :premises (@p121) :args (@t1491)) % 40.01/40.20 (step @p4755 :rule cnf_or_pos :args (@t4149)) % 40.01/40.20 (step @p4756 :rule reordering :premises (@p4755) :args ((or @t1501 @t4128 @t4148 (not @t4149)))) % 40.01/40.20 (step @p4757 :rule chain_m_resolution :premises (@p4204 @p4202 @p75 @p4201 @p4199 @p883 @p4177 @p4175 @p854 @p4228 @p4226 @p74 @p4180 @p4178 @p76 @p4225 @p4223 @p912 @p4153 @p4151 @p825 @p4252 @p4250 @p73 @p4156 @p4154 @p77 @p4249 @p4247 @p941 @p4129 @p4127 @p796 @p4276 @p4274 @p72 @p4132 @p4130 @p78 @p4273 @p4271 @p970 @p4105 @p4103 @p767 @p4300 @p4298 @p71 @p4108 @p4106 @p79 @p4297 @p4295 @p999 @p4081 @p4079 @p738 @p4324 @p4322 @p70 @p4084 @p4082 @p80 @p4321 @p4319 @p1028 @p4057 @p4055 @p709 @p4348 @p4346 @p69 @p4060 @p4058 @p81 @p4345 @p4343 @p1057 @p4033 @p4031 @p680 @p4372 @p4370 @p68 @p4036 @p4034 @p82 @p4369 @p4367 @p1086 @p4009 @p4007 @p651 @p4396 @p4394 @p67 @p4012 @p4010 @p83 @p4393 @p4391 @p1115 @p3985 @p3983 @p622 @p4420 @p4418 @p66 @p3988 @p3986 @p84 @p4417 @p4415 @p1144 @p3961 @p3959 @p593 @p4444 @p4442 @p65 @p3964 @p3962 @p85 @p4441 @p4439 @p1173 @p3937 @p3935 @p564 @p4468 @p4466 @p64 @p3940 @p3938 @p86 @p4465 @p4463 @p1202 @p3913 @p3911 @p535 @p4492 @p4490 @p63 @p3916 @p3914 @p87 @p4489 @p4487 @p1231 @p3889 @p3887 @p506 @p4516 @p4514 @p62 @p3892 @p3890 @p88 @p4513 @p4511 @p1260 @p3865 @p3863 @p477 @p4540 @p4538 @p61 @p3868 @p3866 @p89 @p4537 @p4535 @p1289 @p3841 @p3839 @p448 @p4564 @p4562 @p60 @p3844 @p3842 @p90 @p4561 @p4559 @p1318 @p3817 @p3815 @p419 @p4588 @p4586 @p59 @p3820 @p3818 @p91 @p4585 @p4583 @p1347 @p3793 @p3791 @p390 @p4612 @p4610 @p58 @p3796 @p3794 @p92 @p4609 @p4607 @p1376 @p3769 @p3767 @p361 @p4636 @p4634 @p57 @p3772 @p3770 @p93 @p4633 @p4631 @p1405 @p3745 @p3743 @p332 @p4660 @p4658 @p56 @p3748 @p3746 @p94 @p4657 @p4655 @p1434 @p3721 @p3719 @p303 @p4684 @p4682 @p55 @p3724 @p3722 @p95 @p4681 @p4679 @p1463 @p3697 @p3695 @p274 @p4708 @p4706 @p54 @p3700 @p3698 @p96 @p4705 @p4703 @p1492 @p3673 @p3671 @p245 @p4732 @p4730 @p53 @p3676 @p3674 @p97 @p4729 @p4727 @p1521 @p3649 @p3647 @p216 @p4756 @p4754 @p52 @p3652 @p3650 @p98 @p4753 @p4751 @p1550 @p3628 @p3626 @p187 @p4750 @p4748 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4747) :args (@t4137 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3804 @t75 @t3801 @t3802 @t895 @t3783 @t3787 @t869 @t3798 @t3819 @t74 @t3786 @t3789 @t76 @t3816 @t3817 @t921 @t3768 @t3772 @t843 @t3813 @t3834 @t73 @t3771 @t3774 @t77 @t3831 @t3832 @t947 @t3753 @t3757 @t817 @t3828 @t3849 @t72 @t3756 @t3759 @t78 @t3846 @t3847 @t973 @t3738 @t3742 @t791 @t3843 @t3864 @t71 @t3741 @t3744 @t79 @t3861 @t3862 @t999 @t3723 @t3727 @t765 @t3858 @t3879 @t70 @t3726 @t3729 @t80 @t3876 @t3877 @t1025 @t3708 @t3712 @t739 @t3873 @t3894 @t69 @t3711 @t3714 @t81 @t3891 @t3892 @t1051 @t3693 @t3697 @t713 @t3888 @t3909 @t68 @t3696 @t3699 @t82 @t3906 @t3907 @t1077 @t3678 @t3682 @t687 @t3903 @t3924 @t67 @t3681 @t3684 @t83 @t3921 @t3922 @t1103 @t3663 @t3667 @t661 @t3918 @t3939 @t66 @t3666 @t3669 @t84 @t3936 @t3937 @t1129 @t3648 @t3652 @t635 @t3933 @t3954 @t65 @t3651 @t3654 @t85 @t3951 @t3952 @t1155 @t3633 @t3637 @t609 @t3948 @t3969 @t64 @t3636 @t3639 @t86 @t3966 @t3967 @t1181 @t3618 @t3622 @t583 @t3963 @t3984 @t63 @t3621 @t3624 @t87 @t3981 @t3982 @t1207 @t3603 @t3607 @t557 @t3978 @t3999 @t62 @t3606 @t3609 @t88 @t3996 @t3997 @t1233 @t3588 @t3592 @t531 @t3993 @t4014 @t61 @t3591 @t3594 @t89 @t4011 @t4012 @t1259 @t3573 @t3577 @t505 @t4008 @t4029 @t60 @t3576 @t3579 @t90 @t4026 @t4027 @t1285 @t3558 @t3562 @t479 @t4023 @t4044 @t59 @t3561 @t3564 @t91 @t4041 @t4042 @t1311 @t3543 @t3547 @t453 @t4038 @t4059 @t58 @t3546 @t3549 @t92 @t4056 @t4057 @t1337 @t3528 @t3532 @t427 @t4053 @t4074 @t57 @t3531 @t3534 @t93 @t4071 @t4072 @t1363 @t3513 @t3517 @t401 @t4068 @t4089 @t56 @t3516 @t3519 @t94 @t4086 @t4087 @t1389 @t3498 @t3502 @t375 @t4083 @t4104 @t55 @t3501 @t3504 @t95 @t4101 @t4102 @t1415 @t3483 @t3487 @t349 @t4098 @t4119 @t54 @t3486 @t3489 @t96 @t4116 @t4117 @t1441 @t3468 @t3472 @t323 @t4113 @t4134 @t53 @t3471 @t3474 @t97 @t4131 @t4132 @t1467 @t3453 @t3457 @t297 @t4128 @t4149 @t52 @t3456 @t3459 @t98 @t4146 @t4147 @t1493 @t3441 @t3444 @t276 @t4143 @t4144 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6119 @t220) % 40.01/40.20 (step @p4759 :rule instantiate :premises (@p110) :args (@t4150)) % 40.01/40.20 (step-pop @p6120 :rule scope :premises (@p4759)) % 40.01/40.20 (step @p4760 :rule process_scope :premises (@p6120) :args (@t4153)) % 40.01/40.20 (step @p4762 :rule implies_elim :premises (@p4760)) % 40.01/40.20 (step @p4763 :rule cnf_or_pos :args (@t4153)) % 40.01/40.20 (step @p4764 :rule reordering :premises (@p4763) :args ((or @t4152 @t4151 (not @t4153)))) % 40.01/40.20 (step @p4765 :rule instantiate :premises (@p112) :args (@t4154)) % 40.01/40.20 (step @p4766 :rule cnf_or_pos :args (@t4155)) % 40.01/40.20 (step @p4767 :rule reordering :premises (@p4766) :args ((or @t4152 @t244 @t1521 (not @t4155)))) % 40.01/40.20 (step @p4768 :rule instantiate :premises (@p108) :args (@t4150)) % 40.01/40.20 (step @p4769 :rule cnf_or_pos :args (@t4157)) % 40.01/40.20 (step @p4770 :rule reordering :premises (@p4769) :args ((or @t1532 @t265 @t264 @t4156 (not @t4157)))) % 40.01/40.20 (step @p4771 :rule chain_m_resolution :premises (@p4770 @p4768 @p1568 @p1566 @p136 @p134 @p4767 @p4765 @p133 @p131 @p130 @p128 @p127 @p125 @p4764 @p4762 @p110) :args ((or @t4152 @t239) @t267 (@list @t4157 @t1532 @t1534 @t248 @t249 @t1521 @t4155 @t245 @t247 @t242 @t243 @t240 @t241 @t4151 @t4153 @t220))) % 40.01/40.20 (step @p4772 :rule instantiate :premises (@p119) :args (@t4154)) % 40.01/40.20 (step @p4773 :rule cnf_or_pos :args (@t4159)) % 40.01/40.20 (step @p4774 :rule reordering :premises (@p4773) :args ((or @t270 @t4152 @t4158 @t3440 (not @t4159)))) % 40.01/40.20 (step @p4775 :rule instantiate :premises (@p120) :args (@t1518)) % 40.01/40.20 (step @p4776 :rule cnf_or_pos :args (@t4162)) % 40.01/40.20 (step @p4777 :rule reordering :premises (@p4776) :args ((or @t4161 @t4160 @t1519 (not @t4162)))) % 40.01/40.20 (step @p4778 :rule instantiate :premises (@p121) :args (@t1517)) % 40.01/40.20 (step @p4779 :rule cnf_or_pos :args (@t4164)) % 40.01/40.20 (step @p4780 :rule reordering :premises (@p4779) :args ((or @t1527 @t4143 @t4163 (not @t4164)))) % 40.01/40.20 (step @p4781 :rule chain_m_resolution :premises (@p4201 @p4199 @p883 @p4228 @p4226 @p74 @p4204 @p4202 @p75 @p4225 @p4223 @p912 @p4177 @p4175 @p854 @p4252 @p4250 @p73 @p4180 @p4178 @p76 @p4249 @p4247 @p941 @p4153 @p4151 @p825 @p4276 @p4274 @p72 @p4156 @p4154 @p77 @p4273 @p4271 @p970 @p4129 @p4127 @p796 @p4300 @p4298 @p71 @p4132 @p4130 @p78 @p4297 @p4295 @p999 @p4105 @p4103 @p767 @p4324 @p4322 @p70 @p4108 @p4106 @p79 @p4321 @p4319 @p1028 @p4081 @p4079 @p738 @p4348 @p4346 @p69 @p4084 @p4082 @p80 @p4345 @p4343 @p1057 @p4057 @p4055 @p709 @p4372 @p4370 @p68 @p4060 @p4058 @p81 @p4369 @p4367 @p1086 @p4033 @p4031 @p680 @p4396 @p4394 @p67 @p4036 @p4034 @p82 @p4393 @p4391 @p1115 @p4009 @p4007 @p651 @p4420 @p4418 @p66 @p4012 @p4010 @p83 @p4417 @p4415 @p1144 @p3985 @p3983 @p622 @p4444 @p4442 @p65 @p3988 @p3986 @p84 @p4441 @p4439 @p1173 @p3961 @p3959 @p593 @p4468 @p4466 @p64 @p3964 @p3962 @p85 @p4465 @p4463 @p1202 @p3937 @p3935 @p564 @p4492 @p4490 @p63 @p3940 @p3938 @p86 @p4489 @p4487 @p1231 @p3913 @p3911 @p535 @p4516 @p4514 @p62 @p3916 @p3914 @p87 @p4513 @p4511 @p1260 @p3889 @p3887 @p506 @p4540 @p4538 @p61 @p3892 @p3890 @p88 @p4537 @p4535 @p1289 @p3865 @p3863 @p477 @p4564 @p4562 @p60 @p3868 @p3866 @p89 @p4561 @p4559 @p1318 @p3841 @p3839 @p448 @p4588 @p4586 @p59 @p3844 @p3842 @p90 @p4585 @p4583 @p1347 @p3817 @p3815 @p419 @p4612 @p4610 @p58 @p3820 @p3818 @p91 @p4609 @p4607 @p1376 @p3793 @p3791 @p390 @p4636 @p4634 @p57 @p3796 @p3794 @p92 @p4633 @p4631 @p1405 @p3769 @p3767 @p361 @p4660 @p4658 @p56 @p3772 @p3770 @p93 @p4657 @p4655 @p1434 @p3745 @p3743 @p332 @p4684 @p4682 @p55 @p3748 @p3746 @p94 @p4681 @p4679 @p1463 @p3721 @p3719 @p303 @p4708 @p4706 @p54 @p3724 @p3722 @p95 @p4705 @p4703 @p1492 @p3697 @p3695 @p274 @p4732 @p4730 @p53 @p3700 @p3698 @p96 @p4729 @p4727 @p1521 @p3673 @p3671 @p245 @p4756 @p4754 @p52 @p3676 @p3674 @p97 @p4753 @p4751 @p1550 @p3649 @p3647 @p216 @p4780 @p4778 @p51 @p3652 @p3650 @p98 @p4777 @p4775 @p1579 @p3628 @p3626 @p187 @p4774 @p4772 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4771) :args (@t4152 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3802 @t895 @t3798 @t3819 @t74 @t3801 @t3804 @t75 @t3816 @t3817 @t921 @t3783 @t3787 @t869 @t3813 @t3834 @t73 @t3786 @t3789 @t76 @t3831 @t3832 @t947 @t3768 @t3772 @t843 @t3828 @t3849 @t72 @t3771 @t3774 @t77 @t3846 @t3847 @t973 @t3753 @t3757 @t817 @t3843 @t3864 @t71 @t3756 @t3759 @t78 @t3861 @t3862 @t999 @t3738 @t3742 @t791 @t3858 @t3879 @t70 @t3741 @t3744 @t79 @t3876 @t3877 @t1025 @t3723 @t3727 @t765 @t3873 @t3894 @t69 @t3726 @t3729 @t80 @t3891 @t3892 @t1051 @t3708 @t3712 @t739 @t3888 @t3909 @t68 @t3711 @t3714 @t81 @t3906 @t3907 @t1077 @t3693 @t3697 @t713 @t3903 @t3924 @t67 @t3696 @t3699 @t82 @t3921 @t3922 @t1103 @t3678 @t3682 @t687 @t3918 @t3939 @t66 @t3681 @t3684 @t83 @t3936 @t3937 @t1129 @t3663 @t3667 @t661 @t3933 @t3954 @t65 @t3666 @t3669 @t84 @t3951 @t3952 @t1155 @t3648 @t3652 @t635 @t3948 @t3969 @t64 @t3651 @t3654 @t85 @t3966 @t3967 @t1181 @t3633 @t3637 @t609 @t3963 @t3984 @t63 @t3636 @t3639 @t86 @t3981 @t3982 @t1207 @t3618 @t3622 @t583 @t3978 @t3999 @t62 @t3621 @t3624 @t87 @t3996 @t3997 @t1233 @t3603 @t3607 @t557 @t3993 @t4014 @t61 @t3606 @t3609 @t88 @t4011 @t4012 @t1259 @t3588 @t3592 @t531 @t4008 @t4029 @t60 @t3591 @t3594 @t89 @t4026 @t4027 @t1285 @t3573 @t3577 @t505 @t4023 @t4044 @t59 @t3576 @t3579 @t90 @t4041 @t4042 @t1311 @t3558 @t3562 @t479 @t4038 @t4059 @t58 @t3561 @t3564 @t91 @t4056 @t4057 @t1337 @t3543 @t3547 @t453 @t4053 @t4074 @t57 @t3546 @t3549 @t92 @t4071 @t4072 @t1363 @t3528 @t3532 @t427 @t4068 @t4089 @t56 @t3531 @t3534 @t93 @t4086 @t4087 @t1389 @t3513 @t3517 @t401 @t4083 @t4104 @t55 @t3516 @t3519 @t94 @t4101 @t4102 @t1415 @t3498 @t3502 @t375 @t4098 @t4119 @t54 @t3501 @t3504 @t95 @t4116 @t4117 @t1441 @t3483 @t3487 @t349 @t4113 @t4134 @t53 @t3486 @t3489 @t96 @t4131 @t4132 @t1467 @t3468 @t3472 @t323 @t4128 @t4149 @t52 @t3471 @t3474 @t97 @t4146 @t4147 @t1493 @t3453 @t3457 @t297 @t4143 @t4164 @t51 @t3456 @t3459 @t98 @t4161 @t4162 @t1519 @t3441 @t3444 @t276 @t4158 @t4159 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6121 @t220) % 40.01/40.20 (step @p4783 :rule instantiate :premises (@p110) :args (@t4165)) % 40.01/40.20 (step-pop @p6122 :rule scope :premises (@p4783)) % 40.01/40.20 (step @p4784 :rule process_scope :premises (@p6122) :args (@t4168)) % 40.01/40.20 (step @p4786 :rule implies_elim :premises (@p4784)) % 40.01/40.20 (step @p4787 :rule cnf_or_pos :args (@t4168)) % 40.01/40.20 (step @p4788 :rule reordering :premises (@p4787) :args ((or @t4167 @t4166 (not @t4168)))) % 40.01/40.20 (step @p4789 :rule instantiate :premises (@p112) :args (@t4169)) % 40.01/40.20 (step @p4790 :rule cnf_or_pos :args (@t4170)) % 40.01/40.20 (step @p4791 :rule reordering :premises (@p4790) :args ((or @t4167 @t244 @t1547 (not @t4170)))) % 40.01/40.20 (step @p4792 :rule instantiate :premises (@p108) :args (@t4165)) % 40.01/40.20 (step @p4793 :rule cnf_or_pos :args (@t4172)) % 40.01/40.20 (step @p4794 :rule reordering :premises (@p4793) :args ((or @t1558 @t265 @t264 @t4171 (not @t4172)))) % 40.01/40.20 (step @p4795 :rule chain_m_resolution :premises (@p4794 @p4792 @p1597 @p1595 @p136 @p134 @p4791 @p4789 @p133 @p131 @p130 @p128 @p127 @p125 @p4788 @p4786 @p110) :args ((or @t4167 @t239) @t267 (@list @t4172 @t1558 @t1560 @t248 @t249 @t1547 @t4170 @t245 @t247 @t242 @t243 @t240 @t241 @t4166 @t4168 @t220))) % 40.01/40.20 (step @p4796 :rule instantiate :premises (@p119) :args (@t4169)) % 40.01/40.20 (step @p4797 :rule cnf_or_pos :args (@t4174)) % 40.01/40.20 (step @p4798 :rule reordering :premises (@p4797) :args ((or @t270 @t4167 @t4173 @t3440 (not @t4174)))) % 40.01/40.20 (step @p4799 :rule instantiate :premises (@p120) :args (@t1544)) % 40.01/40.20 (step @p4800 :rule cnf_or_pos :args (@t4177)) % 40.01/40.20 (step @p4801 :rule reordering :premises (@p4800) :args ((or @t4176 @t4175 @t1545 (not @t4177)))) % 40.01/40.20 (step @p4802 :rule instantiate :premises (@p121) :args (@t1543)) % 40.01/40.20 (step @p4803 :rule cnf_or_pos :args (@t4179)) % 40.01/40.20 (step @p4804 :rule reordering :premises (@p4803) :args ((or @t1553 @t4158 @t4178 (not @t4179)))) % 40.01/40.20 (step @p4805 :rule chain_m_resolution :premises (@p4228 @p4226 @p74 @p4225 @p4223 @p912 @p4201 @p4199 @p883 @p4252 @p4250 @p73 @p4204 @p4202 @p75 @p4249 @p4247 @p941 @p4177 @p4175 @p854 @p4276 @p4274 @p72 @p4180 @p4178 @p76 @p4273 @p4271 @p970 @p4153 @p4151 @p825 @p4300 @p4298 @p71 @p4156 @p4154 @p77 @p4297 @p4295 @p999 @p4129 @p4127 @p796 @p4324 @p4322 @p70 @p4132 @p4130 @p78 @p4321 @p4319 @p1028 @p4105 @p4103 @p767 @p4348 @p4346 @p69 @p4108 @p4106 @p79 @p4345 @p4343 @p1057 @p4081 @p4079 @p738 @p4372 @p4370 @p68 @p4084 @p4082 @p80 @p4369 @p4367 @p1086 @p4057 @p4055 @p709 @p4396 @p4394 @p67 @p4060 @p4058 @p81 @p4393 @p4391 @p1115 @p4033 @p4031 @p680 @p4420 @p4418 @p66 @p4036 @p4034 @p82 @p4417 @p4415 @p1144 @p4009 @p4007 @p651 @p4444 @p4442 @p65 @p4012 @p4010 @p83 @p4441 @p4439 @p1173 @p3985 @p3983 @p622 @p4468 @p4466 @p64 @p3988 @p3986 @p84 @p4465 @p4463 @p1202 @p3961 @p3959 @p593 @p4492 @p4490 @p63 @p3964 @p3962 @p85 @p4489 @p4487 @p1231 @p3937 @p3935 @p564 @p4516 @p4514 @p62 @p3940 @p3938 @p86 @p4513 @p4511 @p1260 @p3913 @p3911 @p535 @p4540 @p4538 @p61 @p3916 @p3914 @p87 @p4537 @p4535 @p1289 @p3889 @p3887 @p506 @p4564 @p4562 @p60 @p3892 @p3890 @p88 @p4561 @p4559 @p1318 @p3865 @p3863 @p477 @p4588 @p4586 @p59 @p3868 @p3866 @p89 @p4585 @p4583 @p1347 @p3841 @p3839 @p448 @p4612 @p4610 @p58 @p3844 @p3842 @p90 @p4609 @p4607 @p1376 @p3817 @p3815 @p419 @p4636 @p4634 @p57 @p3820 @p3818 @p91 @p4633 @p4631 @p1405 @p3793 @p3791 @p390 @p4660 @p4658 @p56 @p3796 @p3794 @p92 @p4657 @p4655 @p1434 @p3769 @p3767 @p361 @p4684 @p4682 @p55 @p3772 @p3770 @p93 @p4681 @p4679 @p1463 @p3745 @p3743 @p332 @p4708 @p4706 @p54 @p3748 @p3746 @p94 @p4705 @p4703 @p1492 @p3721 @p3719 @p303 @p4732 @p4730 @p53 @p3724 @p3722 @p95 @p4729 @p4727 @p1521 @p3697 @p3695 @p274 @p4756 @p4754 @p52 @p3700 @p3698 @p96 @p4753 @p4751 @p1550 @p3673 @p3671 @p245 @p4780 @p4778 @p51 @p3676 @p3674 @p97 @p4777 @p4775 @p1579 @p3649 @p3647 @p216 @p4804 @p4802 @p50 @p3652 @p3650 @p98 @p4801 @p4799 @p1608 @p3628 @p3626 @p187 @p4798 @p4796 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4795) :args (@t4167 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3819 @t74 @t3816 @t3817 @t921 @t3798 @t3802 @t895 @t3813 @t3834 @t73 @t3801 @t3804 @t75 @t3831 @t3832 @t947 @t3783 @t3787 @t869 @t3828 @t3849 @t72 @t3786 @t3789 @t76 @t3846 @t3847 @t973 @t3768 @t3772 @t843 @t3843 @t3864 @t71 @t3771 @t3774 @t77 @t3861 @t3862 @t999 @t3753 @t3757 @t817 @t3858 @t3879 @t70 @t3756 @t3759 @t78 @t3876 @t3877 @t1025 @t3738 @t3742 @t791 @t3873 @t3894 @t69 @t3741 @t3744 @t79 @t3891 @t3892 @t1051 @t3723 @t3727 @t765 @t3888 @t3909 @t68 @t3726 @t3729 @t80 @t3906 @t3907 @t1077 @t3708 @t3712 @t739 @t3903 @t3924 @t67 @t3711 @t3714 @t81 @t3921 @t3922 @t1103 @t3693 @t3697 @t713 @t3918 @t3939 @t66 @t3696 @t3699 @t82 @t3936 @t3937 @t1129 @t3678 @t3682 @t687 @t3933 @t3954 @t65 @t3681 @t3684 @t83 @t3951 @t3952 @t1155 @t3663 @t3667 @t661 @t3948 @t3969 @t64 @t3666 @t3669 @t84 @t3966 @t3967 @t1181 @t3648 @t3652 @t635 @t3963 @t3984 @t63 @t3651 @t3654 @t85 @t3981 @t3982 @t1207 @t3633 @t3637 @t609 @t3978 @t3999 @t62 @t3636 @t3639 @t86 @t3996 @t3997 @t1233 @t3618 @t3622 @t583 @t3993 @t4014 @t61 @t3621 @t3624 @t87 @t4011 @t4012 @t1259 @t3603 @t3607 @t557 @t4008 @t4029 @t60 @t3606 @t3609 @t88 @t4026 @t4027 @t1285 @t3588 @t3592 @t531 @t4023 @t4044 @t59 @t3591 @t3594 @t89 @t4041 @t4042 @t1311 @t3573 @t3577 @t505 @t4038 @t4059 @t58 @t3576 @t3579 @t90 @t4056 @t4057 @t1337 @t3558 @t3562 @t479 @t4053 @t4074 @t57 @t3561 @t3564 @t91 @t4071 @t4072 @t1363 @t3543 @t3547 @t453 @t4068 @t4089 @t56 @t3546 @t3549 @t92 @t4086 @t4087 @t1389 @t3528 @t3532 @t427 @t4083 @t4104 @t55 @t3531 @t3534 @t93 @t4101 @t4102 @t1415 @t3513 @t3517 @t401 @t4098 @t4119 @t54 @t3516 @t3519 @t94 @t4116 @t4117 @t1441 @t3498 @t3502 @t375 @t4113 @t4134 @t53 @t3501 @t3504 @t95 @t4131 @t4132 @t1467 @t3483 @t3487 @t349 @t4128 @t4149 @t52 @t3486 @t3489 @t96 @t4146 @t4147 @t1493 @t3468 @t3472 @t323 @t4143 @t4164 @t51 @t3471 @t3474 @t97 @t4161 @t4162 @t1519 @t3453 @t3457 @t297 @t4158 @t4179 @t50 @t3456 @t3459 @t98 @t4176 @t4177 @t1545 @t3441 @t3444 @t276 @t4173 @t4174 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6123 @t220) % 40.01/40.20 (step @p4807 :rule instantiate :premises (@p110) :args (@t4180)) % 40.01/40.20 (step-pop @p6124 :rule scope :premises (@p4807)) % 40.01/40.20 (step @p4808 :rule process_scope :premises (@p6124) :args (@t4183)) % 40.01/40.20 (step @p4810 :rule implies_elim :premises (@p4808)) % 40.01/40.20 (step @p4811 :rule cnf_or_pos :args (@t4183)) % 40.01/40.20 (step @p4812 :rule reordering :premises (@p4811) :args ((or @t4182 @t4181 (not @t4183)))) % 40.01/40.20 (step @p4813 :rule instantiate :premises (@p112) :args (@t4184)) % 40.01/40.20 (step @p4814 :rule cnf_or_pos :args (@t4185)) % 40.01/40.20 (step @p4815 :rule reordering :premises (@p4814) :args ((or @t4182 @t244 @t1573 (not @t4185)))) % 40.01/40.20 (step @p4816 :rule instantiate :premises (@p108) :args (@t4180)) % 40.01/40.20 (step @p4817 :rule cnf_or_pos :args (@t4187)) % 40.01/40.20 (step @p4818 :rule reordering :premises (@p4817) :args ((or @t1584 @t265 @t264 @t4186 (not @t4187)))) % 40.01/40.20 (step @p4819 :rule chain_m_resolution :premises (@p4818 @p4816 @p1626 @p1624 @p136 @p134 @p4815 @p4813 @p133 @p131 @p130 @p128 @p127 @p125 @p4812 @p4810 @p110) :args ((or @t4182 @t239) @t267 (@list @t4187 @t1584 @t1586 @t248 @t249 @t1573 @t4185 @t245 @t247 @t242 @t243 @t240 @t241 @t4181 @t4183 @t220))) % 40.01/40.20 (step @p4820 :rule instantiate :premises (@p119) :args (@t4184)) % 40.01/40.20 (step @p4821 :rule cnf_or_pos :args (@t4189)) % 40.01/40.20 (step @p4822 :rule reordering :premises (@p4821) :args ((or @t270 @t4182 @t4188 @t3440 (not @t4189)))) % 40.01/40.20 (step @p4823 :rule instantiate :premises (@p120) :args (@t1570)) % 40.01/40.20 (step @p4824 :rule cnf_or_pos :args (@t4192)) % 40.01/40.20 (step @p4825 :rule reordering :premises (@p4824) :args ((or @t4191 @t4190 @t1571 (not @t4192)))) % 40.01/40.20 (step @p4826 :rule instantiate :premises (@p121) :args (@t1569)) % 40.01/40.20 (step @p4827 :rule cnf_or_pos :args (@t4194)) % 40.01/40.20 (step @p4828 :rule reordering :premises (@p4827) :args ((or @t1579 @t4173 @t4193 (not @t4194)))) % 40.01/40.20 (step @p4829 :rule chain_m_resolution :premises (@p4225 @p4223 @p912 @p4252 @p4250 @p73 @p4228 @p4226 @p74 @p4249 @p4247 @p941 @p4201 @p4199 @p883 @p4276 @p4274 @p72 @p4204 @p4202 @p75 @p4273 @p4271 @p970 @p4177 @p4175 @p854 @p4300 @p4298 @p71 @p4180 @p4178 @p76 @p4297 @p4295 @p999 @p4153 @p4151 @p825 @p4324 @p4322 @p70 @p4156 @p4154 @p77 @p4321 @p4319 @p1028 @p4129 @p4127 @p796 @p4348 @p4346 @p69 @p4132 @p4130 @p78 @p4345 @p4343 @p1057 @p4105 @p4103 @p767 @p4372 @p4370 @p68 @p4108 @p4106 @p79 @p4369 @p4367 @p1086 @p4081 @p4079 @p738 @p4396 @p4394 @p67 @p4084 @p4082 @p80 @p4393 @p4391 @p1115 @p4057 @p4055 @p709 @p4420 @p4418 @p66 @p4060 @p4058 @p81 @p4417 @p4415 @p1144 @p4033 @p4031 @p680 @p4444 @p4442 @p65 @p4036 @p4034 @p82 @p4441 @p4439 @p1173 @p4009 @p4007 @p651 @p4468 @p4466 @p64 @p4012 @p4010 @p83 @p4465 @p4463 @p1202 @p3985 @p3983 @p622 @p4492 @p4490 @p63 @p3988 @p3986 @p84 @p4489 @p4487 @p1231 @p3961 @p3959 @p593 @p4516 @p4514 @p62 @p3964 @p3962 @p85 @p4513 @p4511 @p1260 @p3937 @p3935 @p564 @p4540 @p4538 @p61 @p3940 @p3938 @p86 @p4537 @p4535 @p1289 @p3913 @p3911 @p535 @p4564 @p4562 @p60 @p3916 @p3914 @p87 @p4561 @p4559 @p1318 @p3889 @p3887 @p506 @p4588 @p4586 @p59 @p3892 @p3890 @p88 @p4585 @p4583 @p1347 @p3865 @p3863 @p477 @p4612 @p4610 @p58 @p3868 @p3866 @p89 @p4609 @p4607 @p1376 @p3841 @p3839 @p448 @p4636 @p4634 @p57 @p3844 @p3842 @p90 @p4633 @p4631 @p1405 @p3817 @p3815 @p419 @p4660 @p4658 @p56 @p3820 @p3818 @p91 @p4657 @p4655 @p1434 @p3793 @p3791 @p390 @p4684 @p4682 @p55 @p3796 @p3794 @p92 @p4681 @p4679 @p1463 @p3769 @p3767 @p361 @p4708 @p4706 @p54 @p3772 @p3770 @p93 @p4705 @p4703 @p1492 @p3745 @p3743 @p332 @p4732 @p4730 @p53 @p3748 @p3746 @p94 @p4729 @p4727 @p1521 @p3721 @p3719 @p303 @p4756 @p4754 @p52 @p3724 @p3722 @p95 @p4753 @p4751 @p1550 @p3697 @p3695 @p274 @p4780 @p4778 @p51 @p3700 @p3698 @p96 @p4777 @p4775 @p1579 @p3673 @p3671 @p245 @p4804 @p4802 @p50 @p3676 @p3674 @p97 @p4801 @p4799 @p1608 @p3649 @p3647 @p216 @p4828 @p4826 @p49 @p3652 @p3650 @p98 @p4825 @p4823 @p1637 @p3628 @p3626 @p187 @p4822 @p4820 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4819) :args (@t4182 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3817 @t921 @t3813 @t3834 @t73 @t3816 @t3819 @t74 @t3831 @t3832 @t947 @t3798 @t3802 @t895 @t3828 @t3849 @t72 @t3801 @t3804 @t75 @t3846 @t3847 @t973 @t3783 @t3787 @t869 @t3843 @t3864 @t71 @t3786 @t3789 @t76 @t3861 @t3862 @t999 @t3768 @t3772 @t843 @t3858 @t3879 @t70 @t3771 @t3774 @t77 @t3876 @t3877 @t1025 @t3753 @t3757 @t817 @t3873 @t3894 @t69 @t3756 @t3759 @t78 @t3891 @t3892 @t1051 @t3738 @t3742 @t791 @t3888 @t3909 @t68 @t3741 @t3744 @t79 @t3906 @t3907 @t1077 @t3723 @t3727 @t765 @t3903 @t3924 @t67 @t3726 @t3729 @t80 @t3921 @t3922 @t1103 @t3708 @t3712 @t739 @t3918 @t3939 @t66 @t3711 @t3714 @t81 @t3936 @t3937 @t1129 @t3693 @t3697 @t713 @t3933 @t3954 @t65 @t3696 @t3699 @t82 @t3951 @t3952 @t1155 @t3678 @t3682 @t687 @t3948 @t3969 @t64 @t3681 @t3684 @t83 @t3966 @t3967 @t1181 @t3663 @t3667 @t661 @t3963 @t3984 @t63 @t3666 @t3669 @t84 @t3981 @t3982 @t1207 @t3648 @t3652 @t635 @t3978 @t3999 @t62 @t3651 @t3654 @t85 @t3996 @t3997 @t1233 @t3633 @t3637 @t609 @t3993 @t4014 @t61 @t3636 @t3639 @t86 @t4011 @t4012 @t1259 @t3618 @t3622 @t583 @t4008 @t4029 @t60 @t3621 @t3624 @t87 @t4026 @t4027 @t1285 @t3603 @t3607 @t557 @t4023 @t4044 @t59 @t3606 @t3609 @t88 @t4041 @t4042 @t1311 @t3588 @t3592 @t531 @t4038 @t4059 @t58 @t3591 @t3594 @t89 @t4056 @t4057 @t1337 @t3573 @t3577 @t505 @t4053 @t4074 @t57 @t3576 @t3579 @t90 @t4071 @t4072 @t1363 @t3558 @t3562 @t479 @t4068 @t4089 @t56 @t3561 @t3564 @t91 @t4086 @t4087 @t1389 @t3543 @t3547 @t453 @t4083 @t4104 @t55 @t3546 @t3549 @t92 @t4101 @t4102 @t1415 @t3528 @t3532 @t427 @t4098 @t4119 @t54 @t3531 @t3534 @t93 @t4116 @t4117 @t1441 @t3513 @t3517 @t401 @t4113 @t4134 @t53 @t3516 @t3519 @t94 @t4131 @t4132 @t1467 @t3498 @t3502 @t375 @t4128 @t4149 @t52 @t3501 @t3504 @t95 @t4146 @t4147 @t1493 @t3483 @t3487 @t349 @t4143 @t4164 @t51 @t3486 @t3489 @t96 @t4161 @t4162 @t1519 @t3468 @t3472 @t323 @t4158 @t4179 @t50 @t3471 @t3474 @t97 @t4176 @t4177 @t1545 @t3453 @t3457 @t297 @t4173 @t4194 @t49 @t3456 @t3459 @t98 @t4191 @t4192 @t1571 @t3441 @t3444 @t276 @t4188 @t4189 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6125 @t220) % 40.01/40.20 (step @p4831 :rule instantiate :premises (@p110) :args (@t4195)) % 40.01/40.20 (step-pop @p6126 :rule scope :premises (@p4831)) % 40.01/40.20 (step @p4832 :rule process_scope :premises (@p6126) :args (@t4198)) % 40.01/40.20 (step @p4834 :rule implies_elim :premises (@p4832)) % 40.01/40.20 (step @p4835 :rule cnf_or_pos :args (@t4198)) % 40.01/40.20 (step @p4836 :rule reordering :premises (@p4835) :args ((or @t4197 @t4196 (not @t4198)))) % 40.01/40.20 (step @p4837 :rule instantiate :premises (@p112) :args (@t4199)) % 40.01/40.20 (step @p4838 :rule cnf_or_pos :args (@t4200)) % 40.01/40.20 (step @p4839 :rule reordering :premises (@p4838) :args ((or @t4197 @t244 @t1599 (not @t4200)))) % 40.01/40.20 (step @p4840 :rule instantiate :premises (@p108) :args (@t4195)) % 40.01/40.20 (step @p4841 :rule cnf_or_pos :args (@t4202)) % 40.01/40.20 (step @p4842 :rule reordering :premises (@p4841) :args ((or @t1610 @t265 @t264 @t4201 (not @t4202)))) % 40.01/40.20 (step @p4843 :rule chain_m_resolution :premises (@p4842 @p4840 @p1655 @p1653 @p136 @p134 @p4839 @p4837 @p133 @p131 @p130 @p128 @p127 @p125 @p4836 @p4834 @p110) :args ((or @t4197 @t239) @t267 (@list @t4202 @t1610 @t1612 @t248 @t249 @t1599 @t4200 @t245 @t247 @t242 @t243 @t240 @t241 @t4196 @t4198 @t220))) % 40.01/40.20 (step @p4844 :rule instantiate :premises (@p119) :args (@t4199)) % 40.01/40.20 (step @p4845 :rule cnf_or_pos :args (@t4204)) % 40.01/40.20 (step @p4846 :rule reordering :premises (@p4845) :args ((or @t270 @t4197 @t4203 @t3440 (not @t4204)))) % 40.01/40.20 (step @p4847 :rule instantiate :premises (@p120) :args (@t1596)) % 40.01/40.20 (step @p4848 :rule cnf_or_pos :args (@t4207)) % 40.01/40.20 (step @p4849 :rule reordering :premises (@p4848) :args ((or @t4206 @t4205 @t1597 (not @t4207)))) % 40.01/40.20 (step @p4850 :rule instantiate :premises (@p121) :args (@t1595)) % 40.01/40.20 (step @p4851 :rule cnf_or_pos :args (@t4209)) % 40.01/40.20 (step @p4852 :rule reordering :premises (@p4851) :args ((or @t1605 @t4188 @t4208 (not @t4209)))) % 40.01/40.20 (step @p4853 :rule chain_m_resolution :premises (@p4252 @p4250 @p73 @p4249 @p4247 @p941 @p4225 @p4223 @p912 @p4276 @p4274 @p72 @p4228 @p4226 @p74 @p4273 @p4271 @p970 @p4201 @p4199 @p883 @p4300 @p4298 @p71 @p4204 @p4202 @p75 @p4297 @p4295 @p999 @p4177 @p4175 @p854 @p4324 @p4322 @p70 @p4180 @p4178 @p76 @p4321 @p4319 @p1028 @p4153 @p4151 @p825 @p4348 @p4346 @p69 @p4156 @p4154 @p77 @p4345 @p4343 @p1057 @p4129 @p4127 @p796 @p4372 @p4370 @p68 @p4132 @p4130 @p78 @p4369 @p4367 @p1086 @p4105 @p4103 @p767 @p4396 @p4394 @p67 @p4108 @p4106 @p79 @p4393 @p4391 @p1115 @p4081 @p4079 @p738 @p4420 @p4418 @p66 @p4084 @p4082 @p80 @p4417 @p4415 @p1144 @p4057 @p4055 @p709 @p4444 @p4442 @p65 @p4060 @p4058 @p81 @p4441 @p4439 @p1173 @p4033 @p4031 @p680 @p4468 @p4466 @p64 @p4036 @p4034 @p82 @p4465 @p4463 @p1202 @p4009 @p4007 @p651 @p4492 @p4490 @p63 @p4012 @p4010 @p83 @p4489 @p4487 @p1231 @p3985 @p3983 @p622 @p4516 @p4514 @p62 @p3988 @p3986 @p84 @p4513 @p4511 @p1260 @p3961 @p3959 @p593 @p4540 @p4538 @p61 @p3964 @p3962 @p85 @p4537 @p4535 @p1289 @p3937 @p3935 @p564 @p4564 @p4562 @p60 @p3940 @p3938 @p86 @p4561 @p4559 @p1318 @p3913 @p3911 @p535 @p4588 @p4586 @p59 @p3916 @p3914 @p87 @p4585 @p4583 @p1347 @p3889 @p3887 @p506 @p4612 @p4610 @p58 @p3892 @p3890 @p88 @p4609 @p4607 @p1376 @p3865 @p3863 @p477 @p4636 @p4634 @p57 @p3868 @p3866 @p89 @p4633 @p4631 @p1405 @p3841 @p3839 @p448 @p4660 @p4658 @p56 @p3844 @p3842 @p90 @p4657 @p4655 @p1434 @p3817 @p3815 @p419 @p4684 @p4682 @p55 @p3820 @p3818 @p91 @p4681 @p4679 @p1463 @p3793 @p3791 @p390 @p4708 @p4706 @p54 @p3796 @p3794 @p92 @p4705 @p4703 @p1492 @p3769 @p3767 @p361 @p4732 @p4730 @p53 @p3772 @p3770 @p93 @p4729 @p4727 @p1521 @p3745 @p3743 @p332 @p4756 @p4754 @p52 @p3748 @p3746 @p94 @p4753 @p4751 @p1550 @p3721 @p3719 @p303 @p4780 @p4778 @p51 @p3724 @p3722 @p95 @p4777 @p4775 @p1579 @p3697 @p3695 @p274 @p4804 @p4802 @p50 @p3700 @p3698 @p96 @p4801 @p4799 @p1608 @p3673 @p3671 @p245 @p4828 @p4826 @p49 @p3676 @p3674 @p97 @p4825 @p4823 @p1637 @p3649 @p3647 @p216 @p4852 @p4850 @p48 @p3652 @p3650 @p98 @p4849 @p4847 @p1666 @p3628 @p3626 @p187 @p4846 @p4844 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4843) :args (@t4197 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3834 @t73 @t3831 @t3832 @t947 @t3813 @t3817 @t921 @t3828 @t3849 @t72 @t3816 @t3819 @t74 @t3846 @t3847 @t973 @t3798 @t3802 @t895 @t3843 @t3864 @t71 @t3801 @t3804 @t75 @t3861 @t3862 @t999 @t3783 @t3787 @t869 @t3858 @t3879 @t70 @t3786 @t3789 @t76 @t3876 @t3877 @t1025 @t3768 @t3772 @t843 @t3873 @t3894 @t69 @t3771 @t3774 @t77 @t3891 @t3892 @t1051 @t3753 @t3757 @t817 @t3888 @t3909 @t68 @t3756 @t3759 @t78 @t3906 @t3907 @t1077 @t3738 @t3742 @t791 @t3903 @t3924 @t67 @t3741 @t3744 @t79 @t3921 @t3922 @t1103 @t3723 @t3727 @t765 @t3918 @t3939 @t66 @t3726 @t3729 @t80 @t3936 @t3937 @t1129 @t3708 @t3712 @t739 @t3933 @t3954 @t65 @t3711 @t3714 @t81 @t3951 @t3952 @t1155 @t3693 @t3697 @t713 @t3948 @t3969 @t64 @t3696 @t3699 @t82 @t3966 @t3967 @t1181 @t3678 @t3682 @t687 @t3963 @t3984 @t63 @t3681 @t3684 @t83 @t3981 @t3982 @t1207 @t3663 @t3667 @t661 @t3978 @t3999 @t62 @t3666 @t3669 @t84 @t3996 @t3997 @t1233 @t3648 @t3652 @t635 @t3993 @t4014 @t61 @t3651 @t3654 @t85 @t4011 @t4012 @t1259 @t3633 @t3637 @t609 @t4008 @t4029 @t60 @t3636 @t3639 @t86 @t4026 @t4027 @t1285 @t3618 @t3622 @t583 @t4023 @t4044 @t59 @t3621 @t3624 @t87 @t4041 @t4042 @t1311 @t3603 @t3607 @t557 @t4038 @t4059 @t58 @t3606 @t3609 @t88 @t4056 @t4057 @t1337 @t3588 @t3592 @t531 @t4053 @t4074 @t57 @t3591 @t3594 @t89 @t4071 @t4072 @t1363 @t3573 @t3577 @t505 @t4068 @t4089 @t56 @t3576 @t3579 @t90 @t4086 @t4087 @t1389 @t3558 @t3562 @t479 @t4083 @t4104 @t55 @t3561 @t3564 @t91 @t4101 @t4102 @t1415 @t3543 @t3547 @t453 @t4098 @t4119 @t54 @t3546 @t3549 @t92 @t4116 @t4117 @t1441 @t3528 @t3532 @t427 @t4113 @t4134 @t53 @t3531 @t3534 @t93 @t4131 @t4132 @t1467 @t3513 @t3517 @t401 @t4128 @t4149 @t52 @t3516 @t3519 @t94 @t4146 @t4147 @t1493 @t3498 @t3502 @t375 @t4143 @t4164 @t51 @t3501 @t3504 @t95 @t4161 @t4162 @t1519 @t3483 @t3487 @t349 @t4158 @t4179 @t50 @t3486 @t3489 @t96 @t4176 @t4177 @t1545 @t3468 @t3472 @t323 @t4173 @t4194 @t49 @t3471 @t3474 @t97 @t4191 @t4192 @t1571 @t3453 @t3457 @t297 @t4188 @t4209 @t48 @t3456 @t3459 @t98 @t4206 @t4207 @t1597 @t3441 @t3444 @t276 @t4203 @t4204 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6127 @t220) % 40.01/40.20 (step @p4855 :rule instantiate :premises (@p110) :args (@t4210)) % 40.01/40.20 (step-pop @p6128 :rule scope :premises (@p4855)) % 40.01/40.20 (step @p4856 :rule process_scope :premises (@p6128) :args (@t4213)) % 40.01/40.20 (step @p4858 :rule implies_elim :premises (@p4856)) % 40.01/40.20 (step @p4859 :rule cnf_or_pos :args (@t4213)) % 40.01/40.20 (step @p4860 :rule reordering :premises (@p4859) :args ((or @t4212 @t4211 (not @t4213)))) % 40.01/40.20 (step @p4861 :rule instantiate :premises (@p112) :args (@t4214)) % 40.01/40.20 (step @p4862 :rule cnf_or_pos :args (@t4215)) % 40.01/40.20 (step @p4863 :rule reordering :premises (@p4862) :args ((or @t4212 @t244 @t1625 (not @t4215)))) % 40.01/40.20 (step @p4864 :rule instantiate :premises (@p108) :args (@t4210)) % 40.01/40.20 (step @p4865 :rule cnf_or_pos :args (@t4217)) % 40.01/40.20 (step @p4866 :rule reordering :premises (@p4865) :args ((or @t1636 @t265 @t264 @t4216 (not @t4217)))) % 40.01/40.20 (step @p4867 :rule chain_m_resolution :premises (@p4866 @p4864 @p1684 @p1682 @p136 @p134 @p4863 @p4861 @p133 @p131 @p130 @p128 @p127 @p125 @p4860 @p4858 @p110) :args ((or @t4212 @t239) @t267 (@list @t4217 @t1636 @t1638 @t248 @t249 @t1625 @t4215 @t245 @t247 @t242 @t243 @t240 @t241 @t4211 @t4213 @t220))) % 40.01/40.20 (step @p4868 :rule instantiate :premises (@p119) :args (@t4214)) % 40.01/40.20 (step @p4869 :rule cnf_or_pos :args (@t4219)) % 40.01/40.20 (step @p4870 :rule reordering :premises (@p4869) :args ((or @t270 @t4212 @t4218 @t3440 (not @t4219)))) % 40.01/40.20 (step @p4871 :rule instantiate :premises (@p120) :args (@t1622)) % 40.01/40.20 (step @p4872 :rule cnf_or_pos :args (@t4222)) % 40.01/40.20 (step @p4873 :rule reordering :premises (@p4872) :args ((or @t4221 @t4220 @t1623 (not @t4222)))) % 40.01/40.20 (step @p4874 :rule instantiate :premises (@p121) :args (@t1621)) % 40.01/40.20 (step @p4875 :rule cnf_or_pos :args (@t4224)) % 40.01/40.20 (step @p4876 :rule reordering :premises (@p4875) :args ((or @t1631 @t4203 @t4223 (not @t4224)))) % 40.01/40.20 (step @p4877 :rule chain_m_resolution :premises (@p4249 @p4247 @p941 @p4276 @p4274 @p72 @p4252 @p4250 @p73 @p4273 @p4271 @p970 @p4225 @p4223 @p912 @p4300 @p4298 @p71 @p4228 @p4226 @p74 @p4297 @p4295 @p999 @p4201 @p4199 @p883 @p4324 @p4322 @p70 @p4204 @p4202 @p75 @p4321 @p4319 @p1028 @p4177 @p4175 @p854 @p4348 @p4346 @p69 @p4180 @p4178 @p76 @p4345 @p4343 @p1057 @p4153 @p4151 @p825 @p4372 @p4370 @p68 @p4156 @p4154 @p77 @p4369 @p4367 @p1086 @p4129 @p4127 @p796 @p4396 @p4394 @p67 @p4132 @p4130 @p78 @p4393 @p4391 @p1115 @p4105 @p4103 @p767 @p4420 @p4418 @p66 @p4108 @p4106 @p79 @p4417 @p4415 @p1144 @p4081 @p4079 @p738 @p4444 @p4442 @p65 @p4084 @p4082 @p80 @p4441 @p4439 @p1173 @p4057 @p4055 @p709 @p4468 @p4466 @p64 @p4060 @p4058 @p81 @p4465 @p4463 @p1202 @p4033 @p4031 @p680 @p4492 @p4490 @p63 @p4036 @p4034 @p82 @p4489 @p4487 @p1231 @p4009 @p4007 @p651 @p4516 @p4514 @p62 @p4012 @p4010 @p83 @p4513 @p4511 @p1260 @p3985 @p3983 @p622 @p4540 @p4538 @p61 @p3988 @p3986 @p84 @p4537 @p4535 @p1289 @p3961 @p3959 @p593 @p4564 @p4562 @p60 @p3964 @p3962 @p85 @p4561 @p4559 @p1318 @p3937 @p3935 @p564 @p4588 @p4586 @p59 @p3940 @p3938 @p86 @p4585 @p4583 @p1347 @p3913 @p3911 @p535 @p4612 @p4610 @p58 @p3916 @p3914 @p87 @p4609 @p4607 @p1376 @p3889 @p3887 @p506 @p4636 @p4634 @p57 @p3892 @p3890 @p88 @p4633 @p4631 @p1405 @p3865 @p3863 @p477 @p4660 @p4658 @p56 @p3868 @p3866 @p89 @p4657 @p4655 @p1434 @p3841 @p3839 @p448 @p4684 @p4682 @p55 @p3844 @p3842 @p90 @p4681 @p4679 @p1463 @p3817 @p3815 @p419 @p4708 @p4706 @p54 @p3820 @p3818 @p91 @p4705 @p4703 @p1492 @p3793 @p3791 @p390 @p4732 @p4730 @p53 @p3796 @p3794 @p92 @p4729 @p4727 @p1521 @p3769 @p3767 @p361 @p4756 @p4754 @p52 @p3772 @p3770 @p93 @p4753 @p4751 @p1550 @p3745 @p3743 @p332 @p4780 @p4778 @p51 @p3748 @p3746 @p94 @p4777 @p4775 @p1579 @p3721 @p3719 @p303 @p4804 @p4802 @p50 @p3724 @p3722 @p95 @p4801 @p4799 @p1608 @p3697 @p3695 @p274 @p4828 @p4826 @p49 @p3700 @p3698 @p96 @p4825 @p4823 @p1637 @p3673 @p3671 @p245 @p4852 @p4850 @p48 @p3676 @p3674 @p97 @p4849 @p4847 @p1666 @p3649 @p3647 @p216 @p4876 @p4874 @p47 @p3652 @p3650 @p98 @p4873 @p4871 @p1695 @p3628 @p3626 @p187 @p4870 @p4868 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4867) :args (@t4212 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3832 @t947 @t3828 @t3849 @t72 @t3831 @t3834 @t73 @t3846 @t3847 @t973 @t3813 @t3817 @t921 @t3843 @t3864 @t71 @t3816 @t3819 @t74 @t3861 @t3862 @t999 @t3798 @t3802 @t895 @t3858 @t3879 @t70 @t3801 @t3804 @t75 @t3876 @t3877 @t1025 @t3783 @t3787 @t869 @t3873 @t3894 @t69 @t3786 @t3789 @t76 @t3891 @t3892 @t1051 @t3768 @t3772 @t843 @t3888 @t3909 @t68 @t3771 @t3774 @t77 @t3906 @t3907 @t1077 @t3753 @t3757 @t817 @t3903 @t3924 @t67 @t3756 @t3759 @t78 @t3921 @t3922 @t1103 @t3738 @t3742 @t791 @t3918 @t3939 @t66 @t3741 @t3744 @t79 @t3936 @t3937 @t1129 @t3723 @t3727 @t765 @t3933 @t3954 @t65 @t3726 @t3729 @t80 @t3951 @t3952 @t1155 @t3708 @t3712 @t739 @t3948 @t3969 @t64 @t3711 @t3714 @t81 @t3966 @t3967 @t1181 @t3693 @t3697 @t713 @t3963 @t3984 @t63 @t3696 @t3699 @t82 @t3981 @t3982 @t1207 @t3678 @t3682 @t687 @t3978 @t3999 @t62 @t3681 @t3684 @t83 @t3996 @t3997 @t1233 @t3663 @t3667 @t661 @t3993 @t4014 @t61 @t3666 @t3669 @t84 @t4011 @t4012 @t1259 @t3648 @t3652 @t635 @t4008 @t4029 @t60 @t3651 @t3654 @t85 @t4026 @t4027 @t1285 @t3633 @t3637 @t609 @t4023 @t4044 @t59 @t3636 @t3639 @t86 @t4041 @t4042 @t1311 @t3618 @t3622 @t583 @t4038 @t4059 @t58 @t3621 @t3624 @t87 @t4056 @t4057 @t1337 @t3603 @t3607 @t557 @t4053 @t4074 @t57 @t3606 @t3609 @t88 @t4071 @t4072 @t1363 @t3588 @t3592 @t531 @t4068 @t4089 @t56 @t3591 @t3594 @t89 @t4086 @t4087 @t1389 @t3573 @t3577 @t505 @t4083 @t4104 @t55 @t3576 @t3579 @t90 @t4101 @t4102 @t1415 @t3558 @t3562 @t479 @t4098 @t4119 @t54 @t3561 @t3564 @t91 @t4116 @t4117 @t1441 @t3543 @t3547 @t453 @t4113 @t4134 @t53 @t3546 @t3549 @t92 @t4131 @t4132 @t1467 @t3528 @t3532 @t427 @t4128 @t4149 @t52 @t3531 @t3534 @t93 @t4146 @t4147 @t1493 @t3513 @t3517 @t401 @t4143 @t4164 @t51 @t3516 @t3519 @t94 @t4161 @t4162 @t1519 @t3498 @t3502 @t375 @t4158 @t4179 @t50 @t3501 @t3504 @t95 @t4176 @t4177 @t1545 @t3483 @t3487 @t349 @t4173 @t4194 @t49 @t3486 @t3489 @t96 @t4191 @t4192 @t1571 @t3468 @t3472 @t323 @t4188 @t4209 @t48 @t3471 @t3474 @t97 @t4206 @t4207 @t1597 @t3453 @t3457 @t297 @t4203 @t4224 @t47 @t3456 @t3459 @t98 @t4221 @t4222 @t1623 @t3441 @t3444 @t276 @t4218 @t4219 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6129 @t220) % 40.01/40.20 (step @p4879 :rule instantiate :premises (@p110) :args (@t4225)) % 40.01/40.20 (step-pop @p6130 :rule scope :premises (@p4879)) % 40.01/40.20 (step @p4880 :rule process_scope :premises (@p6130) :args (@t4228)) % 40.01/40.20 (step @p4882 :rule implies_elim :premises (@p4880)) % 40.01/40.20 (step @p4883 :rule cnf_or_pos :args (@t4228)) % 40.01/40.20 (step @p4884 :rule reordering :premises (@p4883) :args ((or @t4227 @t4226 (not @t4228)))) % 40.01/40.20 (step @p4885 :rule instantiate :premises (@p112) :args (@t4229)) % 40.01/40.20 (step @p4886 :rule cnf_or_pos :args (@t4230)) % 40.01/40.20 (step @p4887 :rule reordering :premises (@p4886) :args ((or @t4227 @t244 @t1651 (not @t4230)))) % 40.01/40.20 (step @p4888 :rule instantiate :premises (@p108) :args (@t4225)) % 40.01/40.20 (step @p4889 :rule cnf_or_pos :args (@t4232)) % 40.01/40.20 (step @p4890 :rule reordering :premises (@p4889) :args ((or @t1662 @t265 @t264 @t4231 (not @t4232)))) % 40.01/40.20 (step @p4891 :rule chain_m_resolution :premises (@p4890 @p4888 @p1713 @p1711 @p136 @p134 @p4887 @p4885 @p133 @p131 @p130 @p128 @p127 @p125 @p4884 @p4882 @p110) :args ((or @t4227 @t239) @t267 (@list @t4232 @t1662 @t1664 @t248 @t249 @t1651 @t4230 @t245 @t247 @t242 @t243 @t240 @t241 @t4226 @t4228 @t220))) % 40.01/40.20 (step @p4892 :rule instantiate :premises (@p119) :args (@t4229)) % 40.01/40.20 (step @p4893 :rule cnf_or_pos :args (@t4234)) % 40.01/40.20 (step @p4894 :rule reordering :premises (@p4893) :args ((or @t270 @t4227 @t4233 @t3440 (not @t4234)))) % 40.01/40.20 (step @p4895 :rule instantiate :premises (@p120) :args (@t1648)) % 40.01/40.20 (step @p4896 :rule cnf_or_pos :args (@t4237)) % 40.01/40.20 (step @p4897 :rule reordering :premises (@p4896) :args ((or @t4236 @t4235 @t1649 (not @t4237)))) % 40.01/40.20 (step @p4898 :rule instantiate :premises (@p121) :args (@t1647)) % 40.01/40.20 (step @p4899 :rule cnf_or_pos :args (@t4239)) % 40.01/40.20 (step @p4900 :rule reordering :premises (@p4899) :args ((or @t1657 @t4218 @t4238 (not @t4239)))) % 40.01/40.20 (step @p4901 :rule chain_m_resolution :premises (@p4276 @p4274 @p72 @p4273 @p4271 @p970 @p4249 @p4247 @p941 @p4300 @p4298 @p71 @p4252 @p4250 @p73 @p4297 @p4295 @p999 @p4225 @p4223 @p912 @p4324 @p4322 @p70 @p4228 @p4226 @p74 @p4321 @p4319 @p1028 @p4201 @p4199 @p883 @p4348 @p4346 @p69 @p4204 @p4202 @p75 @p4345 @p4343 @p1057 @p4177 @p4175 @p854 @p4372 @p4370 @p68 @p4180 @p4178 @p76 @p4369 @p4367 @p1086 @p4153 @p4151 @p825 @p4396 @p4394 @p67 @p4156 @p4154 @p77 @p4393 @p4391 @p1115 @p4129 @p4127 @p796 @p4420 @p4418 @p66 @p4132 @p4130 @p78 @p4417 @p4415 @p1144 @p4105 @p4103 @p767 @p4444 @p4442 @p65 @p4108 @p4106 @p79 @p4441 @p4439 @p1173 @p4081 @p4079 @p738 @p4468 @p4466 @p64 @p4084 @p4082 @p80 @p4465 @p4463 @p1202 @p4057 @p4055 @p709 @p4492 @p4490 @p63 @p4060 @p4058 @p81 @p4489 @p4487 @p1231 @p4033 @p4031 @p680 @p4516 @p4514 @p62 @p4036 @p4034 @p82 @p4513 @p4511 @p1260 @p4009 @p4007 @p651 @p4540 @p4538 @p61 @p4012 @p4010 @p83 @p4537 @p4535 @p1289 @p3985 @p3983 @p622 @p4564 @p4562 @p60 @p3988 @p3986 @p84 @p4561 @p4559 @p1318 @p3961 @p3959 @p593 @p4588 @p4586 @p59 @p3964 @p3962 @p85 @p4585 @p4583 @p1347 @p3937 @p3935 @p564 @p4612 @p4610 @p58 @p3940 @p3938 @p86 @p4609 @p4607 @p1376 @p3913 @p3911 @p535 @p4636 @p4634 @p57 @p3916 @p3914 @p87 @p4633 @p4631 @p1405 @p3889 @p3887 @p506 @p4660 @p4658 @p56 @p3892 @p3890 @p88 @p4657 @p4655 @p1434 @p3865 @p3863 @p477 @p4684 @p4682 @p55 @p3868 @p3866 @p89 @p4681 @p4679 @p1463 @p3841 @p3839 @p448 @p4708 @p4706 @p54 @p3844 @p3842 @p90 @p4705 @p4703 @p1492 @p3817 @p3815 @p419 @p4732 @p4730 @p53 @p3820 @p3818 @p91 @p4729 @p4727 @p1521 @p3793 @p3791 @p390 @p4756 @p4754 @p52 @p3796 @p3794 @p92 @p4753 @p4751 @p1550 @p3769 @p3767 @p361 @p4780 @p4778 @p51 @p3772 @p3770 @p93 @p4777 @p4775 @p1579 @p3745 @p3743 @p332 @p4804 @p4802 @p50 @p3748 @p3746 @p94 @p4801 @p4799 @p1608 @p3721 @p3719 @p303 @p4828 @p4826 @p49 @p3724 @p3722 @p95 @p4825 @p4823 @p1637 @p3697 @p3695 @p274 @p4852 @p4850 @p48 @p3700 @p3698 @p96 @p4849 @p4847 @p1666 @p3673 @p3671 @p245 @p4876 @p4874 @p47 @p3676 @p3674 @p97 @p4873 @p4871 @p1695 @p3649 @p3647 @p216 @p4900 @p4898 @p46 @p3652 @p3650 @p98 @p4897 @p4895 @p1724 @p3628 @p3626 @p187 @p4894 @p4892 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4891) :args (@t4227 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3849 @t72 @t3846 @t3847 @t973 @t3828 @t3832 @t947 @t3843 @t3864 @t71 @t3831 @t3834 @t73 @t3861 @t3862 @t999 @t3813 @t3817 @t921 @t3858 @t3879 @t70 @t3816 @t3819 @t74 @t3876 @t3877 @t1025 @t3798 @t3802 @t895 @t3873 @t3894 @t69 @t3801 @t3804 @t75 @t3891 @t3892 @t1051 @t3783 @t3787 @t869 @t3888 @t3909 @t68 @t3786 @t3789 @t76 @t3906 @t3907 @t1077 @t3768 @t3772 @t843 @t3903 @t3924 @t67 @t3771 @t3774 @t77 @t3921 @t3922 @t1103 @t3753 @t3757 @t817 @t3918 @t3939 @t66 @t3756 @t3759 @t78 @t3936 @t3937 @t1129 @t3738 @t3742 @t791 @t3933 @t3954 @t65 @t3741 @t3744 @t79 @t3951 @t3952 @t1155 @t3723 @t3727 @t765 @t3948 @t3969 @t64 @t3726 @t3729 @t80 @t3966 @t3967 @t1181 @t3708 @t3712 @t739 @t3963 @t3984 @t63 @t3711 @t3714 @t81 @t3981 @t3982 @t1207 @t3693 @t3697 @t713 @t3978 @t3999 @t62 @t3696 @t3699 @t82 @t3996 @t3997 @t1233 @t3678 @t3682 @t687 @t3993 @t4014 @t61 @t3681 @t3684 @t83 @t4011 @t4012 @t1259 @t3663 @t3667 @t661 @t4008 @t4029 @t60 @t3666 @t3669 @t84 @t4026 @t4027 @t1285 @t3648 @t3652 @t635 @t4023 @t4044 @t59 @t3651 @t3654 @t85 @t4041 @t4042 @t1311 @t3633 @t3637 @t609 @t4038 @t4059 @t58 @t3636 @t3639 @t86 @t4056 @t4057 @t1337 @t3618 @t3622 @t583 @t4053 @t4074 @t57 @t3621 @t3624 @t87 @t4071 @t4072 @t1363 @t3603 @t3607 @t557 @t4068 @t4089 @t56 @t3606 @t3609 @t88 @t4086 @t4087 @t1389 @t3588 @t3592 @t531 @t4083 @t4104 @t55 @t3591 @t3594 @t89 @t4101 @t4102 @t1415 @t3573 @t3577 @t505 @t4098 @t4119 @t54 @t3576 @t3579 @t90 @t4116 @t4117 @t1441 @t3558 @t3562 @t479 @t4113 @t4134 @t53 @t3561 @t3564 @t91 @t4131 @t4132 @t1467 @t3543 @t3547 @t453 @t4128 @t4149 @t52 @t3546 @t3549 @t92 @t4146 @t4147 @t1493 @t3528 @t3532 @t427 @t4143 @t4164 @t51 @t3531 @t3534 @t93 @t4161 @t4162 @t1519 @t3513 @t3517 @t401 @t4158 @t4179 @t50 @t3516 @t3519 @t94 @t4176 @t4177 @t1545 @t3498 @t3502 @t375 @t4173 @t4194 @t49 @t3501 @t3504 @t95 @t4191 @t4192 @t1571 @t3483 @t3487 @t349 @t4188 @t4209 @t48 @t3486 @t3489 @t96 @t4206 @t4207 @t1597 @t3468 @t3472 @t323 @t4203 @t4224 @t47 @t3471 @t3474 @t97 @t4221 @t4222 @t1623 @t3453 @t3457 @t297 @t4218 @t4239 @t46 @t3456 @t3459 @t98 @t4236 @t4237 @t1649 @t3441 @t3444 @t276 @t4233 @t4234 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6131 @t220) % 40.01/40.20 (step @p4903 :rule instantiate :premises (@p110) :args (@t4240)) % 40.01/40.20 (step-pop @p6132 :rule scope :premises (@p4903)) % 40.01/40.20 (step @p4904 :rule process_scope :premises (@p6132) :args (@t4243)) % 40.01/40.20 (step @p4906 :rule implies_elim :premises (@p4904)) % 40.01/40.20 (step @p4907 :rule cnf_or_pos :args (@t4243)) % 40.01/40.20 (step @p4908 :rule reordering :premises (@p4907) :args ((or @t4242 @t4241 (not @t4243)))) % 40.01/40.20 (step @p4909 :rule instantiate :premises (@p112) :args (@t4244)) % 40.01/40.20 (step @p4910 :rule cnf_or_pos :args (@t4245)) % 40.01/40.20 (step @p4911 :rule reordering :premises (@p4910) :args ((or @t4242 @t244 @t1677 (not @t4245)))) % 40.01/40.20 (step @p4912 :rule instantiate :premises (@p108) :args (@t4240)) % 40.01/40.20 (step @p4913 :rule cnf_or_pos :args (@t4247)) % 40.01/40.20 (step @p4914 :rule reordering :premises (@p4913) :args ((or @t1688 @t265 @t264 @t4246 (not @t4247)))) % 40.01/40.20 (step @p4915 :rule chain_m_resolution :premises (@p4914 @p4912 @p1742 @p1740 @p136 @p134 @p4911 @p4909 @p133 @p131 @p130 @p128 @p127 @p125 @p4908 @p4906 @p110) :args ((or @t4242 @t239) @t267 (@list @t4247 @t1688 @t1690 @t248 @t249 @t1677 @t4245 @t245 @t247 @t242 @t243 @t240 @t241 @t4241 @t4243 @t220))) % 40.01/40.20 (step @p4916 :rule instantiate :premises (@p119) :args (@t4244)) % 40.01/40.20 (step @p4917 :rule cnf_or_pos :args (@t4249)) % 40.01/40.20 (step @p4918 :rule reordering :premises (@p4917) :args ((or @t270 @t4242 @t4248 @t3440 (not @t4249)))) % 40.01/40.20 (step @p4919 :rule instantiate :premises (@p120) :args (@t1674)) % 40.01/40.20 (step @p4920 :rule cnf_or_pos :args (@t4252)) % 40.01/40.20 (step @p4921 :rule reordering :premises (@p4920) :args ((or @t4251 @t4250 @t1675 (not @t4252)))) % 40.01/40.20 (step @p4922 :rule instantiate :premises (@p121) :args (@t1673)) % 40.01/40.20 (step @p4923 :rule cnf_or_pos :args (@t4254)) % 40.01/40.20 (step @p4924 :rule reordering :premises (@p4923) :args ((or @t1683 @t4233 @t4253 (not @t4254)))) % 40.01/40.20 (step @p4925 :rule chain_m_resolution :premises (@p4273 @p4271 @p970 @p4300 @p4298 @p71 @p4276 @p4274 @p72 @p4297 @p4295 @p999 @p4249 @p4247 @p941 @p4324 @p4322 @p70 @p4252 @p4250 @p73 @p4321 @p4319 @p1028 @p4225 @p4223 @p912 @p4348 @p4346 @p69 @p4228 @p4226 @p74 @p4345 @p4343 @p1057 @p4201 @p4199 @p883 @p4372 @p4370 @p68 @p4204 @p4202 @p75 @p4369 @p4367 @p1086 @p4177 @p4175 @p854 @p4396 @p4394 @p67 @p4180 @p4178 @p76 @p4393 @p4391 @p1115 @p4153 @p4151 @p825 @p4420 @p4418 @p66 @p4156 @p4154 @p77 @p4417 @p4415 @p1144 @p4129 @p4127 @p796 @p4444 @p4442 @p65 @p4132 @p4130 @p78 @p4441 @p4439 @p1173 @p4105 @p4103 @p767 @p4468 @p4466 @p64 @p4108 @p4106 @p79 @p4465 @p4463 @p1202 @p4081 @p4079 @p738 @p4492 @p4490 @p63 @p4084 @p4082 @p80 @p4489 @p4487 @p1231 @p4057 @p4055 @p709 @p4516 @p4514 @p62 @p4060 @p4058 @p81 @p4513 @p4511 @p1260 @p4033 @p4031 @p680 @p4540 @p4538 @p61 @p4036 @p4034 @p82 @p4537 @p4535 @p1289 @p4009 @p4007 @p651 @p4564 @p4562 @p60 @p4012 @p4010 @p83 @p4561 @p4559 @p1318 @p3985 @p3983 @p622 @p4588 @p4586 @p59 @p3988 @p3986 @p84 @p4585 @p4583 @p1347 @p3961 @p3959 @p593 @p4612 @p4610 @p58 @p3964 @p3962 @p85 @p4609 @p4607 @p1376 @p3937 @p3935 @p564 @p4636 @p4634 @p57 @p3940 @p3938 @p86 @p4633 @p4631 @p1405 @p3913 @p3911 @p535 @p4660 @p4658 @p56 @p3916 @p3914 @p87 @p4657 @p4655 @p1434 @p3889 @p3887 @p506 @p4684 @p4682 @p55 @p3892 @p3890 @p88 @p4681 @p4679 @p1463 @p3865 @p3863 @p477 @p4708 @p4706 @p54 @p3868 @p3866 @p89 @p4705 @p4703 @p1492 @p3841 @p3839 @p448 @p4732 @p4730 @p53 @p3844 @p3842 @p90 @p4729 @p4727 @p1521 @p3817 @p3815 @p419 @p4756 @p4754 @p52 @p3820 @p3818 @p91 @p4753 @p4751 @p1550 @p3793 @p3791 @p390 @p4780 @p4778 @p51 @p3796 @p3794 @p92 @p4777 @p4775 @p1579 @p3769 @p3767 @p361 @p4804 @p4802 @p50 @p3772 @p3770 @p93 @p4801 @p4799 @p1608 @p3745 @p3743 @p332 @p4828 @p4826 @p49 @p3748 @p3746 @p94 @p4825 @p4823 @p1637 @p3721 @p3719 @p303 @p4852 @p4850 @p48 @p3724 @p3722 @p95 @p4849 @p4847 @p1666 @p3697 @p3695 @p274 @p4876 @p4874 @p47 @p3700 @p3698 @p96 @p4873 @p4871 @p1695 @p3673 @p3671 @p245 @p4900 @p4898 @p46 @p3676 @p3674 @p97 @p4897 @p4895 @p1724 @p3649 @p3647 @p216 @p4924 @p4922 @p45 @p3652 @p3650 @p98 @p4921 @p4919 @p1753 @p3628 @p3626 @p187 @p4918 @p4916 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4915) :args (@t4242 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3847 @t973 @t3843 @t3864 @t71 @t3846 @t3849 @t72 @t3861 @t3862 @t999 @t3828 @t3832 @t947 @t3858 @t3879 @t70 @t3831 @t3834 @t73 @t3876 @t3877 @t1025 @t3813 @t3817 @t921 @t3873 @t3894 @t69 @t3816 @t3819 @t74 @t3891 @t3892 @t1051 @t3798 @t3802 @t895 @t3888 @t3909 @t68 @t3801 @t3804 @t75 @t3906 @t3907 @t1077 @t3783 @t3787 @t869 @t3903 @t3924 @t67 @t3786 @t3789 @t76 @t3921 @t3922 @t1103 @t3768 @t3772 @t843 @t3918 @t3939 @t66 @t3771 @t3774 @t77 @t3936 @t3937 @t1129 @t3753 @t3757 @t817 @t3933 @t3954 @t65 @t3756 @t3759 @t78 @t3951 @t3952 @t1155 @t3738 @t3742 @t791 @t3948 @t3969 @t64 @t3741 @t3744 @t79 @t3966 @t3967 @t1181 @t3723 @t3727 @t765 @t3963 @t3984 @t63 @t3726 @t3729 @t80 @t3981 @t3982 @t1207 @t3708 @t3712 @t739 @t3978 @t3999 @t62 @t3711 @t3714 @t81 @t3996 @t3997 @t1233 @t3693 @t3697 @t713 @t3993 @t4014 @t61 @t3696 @t3699 @t82 @t4011 @t4012 @t1259 @t3678 @t3682 @t687 @t4008 @t4029 @t60 @t3681 @t3684 @t83 @t4026 @t4027 @t1285 @t3663 @t3667 @t661 @t4023 @t4044 @t59 @t3666 @t3669 @t84 @t4041 @t4042 @t1311 @t3648 @t3652 @t635 @t4038 @t4059 @t58 @t3651 @t3654 @t85 @t4056 @t4057 @t1337 @t3633 @t3637 @t609 @t4053 @t4074 @t57 @t3636 @t3639 @t86 @t4071 @t4072 @t1363 @t3618 @t3622 @t583 @t4068 @t4089 @t56 @t3621 @t3624 @t87 @t4086 @t4087 @t1389 @t3603 @t3607 @t557 @t4083 @t4104 @t55 @t3606 @t3609 @t88 @t4101 @t4102 @t1415 @t3588 @t3592 @t531 @t4098 @t4119 @t54 @t3591 @t3594 @t89 @t4116 @t4117 @t1441 @t3573 @t3577 @t505 @t4113 @t4134 @t53 @t3576 @t3579 @t90 @t4131 @t4132 @t1467 @t3558 @t3562 @t479 @t4128 @t4149 @t52 @t3561 @t3564 @t91 @t4146 @t4147 @t1493 @t3543 @t3547 @t453 @t4143 @t4164 @t51 @t3546 @t3549 @t92 @t4161 @t4162 @t1519 @t3528 @t3532 @t427 @t4158 @t4179 @t50 @t3531 @t3534 @t93 @t4176 @t4177 @t1545 @t3513 @t3517 @t401 @t4173 @t4194 @t49 @t3516 @t3519 @t94 @t4191 @t4192 @t1571 @t3498 @t3502 @t375 @t4188 @t4209 @t48 @t3501 @t3504 @t95 @t4206 @t4207 @t1597 @t3483 @t3487 @t349 @t4203 @t4224 @t47 @t3486 @t3489 @t96 @t4221 @t4222 @t1623 @t3468 @t3472 @t323 @t4218 @t4239 @t46 @t3471 @t3474 @t97 @t4236 @t4237 @t1649 @t3453 @t3457 @t297 @t4233 @t4254 @t45 @t3456 @t3459 @t98 @t4251 @t4252 @t1675 @t3441 @t3444 @t276 @t4248 @t4249 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6133 @t220) % 40.01/40.20 (step @p4927 :rule instantiate :premises (@p110) :args (@t4255)) % 40.01/40.20 (step-pop @p6134 :rule scope :premises (@p4927)) % 40.01/40.20 (step @p4928 :rule process_scope :premises (@p6134) :args (@t4258)) % 40.01/40.20 (step @p4930 :rule implies_elim :premises (@p4928)) % 40.01/40.20 (step @p4931 :rule cnf_or_pos :args (@t4258)) % 40.01/40.20 (step @p4932 :rule reordering :premises (@p4931) :args ((or @t4257 @t4256 (not @t4258)))) % 40.01/40.20 (step @p4933 :rule instantiate :premises (@p112) :args (@t4259)) % 40.01/40.20 (step @p4934 :rule cnf_or_pos :args (@t4260)) % 40.01/40.20 (step @p4935 :rule reordering :premises (@p4934) :args ((or @t4257 @t244 @t1703 (not @t4260)))) % 40.01/40.20 (step @p4936 :rule instantiate :premises (@p108) :args (@t4255)) % 40.01/40.20 (step @p4937 :rule cnf_or_pos :args (@t4262)) % 40.01/40.20 (step @p4938 :rule reordering :premises (@p4937) :args ((or @t1714 @t265 @t264 @t4261 (not @t4262)))) % 40.01/40.20 (step @p4939 :rule chain_m_resolution :premises (@p4938 @p4936 @p1771 @p1769 @p136 @p134 @p4935 @p4933 @p133 @p131 @p130 @p128 @p127 @p125 @p4932 @p4930 @p110) :args ((or @t4257 @t239) @t267 (@list @t4262 @t1714 @t1716 @t248 @t249 @t1703 @t4260 @t245 @t247 @t242 @t243 @t240 @t241 @t4256 @t4258 @t220))) % 40.01/40.20 (step @p4940 :rule instantiate :premises (@p119) :args (@t4259)) % 40.01/40.20 (step @p4941 :rule cnf_or_pos :args (@t4264)) % 40.01/40.20 (step @p4942 :rule reordering :premises (@p4941) :args ((or @t270 @t4257 @t4263 @t3440 (not @t4264)))) % 40.01/40.20 (step @p4943 :rule instantiate :premises (@p120) :args (@t1700)) % 40.01/40.20 (step @p4944 :rule cnf_or_pos :args (@t4267)) % 40.01/40.20 (step @p4945 :rule reordering :premises (@p4944) :args ((or @t4266 @t4265 @t1701 (not @t4267)))) % 40.01/40.20 (step @p4946 :rule instantiate :premises (@p121) :args (@t1699)) % 40.01/40.20 (step @p4947 :rule cnf_or_pos :args (@t4269)) % 40.01/40.20 (step @p4948 :rule reordering :premises (@p4947) :args ((or @t1709 @t4248 @t4268 (not @t4269)))) % 40.01/40.20 (step @p4949 :rule chain_m_resolution :premises (@p4300 @p4298 @p71 @p4297 @p4295 @p999 @p4273 @p4271 @p970 @p4324 @p4322 @p70 @p4276 @p4274 @p72 @p4321 @p4319 @p1028 @p4249 @p4247 @p941 @p4348 @p4346 @p69 @p4252 @p4250 @p73 @p4345 @p4343 @p1057 @p4225 @p4223 @p912 @p4372 @p4370 @p68 @p4228 @p4226 @p74 @p4369 @p4367 @p1086 @p4201 @p4199 @p883 @p4396 @p4394 @p67 @p4204 @p4202 @p75 @p4393 @p4391 @p1115 @p4177 @p4175 @p854 @p4420 @p4418 @p66 @p4180 @p4178 @p76 @p4417 @p4415 @p1144 @p4153 @p4151 @p825 @p4444 @p4442 @p65 @p4156 @p4154 @p77 @p4441 @p4439 @p1173 @p4129 @p4127 @p796 @p4468 @p4466 @p64 @p4132 @p4130 @p78 @p4465 @p4463 @p1202 @p4105 @p4103 @p767 @p4492 @p4490 @p63 @p4108 @p4106 @p79 @p4489 @p4487 @p1231 @p4081 @p4079 @p738 @p4516 @p4514 @p62 @p4084 @p4082 @p80 @p4513 @p4511 @p1260 @p4057 @p4055 @p709 @p4540 @p4538 @p61 @p4060 @p4058 @p81 @p4537 @p4535 @p1289 @p4033 @p4031 @p680 @p4564 @p4562 @p60 @p4036 @p4034 @p82 @p4561 @p4559 @p1318 @p4009 @p4007 @p651 @p4588 @p4586 @p59 @p4012 @p4010 @p83 @p4585 @p4583 @p1347 @p3985 @p3983 @p622 @p4612 @p4610 @p58 @p3988 @p3986 @p84 @p4609 @p4607 @p1376 @p3961 @p3959 @p593 @p4636 @p4634 @p57 @p3964 @p3962 @p85 @p4633 @p4631 @p1405 @p3937 @p3935 @p564 @p4660 @p4658 @p56 @p3940 @p3938 @p86 @p4657 @p4655 @p1434 @p3913 @p3911 @p535 @p4684 @p4682 @p55 @p3916 @p3914 @p87 @p4681 @p4679 @p1463 @p3889 @p3887 @p506 @p4708 @p4706 @p54 @p3892 @p3890 @p88 @p4705 @p4703 @p1492 @p3865 @p3863 @p477 @p4732 @p4730 @p53 @p3868 @p3866 @p89 @p4729 @p4727 @p1521 @p3841 @p3839 @p448 @p4756 @p4754 @p52 @p3844 @p3842 @p90 @p4753 @p4751 @p1550 @p3817 @p3815 @p419 @p4780 @p4778 @p51 @p3820 @p3818 @p91 @p4777 @p4775 @p1579 @p3793 @p3791 @p390 @p4804 @p4802 @p50 @p3796 @p3794 @p92 @p4801 @p4799 @p1608 @p3769 @p3767 @p361 @p4828 @p4826 @p49 @p3772 @p3770 @p93 @p4825 @p4823 @p1637 @p3745 @p3743 @p332 @p4852 @p4850 @p48 @p3748 @p3746 @p94 @p4849 @p4847 @p1666 @p3721 @p3719 @p303 @p4876 @p4874 @p47 @p3724 @p3722 @p95 @p4873 @p4871 @p1695 @p3697 @p3695 @p274 @p4900 @p4898 @p46 @p3700 @p3698 @p96 @p4897 @p4895 @p1724 @p3673 @p3671 @p245 @p4924 @p4922 @p45 @p3676 @p3674 @p97 @p4921 @p4919 @p1753 @p3649 @p3647 @p216 @p4948 @p4946 @p44 @p3652 @p3650 @p98 @p4945 @p4943 @p1782 @p3628 @p3626 @p187 @p4942 @p4940 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4939) :args (@t4257 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3864 @t71 @t3861 @t3862 @t999 @t3843 @t3847 @t973 @t3858 @t3879 @t70 @t3846 @t3849 @t72 @t3876 @t3877 @t1025 @t3828 @t3832 @t947 @t3873 @t3894 @t69 @t3831 @t3834 @t73 @t3891 @t3892 @t1051 @t3813 @t3817 @t921 @t3888 @t3909 @t68 @t3816 @t3819 @t74 @t3906 @t3907 @t1077 @t3798 @t3802 @t895 @t3903 @t3924 @t67 @t3801 @t3804 @t75 @t3921 @t3922 @t1103 @t3783 @t3787 @t869 @t3918 @t3939 @t66 @t3786 @t3789 @t76 @t3936 @t3937 @t1129 @t3768 @t3772 @t843 @t3933 @t3954 @t65 @t3771 @t3774 @t77 @t3951 @t3952 @t1155 @t3753 @t3757 @t817 @t3948 @t3969 @t64 @t3756 @t3759 @t78 @t3966 @t3967 @t1181 @t3738 @t3742 @t791 @t3963 @t3984 @t63 @t3741 @t3744 @t79 @t3981 @t3982 @t1207 @t3723 @t3727 @t765 @t3978 @t3999 @t62 @t3726 @t3729 @t80 @t3996 @t3997 @t1233 @t3708 @t3712 @t739 @t3993 @t4014 @t61 @t3711 @t3714 @t81 @t4011 @t4012 @t1259 @t3693 @t3697 @t713 @t4008 @t4029 @t60 @t3696 @t3699 @t82 @t4026 @t4027 @t1285 @t3678 @t3682 @t687 @t4023 @t4044 @t59 @t3681 @t3684 @t83 @t4041 @t4042 @t1311 @t3663 @t3667 @t661 @t4038 @t4059 @t58 @t3666 @t3669 @t84 @t4056 @t4057 @t1337 @t3648 @t3652 @t635 @t4053 @t4074 @t57 @t3651 @t3654 @t85 @t4071 @t4072 @t1363 @t3633 @t3637 @t609 @t4068 @t4089 @t56 @t3636 @t3639 @t86 @t4086 @t4087 @t1389 @t3618 @t3622 @t583 @t4083 @t4104 @t55 @t3621 @t3624 @t87 @t4101 @t4102 @t1415 @t3603 @t3607 @t557 @t4098 @t4119 @t54 @t3606 @t3609 @t88 @t4116 @t4117 @t1441 @t3588 @t3592 @t531 @t4113 @t4134 @t53 @t3591 @t3594 @t89 @t4131 @t4132 @t1467 @t3573 @t3577 @t505 @t4128 @t4149 @t52 @t3576 @t3579 @t90 @t4146 @t4147 @t1493 @t3558 @t3562 @t479 @t4143 @t4164 @t51 @t3561 @t3564 @t91 @t4161 @t4162 @t1519 @t3543 @t3547 @t453 @t4158 @t4179 @t50 @t3546 @t3549 @t92 @t4176 @t4177 @t1545 @t3528 @t3532 @t427 @t4173 @t4194 @t49 @t3531 @t3534 @t93 @t4191 @t4192 @t1571 @t3513 @t3517 @t401 @t4188 @t4209 @t48 @t3516 @t3519 @t94 @t4206 @t4207 @t1597 @t3498 @t3502 @t375 @t4203 @t4224 @t47 @t3501 @t3504 @t95 @t4221 @t4222 @t1623 @t3483 @t3487 @t349 @t4218 @t4239 @t46 @t3486 @t3489 @t96 @t4236 @t4237 @t1649 @t3468 @t3472 @t323 @t4233 @t4254 @t45 @t3471 @t3474 @t97 @t4251 @t4252 @t1675 @t3453 @t3457 @t297 @t4248 @t4269 @t44 @t3456 @t3459 @t98 @t4266 @t4267 @t1701 @t3441 @t3444 @t276 @t4263 @t4264 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6135 @t220) % 40.01/40.20 (step @p4951 :rule instantiate :premises (@p110) :args (@t4270)) % 40.01/40.20 (step-pop @p6136 :rule scope :premises (@p4951)) % 40.01/40.20 (step @p4952 :rule process_scope :premises (@p6136) :args (@t4273)) % 40.01/40.20 (step @p4954 :rule implies_elim :premises (@p4952)) % 40.01/40.20 (step @p4955 :rule cnf_or_pos :args (@t4273)) % 40.01/40.20 (step @p4956 :rule reordering :premises (@p4955) :args ((or @t4272 @t4271 (not @t4273)))) % 40.01/40.20 (step @p4957 :rule instantiate :premises (@p112) :args (@t4274)) % 40.01/40.20 (step @p4958 :rule cnf_or_pos :args (@t4275)) % 40.01/40.20 (step @p4959 :rule reordering :premises (@p4958) :args ((or @t4272 @t244 @t1729 (not @t4275)))) % 40.01/40.20 (step @p4960 :rule instantiate :premises (@p108) :args (@t4270)) % 40.01/40.20 (step @p4961 :rule cnf_or_pos :args (@t4277)) % 40.01/40.20 (step @p4962 :rule reordering :premises (@p4961) :args ((or @t1740 @t265 @t264 @t4276 (not @t4277)))) % 40.01/40.20 (step @p4963 :rule chain_m_resolution :premises (@p4962 @p4960 @p1800 @p1798 @p136 @p134 @p4959 @p4957 @p133 @p131 @p130 @p128 @p127 @p125 @p4956 @p4954 @p110) :args ((or @t4272 @t239) @t267 (@list @t4277 @t1740 @t1742 @t248 @t249 @t1729 @t4275 @t245 @t247 @t242 @t243 @t240 @t241 @t4271 @t4273 @t220))) % 40.01/40.20 (step @p4964 :rule instantiate :premises (@p119) :args (@t4274)) % 40.01/40.20 (step @p4965 :rule cnf_or_pos :args (@t4279)) % 40.01/40.20 (step @p4966 :rule reordering :premises (@p4965) :args ((or @t270 @t4272 @t4278 @t3440 (not @t4279)))) % 40.01/40.20 (step @p4967 :rule instantiate :premises (@p120) :args (@t1726)) % 40.01/40.20 (step @p4968 :rule cnf_or_pos :args (@t4282)) % 40.01/40.20 (step @p4969 :rule reordering :premises (@p4968) :args ((or @t4281 @t4280 @t1727 (not @t4282)))) % 40.01/40.20 (step @p4970 :rule instantiate :premises (@p121) :args (@t1725)) % 40.01/40.20 (step @p4971 :rule cnf_or_pos :args (@t4284)) % 40.01/40.20 (step @p4972 :rule reordering :premises (@p4971) :args ((or @t1735 @t4263 @t4283 (not @t4284)))) % 40.01/40.20 (step @p4973 :rule chain_m_resolution :premises (@p4297 @p4295 @p999 @p4324 @p4322 @p70 @p4300 @p4298 @p71 @p4321 @p4319 @p1028 @p4273 @p4271 @p970 @p4348 @p4346 @p69 @p4276 @p4274 @p72 @p4345 @p4343 @p1057 @p4249 @p4247 @p941 @p4372 @p4370 @p68 @p4252 @p4250 @p73 @p4369 @p4367 @p1086 @p4225 @p4223 @p912 @p4396 @p4394 @p67 @p4228 @p4226 @p74 @p4393 @p4391 @p1115 @p4201 @p4199 @p883 @p4420 @p4418 @p66 @p4204 @p4202 @p75 @p4417 @p4415 @p1144 @p4177 @p4175 @p854 @p4444 @p4442 @p65 @p4180 @p4178 @p76 @p4441 @p4439 @p1173 @p4153 @p4151 @p825 @p4468 @p4466 @p64 @p4156 @p4154 @p77 @p4465 @p4463 @p1202 @p4129 @p4127 @p796 @p4492 @p4490 @p63 @p4132 @p4130 @p78 @p4489 @p4487 @p1231 @p4105 @p4103 @p767 @p4516 @p4514 @p62 @p4108 @p4106 @p79 @p4513 @p4511 @p1260 @p4081 @p4079 @p738 @p4540 @p4538 @p61 @p4084 @p4082 @p80 @p4537 @p4535 @p1289 @p4057 @p4055 @p709 @p4564 @p4562 @p60 @p4060 @p4058 @p81 @p4561 @p4559 @p1318 @p4033 @p4031 @p680 @p4588 @p4586 @p59 @p4036 @p4034 @p82 @p4585 @p4583 @p1347 @p4009 @p4007 @p651 @p4612 @p4610 @p58 @p4012 @p4010 @p83 @p4609 @p4607 @p1376 @p3985 @p3983 @p622 @p4636 @p4634 @p57 @p3988 @p3986 @p84 @p4633 @p4631 @p1405 @p3961 @p3959 @p593 @p4660 @p4658 @p56 @p3964 @p3962 @p85 @p4657 @p4655 @p1434 @p3937 @p3935 @p564 @p4684 @p4682 @p55 @p3940 @p3938 @p86 @p4681 @p4679 @p1463 @p3913 @p3911 @p535 @p4708 @p4706 @p54 @p3916 @p3914 @p87 @p4705 @p4703 @p1492 @p3889 @p3887 @p506 @p4732 @p4730 @p53 @p3892 @p3890 @p88 @p4729 @p4727 @p1521 @p3865 @p3863 @p477 @p4756 @p4754 @p52 @p3868 @p3866 @p89 @p4753 @p4751 @p1550 @p3841 @p3839 @p448 @p4780 @p4778 @p51 @p3844 @p3842 @p90 @p4777 @p4775 @p1579 @p3817 @p3815 @p419 @p4804 @p4802 @p50 @p3820 @p3818 @p91 @p4801 @p4799 @p1608 @p3793 @p3791 @p390 @p4828 @p4826 @p49 @p3796 @p3794 @p92 @p4825 @p4823 @p1637 @p3769 @p3767 @p361 @p4852 @p4850 @p48 @p3772 @p3770 @p93 @p4849 @p4847 @p1666 @p3745 @p3743 @p332 @p4876 @p4874 @p47 @p3748 @p3746 @p94 @p4873 @p4871 @p1695 @p3721 @p3719 @p303 @p4900 @p4898 @p46 @p3724 @p3722 @p95 @p4897 @p4895 @p1724 @p3697 @p3695 @p274 @p4924 @p4922 @p45 @p3700 @p3698 @p96 @p4921 @p4919 @p1753 @p3673 @p3671 @p245 @p4948 @p4946 @p44 @p3676 @p3674 @p97 @p4945 @p4943 @p1782 @p3649 @p3647 @p216 @p4972 @p4970 @p43 @p3652 @p3650 @p98 @p4969 @p4967 @p1811 @p3628 @p3626 @p187 @p4966 @p4964 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4963) :args (@t4272 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3862 @t999 @t3858 @t3879 @t70 @t3861 @t3864 @t71 @t3876 @t3877 @t1025 @t3843 @t3847 @t973 @t3873 @t3894 @t69 @t3846 @t3849 @t72 @t3891 @t3892 @t1051 @t3828 @t3832 @t947 @t3888 @t3909 @t68 @t3831 @t3834 @t73 @t3906 @t3907 @t1077 @t3813 @t3817 @t921 @t3903 @t3924 @t67 @t3816 @t3819 @t74 @t3921 @t3922 @t1103 @t3798 @t3802 @t895 @t3918 @t3939 @t66 @t3801 @t3804 @t75 @t3936 @t3937 @t1129 @t3783 @t3787 @t869 @t3933 @t3954 @t65 @t3786 @t3789 @t76 @t3951 @t3952 @t1155 @t3768 @t3772 @t843 @t3948 @t3969 @t64 @t3771 @t3774 @t77 @t3966 @t3967 @t1181 @t3753 @t3757 @t817 @t3963 @t3984 @t63 @t3756 @t3759 @t78 @t3981 @t3982 @t1207 @t3738 @t3742 @t791 @t3978 @t3999 @t62 @t3741 @t3744 @t79 @t3996 @t3997 @t1233 @t3723 @t3727 @t765 @t3993 @t4014 @t61 @t3726 @t3729 @t80 @t4011 @t4012 @t1259 @t3708 @t3712 @t739 @t4008 @t4029 @t60 @t3711 @t3714 @t81 @t4026 @t4027 @t1285 @t3693 @t3697 @t713 @t4023 @t4044 @t59 @t3696 @t3699 @t82 @t4041 @t4042 @t1311 @t3678 @t3682 @t687 @t4038 @t4059 @t58 @t3681 @t3684 @t83 @t4056 @t4057 @t1337 @t3663 @t3667 @t661 @t4053 @t4074 @t57 @t3666 @t3669 @t84 @t4071 @t4072 @t1363 @t3648 @t3652 @t635 @t4068 @t4089 @t56 @t3651 @t3654 @t85 @t4086 @t4087 @t1389 @t3633 @t3637 @t609 @t4083 @t4104 @t55 @t3636 @t3639 @t86 @t4101 @t4102 @t1415 @t3618 @t3622 @t583 @t4098 @t4119 @t54 @t3621 @t3624 @t87 @t4116 @t4117 @t1441 @t3603 @t3607 @t557 @t4113 @t4134 @t53 @t3606 @t3609 @t88 @t4131 @t4132 @t1467 @t3588 @t3592 @t531 @t4128 @t4149 @t52 @t3591 @t3594 @t89 @t4146 @t4147 @t1493 @t3573 @t3577 @t505 @t4143 @t4164 @t51 @t3576 @t3579 @t90 @t4161 @t4162 @t1519 @t3558 @t3562 @t479 @t4158 @t4179 @t50 @t3561 @t3564 @t91 @t4176 @t4177 @t1545 @t3543 @t3547 @t453 @t4173 @t4194 @t49 @t3546 @t3549 @t92 @t4191 @t4192 @t1571 @t3528 @t3532 @t427 @t4188 @t4209 @t48 @t3531 @t3534 @t93 @t4206 @t4207 @t1597 @t3513 @t3517 @t401 @t4203 @t4224 @t47 @t3516 @t3519 @t94 @t4221 @t4222 @t1623 @t3498 @t3502 @t375 @t4218 @t4239 @t46 @t3501 @t3504 @t95 @t4236 @t4237 @t1649 @t3483 @t3487 @t349 @t4233 @t4254 @t45 @t3486 @t3489 @t96 @t4251 @t4252 @t1675 @t3468 @t3472 @t323 @t4248 @t4269 @t44 @t3471 @t3474 @t97 @t4266 @t4267 @t1701 @t3453 @t3457 @t297 @t4263 @t4284 @t43 @t3456 @t3459 @t98 @t4281 @t4282 @t1727 @t3441 @t3444 @t276 @t4278 @t4279 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6137 @t220) % 40.01/40.20 (step @p4975 :rule instantiate :premises (@p110) :args (@t4285)) % 40.01/40.20 (step-pop @p6138 :rule scope :premises (@p4975)) % 40.01/40.20 (step @p4976 :rule process_scope :premises (@p6138) :args (@t4288)) % 40.01/40.20 (step @p4978 :rule implies_elim :premises (@p4976)) % 40.01/40.20 (step @p4979 :rule cnf_or_pos :args (@t4288)) % 40.01/40.20 (step @p4980 :rule reordering :premises (@p4979) :args ((or @t4287 @t4286 (not @t4288)))) % 40.01/40.20 (step @p4981 :rule instantiate :premises (@p112) :args (@t4289)) % 40.01/40.20 (step @p4982 :rule cnf_or_pos :args (@t4290)) % 40.01/40.20 (step @p4983 :rule reordering :premises (@p4982) :args ((or @t4287 @t244 @t1755 (not @t4290)))) % 40.01/40.20 (step @p4984 :rule instantiate :premises (@p108) :args (@t4285)) % 40.01/40.20 (step @p4985 :rule cnf_or_pos :args (@t4292)) % 40.01/40.20 (step @p4986 :rule reordering :premises (@p4985) :args ((or @t1766 @t265 @t264 @t4291 (not @t4292)))) % 40.01/40.20 (step @p4987 :rule chain_m_resolution :premises (@p4986 @p4984 @p1829 @p1827 @p136 @p134 @p4983 @p4981 @p133 @p131 @p130 @p128 @p127 @p125 @p4980 @p4978 @p110) :args ((or @t4287 @t239) @t267 (@list @t4292 @t1766 @t1768 @t248 @t249 @t1755 @t4290 @t245 @t247 @t242 @t243 @t240 @t241 @t4286 @t4288 @t220))) % 40.01/40.20 (step @p4988 :rule instantiate :premises (@p119) :args (@t4289)) % 40.01/40.20 (step @p4989 :rule cnf_or_pos :args (@t4294)) % 40.01/40.20 (step @p4990 :rule reordering :premises (@p4989) :args ((or @t270 @t4287 @t4293 @t3440 (not @t4294)))) % 40.01/40.20 (step @p4991 :rule instantiate :premises (@p120) :args (@t1752)) % 40.01/40.20 (step @p4992 :rule cnf_or_pos :args (@t4297)) % 40.01/40.20 (step @p4993 :rule reordering :premises (@p4992) :args ((or @t4296 @t4295 @t1753 (not @t4297)))) % 40.01/40.20 (step @p4994 :rule instantiate :premises (@p121) :args (@t1751)) % 40.01/40.20 (step @p4995 :rule cnf_or_pos :args (@t4299)) % 40.01/40.20 (step @p4996 :rule reordering :premises (@p4995) :args ((or @t1761 @t4278 @t4298 (not @t4299)))) % 40.01/40.20 (step @p4997 :rule chain_m_resolution :premises (@p4324 @p4322 @p70 @p4321 @p4319 @p1028 @p4297 @p4295 @p999 @p4348 @p4346 @p69 @p4300 @p4298 @p71 @p4345 @p4343 @p1057 @p4273 @p4271 @p970 @p4372 @p4370 @p68 @p4276 @p4274 @p72 @p4369 @p4367 @p1086 @p4249 @p4247 @p941 @p4396 @p4394 @p67 @p4252 @p4250 @p73 @p4393 @p4391 @p1115 @p4225 @p4223 @p912 @p4420 @p4418 @p66 @p4228 @p4226 @p74 @p4417 @p4415 @p1144 @p4201 @p4199 @p883 @p4444 @p4442 @p65 @p4204 @p4202 @p75 @p4441 @p4439 @p1173 @p4177 @p4175 @p854 @p4468 @p4466 @p64 @p4180 @p4178 @p76 @p4465 @p4463 @p1202 @p4153 @p4151 @p825 @p4492 @p4490 @p63 @p4156 @p4154 @p77 @p4489 @p4487 @p1231 @p4129 @p4127 @p796 @p4516 @p4514 @p62 @p4132 @p4130 @p78 @p4513 @p4511 @p1260 @p4105 @p4103 @p767 @p4540 @p4538 @p61 @p4108 @p4106 @p79 @p4537 @p4535 @p1289 @p4081 @p4079 @p738 @p4564 @p4562 @p60 @p4084 @p4082 @p80 @p4561 @p4559 @p1318 @p4057 @p4055 @p709 @p4588 @p4586 @p59 @p4060 @p4058 @p81 @p4585 @p4583 @p1347 @p4033 @p4031 @p680 @p4612 @p4610 @p58 @p4036 @p4034 @p82 @p4609 @p4607 @p1376 @p4009 @p4007 @p651 @p4636 @p4634 @p57 @p4012 @p4010 @p83 @p4633 @p4631 @p1405 @p3985 @p3983 @p622 @p4660 @p4658 @p56 @p3988 @p3986 @p84 @p4657 @p4655 @p1434 @p3961 @p3959 @p593 @p4684 @p4682 @p55 @p3964 @p3962 @p85 @p4681 @p4679 @p1463 @p3937 @p3935 @p564 @p4708 @p4706 @p54 @p3940 @p3938 @p86 @p4705 @p4703 @p1492 @p3913 @p3911 @p535 @p4732 @p4730 @p53 @p3916 @p3914 @p87 @p4729 @p4727 @p1521 @p3889 @p3887 @p506 @p4756 @p4754 @p52 @p3892 @p3890 @p88 @p4753 @p4751 @p1550 @p3865 @p3863 @p477 @p4780 @p4778 @p51 @p3868 @p3866 @p89 @p4777 @p4775 @p1579 @p3841 @p3839 @p448 @p4804 @p4802 @p50 @p3844 @p3842 @p90 @p4801 @p4799 @p1608 @p3817 @p3815 @p419 @p4828 @p4826 @p49 @p3820 @p3818 @p91 @p4825 @p4823 @p1637 @p3793 @p3791 @p390 @p4852 @p4850 @p48 @p3796 @p3794 @p92 @p4849 @p4847 @p1666 @p3769 @p3767 @p361 @p4876 @p4874 @p47 @p3772 @p3770 @p93 @p4873 @p4871 @p1695 @p3745 @p3743 @p332 @p4900 @p4898 @p46 @p3748 @p3746 @p94 @p4897 @p4895 @p1724 @p3721 @p3719 @p303 @p4924 @p4922 @p45 @p3724 @p3722 @p95 @p4921 @p4919 @p1753 @p3697 @p3695 @p274 @p4948 @p4946 @p44 @p3700 @p3698 @p96 @p4945 @p4943 @p1782 @p3673 @p3671 @p245 @p4972 @p4970 @p43 @p3676 @p3674 @p97 @p4969 @p4967 @p1811 @p3649 @p3647 @p216 @p4996 @p4994 @p42 @p3652 @p3650 @p98 @p4993 @p4991 @p1840 @p3628 @p3626 @p187 @p4990 @p4988 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p4987) :args (@t4287 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3879 @t70 @t3876 @t3877 @t1025 @t3858 @t3862 @t999 @t3873 @t3894 @t69 @t3861 @t3864 @t71 @t3891 @t3892 @t1051 @t3843 @t3847 @t973 @t3888 @t3909 @t68 @t3846 @t3849 @t72 @t3906 @t3907 @t1077 @t3828 @t3832 @t947 @t3903 @t3924 @t67 @t3831 @t3834 @t73 @t3921 @t3922 @t1103 @t3813 @t3817 @t921 @t3918 @t3939 @t66 @t3816 @t3819 @t74 @t3936 @t3937 @t1129 @t3798 @t3802 @t895 @t3933 @t3954 @t65 @t3801 @t3804 @t75 @t3951 @t3952 @t1155 @t3783 @t3787 @t869 @t3948 @t3969 @t64 @t3786 @t3789 @t76 @t3966 @t3967 @t1181 @t3768 @t3772 @t843 @t3963 @t3984 @t63 @t3771 @t3774 @t77 @t3981 @t3982 @t1207 @t3753 @t3757 @t817 @t3978 @t3999 @t62 @t3756 @t3759 @t78 @t3996 @t3997 @t1233 @t3738 @t3742 @t791 @t3993 @t4014 @t61 @t3741 @t3744 @t79 @t4011 @t4012 @t1259 @t3723 @t3727 @t765 @t4008 @t4029 @t60 @t3726 @t3729 @t80 @t4026 @t4027 @t1285 @t3708 @t3712 @t739 @t4023 @t4044 @t59 @t3711 @t3714 @t81 @t4041 @t4042 @t1311 @t3693 @t3697 @t713 @t4038 @t4059 @t58 @t3696 @t3699 @t82 @t4056 @t4057 @t1337 @t3678 @t3682 @t687 @t4053 @t4074 @t57 @t3681 @t3684 @t83 @t4071 @t4072 @t1363 @t3663 @t3667 @t661 @t4068 @t4089 @t56 @t3666 @t3669 @t84 @t4086 @t4087 @t1389 @t3648 @t3652 @t635 @t4083 @t4104 @t55 @t3651 @t3654 @t85 @t4101 @t4102 @t1415 @t3633 @t3637 @t609 @t4098 @t4119 @t54 @t3636 @t3639 @t86 @t4116 @t4117 @t1441 @t3618 @t3622 @t583 @t4113 @t4134 @t53 @t3621 @t3624 @t87 @t4131 @t4132 @t1467 @t3603 @t3607 @t557 @t4128 @t4149 @t52 @t3606 @t3609 @t88 @t4146 @t4147 @t1493 @t3588 @t3592 @t531 @t4143 @t4164 @t51 @t3591 @t3594 @t89 @t4161 @t4162 @t1519 @t3573 @t3577 @t505 @t4158 @t4179 @t50 @t3576 @t3579 @t90 @t4176 @t4177 @t1545 @t3558 @t3562 @t479 @t4173 @t4194 @t49 @t3561 @t3564 @t91 @t4191 @t4192 @t1571 @t3543 @t3547 @t453 @t4188 @t4209 @t48 @t3546 @t3549 @t92 @t4206 @t4207 @t1597 @t3528 @t3532 @t427 @t4203 @t4224 @t47 @t3531 @t3534 @t93 @t4221 @t4222 @t1623 @t3513 @t3517 @t401 @t4218 @t4239 @t46 @t3516 @t3519 @t94 @t4236 @t4237 @t1649 @t3498 @t3502 @t375 @t4233 @t4254 @t45 @t3501 @t3504 @t95 @t4251 @t4252 @t1675 @t3483 @t3487 @t349 @t4248 @t4269 @t44 @t3486 @t3489 @t96 @t4266 @t4267 @t1701 @t3468 @t3472 @t323 @t4263 @t4284 @t43 @t3471 @t3474 @t97 @t4281 @t4282 @t1727 @t3453 @t3457 @t297 @t4278 @t4299 @t42 @t3456 @t3459 @t98 @t4296 @t4297 @t1753 @t3441 @t3444 @t276 @t4293 @t4294 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6139 @t220) % 40.01/40.20 (step @p4999 :rule instantiate :premises (@p110) :args (@t4300)) % 40.01/40.20 (step-pop @p6140 :rule scope :premises (@p4999)) % 40.01/40.20 (step @p5000 :rule process_scope :premises (@p6140) :args (@t4303)) % 40.01/40.20 (step @p5002 :rule implies_elim :premises (@p5000)) % 40.01/40.20 (step @p5003 :rule cnf_or_pos :args (@t4303)) % 40.01/40.20 (step @p5004 :rule reordering :premises (@p5003) :args ((or @t4302 @t4301 (not @t4303)))) % 40.01/40.20 (step @p5005 :rule instantiate :premises (@p112) :args (@t4304)) % 40.01/40.20 (step @p5006 :rule cnf_or_pos :args (@t4305)) % 40.01/40.20 (step @p5007 :rule reordering :premises (@p5006) :args ((or @t4302 @t244 @t1781 (not @t4305)))) % 40.01/40.20 (step @p5008 :rule instantiate :premises (@p108) :args (@t4300)) % 40.01/40.20 (step @p5009 :rule cnf_or_pos :args (@t4307)) % 40.01/40.20 (step @p5010 :rule reordering :premises (@p5009) :args ((or @t1792 @t265 @t264 @t4306 (not @t4307)))) % 40.01/40.20 (step @p5011 :rule chain_m_resolution :premises (@p5010 @p5008 @p1858 @p1856 @p136 @p134 @p5007 @p5005 @p133 @p131 @p130 @p128 @p127 @p125 @p5004 @p5002 @p110) :args ((or @t4302 @t239) @t267 (@list @t4307 @t1792 @t1794 @t248 @t249 @t1781 @t4305 @t245 @t247 @t242 @t243 @t240 @t241 @t4301 @t4303 @t220))) % 40.01/40.20 (step @p5012 :rule instantiate :premises (@p119) :args (@t4304)) % 40.01/40.20 (step @p5013 :rule cnf_or_pos :args (@t4309)) % 40.01/40.20 (step @p5014 :rule reordering :premises (@p5013) :args ((or @t270 @t4302 @t4308 @t3440 (not @t4309)))) % 40.01/40.20 (step @p5015 :rule instantiate :premises (@p120) :args (@t1778)) % 40.01/40.20 (step @p5016 :rule cnf_or_pos :args (@t4312)) % 40.01/40.20 (step @p5017 :rule reordering :premises (@p5016) :args ((or @t4311 @t4310 @t1779 (not @t4312)))) % 40.01/40.20 (step @p5018 :rule instantiate :premises (@p121) :args (@t1777)) % 40.01/40.20 (step @p5019 :rule cnf_or_pos :args (@t4314)) % 40.01/40.20 (step @p5020 :rule reordering :premises (@p5019) :args ((or @t1787 @t4293 @t4313 (not @t4314)))) % 40.01/40.20 (step @p5021 :rule chain_m_resolution :premises (@p4321 @p4319 @p1028 @p4348 @p4346 @p69 @p4324 @p4322 @p70 @p4345 @p4343 @p1057 @p4297 @p4295 @p999 @p4372 @p4370 @p68 @p4300 @p4298 @p71 @p4369 @p4367 @p1086 @p4273 @p4271 @p970 @p4396 @p4394 @p67 @p4276 @p4274 @p72 @p4393 @p4391 @p1115 @p4249 @p4247 @p941 @p4420 @p4418 @p66 @p4252 @p4250 @p73 @p4417 @p4415 @p1144 @p4225 @p4223 @p912 @p4444 @p4442 @p65 @p4228 @p4226 @p74 @p4441 @p4439 @p1173 @p4201 @p4199 @p883 @p4468 @p4466 @p64 @p4204 @p4202 @p75 @p4465 @p4463 @p1202 @p4177 @p4175 @p854 @p4492 @p4490 @p63 @p4180 @p4178 @p76 @p4489 @p4487 @p1231 @p4153 @p4151 @p825 @p4516 @p4514 @p62 @p4156 @p4154 @p77 @p4513 @p4511 @p1260 @p4129 @p4127 @p796 @p4540 @p4538 @p61 @p4132 @p4130 @p78 @p4537 @p4535 @p1289 @p4105 @p4103 @p767 @p4564 @p4562 @p60 @p4108 @p4106 @p79 @p4561 @p4559 @p1318 @p4081 @p4079 @p738 @p4588 @p4586 @p59 @p4084 @p4082 @p80 @p4585 @p4583 @p1347 @p4057 @p4055 @p709 @p4612 @p4610 @p58 @p4060 @p4058 @p81 @p4609 @p4607 @p1376 @p4033 @p4031 @p680 @p4636 @p4634 @p57 @p4036 @p4034 @p82 @p4633 @p4631 @p1405 @p4009 @p4007 @p651 @p4660 @p4658 @p56 @p4012 @p4010 @p83 @p4657 @p4655 @p1434 @p3985 @p3983 @p622 @p4684 @p4682 @p55 @p3988 @p3986 @p84 @p4681 @p4679 @p1463 @p3961 @p3959 @p593 @p4708 @p4706 @p54 @p3964 @p3962 @p85 @p4705 @p4703 @p1492 @p3937 @p3935 @p564 @p4732 @p4730 @p53 @p3940 @p3938 @p86 @p4729 @p4727 @p1521 @p3913 @p3911 @p535 @p4756 @p4754 @p52 @p3916 @p3914 @p87 @p4753 @p4751 @p1550 @p3889 @p3887 @p506 @p4780 @p4778 @p51 @p3892 @p3890 @p88 @p4777 @p4775 @p1579 @p3865 @p3863 @p477 @p4804 @p4802 @p50 @p3868 @p3866 @p89 @p4801 @p4799 @p1608 @p3841 @p3839 @p448 @p4828 @p4826 @p49 @p3844 @p3842 @p90 @p4825 @p4823 @p1637 @p3817 @p3815 @p419 @p4852 @p4850 @p48 @p3820 @p3818 @p91 @p4849 @p4847 @p1666 @p3793 @p3791 @p390 @p4876 @p4874 @p47 @p3796 @p3794 @p92 @p4873 @p4871 @p1695 @p3769 @p3767 @p361 @p4900 @p4898 @p46 @p3772 @p3770 @p93 @p4897 @p4895 @p1724 @p3745 @p3743 @p332 @p4924 @p4922 @p45 @p3748 @p3746 @p94 @p4921 @p4919 @p1753 @p3721 @p3719 @p303 @p4948 @p4946 @p44 @p3724 @p3722 @p95 @p4945 @p4943 @p1782 @p3697 @p3695 @p274 @p4972 @p4970 @p43 @p3700 @p3698 @p96 @p4969 @p4967 @p1811 @p3673 @p3671 @p245 @p4996 @p4994 @p42 @p3676 @p3674 @p97 @p4993 @p4991 @p1840 @p3649 @p3647 @p216 @p5020 @p5018 @p41 @p3652 @p3650 @p98 @p5017 @p5015 @p1869 @p3628 @p3626 @p187 @p5014 @p5012 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5011) :args (@t4302 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3877 @t1025 @t3873 @t3894 @t69 @t3876 @t3879 @t70 @t3891 @t3892 @t1051 @t3858 @t3862 @t999 @t3888 @t3909 @t68 @t3861 @t3864 @t71 @t3906 @t3907 @t1077 @t3843 @t3847 @t973 @t3903 @t3924 @t67 @t3846 @t3849 @t72 @t3921 @t3922 @t1103 @t3828 @t3832 @t947 @t3918 @t3939 @t66 @t3831 @t3834 @t73 @t3936 @t3937 @t1129 @t3813 @t3817 @t921 @t3933 @t3954 @t65 @t3816 @t3819 @t74 @t3951 @t3952 @t1155 @t3798 @t3802 @t895 @t3948 @t3969 @t64 @t3801 @t3804 @t75 @t3966 @t3967 @t1181 @t3783 @t3787 @t869 @t3963 @t3984 @t63 @t3786 @t3789 @t76 @t3981 @t3982 @t1207 @t3768 @t3772 @t843 @t3978 @t3999 @t62 @t3771 @t3774 @t77 @t3996 @t3997 @t1233 @t3753 @t3757 @t817 @t3993 @t4014 @t61 @t3756 @t3759 @t78 @t4011 @t4012 @t1259 @t3738 @t3742 @t791 @t4008 @t4029 @t60 @t3741 @t3744 @t79 @t4026 @t4027 @t1285 @t3723 @t3727 @t765 @t4023 @t4044 @t59 @t3726 @t3729 @t80 @t4041 @t4042 @t1311 @t3708 @t3712 @t739 @t4038 @t4059 @t58 @t3711 @t3714 @t81 @t4056 @t4057 @t1337 @t3693 @t3697 @t713 @t4053 @t4074 @t57 @t3696 @t3699 @t82 @t4071 @t4072 @t1363 @t3678 @t3682 @t687 @t4068 @t4089 @t56 @t3681 @t3684 @t83 @t4086 @t4087 @t1389 @t3663 @t3667 @t661 @t4083 @t4104 @t55 @t3666 @t3669 @t84 @t4101 @t4102 @t1415 @t3648 @t3652 @t635 @t4098 @t4119 @t54 @t3651 @t3654 @t85 @t4116 @t4117 @t1441 @t3633 @t3637 @t609 @t4113 @t4134 @t53 @t3636 @t3639 @t86 @t4131 @t4132 @t1467 @t3618 @t3622 @t583 @t4128 @t4149 @t52 @t3621 @t3624 @t87 @t4146 @t4147 @t1493 @t3603 @t3607 @t557 @t4143 @t4164 @t51 @t3606 @t3609 @t88 @t4161 @t4162 @t1519 @t3588 @t3592 @t531 @t4158 @t4179 @t50 @t3591 @t3594 @t89 @t4176 @t4177 @t1545 @t3573 @t3577 @t505 @t4173 @t4194 @t49 @t3576 @t3579 @t90 @t4191 @t4192 @t1571 @t3558 @t3562 @t479 @t4188 @t4209 @t48 @t3561 @t3564 @t91 @t4206 @t4207 @t1597 @t3543 @t3547 @t453 @t4203 @t4224 @t47 @t3546 @t3549 @t92 @t4221 @t4222 @t1623 @t3528 @t3532 @t427 @t4218 @t4239 @t46 @t3531 @t3534 @t93 @t4236 @t4237 @t1649 @t3513 @t3517 @t401 @t4233 @t4254 @t45 @t3516 @t3519 @t94 @t4251 @t4252 @t1675 @t3498 @t3502 @t375 @t4248 @t4269 @t44 @t3501 @t3504 @t95 @t4266 @t4267 @t1701 @t3483 @t3487 @t349 @t4263 @t4284 @t43 @t3486 @t3489 @t96 @t4281 @t4282 @t1727 @t3468 @t3472 @t323 @t4278 @t4299 @t42 @t3471 @t3474 @t97 @t4296 @t4297 @t1753 @t3453 @t3457 @t297 @t4293 @t4314 @t41 @t3456 @t3459 @t98 @t4311 @t4312 @t1779 @t3441 @t3444 @t276 @t4308 @t4309 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6141 @t220) % 40.01/40.20 (step @p5023 :rule instantiate :premises (@p110) :args (@t4315)) % 40.01/40.20 (step-pop @p6142 :rule scope :premises (@p5023)) % 40.01/40.20 (step @p5024 :rule process_scope :premises (@p6142) :args (@t4318)) % 40.01/40.20 (step @p5026 :rule implies_elim :premises (@p5024)) % 40.01/40.20 (step @p5027 :rule cnf_or_pos :args (@t4318)) % 40.01/40.20 (step @p5028 :rule reordering :premises (@p5027) :args ((or @t4317 @t4316 (not @t4318)))) % 40.01/40.20 (step @p5029 :rule instantiate :premises (@p112) :args (@t4319)) % 40.01/40.20 (step @p5030 :rule cnf_or_pos :args (@t4320)) % 40.01/40.20 (step @p5031 :rule reordering :premises (@p5030) :args ((or @t4317 @t244 @t1807 (not @t4320)))) % 40.01/40.20 (step @p5032 :rule instantiate :premises (@p108) :args (@t4315)) % 40.01/40.20 (step @p5033 :rule cnf_or_pos :args (@t4322)) % 40.01/40.20 (step @p5034 :rule reordering :premises (@p5033) :args ((or @t1818 @t265 @t264 @t4321 (not @t4322)))) % 40.01/40.20 (step @p5035 :rule chain_m_resolution :premises (@p5034 @p5032 @p1887 @p1885 @p136 @p134 @p5031 @p5029 @p133 @p131 @p130 @p128 @p127 @p125 @p5028 @p5026 @p110) :args ((or @t4317 @t239) @t267 (@list @t4322 @t1818 @t1820 @t248 @t249 @t1807 @t4320 @t245 @t247 @t242 @t243 @t240 @t241 @t4316 @t4318 @t220))) % 40.01/40.20 (step @p5036 :rule instantiate :premises (@p119) :args (@t4319)) % 40.01/40.20 (step @p5037 :rule cnf_or_pos :args (@t4324)) % 40.01/40.20 (step @p5038 :rule reordering :premises (@p5037) :args ((or @t270 @t4317 @t4323 @t3440 (not @t4324)))) % 40.01/40.20 (step @p5039 :rule instantiate :premises (@p120) :args (@t1804)) % 40.01/40.20 (step @p5040 :rule cnf_or_pos :args (@t4327)) % 40.01/40.20 (step @p5041 :rule reordering :premises (@p5040) :args ((or @t4326 @t4325 @t1805 (not @t4327)))) % 40.01/40.20 (step @p5042 :rule instantiate :premises (@p121) :args (@t1803)) % 40.01/40.20 (step @p5043 :rule cnf_or_pos :args (@t4329)) % 40.01/40.20 (step @p5044 :rule reordering :premises (@p5043) :args ((or @t1813 @t4308 @t4328 (not @t4329)))) % 40.01/40.20 (step @p5045 :rule chain_m_resolution :premises (@p4348 @p4346 @p69 @p4345 @p4343 @p1057 @p4321 @p4319 @p1028 @p4372 @p4370 @p68 @p4324 @p4322 @p70 @p4369 @p4367 @p1086 @p4297 @p4295 @p999 @p4396 @p4394 @p67 @p4300 @p4298 @p71 @p4393 @p4391 @p1115 @p4273 @p4271 @p970 @p4420 @p4418 @p66 @p4276 @p4274 @p72 @p4417 @p4415 @p1144 @p4249 @p4247 @p941 @p4444 @p4442 @p65 @p4252 @p4250 @p73 @p4441 @p4439 @p1173 @p4225 @p4223 @p912 @p4468 @p4466 @p64 @p4228 @p4226 @p74 @p4465 @p4463 @p1202 @p4201 @p4199 @p883 @p4492 @p4490 @p63 @p4204 @p4202 @p75 @p4489 @p4487 @p1231 @p4177 @p4175 @p854 @p4516 @p4514 @p62 @p4180 @p4178 @p76 @p4513 @p4511 @p1260 @p4153 @p4151 @p825 @p4540 @p4538 @p61 @p4156 @p4154 @p77 @p4537 @p4535 @p1289 @p4129 @p4127 @p796 @p4564 @p4562 @p60 @p4132 @p4130 @p78 @p4561 @p4559 @p1318 @p4105 @p4103 @p767 @p4588 @p4586 @p59 @p4108 @p4106 @p79 @p4585 @p4583 @p1347 @p4081 @p4079 @p738 @p4612 @p4610 @p58 @p4084 @p4082 @p80 @p4609 @p4607 @p1376 @p4057 @p4055 @p709 @p4636 @p4634 @p57 @p4060 @p4058 @p81 @p4633 @p4631 @p1405 @p4033 @p4031 @p680 @p4660 @p4658 @p56 @p4036 @p4034 @p82 @p4657 @p4655 @p1434 @p4009 @p4007 @p651 @p4684 @p4682 @p55 @p4012 @p4010 @p83 @p4681 @p4679 @p1463 @p3985 @p3983 @p622 @p4708 @p4706 @p54 @p3988 @p3986 @p84 @p4705 @p4703 @p1492 @p3961 @p3959 @p593 @p4732 @p4730 @p53 @p3964 @p3962 @p85 @p4729 @p4727 @p1521 @p3937 @p3935 @p564 @p4756 @p4754 @p52 @p3940 @p3938 @p86 @p4753 @p4751 @p1550 @p3913 @p3911 @p535 @p4780 @p4778 @p51 @p3916 @p3914 @p87 @p4777 @p4775 @p1579 @p3889 @p3887 @p506 @p4804 @p4802 @p50 @p3892 @p3890 @p88 @p4801 @p4799 @p1608 @p3865 @p3863 @p477 @p4828 @p4826 @p49 @p3868 @p3866 @p89 @p4825 @p4823 @p1637 @p3841 @p3839 @p448 @p4852 @p4850 @p48 @p3844 @p3842 @p90 @p4849 @p4847 @p1666 @p3817 @p3815 @p419 @p4876 @p4874 @p47 @p3820 @p3818 @p91 @p4873 @p4871 @p1695 @p3793 @p3791 @p390 @p4900 @p4898 @p46 @p3796 @p3794 @p92 @p4897 @p4895 @p1724 @p3769 @p3767 @p361 @p4924 @p4922 @p45 @p3772 @p3770 @p93 @p4921 @p4919 @p1753 @p3745 @p3743 @p332 @p4948 @p4946 @p44 @p3748 @p3746 @p94 @p4945 @p4943 @p1782 @p3721 @p3719 @p303 @p4972 @p4970 @p43 @p3724 @p3722 @p95 @p4969 @p4967 @p1811 @p3697 @p3695 @p274 @p4996 @p4994 @p42 @p3700 @p3698 @p96 @p4993 @p4991 @p1840 @p3673 @p3671 @p245 @p5020 @p5018 @p41 @p3676 @p3674 @p97 @p5017 @p5015 @p1869 @p3649 @p3647 @p216 @p5044 @p5042 @p40 @p3652 @p3650 @p98 @p5041 @p5039 @p1898 @p3628 @p3626 @p187 @p5038 @p5036 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5035) :args (@t4317 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3894 @t69 @t3891 @t3892 @t1051 @t3873 @t3877 @t1025 @t3888 @t3909 @t68 @t3876 @t3879 @t70 @t3906 @t3907 @t1077 @t3858 @t3862 @t999 @t3903 @t3924 @t67 @t3861 @t3864 @t71 @t3921 @t3922 @t1103 @t3843 @t3847 @t973 @t3918 @t3939 @t66 @t3846 @t3849 @t72 @t3936 @t3937 @t1129 @t3828 @t3832 @t947 @t3933 @t3954 @t65 @t3831 @t3834 @t73 @t3951 @t3952 @t1155 @t3813 @t3817 @t921 @t3948 @t3969 @t64 @t3816 @t3819 @t74 @t3966 @t3967 @t1181 @t3798 @t3802 @t895 @t3963 @t3984 @t63 @t3801 @t3804 @t75 @t3981 @t3982 @t1207 @t3783 @t3787 @t869 @t3978 @t3999 @t62 @t3786 @t3789 @t76 @t3996 @t3997 @t1233 @t3768 @t3772 @t843 @t3993 @t4014 @t61 @t3771 @t3774 @t77 @t4011 @t4012 @t1259 @t3753 @t3757 @t817 @t4008 @t4029 @t60 @t3756 @t3759 @t78 @t4026 @t4027 @t1285 @t3738 @t3742 @t791 @t4023 @t4044 @t59 @t3741 @t3744 @t79 @t4041 @t4042 @t1311 @t3723 @t3727 @t765 @t4038 @t4059 @t58 @t3726 @t3729 @t80 @t4056 @t4057 @t1337 @t3708 @t3712 @t739 @t4053 @t4074 @t57 @t3711 @t3714 @t81 @t4071 @t4072 @t1363 @t3693 @t3697 @t713 @t4068 @t4089 @t56 @t3696 @t3699 @t82 @t4086 @t4087 @t1389 @t3678 @t3682 @t687 @t4083 @t4104 @t55 @t3681 @t3684 @t83 @t4101 @t4102 @t1415 @t3663 @t3667 @t661 @t4098 @t4119 @t54 @t3666 @t3669 @t84 @t4116 @t4117 @t1441 @t3648 @t3652 @t635 @t4113 @t4134 @t53 @t3651 @t3654 @t85 @t4131 @t4132 @t1467 @t3633 @t3637 @t609 @t4128 @t4149 @t52 @t3636 @t3639 @t86 @t4146 @t4147 @t1493 @t3618 @t3622 @t583 @t4143 @t4164 @t51 @t3621 @t3624 @t87 @t4161 @t4162 @t1519 @t3603 @t3607 @t557 @t4158 @t4179 @t50 @t3606 @t3609 @t88 @t4176 @t4177 @t1545 @t3588 @t3592 @t531 @t4173 @t4194 @t49 @t3591 @t3594 @t89 @t4191 @t4192 @t1571 @t3573 @t3577 @t505 @t4188 @t4209 @t48 @t3576 @t3579 @t90 @t4206 @t4207 @t1597 @t3558 @t3562 @t479 @t4203 @t4224 @t47 @t3561 @t3564 @t91 @t4221 @t4222 @t1623 @t3543 @t3547 @t453 @t4218 @t4239 @t46 @t3546 @t3549 @t92 @t4236 @t4237 @t1649 @t3528 @t3532 @t427 @t4233 @t4254 @t45 @t3531 @t3534 @t93 @t4251 @t4252 @t1675 @t3513 @t3517 @t401 @t4248 @t4269 @t44 @t3516 @t3519 @t94 @t4266 @t4267 @t1701 @t3498 @t3502 @t375 @t4263 @t4284 @t43 @t3501 @t3504 @t95 @t4281 @t4282 @t1727 @t3483 @t3487 @t349 @t4278 @t4299 @t42 @t3486 @t3489 @t96 @t4296 @t4297 @t1753 @t3468 @t3472 @t323 @t4293 @t4314 @t41 @t3471 @t3474 @t97 @t4311 @t4312 @t1779 @t3453 @t3457 @t297 @t4308 @t4329 @t40 @t3456 @t3459 @t98 @t4326 @t4327 @t1805 @t3441 @t3444 @t276 @t4323 @t4324 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6143 @t220) % 40.01/40.20 (step @p5047 :rule instantiate :premises (@p110) :args (@t4330)) % 40.01/40.20 (step-pop @p6144 :rule scope :premises (@p5047)) % 40.01/40.20 (step @p5048 :rule process_scope :premises (@p6144) :args (@t4333)) % 40.01/40.20 (step @p5050 :rule implies_elim :premises (@p5048)) % 40.01/40.20 (step @p5051 :rule cnf_or_pos :args (@t4333)) % 40.01/40.20 (step @p5052 :rule reordering :premises (@p5051) :args ((or @t4332 @t4331 (not @t4333)))) % 40.01/40.20 (step @p5053 :rule instantiate :premises (@p112) :args (@t4334)) % 40.01/40.20 (step @p5054 :rule cnf_or_pos :args (@t4335)) % 40.01/40.20 (step @p5055 :rule reordering :premises (@p5054) :args ((or @t4332 @t244 @t1833 (not @t4335)))) % 40.01/40.20 (step @p5056 :rule instantiate :premises (@p108) :args (@t4330)) % 40.01/40.20 (step @p5057 :rule cnf_or_pos :args (@t4337)) % 40.01/40.20 (step @p5058 :rule reordering :premises (@p5057) :args ((or @t1844 @t265 @t264 @t4336 (not @t4337)))) % 40.01/40.20 (step @p5059 :rule chain_m_resolution :premises (@p5058 @p5056 @p1916 @p1914 @p136 @p134 @p5055 @p5053 @p133 @p131 @p130 @p128 @p127 @p125 @p5052 @p5050 @p110) :args ((or @t4332 @t239) @t267 (@list @t4337 @t1844 @t1846 @t248 @t249 @t1833 @t4335 @t245 @t247 @t242 @t243 @t240 @t241 @t4331 @t4333 @t220))) % 40.01/40.20 (step @p5060 :rule instantiate :premises (@p119) :args (@t4334)) % 40.01/40.20 (step @p5061 :rule cnf_or_pos :args (@t4339)) % 40.01/40.20 (step @p5062 :rule reordering :premises (@p5061) :args ((or @t270 @t4332 @t4338 @t3440 (not @t4339)))) % 40.01/40.20 (step @p5063 :rule instantiate :premises (@p120) :args (@t1830)) % 40.01/40.20 (step @p5064 :rule cnf_or_pos :args (@t4342)) % 40.01/40.20 (step @p5065 :rule reordering :premises (@p5064) :args ((or @t4341 @t4340 @t1831 (not @t4342)))) % 40.01/40.20 (step @p5066 :rule instantiate :premises (@p121) :args (@t1829)) % 40.01/40.20 (step @p5067 :rule cnf_or_pos :args (@t4344)) % 40.01/40.20 (step @p5068 :rule reordering :premises (@p5067) :args ((or @t1839 @t4323 @t4343 (not @t4344)))) % 40.01/40.20 (step @p5069 :rule chain_m_resolution :premises (@p4345 @p4343 @p1057 @p4372 @p4370 @p68 @p4348 @p4346 @p69 @p4369 @p4367 @p1086 @p4321 @p4319 @p1028 @p4396 @p4394 @p67 @p4324 @p4322 @p70 @p4393 @p4391 @p1115 @p4297 @p4295 @p999 @p4420 @p4418 @p66 @p4300 @p4298 @p71 @p4417 @p4415 @p1144 @p4273 @p4271 @p970 @p4444 @p4442 @p65 @p4276 @p4274 @p72 @p4441 @p4439 @p1173 @p4249 @p4247 @p941 @p4468 @p4466 @p64 @p4252 @p4250 @p73 @p4465 @p4463 @p1202 @p4225 @p4223 @p912 @p4492 @p4490 @p63 @p4228 @p4226 @p74 @p4489 @p4487 @p1231 @p4201 @p4199 @p883 @p4516 @p4514 @p62 @p4204 @p4202 @p75 @p4513 @p4511 @p1260 @p4177 @p4175 @p854 @p4540 @p4538 @p61 @p4180 @p4178 @p76 @p4537 @p4535 @p1289 @p4153 @p4151 @p825 @p4564 @p4562 @p60 @p4156 @p4154 @p77 @p4561 @p4559 @p1318 @p4129 @p4127 @p796 @p4588 @p4586 @p59 @p4132 @p4130 @p78 @p4585 @p4583 @p1347 @p4105 @p4103 @p767 @p4612 @p4610 @p58 @p4108 @p4106 @p79 @p4609 @p4607 @p1376 @p4081 @p4079 @p738 @p4636 @p4634 @p57 @p4084 @p4082 @p80 @p4633 @p4631 @p1405 @p4057 @p4055 @p709 @p4660 @p4658 @p56 @p4060 @p4058 @p81 @p4657 @p4655 @p1434 @p4033 @p4031 @p680 @p4684 @p4682 @p55 @p4036 @p4034 @p82 @p4681 @p4679 @p1463 @p4009 @p4007 @p651 @p4708 @p4706 @p54 @p4012 @p4010 @p83 @p4705 @p4703 @p1492 @p3985 @p3983 @p622 @p4732 @p4730 @p53 @p3988 @p3986 @p84 @p4729 @p4727 @p1521 @p3961 @p3959 @p593 @p4756 @p4754 @p52 @p3964 @p3962 @p85 @p4753 @p4751 @p1550 @p3937 @p3935 @p564 @p4780 @p4778 @p51 @p3940 @p3938 @p86 @p4777 @p4775 @p1579 @p3913 @p3911 @p535 @p4804 @p4802 @p50 @p3916 @p3914 @p87 @p4801 @p4799 @p1608 @p3889 @p3887 @p506 @p4828 @p4826 @p49 @p3892 @p3890 @p88 @p4825 @p4823 @p1637 @p3865 @p3863 @p477 @p4852 @p4850 @p48 @p3868 @p3866 @p89 @p4849 @p4847 @p1666 @p3841 @p3839 @p448 @p4876 @p4874 @p47 @p3844 @p3842 @p90 @p4873 @p4871 @p1695 @p3817 @p3815 @p419 @p4900 @p4898 @p46 @p3820 @p3818 @p91 @p4897 @p4895 @p1724 @p3793 @p3791 @p390 @p4924 @p4922 @p45 @p3796 @p3794 @p92 @p4921 @p4919 @p1753 @p3769 @p3767 @p361 @p4948 @p4946 @p44 @p3772 @p3770 @p93 @p4945 @p4943 @p1782 @p3745 @p3743 @p332 @p4972 @p4970 @p43 @p3748 @p3746 @p94 @p4969 @p4967 @p1811 @p3721 @p3719 @p303 @p4996 @p4994 @p42 @p3724 @p3722 @p95 @p4993 @p4991 @p1840 @p3697 @p3695 @p274 @p5020 @p5018 @p41 @p3700 @p3698 @p96 @p5017 @p5015 @p1869 @p3673 @p3671 @p245 @p5044 @p5042 @p40 @p3676 @p3674 @p97 @p5041 @p5039 @p1898 @p3649 @p3647 @p216 @p5068 @p5066 @p39 @p3652 @p3650 @p98 @p5065 @p5063 @p1927 @p3628 @p3626 @p187 @p5062 @p5060 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5059) :args (@t4332 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3892 @t1051 @t3888 @t3909 @t68 @t3891 @t3894 @t69 @t3906 @t3907 @t1077 @t3873 @t3877 @t1025 @t3903 @t3924 @t67 @t3876 @t3879 @t70 @t3921 @t3922 @t1103 @t3858 @t3862 @t999 @t3918 @t3939 @t66 @t3861 @t3864 @t71 @t3936 @t3937 @t1129 @t3843 @t3847 @t973 @t3933 @t3954 @t65 @t3846 @t3849 @t72 @t3951 @t3952 @t1155 @t3828 @t3832 @t947 @t3948 @t3969 @t64 @t3831 @t3834 @t73 @t3966 @t3967 @t1181 @t3813 @t3817 @t921 @t3963 @t3984 @t63 @t3816 @t3819 @t74 @t3981 @t3982 @t1207 @t3798 @t3802 @t895 @t3978 @t3999 @t62 @t3801 @t3804 @t75 @t3996 @t3997 @t1233 @t3783 @t3787 @t869 @t3993 @t4014 @t61 @t3786 @t3789 @t76 @t4011 @t4012 @t1259 @t3768 @t3772 @t843 @t4008 @t4029 @t60 @t3771 @t3774 @t77 @t4026 @t4027 @t1285 @t3753 @t3757 @t817 @t4023 @t4044 @t59 @t3756 @t3759 @t78 @t4041 @t4042 @t1311 @t3738 @t3742 @t791 @t4038 @t4059 @t58 @t3741 @t3744 @t79 @t4056 @t4057 @t1337 @t3723 @t3727 @t765 @t4053 @t4074 @t57 @t3726 @t3729 @t80 @t4071 @t4072 @t1363 @t3708 @t3712 @t739 @t4068 @t4089 @t56 @t3711 @t3714 @t81 @t4086 @t4087 @t1389 @t3693 @t3697 @t713 @t4083 @t4104 @t55 @t3696 @t3699 @t82 @t4101 @t4102 @t1415 @t3678 @t3682 @t687 @t4098 @t4119 @t54 @t3681 @t3684 @t83 @t4116 @t4117 @t1441 @t3663 @t3667 @t661 @t4113 @t4134 @t53 @t3666 @t3669 @t84 @t4131 @t4132 @t1467 @t3648 @t3652 @t635 @t4128 @t4149 @t52 @t3651 @t3654 @t85 @t4146 @t4147 @t1493 @t3633 @t3637 @t609 @t4143 @t4164 @t51 @t3636 @t3639 @t86 @t4161 @t4162 @t1519 @t3618 @t3622 @t583 @t4158 @t4179 @t50 @t3621 @t3624 @t87 @t4176 @t4177 @t1545 @t3603 @t3607 @t557 @t4173 @t4194 @t49 @t3606 @t3609 @t88 @t4191 @t4192 @t1571 @t3588 @t3592 @t531 @t4188 @t4209 @t48 @t3591 @t3594 @t89 @t4206 @t4207 @t1597 @t3573 @t3577 @t505 @t4203 @t4224 @t47 @t3576 @t3579 @t90 @t4221 @t4222 @t1623 @t3558 @t3562 @t479 @t4218 @t4239 @t46 @t3561 @t3564 @t91 @t4236 @t4237 @t1649 @t3543 @t3547 @t453 @t4233 @t4254 @t45 @t3546 @t3549 @t92 @t4251 @t4252 @t1675 @t3528 @t3532 @t427 @t4248 @t4269 @t44 @t3531 @t3534 @t93 @t4266 @t4267 @t1701 @t3513 @t3517 @t401 @t4263 @t4284 @t43 @t3516 @t3519 @t94 @t4281 @t4282 @t1727 @t3498 @t3502 @t375 @t4278 @t4299 @t42 @t3501 @t3504 @t95 @t4296 @t4297 @t1753 @t3483 @t3487 @t349 @t4293 @t4314 @t41 @t3486 @t3489 @t96 @t4311 @t4312 @t1779 @t3468 @t3472 @t323 @t4308 @t4329 @t40 @t3471 @t3474 @t97 @t4326 @t4327 @t1805 @t3453 @t3457 @t297 @t4323 @t4344 @t39 @t3456 @t3459 @t98 @t4341 @t4342 @t1831 @t3441 @t3444 @t276 @t4338 @t4339 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6145 @t220) % 40.01/40.20 (step @p5071 :rule instantiate :premises (@p110) :args (@t4345)) % 40.01/40.20 (step-pop @p6146 :rule scope :premises (@p5071)) % 40.01/40.20 (step @p5072 :rule process_scope :premises (@p6146) :args (@t4348)) % 40.01/40.20 (step @p5074 :rule implies_elim :premises (@p5072)) % 40.01/40.20 (step @p5075 :rule cnf_or_pos :args (@t4348)) % 40.01/40.20 (step @p5076 :rule reordering :premises (@p5075) :args ((or @t4347 @t4346 (not @t4348)))) % 40.01/40.20 (step @p5077 :rule instantiate :premises (@p112) :args (@t4349)) % 40.01/40.20 (step @p5078 :rule cnf_or_pos :args (@t4350)) % 40.01/40.20 (step @p5079 :rule reordering :premises (@p5078) :args ((or @t4347 @t244 @t1859 (not @t4350)))) % 40.01/40.20 (step @p5080 :rule instantiate :premises (@p108) :args (@t4345)) % 40.01/40.20 (step @p5081 :rule cnf_or_pos :args (@t4352)) % 40.01/40.20 (step @p5082 :rule reordering :premises (@p5081) :args ((or @t1870 @t265 @t264 @t4351 (not @t4352)))) % 40.01/40.20 (step @p5083 :rule chain_m_resolution :premises (@p5082 @p5080 @p1945 @p1943 @p136 @p134 @p5079 @p5077 @p133 @p131 @p130 @p128 @p127 @p125 @p5076 @p5074 @p110) :args ((or @t4347 @t239) @t267 (@list @t4352 @t1870 @t1872 @t248 @t249 @t1859 @t4350 @t245 @t247 @t242 @t243 @t240 @t241 @t4346 @t4348 @t220))) % 40.01/40.20 (step @p5084 :rule instantiate :premises (@p119) :args (@t4349)) % 40.01/40.20 (step @p5085 :rule cnf_or_pos :args (@t4354)) % 40.01/40.20 (step @p5086 :rule reordering :premises (@p5085) :args ((or @t270 @t4347 @t4353 @t3440 (not @t4354)))) % 40.01/40.20 (step @p5087 :rule instantiate :premises (@p120) :args (@t1856)) % 40.01/40.20 (step @p5088 :rule cnf_or_pos :args (@t4357)) % 40.01/40.20 (step @p5089 :rule reordering :premises (@p5088) :args ((or @t4356 @t4355 @t1857 (not @t4357)))) % 40.01/40.20 (step @p5090 :rule instantiate :premises (@p121) :args (@t1855)) % 40.01/40.20 (step @p5091 :rule cnf_or_pos :args (@t4359)) % 40.01/40.20 (step @p5092 :rule reordering :premises (@p5091) :args ((or @t1865 @t4338 @t4358 (not @t4359)))) % 40.01/40.20 (step @p5093 :rule chain_m_resolution :premises (@p4372 @p4370 @p68 @p4369 @p4367 @p1086 @p4345 @p4343 @p1057 @p4396 @p4394 @p67 @p4348 @p4346 @p69 @p4393 @p4391 @p1115 @p4321 @p4319 @p1028 @p4420 @p4418 @p66 @p4324 @p4322 @p70 @p4417 @p4415 @p1144 @p4297 @p4295 @p999 @p4444 @p4442 @p65 @p4300 @p4298 @p71 @p4441 @p4439 @p1173 @p4273 @p4271 @p970 @p4468 @p4466 @p64 @p4276 @p4274 @p72 @p4465 @p4463 @p1202 @p4249 @p4247 @p941 @p4492 @p4490 @p63 @p4252 @p4250 @p73 @p4489 @p4487 @p1231 @p4225 @p4223 @p912 @p4516 @p4514 @p62 @p4228 @p4226 @p74 @p4513 @p4511 @p1260 @p4201 @p4199 @p883 @p4540 @p4538 @p61 @p4204 @p4202 @p75 @p4537 @p4535 @p1289 @p4177 @p4175 @p854 @p4564 @p4562 @p60 @p4180 @p4178 @p76 @p4561 @p4559 @p1318 @p4153 @p4151 @p825 @p4588 @p4586 @p59 @p4156 @p4154 @p77 @p4585 @p4583 @p1347 @p4129 @p4127 @p796 @p4612 @p4610 @p58 @p4132 @p4130 @p78 @p4609 @p4607 @p1376 @p4105 @p4103 @p767 @p4636 @p4634 @p57 @p4108 @p4106 @p79 @p4633 @p4631 @p1405 @p4081 @p4079 @p738 @p4660 @p4658 @p56 @p4084 @p4082 @p80 @p4657 @p4655 @p1434 @p4057 @p4055 @p709 @p4684 @p4682 @p55 @p4060 @p4058 @p81 @p4681 @p4679 @p1463 @p4033 @p4031 @p680 @p4708 @p4706 @p54 @p4036 @p4034 @p82 @p4705 @p4703 @p1492 @p4009 @p4007 @p651 @p4732 @p4730 @p53 @p4012 @p4010 @p83 @p4729 @p4727 @p1521 @p3985 @p3983 @p622 @p4756 @p4754 @p52 @p3988 @p3986 @p84 @p4753 @p4751 @p1550 @p3961 @p3959 @p593 @p4780 @p4778 @p51 @p3964 @p3962 @p85 @p4777 @p4775 @p1579 @p3937 @p3935 @p564 @p4804 @p4802 @p50 @p3940 @p3938 @p86 @p4801 @p4799 @p1608 @p3913 @p3911 @p535 @p4828 @p4826 @p49 @p3916 @p3914 @p87 @p4825 @p4823 @p1637 @p3889 @p3887 @p506 @p4852 @p4850 @p48 @p3892 @p3890 @p88 @p4849 @p4847 @p1666 @p3865 @p3863 @p477 @p4876 @p4874 @p47 @p3868 @p3866 @p89 @p4873 @p4871 @p1695 @p3841 @p3839 @p448 @p4900 @p4898 @p46 @p3844 @p3842 @p90 @p4897 @p4895 @p1724 @p3817 @p3815 @p419 @p4924 @p4922 @p45 @p3820 @p3818 @p91 @p4921 @p4919 @p1753 @p3793 @p3791 @p390 @p4948 @p4946 @p44 @p3796 @p3794 @p92 @p4945 @p4943 @p1782 @p3769 @p3767 @p361 @p4972 @p4970 @p43 @p3772 @p3770 @p93 @p4969 @p4967 @p1811 @p3745 @p3743 @p332 @p4996 @p4994 @p42 @p3748 @p3746 @p94 @p4993 @p4991 @p1840 @p3721 @p3719 @p303 @p5020 @p5018 @p41 @p3724 @p3722 @p95 @p5017 @p5015 @p1869 @p3697 @p3695 @p274 @p5044 @p5042 @p40 @p3700 @p3698 @p96 @p5041 @p5039 @p1898 @p3673 @p3671 @p245 @p5068 @p5066 @p39 @p3676 @p3674 @p97 @p5065 @p5063 @p1927 @p3649 @p3647 @p216 @p5092 @p5090 @p38 @p3652 @p3650 @p98 @p5089 @p5087 @p1956 @p3628 @p3626 @p187 @p5086 @p5084 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5083) :args (@t4347 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3909 @t68 @t3906 @t3907 @t1077 @t3888 @t3892 @t1051 @t3903 @t3924 @t67 @t3891 @t3894 @t69 @t3921 @t3922 @t1103 @t3873 @t3877 @t1025 @t3918 @t3939 @t66 @t3876 @t3879 @t70 @t3936 @t3937 @t1129 @t3858 @t3862 @t999 @t3933 @t3954 @t65 @t3861 @t3864 @t71 @t3951 @t3952 @t1155 @t3843 @t3847 @t973 @t3948 @t3969 @t64 @t3846 @t3849 @t72 @t3966 @t3967 @t1181 @t3828 @t3832 @t947 @t3963 @t3984 @t63 @t3831 @t3834 @t73 @t3981 @t3982 @t1207 @t3813 @t3817 @t921 @t3978 @t3999 @t62 @t3816 @t3819 @t74 @t3996 @t3997 @t1233 @t3798 @t3802 @t895 @t3993 @t4014 @t61 @t3801 @t3804 @t75 @t4011 @t4012 @t1259 @t3783 @t3787 @t869 @t4008 @t4029 @t60 @t3786 @t3789 @t76 @t4026 @t4027 @t1285 @t3768 @t3772 @t843 @t4023 @t4044 @t59 @t3771 @t3774 @t77 @t4041 @t4042 @t1311 @t3753 @t3757 @t817 @t4038 @t4059 @t58 @t3756 @t3759 @t78 @t4056 @t4057 @t1337 @t3738 @t3742 @t791 @t4053 @t4074 @t57 @t3741 @t3744 @t79 @t4071 @t4072 @t1363 @t3723 @t3727 @t765 @t4068 @t4089 @t56 @t3726 @t3729 @t80 @t4086 @t4087 @t1389 @t3708 @t3712 @t739 @t4083 @t4104 @t55 @t3711 @t3714 @t81 @t4101 @t4102 @t1415 @t3693 @t3697 @t713 @t4098 @t4119 @t54 @t3696 @t3699 @t82 @t4116 @t4117 @t1441 @t3678 @t3682 @t687 @t4113 @t4134 @t53 @t3681 @t3684 @t83 @t4131 @t4132 @t1467 @t3663 @t3667 @t661 @t4128 @t4149 @t52 @t3666 @t3669 @t84 @t4146 @t4147 @t1493 @t3648 @t3652 @t635 @t4143 @t4164 @t51 @t3651 @t3654 @t85 @t4161 @t4162 @t1519 @t3633 @t3637 @t609 @t4158 @t4179 @t50 @t3636 @t3639 @t86 @t4176 @t4177 @t1545 @t3618 @t3622 @t583 @t4173 @t4194 @t49 @t3621 @t3624 @t87 @t4191 @t4192 @t1571 @t3603 @t3607 @t557 @t4188 @t4209 @t48 @t3606 @t3609 @t88 @t4206 @t4207 @t1597 @t3588 @t3592 @t531 @t4203 @t4224 @t47 @t3591 @t3594 @t89 @t4221 @t4222 @t1623 @t3573 @t3577 @t505 @t4218 @t4239 @t46 @t3576 @t3579 @t90 @t4236 @t4237 @t1649 @t3558 @t3562 @t479 @t4233 @t4254 @t45 @t3561 @t3564 @t91 @t4251 @t4252 @t1675 @t3543 @t3547 @t453 @t4248 @t4269 @t44 @t3546 @t3549 @t92 @t4266 @t4267 @t1701 @t3528 @t3532 @t427 @t4263 @t4284 @t43 @t3531 @t3534 @t93 @t4281 @t4282 @t1727 @t3513 @t3517 @t401 @t4278 @t4299 @t42 @t3516 @t3519 @t94 @t4296 @t4297 @t1753 @t3498 @t3502 @t375 @t4293 @t4314 @t41 @t3501 @t3504 @t95 @t4311 @t4312 @t1779 @t3483 @t3487 @t349 @t4308 @t4329 @t40 @t3486 @t3489 @t96 @t4326 @t4327 @t1805 @t3468 @t3472 @t323 @t4323 @t4344 @t39 @t3471 @t3474 @t97 @t4341 @t4342 @t1831 @t3453 @t3457 @t297 @t4338 @t4359 @t38 @t3456 @t3459 @t98 @t4356 @t4357 @t1857 @t3441 @t3444 @t276 @t4353 @t4354 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6147 @t220) % 40.01/40.20 (step @p5095 :rule instantiate :premises (@p110) :args (@t4360)) % 40.01/40.20 (step-pop @p6148 :rule scope :premises (@p5095)) % 40.01/40.20 (step @p5096 :rule process_scope :premises (@p6148) :args (@t4363)) % 40.01/40.20 (step @p5098 :rule implies_elim :premises (@p5096)) % 40.01/40.20 (step @p5099 :rule cnf_or_pos :args (@t4363)) % 40.01/40.20 (step @p5100 :rule reordering :premises (@p5099) :args ((or @t4362 @t4361 (not @t4363)))) % 40.01/40.20 (step @p5101 :rule instantiate :premises (@p112) :args (@t4364)) % 40.01/40.20 (step @p5102 :rule cnf_or_pos :args (@t4365)) % 40.01/40.20 (step @p5103 :rule reordering :premises (@p5102) :args ((or @t4362 @t244 @t1885 (not @t4365)))) % 40.01/40.20 (step @p5104 :rule instantiate :premises (@p108) :args (@t4360)) % 40.01/40.20 (step @p5105 :rule cnf_or_pos :args (@t4367)) % 40.01/40.20 (step @p5106 :rule reordering :premises (@p5105) :args ((or @t1896 @t265 @t264 @t4366 (not @t4367)))) % 40.01/40.20 (step @p5107 :rule chain_m_resolution :premises (@p5106 @p5104 @p1974 @p1972 @p136 @p134 @p5103 @p5101 @p133 @p131 @p130 @p128 @p127 @p125 @p5100 @p5098 @p110) :args ((or @t4362 @t239) @t267 (@list @t4367 @t1896 @t1898 @t248 @t249 @t1885 @t4365 @t245 @t247 @t242 @t243 @t240 @t241 @t4361 @t4363 @t220))) % 40.01/40.20 (step @p5108 :rule instantiate :premises (@p119) :args (@t4364)) % 40.01/40.20 (step @p5109 :rule cnf_or_pos :args (@t4369)) % 40.01/40.20 (step @p5110 :rule reordering :premises (@p5109) :args ((or @t270 @t4362 @t4368 @t3440 (not @t4369)))) % 40.01/40.20 (step @p5111 :rule instantiate :premises (@p120) :args (@t1882)) % 40.01/40.20 (step @p5112 :rule cnf_or_pos :args (@t4372)) % 40.01/40.20 (step @p5113 :rule reordering :premises (@p5112) :args ((or @t4371 @t4370 @t1883 (not @t4372)))) % 40.01/40.20 (step @p5114 :rule instantiate :premises (@p121) :args (@t1881)) % 40.01/40.20 (step @p5115 :rule cnf_or_pos :args (@t4374)) % 40.01/40.20 (step @p5116 :rule reordering :premises (@p5115) :args ((or @t1891 @t4353 @t4373 (not @t4374)))) % 40.01/40.20 (step @p5117 :rule chain_m_resolution :premises (@p4369 @p4367 @p1086 @p4396 @p4394 @p67 @p4372 @p4370 @p68 @p4393 @p4391 @p1115 @p4345 @p4343 @p1057 @p4420 @p4418 @p66 @p4348 @p4346 @p69 @p4417 @p4415 @p1144 @p4321 @p4319 @p1028 @p4444 @p4442 @p65 @p4324 @p4322 @p70 @p4441 @p4439 @p1173 @p4297 @p4295 @p999 @p4468 @p4466 @p64 @p4300 @p4298 @p71 @p4465 @p4463 @p1202 @p4273 @p4271 @p970 @p4492 @p4490 @p63 @p4276 @p4274 @p72 @p4489 @p4487 @p1231 @p4249 @p4247 @p941 @p4516 @p4514 @p62 @p4252 @p4250 @p73 @p4513 @p4511 @p1260 @p4225 @p4223 @p912 @p4540 @p4538 @p61 @p4228 @p4226 @p74 @p4537 @p4535 @p1289 @p4201 @p4199 @p883 @p4564 @p4562 @p60 @p4204 @p4202 @p75 @p4561 @p4559 @p1318 @p4177 @p4175 @p854 @p4588 @p4586 @p59 @p4180 @p4178 @p76 @p4585 @p4583 @p1347 @p4153 @p4151 @p825 @p4612 @p4610 @p58 @p4156 @p4154 @p77 @p4609 @p4607 @p1376 @p4129 @p4127 @p796 @p4636 @p4634 @p57 @p4132 @p4130 @p78 @p4633 @p4631 @p1405 @p4105 @p4103 @p767 @p4660 @p4658 @p56 @p4108 @p4106 @p79 @p4657 @p4655 @p1434 @p4081 @p4079 @p738 @p4684 @p4682 @p55 @p4084 @p4082 @p80 @p4681 @p4679 @p1463 @p4057 @p4055 @p709 @p4708 @p4706 @p54 @p4060 @p4058 @p81 @p4705 @p4703 @p1492 @p4033 @p4031 @p680 @p4732 @p4730 @p53 @p4036 @p4034 @p82 @p4729 @p4727 @p1521 @p4009 @p4007 @p651 @p4756 @p4754 @p52 @p4012 @p4010 @p83 @p4753 @p4751 @p1550 @p3985 @p3983 @p622 @p4780 @p4778 @p51 @p3988 @p3986 @p84 @p4777 @p4775 @p1579 @p3961 @p3959 @p593 @p4804 @p4802 @p50 @p3964 @p3962 @p85 @p4801 @p4799 @p1608 @p3937 @p3935 @p564 @p4828 @p4826 @p49 @p3940 @p3938 @p86 @p4825 @p4823 @p1637 @p3913 @p3911 @p535 @p4852 @p4850 @p48 @p3916 @p3914 @p87 @p4849 @p4847 @p1666 @p3889 @p3887 @p506 @p4876 @p4874 @p47 @p3892 @p3890 @p88 @p4873 @p4871 @p1695 @p3865 @p3863 @p477 @p4900 @p4898 @p46 @p3868 @p3866 @p89 @p4897 @p4895 @p1724 @p3841 @p3839 @p448 @p4924 @p4922 @p45 @p3844 @p3842 @p90 @p4921 @p4919 @p1753 @p3817 @p3815 @p419 @p4948 @p4946 @p44 @p3820 @p3818 @p91 @p4945 @p4943 @p1782 @p3793 @p3791 @p390 @p4972 @p4970 @p43 @p3796 @p3794 @p92 @p4969 @p4967 @p1811 @p3769 @p3767 @p361 @p4996 @p4994 @p42 @p3772 @p3770 @p93 @p4993 @p4991 @p1840 @p3745 @p3743 @p332 @p5020 @p5018 @p41 @p3748 @p3746 @p94 @p5017 @p5015 @p1869 @p3721 @p3719 @p303 @p5044 @p5042 @p40 @p3724 @p3722 @p95 @p5041 @p5039 @p1898 @p3697 @p3695 @p274 @p5068 @p5066 @p39 @p3700 @p3698 @p96 @p5065 @p5063 @p1927 @p3673 @p3671 @p245 @p5092 @p5090 @p38 @p3676 @p3674 @p97 @p5089 @p5087 @p1956 @p3649 @p3647 @p216 @p5116 @p5114 @p37 @p3652 @p3650 @p98 @p5113 @p5111 @p1985 @p3628 @p3626 @p187 @p5110 @p5108 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5107) :args (@t4362 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3907 @t1077 @t3903 @t3924 @t67 @t3906 @t3909 @t68 @t3921 @t3922 @t1103 @t3888 @t3892 @t1051 @t3918 @t3939 @t66 @t3891 @t3894 @t69 @t3936 @t3937 @t1129 @t3873 @t3877 @t1025 @t3933 @t3954 @t65 @t3876 @t3879 @t70 @t3951 @t3952 @t1155 @t3858 @t3862 @t999 @t3948 @t3969 @t64 @t3861 @t3864 @t71 @t3966 @t3967 @t1181 @t3843 @t3847 @t973 @t3963 @t3984 @t63 @t3846 @t3849 @t72 @t3981 @t3982 @t1207 @t3828 @t3832 @t947 @t3978 @t3999 @t62 @t3831 @t3834 @t73 @t3996 @t3997 @t1233 @t3813 @t3817 @t921 @t3993 @t4014 @t61 @t3816 @t3819 @t74 @t4011 @t4012 @t1259 @t3798 @t3802 @t895 @t4008 @t4029 @t60 @t3801 @t3804 @t75 @t4026 @t4027 @t1285 @t3783 @t3787 @t869 @t4023 @t4044 @t59 @t3786 @t3789 @t76 @t4041 @t4042 @t1311 @t3768 @t3772 @t843 @t4038 @t4059 @t58 @t3771 @t3774 @t77 @t4056 @t4057 @t1337 @t3753 @t3757 @t817 @t4053 @t4074 @t57 @t3756 @t3759 @t78 @t4071 @t4072 @t1363 @t3738 @t3742 @t791 @t4068 @t4089 @t56 @t3741 @t3744 @t79 @t4086 @t4087 @t1389 @t3723 @t3727 @t765 @t4083 @t4104 @t55 @t3726 @t3729 @t80 @t4101 @t4102 @t1415 @t3708 @t3712 @t739 @t4098 @t4119 @t54 @t3711 @t3714 @t81 @t4116 @t4117 @t1441 @t3693 @t3697 @t713 @t4113 @t4134 @t53 @t3696 @t3699 @t82 @t4131 @t4132 @t1467 @t3678 @t3682 @t687 @t4128 @t4149 @t52 @t3681 @t3684 @t83 @t4146 @t4147 @t1493 @t3663 @t3667 @t661 @t4143 @t4164 @t51 @t3666 @t3669 @t84 @t4161 @t4162 @t1519 @t3648 @t3652 @t635 @t4158 @t4179 @t50 @t3651 @t3654 @t85 @t4176 @t4177 @t1545 @t3633 @t3637 @t609 @t4173 @t4194 @t49 @t3636 @t3639 @t86 @t4191 @t4192 @t1571 @t3618 @t3622 @t583 @t4188 @t4209 @t48 @t3621 @t3624 @t87 @t4206 @t4207 @t1597 @t3603 @t3607 @t557 @t4203 @t4224 @t47 @t3606 @t3609 @t88 @t4221 @t4222 @t1623 @t3588 @t3592 @t531 @t4218 @t4239 @t46 @t3591 @t3594 @t89 @t4236 @t4237 @t1649 @t3573 @t3577 @t505 @t4233 @t4254 @t45 @t3576 @t3579 @t90 @t4251 @t4252 @t1675 @t3558 @t3562 @t479 @t4248 @t4269 @t44 @t3561 @t3564 @t91 @t4266 @t4267 @t1701 @t3543 @t3547 @t453 @t4263 @t4284 @t43 @t3546 @t3549 @t92 @t4281 @t4282 @t1727 @t3528 @t3532 @t427 @t4278 @t4299 @t42 @t3531 @t3534 @t93 @t4296 @t4297 @t1753 @t3513 @t3517 @t401 @t4293 @t4314 @t41 @t3516 @t3519 @t94 @t4311 @t4312 @t1779 @t3498 @t3502 @t375 @t4308 @t4329 @t40 @t3501 @t3504 @t95 @t4326 @t4327 @t1805 @t3483 @t3487 @t349 @t4323 @t4344 @t39 @t3486 @t3489 @t96 @t4341 @t4342 @t1831 @t3468 @t3472 @t323 @t4338 @t4359 @t38 @t3471 @t3474 @t97 @t4356 @t4357 @t1857 @t3453 @t3457 @t297 @t4353 @t4374 @t37 @t3456 @t3459 @t98 @t4371 @t4372 @t1883 @t3441 @t3444 @t276 @t4368 @t4369 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6149 @t220) % 40.01/40.20 (step @p5119 :rule instantiate :premises (@p110) :args (@t4375)) % 40.01/40.20 (step-pop @p6150 :rule scope :premises (@p5119)) % 40.01/40.20 (step @p5120 :rule process_scope :premises (@p6150) :args (@t4378)) % 40.01/40.20 (step @p5122 :rule implies_elim :premises (@p5120)) % 40.01/40.20 (step @p5123 :rule cnf_or_pos :args (@t4378)) % 40.01/40.20 (step @p5124 :rule reordering :premises (@p5123) :args ((or @t4377 @t4376 (not @t4378)))) % 40.01/40.20 (step @p5125 :rule instantiate :premises (@p112) :args (@t4379)) % 40.01/40.20 (step @p5126 :rule cnf_or_pos :args (@t4380)) % 40.01/40.20 (step @p5127 :rule reordering :premises (@p5126) :args ((or @t4377 @t244 @t1911 (not @t4380)))) % 40.01/40.20 (step @p5128 :rule instantiate :premises (@p108) :args (@t4375)) % 40.01/40.20 (step @p5129 :rule cnf_or_pos :args (@t4382)) % 40.01/40.20 (step @p5130 :rule reordering :premises (@p5129) :args ((or @t1922 @t265 @t264 @t4381 (not @t4382)))) % 40.01/40.20 (step @p5131 :rule chain_m_resolution :premises (@p5130 @p5128 @p2003 @p2001 @p136 @p134 @p5127 @p5125 @p133 @p131 @p130 @p128 @p127 @p125 @p5124 @p5122 @p110) :args ((or @t4377 @t239) @t267 (@list @t4382 @t1922 @t1924 @t248 @t249 @t1911 @t4380 @t245 @t247 @t242 @t243 @t240 @t241 @t4376 @t4378 @t220))) % 40.01/40.20 (step @p5132 :rule instantiate :premises (@p119) :args (@t4379)) % 40.01/40.20 (step @p5133 :rule cnf_or_pos :args (@t4384)) % 40.01/40.20 (step @p5134 :rule reordering :premises (@p5133) :args ((or @t270 @t4377 @t4383 @t3440 (not @t4384)))) % 40.01/40.20 (step @p5135 :rule instantiate :premises (@p120) :args (@t1908)) % 40.01/40.20 (step @p5136 :rule cnf_or_pos :args (@t4387)) % 40.01/40.20 (step @p5137 :rule reordering :premises (@p5136) :args ((or @t4386 @t4385 @t1909 (not @t4387)))) % 40.01/40.20 (step @p5138 :rule instantiate :premises (@p121) :args (@t1907)) % 40.01/40.20 (step @p5139 :rule cnf_or_pos :args (@t4389)) % 40.01/40.20 (step @p5140 :rule reordering :premises (@p5139) :args ((or @t1917 @t4368 @t4388 (not @t4389)))) % 40.01/40.20 (step @p5141 :rule chain_m_resolution :premises (@p4396 @p4394 @p67 @p4393 @p4391 @p1115 @p4369 @p4367 @p1086 @p4420 @p4418 @p66 @p4372 @p4370 @p68 @p4417 @p4415 @p1144 @p4345 @p4343 @p1057 @p4444 @p4442 @p65 @p4348 @p4346 @p69 @p4441 @p4439 @p1173 @p4321 @p4319 @p1028 @p4468 @p4466 @p64 @p4324 @p4322 @p70 @p4465 @p4463 @p1202 @p4297 @p4295 @p999 @p4492 @p4490 @p63 @p4300 @p4298 @p71 @p4489 @p4487 @p1231 @p4273 @p4271 @p970 @p4516 @p4514 @p62 @p4276 @p4274 @p72 @p4513 @p4511 @p1260 @p4249 @p4247 @p941 @p4540 @p4538 @p61 @p4252 @p4250 @p73 @p4537 @p4535 @p1289 @p4225 @p4223 @p912 @p4564 @p4562 @p60 @p4228 @p4226 @p74 @p4561 @p4559 @p1318 @p4201 @p4199 @p883 @p4588 @p4586 @p59 @p4204 @p4202 @p75 @p4585 @p4583 @p1347 @p4177 @p4175 @p854 @p4612 @p4610 @p58 @p4180 @p4178 @p76 @p4609 @p4607 @p1376 @p4153 @p4151 @p825 @p4636 @p4634 @p57 @p4156 @p4154 @p77 @p4633 @p4631 @p1405 @p4129 @p4127 @p796 @p4660 @p4658 @p56 @p4132 @p4130 @p78 @p4657 @p4655 @p1434 @p4105 @p4103 @p767 @p4684 @p4682 @p55 @p4108 @p4106 @p79 @p4681 @p4679 @p1463 @p4081 @p4079 @p738 @p4708 @p4706 @p54 @p4084 @p4082 @p80 @p4705 @p4703 @p1492 @p4057 @p4055 @p709 @p4732 @p4730 @p53 @p4060 @p4058 @p81 @p4729 @p4727 @p1521 @p4033 @p4031 @p680 @p4756 @p4754 @p52 @p4036 @p4034 @p82 @p4753 @p4751 @p1550 @p4009 @p4007 @p651 @p4780 @p4778 @p51 @p4012 @p4010 @p83 @p4777 @p4775 @p1579 @p3985 @p3983 @p622 @p4804 @p4802 @p50 @p3988 @p3986 @p84 @p4801 @p4799 @p1608 @p3961 @p3959 @p593 @p4828 @p4826 @p49 @p3964 @p3962 @p85 @p4825 @p4823 @p1637 @p3937 @p3935 @p564 @p4852 @p4850 @p48 @p3940 @p3938 @p86 @p4849 @p4847 @p1666 @p3913 @p3911 @p535 @p4876 @p4874 @p47 @p3916 @p3914 @p87 @p4873 @p4871 @p1695 @p3889 @p3887 @p506 @p4900 @p4898 @p46 @p3892 @p3890 @p88 @p4897 @p4895 @p1724 @p3865 @p3863 @p477 @p4924 @p4922 @p45 @p3868 @p3866 @p89 @p4921 @p4919 @p1753 @p3841 @p3839 @p448 @p4948 @p4946 @p44 @p3844 @p3842 @p90 @p4945 @p4943 @p1782 @p3817 @p3815 @p419 @p4972 @p4970 @p43 @p3820 @p3818 @p91 @p4969 @p4967 @p1811 @p3793 @p3791 @p390 @p4996 @p4994 @p42 @p3796 @p3794 @p92 @p4993 @p4991 @p1840 @p3769 @p3767 @p361 @p5020 @p5018 @p41 @p3772 @p3770 @p93 @p5017 @p5015 @p1869 @p3745 @p3743 @p332 @p5044 @p5042 @p40 @p3748 @p3746 @p94 @p5041 @p5039 @p1898 @p3721 @p3719 @p303 @p5068 @p5066 @p39 @p3724 @p3722 @p95 @p5065 @p5063 @p1927 @p3697 @p3695 @p274 @p5092 @p5090 @p38 @p3700 @p3698 @p96 @p5089 @p5087 @p1956 @p3673 @p3671 @p245 @p5116 @p5114 @p37 @p3676 @p3674 @p97 @p5113 @p5111 @p1985 @p3649 @p3647 @p216 @p5140 @p5138 @p36 @p3652 @p3650 @p98 @p5137 @p5135 @p2014 @p3628 @p3626 @p187 @p5134 @p5132 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5131) :args (@t4377 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3924 @t67 @t3921 @t3922 @t1103 @t3903 @t3907 @t1077 @t3918 @t3939 @t66 @t3906 @t3909 @t68 @t3936 @t3937 @t1129 @t3888 @t3892 @t1051 @t3933 @t3954 @t65 @t3891 @t3894 @t69 @t3951 @t3952 @t1155 @t3873 @t3877 @t1025 @t3948 @t3969 @t64 @t3876 @t3879 @t70 @t3966 @t3967 @t1181 @t3858 @t3862 @t999 @t3963 @t3984 @t63 @t3861 @t3864 @t71 @t3981 @t3982 @t1207 @t3843 @t3847 @t973 @t3978 @t3999 @t62 @t3846 @t3849 @t72 @t3996 @t3997 @t1233 @t3828 @t3832 @t947 @t3993 @t4014 @t61 @t3831 @t3834 @t73 @t4011 @t4012 @t1259 @t3813 @t3817 @t921 @t4008 @t4029 @t60 @t3816 @t3819 @t74 @t4026 @t4027 @t1285 @t3798 @t3802 @t895 @t4023 @t4044 @t59 @t3801 @t3804 @t75 @t4041 @t4042 @t1311 @t3783 @t3787 @t869 @t4038 @t4059 @t58 @t3786 @t3789 @t76 @t4056 @t4057 @t1337 @t3768 @t3772 @t843 @t4053 @t4074 @t57 @t3771 @t3774 @t77 @t4071 @t4072 @t1363 @t3753 @t3757 @t817 @t4068 @t4089 @t56 @t3756 @t3759 @t78 @t4086 @t4087 @t1389 @t3738 @t3742 @t791 @t4083 @t4104 @t55 @t3741 @t3744 @t79 @t4101 @t4102 @t1415 @t3723 @t3727 @t765 @t4098 @t4119 @t54 @t3726 @t3729 @t80 @t4116 @t4117 @t1441 @t3708 @t3712 @t739 @t4113 @t4134 @t53 @t3711 @t3714 @t81 @t4131 @t4132 @t1467 @t3693 @t3697 @t713 @t4128 @t4149 @t52 @t3696 @t3699 @t82 @t4146 @t4147 @t1493 @t3678 @t3682 @t687 @t4143 @t4164 @t51 @t3681 @t3684 @t83 @t4161 @t4162 @t1519 @t3663 @t3667 @t661 @t4158 @t4179 @t50 @t3666 @t3669 @t84 @t4176 @t4177 @t1545 @t3648 @t3652 @t635 @t4173 @t4194 @t49 @t3651 @t3654 @t85 @t4191 @t4192 @t1571 @t3633 @t3637 @t609 @t4188 @t4209 @t48 @t3636 @t3639 @t86 @t4206 @t4207 @t1597 @t3618 @t3622 @t583 @t4203 @t4224 @t47 @t3621 @t3624 @t87 @t4221 @t4222 @t1623 @t3603 @t3607 @t557 @t4218 @t4239 @t46 @t3606 @t3609 @t88 @t4236 @t4237 @t1649 @t3588 @t3592 @t531 @t4233 @t4254 @t45 @t3591 @t3594 @t89 @t4251 @t4252 @t1675 @t3573 @t3577 @t505 @t4248 @t4269 @t44 @t3576 @t3579 @t90 @t4266 @t4267 @t1701 @t3558 @t3562 @t479 @t4263 @t4284 @t43 @t3561 @t3564 @t91 @t4281 @t4282 @t1727 @t3543 @t3547 @t453 @t4278 @t4299 @t42 @t3546 @t3549 @t92 @t4296 @t4297 @t1753 @t3528 @t3532 @t427 @t4293 @t4314 @t41 @t3531 @t3534 @t93 @t4311 @t4312 @t1779 @t3513 @t3517 @t401 @t4308 @t4329 @t40 @t3516 @t3519 @t94 @t4326 @t4327 @t1805 @t3498 @t3502 @t375 @t4323 @t4344 @t39 @t3501 @t3504 @t95 @t4341 @t4342 @t1831 @t3483 @t3487 @t349 @t4338 @t4359 @t38 @t3486 @t3489 @t96 @t4356 @t4357 @t1857 @t3468 @t3472 @t323 @t4353 @t4374 @t37 @t3471 @t3474 @t97 @t4371 @t4372 @t1883 @t3453 @t3457 @t297 @t4368 @t4389 @t36 @t3456 @t3459 @t98 @t4386 @t4387 @t1909 @t3441 @t3444 @t276 @t4383 @t4384 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6151 @t220) % 40.01/40.20 (step @p5143 :rule instantiate :premises (@p110) :args (@t4390)) % 40.01/40.20 (step-pop @p6152 :rule scope :premises (@p5143)) % 40.01/40.20 (step @p5144 :rule process_scope :premises (@p6152) :args (@t4393)) % 40.01/40.20 (step @p5146 :rule implies_elim :premises (@p5144)) % 40.01/40.20 (step @p5147 :rule cnf_or_pos :args (@t4393)) % 40.01/40.20 (step @p5148 :rule reordering :premises (@p5147) :args ((or @t4392 @t4391 (not @t4393)))) % 40.01/40.20 (step @p5149 :rule instantiate :premises (@p112) :args (@t4394)) % 40.01/40.20 (step @p5150 :rule cnf_or_pos :args (@t4395)) % 40.01/40.20 (step @p5151 :rule reordering :premises (@p5150) :args ((or @t4392 @t244 @t1937 (not @t4395)))) % 40.01/40.20 (step @p5152 :rule instantiate :premises (@p108) :args (@t4390)) % 40.01/40.20 (step @p5153 :rule cnf_or_pos :args (@t4397)) % 40.01/40.20 (step @p5154 :rule reordering :premises (@p5153) :args ((or @t1948 @t265 @t264 @t4396 (not @t4397)))) % 40.01/40.20 (step @p5155 :rule chain_m_resolution :premises (@p5154 @p5152 @p2032 @p2030 @p136 @p134 @p5151 @p5149 @p133 @p131 @p130 @p128 @p127 @p125 @p5148 @p5146 @p110) :args ((or @t4392 @t239) @t267 (@list @t4397 @t1948 @t1950 @t248 @t249 @t1937 @t4395 @t245 @t247 @t242 @t243 @t240 @t241 @t4391 @t4393 @t220))) % 40.01/40.20 (step @p5156 :rule instantiate :premises (@p119) :args (@t4394)) % 40.01/40.20 (step @p5157 :rule cnf_or_pos :args (@t4399)) % 40.01/40.20 (step @p5158 :rule reordering :premises (@p5157) :args ((or @t270 @t4392 @t4398 @t3440 (not @t4399)))) % 40.01/40.20 (step @p5159 :rule instantiate :premises (@p120) :args (@t1934)) % 40.01/40.20 (step @p5160 :rule cnf_or_pos :args (@t4402)) % 40.01/40.20 (step @p5161 :rule reordering :premises (@p5160) :args ((or @t4401 @t4400 @t1935 (not @t4402)))) % 40.01/40.20 (step @p5162 :rule instantiate :premises (@p121) :args (@t1933)) % 40.01/40.20 (step @p5163 :rule cnf_or_pos :args (@t4404)) % 40.01/40.20 (step @p5164 :rule reordering :premises (@p5163) :args ((or @t1943 @t4383 @t4403 (not @t4404)))) % 40.01/40.20 (step @p5165 :rule chain_m_resolution :premises (@p4393 @p4391 @p1115 @p4420 @p4418 @p66 @p4396 @p4394 @p67 @p4417 @p4415 @p1144 @p4369 @p4367 @p1086 @p4444 @p4442 @p65 @p4372 @p4370 @p68 @p4441 @p4439 @p1173 @p4345 @p4343 @p1057 @p4468 @p4466 @p64 @p4348 @p4346 @p69 @p4465 @p4463 @p1202 @p4321 @p4319 @p1028 @p4492 @p4490 @p63 @p4324 @p4322 @p70 @p4489 @p4487 @p1231 @p4297 @p4295 @p999 @p4516 @p4514 @p62 @p4300 @p4298 @p71 @p4513 @p4511 @p1260 @p4273 @p4271 @p970 @p4540 @p4538 @p61 @p4276 @p4274 @p72 @p4537 @p4535 @p1289 @p4249 @p4247 @p941 @p4564 @p4562 @p60 @p4252 @p4250 @p73 @p4561 @p4559 @p1318 @p4225 @p4223 @p912 @p4588 @p4586 @p59 @p4228 @p4226 @p74 @p4585 @p4583 @p1347 @p4201 @p4199 @p883 @p4612 @p4610 @p58 @p4204 @p4202 @p75 @p4609 @p4607 @p1376 @p4177 @p4175 @p854 @p4636 @p4634 @p57 @p4180 @p4178 @p76 @p4633 @p4631 @p1405 @p4153 @p4151 @p825 @p4660 @p4658 @p56 @p4156 @p4154 @p77 @p4657 @p4655 @p1434 @p4129 @p4127 @p796 @p4684 @p4682 @p55 @p4132 @p4130 @p78 @p4681 @p4679 @p1463 @p4105 @p4103 @p767 @p4708 @p4706 @p54 @p4108 @p4106 @p79 @p4705 @p4703 @p1492 @p4081 @p4079 @p738 @p4732 @p4730 @p53 @p4084 @p4082 @p80 @p4729 @p4727 @p1521 @p4057 @p4055 @p709 @p4756 @p4754 @p52 @p4060 @p4058 @p81 @p4753 @p4751 @p1550 @p4033 @p4031 @p680 @p4780 @p4778 @p51 @p4036 @p4034 @p82 @p4777 @p4775 @p1579 @p4009 @p4007 @p651 @p4804 @p4802 @p50 @p4012 @p4010 @p83 @p4801 @p4799 @p1608 @p3985 @p3983 @p622 @p4828 @p4826 @p49 @p3988 @p3986 @p84 @p4825 @p4823 @p1637 @p3961 @p3959 @p593 @p4852 @p4850 @p48 @p3964 @p3962 @p85 @p4849 @p4847 @p1666 @p3937 @p3935 @p564 @p4876 @p4874 @p47 @p3940 @p3938 @p86 @p4873 @p4871 @p1695 @p3913 @p3911 @p535 @p4900 @p4898 @p46 @p3916 @p3914 @p87 @p4897 @p4895 @p1724 @p3889 @p3887 @p506 @p4924 @p4922 @p45 @p3892 @p3890 @p88 @p4921 @p4919 @p1753 @p3865 @p3863 @p477 @p4948 @p4946 @p44 @p3868 @p3866 @p89 @p4945 @p4943 @p1782 @p3841 @p3839 @p448 @p4972 @p4970 @p43 @p3844 @p3842 @p90 @p4969 @p4967 @p1811 @p3817 @p3815 @p419 @p4996 @p4994 @p42 @p3820 @p3818 @p91 @p4993 @p4991 @p1840 @p3793 @p3791 @p390 @p5020 @p5018 @p41 @p3796 @p3794 @p92 @p5017 @p5015 @p1869 @p3769 @p3767 @p361 @p5044 @p5042 @p40 @p3772 @p3770 @p93 @p5041 @p5039 @p1898 @p3745 @p3743 @p332 @p5068 @p5066 @p39 @p3748 @p3746 @p94 @p5065 @p5063 @p1927 @p3721 @p3719 @p303 @p5092 @p5090 @p38 @p3724 @p3722 @p95 @p5089 @p5087 @p1956 @p3697 @p3695 @p274 @p5116 @p5114 @p37 @p3700 @p3698 @p96 @p5113 @p5111 @p1985 @p3673 @p3671 @p245 @p5140 @p5138 @p36 @p3676 @p3674 @p97 @p5137 @p5135 @p2014 @p3649 @p3647 @p216 @p5164 @p5162 @p35 @p3652 @p3650 @p98 @p5161 @p5159 @p2043 @p3628 @p3626 @p187 @p5158 @p5156 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5155) :args (@t4392 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3922 @t1103 @t3918 @t3939 @t66 @t3921 @t3924 @t67 @t3936 @t3937 @t1129 @t3903 @t3907 @t1077 @t3933 @t3954 @t65 @t3906 @t3909 @t68 @t3951 @t3952 @t1155 @t3888 @t3892 @t1051 @t3948 @t3969 @t64 @t3891 @t3894 @t69 @t3966 @t3967 @t1181 @t3873 @t3877 @t1025 @t3963 @t3984 @t63 @t3876 @t3879 @t70 @t3981 @t3982 @t1207 @t3858 @t3862 @t999 @t3978 @t3999 @t62 @t3861 @t3864 @t71 @t3996 @t3997 @t1233 @t3843 @t3847 @t973 @t3993 @t4014 @t61 @t3846 @t3849 @t72 @t4011 @t4012 @t1259 @t3828 @t3832 @t947 @t4008 @t4029 @t60 @t3831 @t3834 @t73 @t4026 @t4027 @t1285 @t3813 @t3817 @t921 @t4023 @t4044 @t59 @t3816 @t3819 @t74 @t4041 @t4042 @t1311 @t3798 @t3802 @t895 @t4038 @t4059 @t58 @t3801 @t3804 @t75 @t4056 @t4057 @t1337 @t3783 @t3787 @t869 @t4053 @t4074 @t57 @t3786 @t3789 @t76 @t4071 @t4072 @t1363 @t3768 @t3772 @t843 @t4068 @t4089 @t56 @t3771 @t3774 @t77 @t4086 @t4087 @t1389 @t3753 @t3757 @t817 @t4083 @t4104 @t55 @t3756 @t3759 @t78 @t4101 @t4102 @t1415 @t3738 @t3742 @t791 @t4098 @t4119 @t54 @t3741 @t3744 @t79 @t4116 @t4117 @t1441 @t3723 @t3727 @t765 @t4113 @t4134 @t53 @t3726 @t3729 @t80 @t4131 @t4132 @t1467 @t3708 @t3712 @t739 @t4128 @t4149 @t52 @t3711 @t3714 @t81 @t4146 @t4147 @t1493 @t3693 @t3697 @t713 @t4143 @t4164 @t51 @t3696 @t3699 @t82 @t4161 @t4162 @t1519 @t3678 @t3682 @t687 @t4158 @t4179 @t50 @t3681 @t3684 @t83 @t4176 @t4177 @t1545 @t3663 @t3667 @t661 @t4173 @t4194 @t49 @t3666 @t3669 @t84 @t4191 @t4192 @t1571 @t3648 @t3652 @t635 @t4188 @t4209 @t48 @t3651 @t3654 @t85 @t4206 @t4207 @t1597 @t3633 @t3637 @t609 @t4203 @t4224 @t47 @t3636 @t3639 @t86 @t4221 @t4222 @t1623 @t3618 @t3622 @t583 @t4218 @t4239 @t46 @t3621 @t3624 @t87 @t4236 @t4237 @t1649 @t3603 @t3607 @t557 @t4233 @t4254 @t45 @t3606 @t3609 @t88 @t4251 @t4252 @t1675 @t3588 @t3592 @t531 @t4248 @t4269 @t44 @t3591 @t3594 @t89 @t4266 @t4267 @t1701 @t3573 @t3577 @t505 @t4263 @t4284 @t43 @t3576 @t3579 @t90 @t4281 @t4282 @t1727 @t3558 @t3562 @t479 @t4278 @t4299 @t42 @t3561 @t3564 @t91 @t4296 @t4297 @t1753 @t3543 @t3547 @t453 @t4293 @t4314 @t41 @t3546 @t3549 @t92 @t4311 @t4312 @t1779 @t3528 @t3532 @t427 @t4308 @t4329 @t40 @t3531 @t3534 @t93 @t4326 @t4327 @t1805 @t3513 @t3517 @t401 @t4323 @t4344 @t39 @t3516 @t3519 @t94 @t4341 @t4342 @t1831 @t3498 @t3502 @t375 @t4338 @t4359 @t38 @t3501 @t3504 @t95 @t4356 @t4357 @t1857 @t3483 @t3487 @t349 @t4353 @t4374 @t37 @t3486 @t3489 @t96 @t4371 @t4372 @t1883 @t3468 @t3472 @t323 @t4368 @t4389 @t36 @t3471 @t3474 @t97 @t4386 @t4387 @t1909 @t3453 @t3457 @t297 @t4383 @t4404 @t35 @t3456 @t3459 @t98 @t4401 @t4402 @t1935 @t3441 @t3444 @t276 @t4398 @t4399 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6153 @t220) % 40.01/40.20 (step @p5167 :rule instantiate :premises (@p110) :args (@t4405)) % 40.01/40.20 (step-pop @p6154 :rule scope :premises (@p5167)) % 40.01/40.20 (step @p5168 :rule process_scope :premises (@p6154) :args (@t4408)) % 40.01/40.20 (step @p5170 :rule implies_elim :premises (@p5168)) % 40.01/40.20 (step @p5171 :rule cnf_or_pos :args (@t4408)) % 40.01/40.20 (step @p5172 :rule reordering :premises (@p5171) :args ((or @t4407 @t4406 (not @t4408)))) % 40.01/40.20 (step @p5173 :rule instantiate :premises (@p112) :args (@t4409)) % 40.01/40.20 (step @p5174 :rule cnf_or_pos :args (@t4410)) % 40.01/40.20 (step @p5175 :rule reordering :premises (@p5174) :args ((or @t4407 @t244 @t1963 (not @t4410)))) % 40.01/40.20 (step @p5176 :rule instantiate :premises (@p108) :args (@t4405)) % 40.01/40.20 (step @p5177 :rule cnf_or_pos :args (@t4412)) % 40.01/40.20 (step @p5178 :rule reordering :premises (@p5177) :args ((or @t1974 @t265 @t264 @t4411 (not @t4412)))) % 40.01/40.20 (step @p5179 :rule chain_m_resolution :premises (@p5178 @p5176 @p2061 @p2059 @p136 @p134 @p5175 @p5173 @p133 @p131 @p130 @p128 @p127 @p125 @p5172 @p5170 @p110) :args ((or @t4407 @t239) @t267 (@list @t4412 @t1974 @t1976 @t248 @t249 @t1963 @t4410 @t245 @t247 @t242 @t243 @t240 @t241 @t4406 @t4408 @t220))) % 40.01/40.20 (step @p5180 :rule instantiate :premises (@p119) :args (@t4409)) % 40.01/40.20 (step @p5181 :rule cnf_or_pos :args (@t4414)) % 40.01/40.20 (step @p5182 :rule reordering :premises (@p5181) :args ((or @t270 @t4407 @t4413 @t3440 (not @t4414)))) % 40.01/40.20 (step @p5183 :rule instantiate :premises (@p120) :args (@t1960)) % 40.01/40.20 (step @p5184 :rule cnf_or_pos :args (@t4417)) % 40.01/40.20 (step @p5185 :rule reordering :premises (@p5184) :args ((or @t4416 @t4415 @t1961 (not @t4417)))) % 40.01/40.20 (step @p5186 :rule instantiate :premises (@p121) :args (@t1959)) % 40.01/40.20 (step @p5187 :rule cnf_or_pos :args (@t4419)) % 40.01/40.20 (step @p5188 :rule reordering :premises (@p5187) :args ((or @t1969 @t4398 @t4418 (not @t4419)))) % 40.01/40.20 (step @p5189 :rule chain_m_resolution :premises (@p4420 @p4418 @p66 @p4417 @p4415 @p1144 @p4393 @p4391 @p1115 @p4444 @p4442 @p65 @p4396 @p4394 @p67 @p4441 @p4439 @p1173 @p4369 @p4367 @p1086 @p4468 @p4466 @p64 @p4372 @p4370 @p68 @p4465 @p4463 @p1202 @p4345 @p4343 @p1057 @p4492 @p4490 @p63 @p4348 @p4346 @p69 @p4489 @p4487 @p1231 @p4321 @p4319 @p1028 @p4516 @p4514 @p62 @p4324 @p4322 @p70 @p4513 @p4511 @p1260 @p4297 @p4295 @p999 @p4540 @p4538 @p61 @p4300 @p4298 @p71 @p4537 @p4535 @p1289 @p4273 @p4271 @p970 @p4564 @p4562 @p60 @p4276 @p4274 @p72 @p4561 @p4559 @p1318 @p4249 @p4247 @p941 @p4588 @p4586 @p59 @p4252 @p4250 @p73 @p4585 @p4583 @p1347 @p4225 @p4223 @p912 @p4612 @p4610 @p58 @p4228 @p4226 @p74 @p4609 @p4607 @p1376 @p4201 @p4199 @p883 @p4636 @p4634 @p57 @p4204 @p4202 @p75 @p4633 @p4631 @p1405 @p4177 @p4175 @p854 @p4660 @p4658 @p56 @p4180 @p4178 @p76 @p4657 @p4655 @p1434 @p4153 @p4151 @p825 @p4684 @p4682 @p55 @p4156 @p4154 @p77 @p4681 @p4679 @p1463 @p4129 @p4127 @p796 @p4708 @p4706 @p54 @p4132 @p4130 @p78 @p4705 @p4703 @p1492 @p4105 @p4103 @p767 @p4732 @p4730 @p53 @p4108 @p4106 @p79 @p4729 @p4727 @p1521 @p4081 @p4079 @p738 @p4756 @p4754 @p52 @p4084 @p4082 @p80 @p4753 @p4751 @p1550 @p4057 @p4055 @p709 @p4780 @p4778 @p51 @p4060 @p4058 @p81 @p4777 @p4775 @p1579 @p4033 @p4031 @p680 @p4804 @p4802 @p50 @p4036 @p4034 @p82 @p4801 @p4799 @p1608 @p4009 @p4007 @p651 @p4828 @p4826 @p49 @p4012 @p4010 @p83 @p4825 @p4823 @p1637 @p3985 @p3983 @p622 @p4852 @p4850 @p48 @p3988 @p3986 @p84 @p4849 @p4847 @p1666 @p3961 @p3959 @p593 @p4876 @p4874 @p47 @p3964 @p3962 @p85 @p4873 @p4871 @p1695 @p3937 @p3935 @p564 @p4900 @p4898 @p46 @p3940 @p3938 @p86 @p4897 @p4895 @p1724 @p3913 @p3911 @p535 @p4924 @p4922 @p45 @p3916 @p3914 @p87 @p4921 @p4919 @p1753 @p3889 @p3887 @p506 @p4948 @p4946 @p44 @p3892 @p3890 @p88 @p4945 @p4943 @p1782 @p3865 @p3863 @p477 @p4972 @p4970 @p43 @p3868 @p3866 @p89 @p4969 @p4967 @p1811 @p3841 @p3839 @p448 @p4996 @p4994 @p42 @p3844 @p3842 @p90 @p4993 @p4991 @p1840 @p3817 @p3815 @p419 @p5020 @p5018 @p41 @p3820 @p3818 @p91 @p5017 @p5015 @p1869 @p3793 @p3791 @p390 @p5044 @p5042 @p40 @p3796 @p3794 @p92 @p5041 @p5039 @p1898 @p3769 @p3767 @p361 @p5068 @p5066 @p39 @p3772 @p3770 @p93 @p5065 @p5063 @p1927 @p3745 @p3743 @p332 @p5092 @p5090 @p38 @p3748 @p3746 @p94 @p5089 @p5087 @p1956 @p3721 @p3719 @p303 @p5116 @p5114 @p37 @p3724 @p3722 @p95 @p5113 @p5111 @p1985 @p3697 @p3695 @p274 @p5140 @p5138 @p36 @p3700 @p3698 @p96 @p5137 @p5135 @p2014 @p3673 @p3671 @p245 @p5164 @p5162 @p35 @p3676 @p3674 @p97 @p5161 @p5159 @p2043 @p3649 @p3647 @p216 @p5188 @p5186 @p34 @p3652 @p3650 @p98 @p5185 @p5183 @p2072 @p3628 @p3626 @p187 @p5182 @p5180 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5179) :args (@t4407 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3939 @t66 @t3936 @t3937 @t1129 @t3918 @t3922 @t1103 @t3933 @t3954 @t65 @t3921 @t3924 @t67 @t3951 @t3952 @t1155 @t3903 @t3907 @t1077 @t3948 @t3969 @t64 @t3906 @t3909 @t68 @t3966 @t3967 @t1181 @t3888 @t3892 @t1051 @t3963 @t3984 @t63 @t3891 @t3894 @t69 @t3981 @t3982 @t1207 @t3873 @t3877 @t1025 @t3978 @t3999 @t62 @t3876 @t3879 @t70 @t3996 @t3997 @t1233 @t3858 @t3862 @t999 @t3993 @t4014 @t61 @t3861 @t3864 @t71 @t4011 @t4012 @t1259 @t3843 @t3847 @t973 @t4008 @t4029 @t60 @t3846 @t3849 @t72 @t4026 @t4027 @t1285 @t3828 @t3832 @t947 @t4023 @t4044 @t59 @t3831 @t3834 @t73 @t4041 @t4042 @t1311 @t3813 @t3817 @t921 @t4038 @t4059 @t58 @t3816 @t3819 @t74 @t4056 @t4057 @t1337 @t3798 @t3802 @t895 @t4053 @t4074 @t57 @t3801 @t3804 @t75 @t4071 @t4072 @t1363 @t3783 @t3787 @t869 @t4068 @t4089 @t56 @t3786 @t3789 @t76 @t4086 @t4087 @t1389 @t3768 @t3772 @t843 @t4083 @t4104 @t55 @t3771 @t3774 @t77 @t4101 @t4102 @t1415 @t3753 @t3757 @t817 @t4098 @t4119 @t54 @t3756 @t3759 @t78 @t4116 @t4117 @t1441 @t3738 @t3742 @t791 @t4113 @t4134 @t53 @t3741 @t3744 @t79 @t4131 @t4132 @t1467 @t3723 @t3727 @t765 @t4128 @t4149 @t52 @t3726 @t3729 @t80 @t4146 @t4147 @t1493 @t3708 @t3712 @t739 @t4143 @t4164 @t51 @t3711 @t3714 @t81 @t4161 @t4162 @t1519 @t3693 @t3697 @t713 @t4158 @t4179 @t50 @t3696 @t3699 @t82 @t4176 @t4177 @t1545 @t3678 @t3682 @t687 @t4173 @t4194 @t49 @t3681 @t3684 @t83 @t4191 @t4192 @t1571 @t3663 @t3667 @t661 @t4188 @t4209 @t48 @t3666 @t3669 @t84 @t4206 @t4207 @t1597 @t3648 @t3652 @t635 @t4203 @t4224 @t47 @t3651 @t3654 @t85 @t4221 @t4222 @t1623 @t3633 @t3637 @t609 @t4218 @t4239 @t46 @t3636 @t3639 @t86 @t4236 @t4237 @t1649 @t3618 @t3622 @t583 @t4233 @t4254 @t45 @t3621 @t3624 @t87 @t4251 @t4252 @t1675 @t3603 @t3607 @t557 @t4248 @t4269 @t44 @t3606 @t3609 @t88 @t4266 @t4267 @t1701 @t3588 @t3592 @t531 @t4263 @t4284 @t43 @t3591 @t3594 @t89 @t4281 @t4282 @t1727 @t3573 @t3577 @t505 @t4278 @t4299 @t42 @t3576 @t3579 @t90 @t4296 @t4297 @t1753 @t3558 @t3562 @t479 @t4293 @t4314 @t41 @t3561 @t3564 @t91 @t4311 @t4312 @t1779 @t3543 @t3547 @t453 @t4308 @t4329 @t40 @t3546 @t3549 @t92 @t4326 @t4327 @t1805 @t3528 @t3532 @t427 @t4323 @t4344 @t39 @t3531 @t3534 @t93 @t4341 @t4342 @t1831 @t3513 @t3517 @t401 @t4338 @t4359 @t38 @t3516 @t3519 @t94 @t4356 @t4357 @t1857 @t3498 @t3502 @t375 @t4353 @t4374 @t37 @t3501 @t3504 @t95 @t4371 @t4372 @t1883 @t3483 @t3487 @t349 @t4368 @t4389 @t36 @t3486 @t3489 @t96 @t4386 @t4387 @t1909 @t3468 @t3472 @t323 @t4383 @t4404 @t35 @t3471 @t3474 @t97 @t4401 @t4402 @t1935 @t3453 @t3457 @t297 @t4398 @t4419 @t34 @t3456 @t3459 @t98 @t4416 @t4417 @t1961 @t3441 @t3444 @t276 @t4413 @t4414 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6155 @t220) % 40.01/40.20 (step @p5191 :rule instantiate :premises (@p110) :args (@t4420)) % 40.01/40.20 (step-pop @p6156 :rule scope :premises (@p5191)) % 40.01/40.20 (step @p5192 :rule process_scope :premises (@p6156) :args (@t4423)) % 40.01/40.20 (step @p5194 :rule implies_elim :premises (@p5192)) % 40.01/40.20 (step @p5195 :rule cnf_or_pos :args (@t4423)) % 40.01/40.20 (step @p5196 :rule reordering :premises (@p5195) :args ((or @t4422 @t4421 (not @t4423)))) % 40.01/40.20 (step @p5197 :rule instantiate :premises (@p112) :args (@t4424)) % 40.01/40.20 (step @p5198 :rule cnf_or_pos :args (@t4425)) % 40.01/40.20 (step @p5199 :rule reordering :premises (@p5198) :args ((or @t4422 @t244 @t1989 (not @t4425)))) % 40.01/40.20 (step @p5200 :rule instantiate :premises (@p108) :args (@t4420)) % 40.01/40.20 (step @p5201 :rule cnf_or_pos :args (@t4427)) % 40.01/40.20 (step @p5202 :rule reordering :premises (@p5201) :args ((or @t2000 @t265 @t264 @t4426 (not @t4427)))) % 40.01/40.20 (step @p5203 :rule chain_m_resolution :premises (@p5202 @p5200 @p2090 @p2088 @p136 @p134 @p5199 @p5197 @p133 @p131 @p130 @p128 @p127 @p125 @p5196 @p5194 @p110) :args ((or @t4422 @t239) @t267 (@list @t4427 @t2000 @t2002 @t248 @t249 @t1989 @t4425 @t245 @t247 @t242 @t243 @t240 @t241 @t4421 @t4423 @t220))) % 40.01/40.20 (step @p5204 :rule instantiate :premises (@p119) :args (@t4424)) % 40.01/40.20 (step @p5205 :rule cnf_or_pos :args (@t4429)) % 40.01/40.20 (step @p5206 :rule reordering :premises (@p5205) :args ((or @t270 @t4422 @t4428 @t3440 (not @t4429)))) % 40.01/40.20 (step @p5207 :rule instantiate :premises (@p120) :args (@t1986)) % 40.01/40.20 (step @p5208 :rule cnf_or_pos :args (@t4432)) % 40.01/40.20 (step @p5209 :rule reordering :premises (@p5208) :args ((or @t4431 @t4430 @t1987 (not @t4432)))) % 40.01/40.20 (step @p5210 :rule instantiate :premises (@p121) :args (@t1985)) % 40.01/40.20 (step @p5211 :rule cnf_or_pos :args (@t4434)) % 40.01/40.20 (step @p5212 :rule reordering :premises (@p5211) :args ((or @t1995 @t4413 @t4433 (not @t4434)))) % 40.01/40.20 (step @p5213 :rule chain_m_resolution :premises (@p4417 @p4415 @p1144 @p4444 @p4442 @p65 @p4420 @p4418 @p66 @p4441 @p4439 @p1173 @p4393 @p4391 @p1115 @p4468 @p4466 @p64 @p4396 @p4394 @p67 @p4465 @p4463 @p1202 @p4369 @p4367 @p1086 @p4492 @p4490 @p63 @p4372 @p4370 @p68 @p4489 @p4487 @p1231 @p4345 @p4343 @p1057 @p4516 @p4514 @p62 @p4348 @p4346 @p69 @p4513 @p4511 @p1260 @p4321 @p4319 @p1028 @p4540 @p4538 @p61 @p4324 @p4322 @p70 @p4537 @p4535 @p1289 @p4297 @p4295 @p999 @p4564 @p4562 @p60 @p4300 @p4298 @p71 @p4561 @p4559 @p1318 @p4273 @p4271 @p970 @p4588 @p4586 @p59 @p4276 @p4274 @p72 @p4585 @p4583 @p1347 @p4249 @p4247 @p941 @p4612 @p4610 @p58 @p4252 @p4250 @p73 @p4609 @p4607 @p1376 @p4225 @p4223 @p912 @p4636 @p4634 @p57 @p4228 @p4226 @p74 @p4633 @p4631 @p1405 @p4201 @p4199 @p883 @p4660 @p4658 @p56 @p4204 @p4202 @p75 @p4657 @p4655 @p1434 @p4177 @p4175 @p854 @p4684 @p4682 @p55 @p4180 @p4178 @p76 @p4681 @p4679 @p1463 @p4153 @p4151 @p825 @p4708 @p4706 @p54 @p4156 @p4154 @p77 @p4705 @p4703 @p1492 @p4129 @p4127 @p796 @p4732 @p4730 @p53 @p4132 @p4130 @p78 @p4729 @p4727 @p1521 @p4105 @p4103 @p767 @p4756 @p4754 @p52 @p4108 @p4106 @p79 @p4753 @p4751 @p1550 @p4081 @p4079 @p738 @p4780 @p4778 @p51 @p4084 @p4082 @p80 @p4777 @p4775 @p1579 @p4057 @p4055 @p709 @p4804 @p4802 @p50 @p4060 @p4058 @p81 @p4801 @p4799 @p1608 @p4033 @p4031 @p680 @p4828 @p4826 @p49 @p4036 @p4034 @p82 @p4825 @p4823 @p1637 @p4009 @p4007 @p651 @p4852 @p4850 @p48 @p4012 @p4010 @p83 @p4849 @p4847 @p1666 @p3985 @p3983 @p622 @p4876 @p4874 @p47 @p3988 @p3986 @p84 @p4873 @p4871 @p1695 @p3961 @p3959 @p593 @p4900 @p4898 @p46 @p3964 @p3962 @p85 @p4897 @p4895 @p1724 @p3937 @p3935 @p564 @p4924 @p4922 @p45 @p3940 @p3938 @p86 @p4921 @p4919 @p1753 @p3913 @p3911 @p535 @p4948 @p4946 @p44 @p3916 @p3914 @p87 @p4945 @p4943 @p1782 @p3889 @p3887 @p506 @p4972 @p4970 @p43 @p3892 @p3890 @p88 @p4969 @p4967 @p1811 @p3865 @p3863 @p477 @p4996 @p4994 @p42 @p3868 @p3866 @p89 @p4993 @p4991 @p1840 @p3841 @p3839 @p448 @p5020 @p5018 @p41 @p3844 @p3842 @p90 @p5017 @p5015 @p1869 @p3817 @p3815 @p419 @p5044 @p5042 @p40 @p3820 @p3818 @p91 @p5041 @p5039 @p1898 @p3793 @p3791 @p390 @p5068 @p5066 @p39 @p3796 @p3794 @p92 @p5065 @p5063 @p1927 @p3769 @p3767 @p361 @p5092 @p5090 @p38 @p3772 @p3770 @p93 @p5089 @p5087 @p1956 @p3745 @p3743 @p332 @p5116 @p5114 @p37 @p3748 @p3746 @p94 @p5113 @p5111 @p1985 @p3721 @p3719 @p303 @p5140 @p5138 @p36 @p3724 @p3722 @p95 @p5137 @p5135 @p2014 @p3697 @p3695 @p274 @p5164 @p5162 @p35 @p3700 @p3698 @p96 @p5161 @p5159 @p2043 @p3673 @p3671 @p245 @p5188 @p5186 @p34 @p3676 @p3674 @p97 @p5185 @p5183 @p2072 @p3649 @p3647 @p216 @p5212 @p5210 @p33 @p3652 @p3650 @p98 @p5209 @p5207 @p2101 @p3628 @p3626 @p187 @p5206 @p5204 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5203) :args (@t4422 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3937 @t1129 @t3933 @t3954 @t65 @t3936 @t3939 @t66 @t3951 @t3952 @t1155 @t3918 @t3922 @t1103 @t3948 @t3969 @t64 @t3921 @t3924 @t67 @t3966 @t3967 @t1181 @t3903 @t3907 @t1077 @t3963 @t3984 @t63 @t3906 @t3909 @t68 @t3981 @t3982 @t1207 @t3888 @t3892 @t1051 @t3978 @t3999 @t62 @t3891 @t3894 @t69 @t3996 @t3997 @t1233 @t3873 @t3877 @t1025 @t3993 @t4014 @t61 @t3876 @t3879 @t70 @t4011 @t4012 @t1259 @t3858 @t3862 @t999 @t4008 @t4029 @t60 @t3861 @t3864 @t71 @t4026 @t4027 @t1285 @t3843 @t3847 @t973 @t4023 @t4044 @t59 @t3846 @t3849 @t72 @t4041 @t4042 @t1311 @t3828 @t3832 @t947 @t4038 @t4059 @t58 @t3831 @t3834 @t73 @t4056 @t4057 @t1337 @t3813 @t3817 @t921 @t4053 @t4074 @t57 @t3816 @t3819 @t74 @t4071 @t4072 @t1363 @t3798 @t3802 @t895 @t4068 @t4089 @t56 @t3801 @t3804 @t75 @t4086 @t4087 @t1389 @t3783 @t3787 @t869 @t4083 @t4104 @t55 @t3786 @t3789 @t76 @t4101 @t4102 @t1415 @t3768 @t3772 @t843 @t4098 @t4119 @t54 @t3771 @t3774 @t77 @t4116 @t4117 @t1441 @t3753 @t3757 @t817 @t4113 @t4134 @t53 @t3756 @t3759 @t78 @t4131 @t4132 @t1467 @t3738 @t3742 @t791 @t4128 @t4149 @t52 @t3741 @t3744 @t79 @t4146 @t4147 @t1493 @t3723 @t3727 @t765 @t4143 @t4164 @t51 @t3726 @t3729 @t80 @t4161 @t4162 @t1519 @t3708 @t3712 @t739 @t4158 @t4179 @t50 @t3711 @t3714 @t81 @t4176 @t4177 @t1545 @t3693 @t3697 @t713 @t4173 @t4194 @t49 @t3696 @t3699 @t82 @t4191 @t4192 @t1571 @t3678 @t3682 @t687 @t4188 @t4209 @t48 @t3681 @t3684 @t83 @t4206 @t4207 @t1597 @t3663 @t3667 @t661 @t4203 @t4224 @t47 @t3666 @t3669 @t84 @t4221 @t4222 @t1623 @t3648 @t3652 @t635 @t4218 @t4239 @t46 @t3651 @t3654 @t85 @t4236 @t4237 @t1649 @t3633 @t3637 @t609 @t4233 @t4254 @t45 @t3636 @t3639 @t86 @t4251 @t4252 @t1675 @t3618 @t3622 @t583 @t4248 @t4269 @t44 @t3621 @t3624 @t87 @t4266 @t4267 @t1701 @t3603 @t3607 @t557 @t4263 @t4284 @t43 @t3606 @t3609 @t88 @t4281 @t4282 @t1727 @t3588 @t3592 @t531 @t4278 @t4299 @t42 @t3591 @t3594 @t89 @t4296 @t4297 @t1753 @t3573 @t3577 @t505 @t4293 @t4314 @t41 @t3576 @t3579 @t90 @t4311 @t4312 @t1779 @t3558 @t3562 @t479 @t4308 @t4329 @t40 @t3561 @t3564 @t91 @t4326 @t4327 @t1805 @t3543 @t3547 @t453 @t4323 @t4344 @t39 @t3546 @t3549 @t92 @t4341 @t4342 @t1831 @t3528 @t3532 @t427 @t4338 @t4359 @t38 @t3531 @t3534 @t93 @t4356 @t4357 @t1857 @t3513 @t3517 @t401 @t4353 @t4374 @t37 @t3516 @t3519 @t94 @t4371 @t4372 @t1883 @t3498 @t3502 @t375 @t4368 @t4389 @t36 @t3501 @t3504 @t95 @t4386 @t4387 @t1909 @t3483 @t3487 @t349 @t4383 @t4404 @t35 @t3486 @t3489 @t96 @t4401 @t4402 @t1935 @t3468 @t3472 @t323 @t4398 @t4419 @t34 @t3471 @t3474 @t97 @t4416 @t4417 @t1961 @t3453 @t3457 @t297 @t4413 @t4434 @t33 @t3456 @t3459 @t98 @t4431 @t4432 @t1987 @t3441 @t3444 @t276 @t4428 @t4429 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6157 @t220) % 40.01/40.20 (step @p5215 :rule instantiate :premises (@p110) :args (@t4435)) % 40.01/40.20 (step-pop @p6158 :rule scope :premises (@p5215)) % 40.01/40.20 (step @p5216 :rule process_scope :premises (@p6158) :args (@t4438)) % 40.01/40.20 (step @p5218 :rule implies_elim :premises (@p5216)) % 40.01/40.20 (step @p5219 :rule cnf_or_pos :args (@t4438)) % 40.01/40.20 (step @p5220 :rule reordering :premises (@p5219) :args ((or @t4437 @t4436 (not @t4438)))) % 40.01/40.20 (step @p5221 :rule instantiate :premises (@p112) :args (@t4439)) % 40.01/40.20 (step @p5222 :rule cnf_or_pos :args (@t4440)) % 40.01/40.20 (step @p5223 :rule reordering :premises (@p5222) :args ((or @t4437 @t244 @t2015 (not @t4440)))) % 40.01/40.20 (step @p5224 :rule instantiate :premises (@p108) :args (@t4435)) % 40.01/40.20 (step @p5225 :rule cnf_or_pos :args (@t4442)) % 40.01/40.20 (step @p5226 :rule reordering :premises (@p5225) :args ((or @t2026 @t265 @t264 @t4441 (not @t4442)))) % 40.01/40.20 (step @p5227 :rule chain_m_resolution :premises (@p5226 @p5224 @p2119 @p2117 @p136 @p134 @p5223 @p5221 @p133 @p131 @p130 @p128 @p127 @p125 @p5220 @p5218 @p110) :args ((or @t4437 @t239) @t267 (@list @t4442 @t2026 @t2028 @t248 @t249 @t2015 @t4440 @t245 @t247 @t242 @t243 @t240 @t241 @t4436 @t4438 @t220))) % 40.01/40.20 (step @p5228 :rule instantiate :premises (@p119) :args (@t4439)) % 40.01/40.20 (step @p5229 :rule cnf_or_pos :args (@t4444)) % 40.01/40.20 (step @p5230 :rule reordering :premises (@p5229) :args ((or @t270 @t4437 @t4443 @t3440 (not @t4444)))) % 40.01/40.20 (step @p5231 :rule instantiate :premises (@p120) :args (@t2012)) % 40.01/40.20 (step @p5232 :rule cnf_or_pos :args (@t4447)) % 40.01/40.20 (step @p5233 :rule reordering :premises (@p5232) :args ((or @t4446 @t4445 @t2013 (not @t4447)))) % 40.01/40.20 (step @p5234 :rule instantiate :premises (@p121) :args (@t2011)) % 40.01/40.20 (step @p5235 :rule cnf_or_pos :args (@t4449)) % 40.01/40.20 (step @p5236 :rule reordering :premises (@p5235) :args ((or @t2021 @t4428 @t4448 (not @t4449)))) % 40.01/40.20 (step @p5237 :rule chain_m_resolution :premises (@p4444 @p4442 @p65 @p4441 @p4439 @p1173 @p4417 @p4415 @p1144 @p4468 @p4466 @p64 @p4420 @p4418 @p66 @p4465 @p4463 @p1202 @p4393 @p4391 @p1115 @p4492 @p4490 @p63 @p4396 @p4394 @p67 @p4489 @p4487 @p1231 @p4369 @p4367 @p1086 @p4516 @p4514 @p62 @p4372 @p4370 @p68 @p4513 @p4511 @p1260 @p4345 @p4343 @p1057 @p4540 @p4538 @p61 @p4348 @p4346 @p69 @p4537 @p4535 @p1289 @p4321 @p4319 @p1028 @p4564 @p4562 @p60 @p4324 @p4322 @p70 @p4561 @p4559 @p1318 @p4297 @p4295 @p999 @p4588 @p4586 @p59 @p4300 @p4298 @p71 @p4585 @p4583 @p1347 @p4273 @p4271 @p970 @p4612 @p4610 @p58 @p4276 @p4274 @p72 @p4609 @p4607 @p1376 @p4249 @p4247 @p941 @p4636 @p4634 @p57 @p4252 @p4250 @p73 @p4633 @p4631 @p1405 @p4225 @p4223 @p912 @p4660 @p4658 @p56 @p4228 @p4226 @p74 @p4657 @p4655 @p1434 @p4201 @p4199 @p883 @p4684 @p4682 @p55 @p4204 @p4202 @p75 @p4681 @p4679 @p1463 @p4177 @p4175 @p854 @p4708 @p4706 @p54 @p4180 @p4178 @p76 @p4705 @p4703 @p1492 @p4153 @p4151 @p825 @p4732 @p4730 @p53 @p4156 @p4154 @p77 @p4729 @p4727 @p1521 @p4129 @p4127 @p796 @p4756 @p4754 @p52 @p4132 @p4130 @p78 @p4753 @p4751 @p1550 @p4105 @p4103 @p767 @p4780 @p4778 @p51 @p4108 @p4106 @p79 @p4777 @p4775 @p1579 @p4081 @p4079 @p738 @p4804 @p4802 @p50 @p4084 @p4082 @p80 @p4801 @p4799 @p1608 @p4057 @p4055 @p709 @p4828 @p4826 @p49 @p4060 @p4058 @p81 @p4825 @p4823 @p1637 @p4033 @p4031 @p680 @p4852 @p4850 @p48 @p4036 @p4034 @p82 @p4849 @p4847 @p1666 @p4009 @p4007 @p651 @p4876 @p4874 @p47 @p4012 @p4010 @p83 @p4873 @p4871 @p1695 @p3985 @p3983 @p622 @p4900 @p4898 @p46 @p3988 @p3986 @p84 @p4897 @p4895 @p1724 @p3961 @p3959 @p593 @p4924 @p4922 @p45 @p3964 @p3962 @p85 @p4921 @p4919 @p1753 @p3937 @p3935 @p564 @p4948 @p4946 @p44 @p3940 @p3938 @p86 @p4945 @p4943 @p1782 @p3913 @p3911 @p535 @p4972 @p4970 @p43 @p3916 @p3914 @p87 @p4969 @p4967 @p1811 @p3889 @p3887 @p506 @p4996 @p4994 @p42 @p3892 @p3890 @p88 @p4993 @p4991 @p1840 @p3865 @p3863 @p477 @p5020 @p5018 @p41 @p3868 @p3866 @p89 @p5017 @p5015 @p1869 @p3841 @p3839 @p448 @p5044 @p5042 @p40 @p3844 @p3842 @p90 @p5041 @p5039 @p1898 @p3817 @p3815 @p419 @p5068 @p5066 @p39 @p3820 @p3818 @p91 @p5065 @p5063 @p1927 @p3793 @p3791 @p390 @p5092 @p5090 @p38 @p3796 @p3794 @p92 @p5089 @p5087 @p1956 @p3769 @p3767 @p361 @p5116 @p5114 @p37 @p3772 @p3770 @p93 @p5113 @p5111 @p1985 @p3745 @p3743 @p332 @p5140 @p5138 @p36 @p3748 @p3746 @p94 @p5137 @p5135 @p2014 @p3721 @p3719 @p303 @p5164 @p5162 @p35 @p3724 @p3722 @p95 @p5161 @p5159 @p2043 @p3697 @p3695 @p274 @p5188 @p5186 @p34 @p3700 @p3698 @p96 @p5185 @p5183 @p2072 @p3673 @p3671 @p245 @p5212 @p5210 @p33 @p3676 @p3674 @p97 @p5209 @p5207 @p2101 @p3649 @p3647 @p216 @p5236 @p5234 @p32 @p3652 @p3650 @p98 @p5233 @p5231 @p2130 @p3628 @p3626 @p187 @p5230 @p5228 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5227) :args (@t4437 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3954 @t65 @t3951 @t3952 @t1155 @t3933 @t3937 @t1129 @t3948 @t3969 @t64 @t3936 @t3939 @t66 @t3966 @t3967 @t1181 @t3918 @t3922 @t1103 @t3963 @t3984 @t63 @t3921 @t3924 @t67 @t3981 @t3982 @t1207 @t3903 @t3907 @t1077 @t3978 @t3999 @t62 @t3906 @t3909 @t68 @t3996 @t3997 @t1233 @t3888 @t3892 @t1051 @t3993 @t4014 @t61 @t3891 @t3894 @t69 @t4011 @t4012 @t1259 @t3873 @t3877 @t1025 @t4008 @t4029 @t60 @t3876 @t3879 @t70 @t4026 @t4027 @t1285 @t3858 @t3862 @t999 @t4023 @t4044 @t59 @t3861 @t3864 @t71 @t4041 @t4042 @t1311 @t3843 @t3847 @t973 @t4038 @t4059 @t58 @t3846 @t3849 @t72 @t4056 @t4057 @t1337 @t3828 @t3832 @t947 @t4053 @t4074 @t57 @t3831 @t3834 @t73 @t4071 @t4072 @t1363 @t3813 @t3817 @t921 @t4068 @t4089 @t56 @t3816 @t3819 @t74 @t4086 @t4087 @t1389 @t3798 @t3802 @t895 @t4083 @t4104 @t55 @t3801 @t3804 @t75 @t4101 @t4102 @t1415 @t3783 @t3787 @t869 @t4098 @t4119 @t54 @t3786 @t3789 @t76 @t4116 @t4117 @t1441 @t3768 @t3772 @t843 @t4113 @t4134 @t53 @t3771 @t3774 @t77 @t4131 @t4132 @t1467 @t3753 @t3757 @t817 @t4128 @t4149 @t52 @t3756 @t3759 @t78 @t4146 @t4147 @t1493 @t3738 @t3742 @t791 @t4143 @t4164 @t51 @t3741 @t3744 @t79 @t4161 @t4162 @t1519 @t3723 @t3727 @t765 @t4158 @t4179 @t50 @t3726 @t3729 @t80 @t4176 @t4177 @t1545 @t3708 @t3712 @t739 @t4173 @t4194 @t49 @t3711 @t3714 @t81 @t4191 @t4192 @t1571 @t3693 @t3697 @t713 @t4188 @t4209 @t48 @t3696 @t3699 @t82 @t4206 @t4207 @t1597 @t3678 @t3682 @t687 @t4203 @t4224 @t47 @t3681 @t3684 @t83 @t4221 @t4222 @t1623 @t3663 @t3667 @t661 @t4218 @t4239 @t46 @t3666 @t3669 @t84 @t4236 @t4237 @t1649 @t3648 @t3652 @t635 @t4233 @t4254 @t45 @t3651 @t3654 @t85 @t4251 @t4252 @t1675 @t3633 @t3637 @t609 @t4248 @t4269 @t44 @t3636 @t3639 @t86 @t4266 @t4267 @t1701 @t3618 @t3622 @t583 @t4263 @t4284 @t43 @t3621 @t3624 @t87 @t4281 @t4282 @t1727 @t3603 @t3607 @t557 @t4278 @t4299 @t42 @t3606 @t3609 @t88 @t4296 @t4297 @t1753 @t3588 @t3592 @t531 @t4293 @t4314 @t41 @t3591 @t3594 @t89 @t4311 @t4312 @t1779 @t3573 @t3577 @t505 @t4308 @t4329 @t40 @t3576 @t3579 @t90 @t4326 @t4327 @t1805 @t3558 @t3562 @t479 @t4323 @t4344 @t39 @t3561 @t3564 @t91 @t4341 @t4342 @t1831 @t3543 @t3547 @t453 @t4338 @t4359 @t38 @t3546 @t3549 @t92 @t4356 @t4357 @t1857 @t3528 @t3532 @t427 @t4353 @t4374 @t37 @t3531 @t3534 @t93 @t4371 @t4372 @t1883 @t3513 @t3517 @t401 @t4368 @t4389 @t36 @t3516 @t3519 @t94 @t4386 @t4387 @t1909 @t3498 @t3502 @t375 @t4383 @t4404 @t35 @t3501 @t3504 @t95 @t4401 @t4402 @t1935 @t3483 @t3487 @t349 @t4398 @t4419 @t34 @t3486 @t3489 @t96 @t4416 @t4417 @t1961 @t3468 @t3472 @t323 @t4413 @t4434 @t33 @t3471 @t3474 @t97 @t4431 @t4432 @t1987 @t3453 @t3457 @t297 @t4428 @t4449 @t32 @t3456 @t3459 @t98 @t4446 @t4447 @t2013 @t3441 @t3444 @t276 @t4443 @t4444 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6159 @t220) % 40.01/40.20 (step @p5239 :rule instantiate :premises (@p110) :args (@t4450)) % 40.01/40.20 (step-pop @p6160 :rule scope :premises (@p5239)) % 40.01/40.20 (step @p5240 :rule process_scope :premises (@p6160) :args (@t4453)) % 40.01/40.20 (step @p5242 :rule implies_elim :premises (@p5240)) % 40.01/40.20 (step @p5243 :rule cnf_or_pos :args (@t4453)) % 40.01/40.20 (step @p5244 :rule reordering :premises (@p5243) :args ((or @t4452 @t4451 (not @t4453)))) % 40.01/40.20 (step @p5245 :rule instantiate :premises (@p112) :args (@t4454)) % 40.01/40.20 (step @p5246 :rule cnf_or_pos :args (@t4455)) % 40.01/40.20 (step @p5247 :rule reordering :premises (@p5246) :args ((or @t4452 @t244 @t2041 (not @t4455)))) % 40.01/40.20 (step @p5248 :rule instantiate :premises (@p108) :args (@t4450)) % 40.01/40.20 (step @p5249 :rule cnf_or_pos :args (@t4457)) % 40.01/40.20 (step @p5250 :rule reordering :premises (@p5249) :args ((or @t2052 @t265 @t264 @t4456 (not @t4457)))) % 40.01/40.20 (step @p5251 :rule chain_m_resolution :premises (@p5250 @p5248 @p2148 @p2146 @p136 @p134 @p5247 @p5245 @p133 @p131 @p130 @p128 @p127 @p125 @p5244 @p5242 @p110) :args ((or @t4452 @t239) @t267 (@list @t4457 @t2052 @t2054 @t248 @t249 @t2041 @t4455 @t245 @t247 @t242 @t243 @t240 @t241 @t4451 @t4453 @t220))) % 40.01/40.20 (step @p5252 :rule instantiate :premises (@p119) :args (@t4454)) % 40.01/40.20 (step @p5253 :rule cnf_or_pos :args (@t4459)) % 40.01/40.20 (step @p5254 :rule reordering :premises (@p5253) :args ((or @t270 @t4452 @t4458 @t3440 (not @t4459)))) % 40.01/40.20 (step @p5255 :rule instantiate :premises (@p120) :args (@t2038)) % 40.01/40.20 (step @p5256 :rule cnf_or_pos :args (@t4462)) % 40.01/40.20 (step @p5257 :rule reordering :premises (@p5256) :args ((or @t4461 @t4460 @t2039 (not @t4462)))) % 40.01/40.20 (step @p5258 :rule instantiate :premises (@p121) :args (@t2037)) % 40.01/40.20 (step @p5259 :rule cnf_or_pos :args (@t4464)) % 40.01/40.20 (step @p5260 :rule reordering :premises (@p5259) :args ((or @t2047 @t4443 @t4463 (not @t4464)))) % 40.01/40.20 (step @p5261 :rule chain_m_resolution :premises (@p4441 @p4439 @p1173 @p4468 @p4466 @p64 @p4444 @p4442 @p65 @p4465 @p4463 @p1202 @p4417 @p4415 @p1144 @p4492 @p4490 @p63 @p4420 @p4418 @p66 @p4489 @p4487 @p1231 @p4393 @p4391 @p1115 @p4516 @p4514 @p62 @p4396 @p4394 @p67 @p4513 @p4511 @p1260 @p4369 @p4367 @p1086 @p4540 @p4538 @p61 @p4372 @p4370 @p68 @p4537 @p4535 @p1289 @p4345 @p4343 @p1057 @p4564 @p4562 @p60 @p4348 @p4346 @p69 @p4561 @p4559 @p1318 @p4321 @p4319 @p1028 @p4588 @p4586 @p59 @p4324 @p4322 @p70 @p4585 @p4583 @p1347 @p4297 @p4295 @p999 @p4612 @p4610 @p58 @p4300 @p4298 @p71 @p4609 @p4607 @p1376 @p4273 @p4271 @p970 @p4636 @p4634 @p57 @p4276 @p4274 @p72 @p4633 @p4631 @p1405 @p4249 @p4247 @p941 @p4660 @p4658 @p56 @p4252 @p4250 @p73 @p4657 @p4655 @p1434 @p4225 @p4223 @p912 @p4684 @p4682 @p55 @p4228 @p4226 @p74 @p4681 @p4679 @p1463 @p4201 @p4199 @p883 @p4708 @p4706 @p54 @p4204 @p4202 @p75 @p4705 @p4703 @p1492 @p4177 @p4175 @p854 @p4732 @p4730 @p53 @p4180 @p4178 @p76 @p4729 @p4727 @p1521 @p4153 @p4151 @p825 @p4756 @p4754 @p52 @p4156 @p4154 @p77 @p4753 @p4751 @p1550 @p4129 @p4127 @p796 @p4780 @p4778 @p51 @p4132 @p4130 @p78 @p4777 @p4775 @p1579 @p4105 @p4103 @p767 @p4804 @p4802 @p50 @p4108 @p4106 @p79 @p4801 @p4799 @p1608 @p4081 @p4079 @p738 @p4828 @p4826 @p49 @p4084 @p4082 @p80 @p4825 @p4823 @p1637 @p4057 @p4055 @p709 @p4852 @p4850 @p48 @p4060 @p4058 @p81 @p4849 @p4847 @p1666 @p4033 @p4031 @p680 @p4876 @p4874 @p47 @p4036 @p4034 @p82 @p4873 @p4871 @p1695 @p4009 @p4007 @p651 @p4900 @p4898 @p46 @p4012 @p4010 @p83 @p4897 @p4895 @p1724 @p3985 @p3983 @p622 @p4924 @p4922 @p45 @p3988 @p3986 @p84 @p4921 @p4919 @p1753 @p3961 @p3959 @p593 @p4948 @p4946 @p44 @p3964 @p3962 @p85 @p4945 @p4943 @p1782 @p3937 @p3935 @p564 @p4972 @p4970 @p43 @p3940 @p3938 @p86 @p4969 @p4967 @p1811 @p3913 @p3911 @p535 @p4996 @p4994 @p42 @p3916 @p3914 @p87 @p4993 @p4991 @p1840 @p3889 @p3887 @p506 @p5020 @p5018 @p41 @p3892 @p3890 @p88 @p5017 @p5015 @p1869 @p3865 @p3863 @p477 @p5044 @p5042 @p40 @p3868 @p3866 @p89 @p5041 @p5039 @p1898 @p3841 @p3839 @p448 @p5068 @p5066 @p39 @p3844 @p3842 @p90 @p5065 @p5063 @p1927 @p3817 @p3815 @p419 @p5092 @p5090 @p38 @p3820 @p3818 @p91 @p5089 @p5087 @p1956 @p3793 @p3791 @p390 @p5116 @p5114 @p37 @p3796 @p3794 @p92 @p5113 @p5111 @p1985 @p3769 @p3767 @p361 @p5140 @p5138 @p36 @p3772 @p3770 @p93 @p5137 @p5135 @p2014 @p3745 @p3743 @p332 @p5164 @p5162 @p35 @p3748 @p3746 @p94 @p5161 @p5159 @p2043 @p3721 @p3719 @p303 @p5188 @p5186 @p34 @p3724 @p3722 @p95 @p5185 @p5183 @p2072 @p3697 @p3695 @p274 @p5212 @p5210 @p33 @p3700 @p3698 @p96 @p5209 @p5207 @p2101 @p3673 @p3671 @p245 @p5236 @p5234 @p32 @p3676 @p3674 @p97 @p5233 @p5231 @p2130 @p3649 @p3647 @p216 @p5260 @p5258 @p31 @p3652 @p3650 @p98 @p5257 @p5255 @p2159 @p3628 @p3626 @p187 @p5254 @p5252 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5251) :args (@t4452 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3952 @t1155 @t3948 @t3969 @t64 @t3951 @t3954 @t65 @t3966 @t3967 @t1181 @t3933 @t3937 @t1129 @t3963 @t3984 @t63 @t3936 @t3939 @t66 @t3981 @t3982 @t1207 @t3918 @t3922 @t1103 @t3978 @t3999 @t62 @t3921 @t3924 @t67 @t3996 @t3997 @t1233 @t3903 @t3907 @t1077 @t3993 @t4014 @t61 @t3906 @t3909 @t68 @t4011 @t4012 @t1259 @t3888 @t3892 @t1051 @t4008 @t4029 @t60 @t3891 @t3894 @t69 @t4026 @t4027 @t1285 @t3873 @t3877 @t1025 @t4023 @t4044 @t59 @t3876 @t3879 @t70 @t4041 @t4042 @t1311 @t3858 @t3862 @t999 @t4038 @t4059 @t58 @t3861 @t3864 @t71 @t4056 @t4057 @t1337 @t3843 @t3847 @t973 @t4053 @t4074 @t57 @t3846 @t3849 @t72 @t4071 @t4072 @t1363 @t3828 @t3832 @t947 @t4068 @t4089 @t56 @t3831 @t3834 @t73 @t4086 @t4087 @t1389 @t3813 @t3817 @t921 @t4083 @t4104 @t55 @t3816 @t3819 @t74 @t4101 @t4102 @t1415 @t3798 @t3802 @t895 @t4098 @t4119 @t54 @t3801 @t3804 @t75 @t4116 @t4117 @t1441 @t3783 @t3787 @t869 @t4113 @t4134 @t53 @t3786 @t3789 @t76 @t4131 @t4132 @t1467 @t3768 @t3772 @t843 @t4128 @t4149 @t52 @t3771 @t3774 @t77 @t4146 @t4147 @t1493 @t3753 @t3757 @t817 @t4143 @t4164 @t51 @t3756 @t3759 @t78 @t4161 @t4162 @t1519 @t3738 @t3742 @t791 @t4158 @t4179 @t50 @t3741 @t3744 @t79 @t4176 @t4177 @t1545 @t3723 @t3727 @t765 @t4173 @t4194 @t49 @t3726 @t3729 @t80 @t4191 @t4192 @t1571 @t3708 @t3712 @t739 @t4188 @t4209 @t48 @t3711 @t3714 @t81 @t4206 @t4207 @t1597 @t3693 @t3697 @t713 @t4203 @t4224 @t47 @t3696 @t3699 @t82 @t4221 @t4222 @t1623 @t3678 @t3682 @t687 @t4218 @t4239 @t46 @t3681 @t3684 @t83 @t4236 @t4237 @t1649 @t3663 @t3667 @t661 @t4233 @t4254 @t45 @t3666 @t3669 @t84 @t4251 @t4252 @t1675 @t3648 @t3652 @t635 @t4248 @t4269 @t44 @t3651 @t3654 @t85 @t4266 @t4267 @t1701 @t3633 @t3637 @t609 @t4263 @t4284 @t43 @t3636 @t3639 @t86 @t4281 @t4282 @t1727 @t3618 @t3622 @t583 @t4278 @t4299 @t42 @t3621 @t3624 @t87 @t4296 @t4297 @t1753 @t3603 @t3607 @t557 @t4293 @t4314 @t41 @t3606 @t3609 @t88 @t4311 @t4312 @t1779 @t3588 @t3592 @t531 @t4308 @t4329 @t40 @t3591 @t3594 @t89 @t4326 @t4327 @t1805 @t3573 @t3577 @t505 @t4323 @t4344 @t39 @t3576 @t3579 @t90 @t4341 @t4342 @t1831 @t3558 @t3562 @t479 @t4338 @t4359 @t38 @t3561 @t3564 @t91 @t4356 @t4357 @t1857 @t3543 @t3547 @t453 @t4353 @t4374 @t37 @t3546 @t3549 @t92 @t4371 @t4372 @t1883 @t3528 @t3532 @t427 @t4368 @t4389 @t36 @t3531 @t3534 @t93 @t4386 @t4387 @t1909 @t3513 @t3517 @t401 @t4383 @t4404 @t35 @t3516 @t3519 @t94 @t4401 @t4402 @t1935 @t3498 @t3502 @t375 @t4398 @t4419 @t34 @t3501 @t3504 @t95 @t4416 @t4417 @t1961 @t3483 @t3487 @t349 @t4413 @t4434 @t33 @t3486 @t3489 @t96 @t4431 @t4432 @t1987 @t3468 @t3472 @t323 @t4428 @t4449 @t32 @t3471 @t3474 @t97 @t4446 @t4447 @t2013 @t3453 @t3457 @t297 @t4443 @t4464 @t31 @t3456 @t3459 @t98 @t4461 @t4462 @t2039 @t3441 @t3444 @t276 @t4458 @t4459 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6161 @t220) % 40.01/40.20 (step @p5263 :rule instantiate :premises (@p110) :args (@t4465)) % 40.01/40.20 (step-pop @p6162 :rule scope :premises (@p5263)) % 40.01/40.20 (step @p5264 :rule process_scope :premises (@p6162) :args (@t4468)) % 40.01/40.20 (step @p5266 :rule implies_elim :premises (@p5264)) % 40.01/40.20 (step @p5267 :rule cnf_or_pos :args (@t4468)) % 40.01/40.20 (step @p5268 :rule reordering :premises (@p5267) :args ((or @t4467 @t4466 (not @t4468)))) % 40.01/40.20 (step @p5269 :rule instantiate :premises (@p112) :args (@t4469)) % 40.01/40.20 (step @p5270 :rule cnf_or_pos :args (@t4470)) % 40.01/40.20 (step @p5271 :rule reordering :premises (@p5270) :args ((or @t4467 @t244 @t2067 (not @t4470)))) % 40.01/40.20 (step @p5272 :rule instantiate :premises (@p108) :args (@t4465)) % 40.01/40.20 (step @p5273 :rule cnf_or_pos :args (@t4472)) % 40.01/40.20 (step @p5274 :rule reordering :premises (@p5273) :args ((or @t2078 @t265 @t264 @t4471 (not @t4472)))) % 40.01/40.20 (step @p5275 :rule chain_m_resolution :premises (@p5274 @p5272 @p2177 @p2175 @p136 @p134 @p5271 @p5269 @p133 @p131 @p130 @p128 @p127 @p125 @p5268 @p5266 @p110) :args ((or @t4467 @t239) @t267 (@list @t4472 @t2078 @t2080 @t248 @t249 @t2067 @t4470 @t245 @t247 @t242 @t243 @t240 @t241 @t4466 @t4468 @t220))) % 40.01/40.20 (step @p5276 :rule instantiate :premises (@p119) :args (@t4469)) % 40.01/40.20 (step @p5277 :rule cnf_or_pos :args (@t4474)) % 40.01/40.20 (step @p5278 :rule reordering :premises (@p5277) :args ((or @t270 @t4467 @t4473 @t3440 (not @t4474)))) % 40.01/40.20 (step @p5279 :rule instantiate :premises (@p120) :args (@t2064)) % 40.01/40.20 (step @p5280 :rule cnf_or_pos :args (@t4477)) % 40.01/40.20 (step @p5281 :rule reordering :premises (@p5280) :args ((or @t4476 @t4475 @t2065 (not @t4477)))) % 40.01/40.20 (step @p5282 :rule instantiate :premises (@p121) :args (@t2063)) % 40.01/40.20 (step @p5283 :rule cnf_or_pos :args (@t4479)) % 40.01/40.20 (step @p5284 :rule reordering :premises (@p5283) :args ((or @t2073 @t4458 @t4478 (not @t4479)))) % 40.01/40.20 (step @p5285 :rule chain_m_resolution :premises (@p4468 @p4466 @p64 @p4465 @p4463 @p1202 @p4441 @p4439 @p1173 @p4492 @p4490 @p63 @p4444 @p4442 @p65 @p4489 @p4487 @p1231 @p4417 @p4415 @p1144 @p4516 @p4514 @p62 @p4420 @p4418 @p66 @p4513 @p4511 @p1260 @p4393 @p4391 @p1115 @p4540 @p4538 @p61 @p4396 @p4394 @p67 @p4537 @p4535 @p1289 @p4369 @p4367 @p1086 @p4564 @p4562 @p60 @p4372 @p4370 @p68 @p4561 @p4559 @p1318 @p4345 @p4343 @p1057 @p4588 @p4586 @p59 @p4348 @p4346 @p69 @p4585 @p4583 @p1347 @p4321 @p4319 @p1028 @p4612 @p4610 @p58 @p4324 @p4322 @p70 @p4609 @p4607 @p1376 @p4297 @p4295 @p999 @p4636 @p4634 @p57 @p4300 @p4298 @p71 @p4633 @p4631 @p1405 @p4273 @p4271 @p970 @p4660 @p4658 @p56 @p4276 @p4274 @p72 @p4657 @p4655 @p1434 @p4249 @p4247 @p941 @p4684 @p4682 @p55 @p4252 @p4250 @p73 @p4681 @p4679 @p1463 @p4225 @p4223 @p912 @p4708 @p4706 @p54 @p4228 @p4226 @p74 @p4705 @p4703 @p1492 @p4201 @p4199 @p883 @p4732 @p4730 @p53 @p4204 @p4202 @p75 @p4729 @p4727 @p1521 @p4177 @p4175 @p854 @p4756 @p4754 @p52 @p4180 @p4178 @p76 @p4753 @p4751 @p1550 @p4153 @p4151 @p825 @p4780 @p4778 @p51 @p4156 @p4154 @p77 @p4777 @p4775 @p1579 @p4129 @p4127 @p796 @p4804 @p4802 @p50 @p4132 @p4130 @p78 @p4801 @p4799 @p1608 @p4105 @p4103 @p767 @p4828 @p4826 @p49 @p4108 @p4106 @p79 @p4825 @p4823 @p1637 @p4081 @p4079 @p738 @p4852 @p4850 @p48 @p4084 @p4082 @p80 @p4849 @p4847 @p1666 @p4057 @p4055 @p709 @p4876 @p4874 @p47 @p4060 @p4058 @p81 @p4873 @p4871 @p1695 @p4033 @p4031 @p680 @p4900 @p4898 @p46 @p4036 @p4034 @p82 @p4897 @p4895 @p1724 @p4009 @p4007 @p651 @p4924 @p4922 @p45 @p4012 @p4010 @p83 @p4921 @p4919 @p1753 @p3985 @p3983 @p622 @p4948 @p4946 @p44 @p3988 @p3986 @p84 @p4945 @p4943 @p1782 @p3961 @p3959 @p593 @p4972 @p4970 @p43 @p3964 @p3962 @p85 @p4969 @p4967 @p1811 @p3937 @p3935 @p564 @p4996 @p4994 @p42 @p3940 @p3938 @p86 @p4993 @p4991 @p1840 @p3913 @p3911 @p535 @p5020 @p5018 @p41 @p3916 @p3914 @p87 @p5017 @p5015 @p1869 @p3889 @p3887 @p506 @p5044 @p5042 @p40 @p3892 @p3890 @p88 @p5041 @p5039 @p1898 @p3865 @p3863 @p477 @p5068 @p5066 @p39 @p3868 @p3866 @p89 @p5065 @p5063 @p1927 @p3841 @p3839 @p448 @p5092 @p5090 @p38 @p3844 @p3842 @p90 @p5089 @p5087 @p1956 @p3817 @p3815 @p419 @p5116 @p5114 @p37 @p3820 @p3818 @p91 @p5113 @p5111 @p1985 @p3793 @p3791 @p390 @p5140 @p5138 @p36 @p3796 @p3794 @p92 @p5137 @p5135 @p2014 @p3769 @p3767 @p361 @p5164 @p5162 @p35 @p3772 @p3770 @p93 @p5161 @p5159 @p2043 @p3745 @p3743 @p332 @p5188 @p5186 @p34 @p3748 @p3746 @p94 @p5185 @p5183 @p2072 @p3721 @p3719 @p303 @p5212 @p5210 @p33 @p3724 @p3722 @p95 @p5209 @p5207 @p2101 @p3697 @p3695 @p274 @p5236 @p5234 @p32 @p3700 @p3698 @p96 @p5233 @p5231 @p2130 @p3673 @p3671 @p245 @p5260 @p5258 @p31 @p3676 @p3674 @p97 @p5257 @p5255 @p2159 @p3649 @p3647 @p216 @p5284 @p5282 @p30 @p3652 @p3650 @p98 @p5281 @p5279 @p2188 @p3628 @p3626 @p187 @p5278 @p5276 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5275) :args (@t4467 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3969 @t64 @t3966 @t3967 @t1181 @t3948 @t3952 @t1155 @t3963 @t3984 @t63 @t3951 @t3954 @t65 @t3981 @t3982 @t1207 @t3933 @t3937 @t1129 @t3978 @t3999 @t62 @t3936 @t3939 @t66 @t3996 @t3997 @t1233 @t3918 @t3922 @t1103 @t3993 @t4014 @t61 @t3921 @t3924 @t67 @t4011 @t4012 @t1259 @t3903 @t3907 @t1077 @t4008 @t4029 @t60 @t3906 @t3909 @t68 @t4026 @t4027 @t1285 @t3888 @t3892 @t1051 @t4023 @t4044 @t59 @t3891 @t3894 @t69 @t4041 @t4042 @t1311 @t3873 @t3877 @t1025 @t4038 @t4059 @t58 @t3876 @t3879 @t70 @t4056 @t4057 @t1337 @t3858 @t3862 @t999 @t4053 @t4074 @t57 @t3861 @t3864 @t71 @t4071 @t4072 @t1363 @t3843 @t3847 @t973 @t4068 @t4089 @t56 @t3846 @t3849 @t72 @t4086 @t4087 @t1389 @t3828 @t3832 @t947 @t4083 @t4104 @t55 @t3831 @t3834 @t73 @t4101 @t4102 @t1415 @t3813 @t3817 @t921 @t4098 @t4119 @t54 @t3816 @t3819 @t74 @t4116 @t4117 @t1441 @t3798 @t3802 @t895 @t4113 @t4134 @t53 @t3801 @t3804 @t75 @t4131 @t4132 @t1467 @t3783 @t3787 @t869 @t4128 @t4149 @t52 @t3786 @t3789 @t76 @t4146 @t4147 @t1493 @t3768 @t3772 @t843 @t4143 @t4164 @t51 @t3771 @t3774 @t77 @t4161 @t4162 @t1519 @t3753 @t3757 @t817 @t4158 @t4179 @t50 @t3756 @t3759 @t78 @t4176 @t4177 @t1545 @t3738 @t3742 @t791 @t4173 @t4194 @t49 @t3741 @t3744 @t79 @t4191 @t4192 @t1571 @t3723 @t3727 @t765 @t4188 @t4209 @t48 @t3726 @t3729 @t80 @t4206 @t4207 @t1597 @t3708 @t3712 @t739 @t4203 @t4224 @t47 @t3711 @t3714 @t81 @t4221 @t4222 @t1623 @t3693 @t3697 @t713 @t4218 @t4239 @t46 @t3696 @t3699 @t82 @t4236 @t4237 @t1649 @t3678 @t3682 @t687 @t4233 @t4254 @t45 @t3681 @t3684 @t83 @t4251 @t4252 @t1675 @t3663 @t3667 @t661 @t4248 @t4269 @t44 @t3666 @t3669 @t84 @t4266 @t4267 @t1701 @t3648 @t3652 @t635 @t4263 @t4284 @t43 @t3651 @t3654 @t85 @t4281 @t4282 @t1727 @t3633 @t3637 @t609 @t4278 @t4299 @t42 @t3636 @t3639 @t86 @t4296 @t4297 @t1753 @t3618 @t3622 @t583 @t4293 @t4314 @t41 @t3621 @t3624 @t87 @t4311 @t4312 @t1779 @t3603 @t3607 @t557 @t4308 @t4329 @t40 @t3606 @t3609 @t88 @t4326 @t4327 @t1805 @t3588 @t3592 @t531 @t4323 @t4344 @t39 @t3591 @t3594 @t89 @t4341 @t4342 @t1831 @t3573 @t3577 @t505 @t4338 @t4359 @t38 @t3576 @t3579 @t90 @t4356 @t4357 @t1857 @t3558 @t3562 @t479 @t4353 @t4374 @t37 @t3561 @t3564 @t91 @t4371 @t4372 @t1883 @t3543 @t3547 @t453 @t4368 @t4389 @t36 @t3546 @t3549 @t92 @t4386 @t4387 @t1909 @t3528 @t3532 @t427 @t4383 @t4404 @t35 @t3531 @t3534 @t93 @t4401 @t4402 @t1935 @t3513 @t3517 @t401 @t4398 @t4419 @t34 @t3516 @t3519 @t94 @t4416 @t4417 @t1961 @t3498 @t3502 @t375 @t4413 @t4434 @t33 @t3501 @t3504 @t95 @t4431 @t4432 @t1987 @t3483 @t3487 @t349 @t4428 @t4449 @t32 @t3486 @t3489 @t96 @t4446 @t4447 @t2013 @t3468 @t3472 @t323 @t4443 @t4464 @t31 @t3471 @t3474 @t97 @t4461 @t4462 @t2039 @t3453 @t3457 @t297 @t4458 @t4479 @t30 @t3456 @t3459 @t98 @t4476 @t4477 @t2065 @t3441 @t3444 @t276 @t4473 @t4474 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6163 @t220) % 40.01/40.20 (step @p5287 :rule instantiate :premises (@p110) :args (@t4480)) % 40.01/40.20 (step-pop @p6164 :rule scope :premises (@p5287)) % 40.01/40.20 (step @p5288 :rule process_scope :premises (@p6164) :args (@t4483)) % 40.01/40.20 (step @p5290 :rule implies_elim :premises (@p5288)) % 40.01/40.20 (step @p5291 :rule cnf_or_pos :args (@t4483)) % 40.01/40.20 (step @p5292 :rule reordering :premises (@p5291) :args ((or @t4482 @t4481 (not @t4483)))) % 40.01/40.20 (step @p5293 :rule instantiate :premises (@p112) :args (@t4484)) % 40.01/40.20 (step @p5294 :rule cnf_or_pos :args (@t4485)) % 40.01/40.20 (step @p5295 :rule reordering :premises (@p5294) :args ((or @t4482 @t244 @t2093 (not @t4485)))) % 40.01/40.20 (step @p5296 :rule instantiate :premises (@p108) :args (@t4480)) % 40.01/40.20 (step @p5297 :rule cnf_or_pos :args (@t4487)) % 40.01/40.20 (step @p5298 :rule reordering :premises (@p5297) :args ((or @t2104 @t265 @t264 @t4486 (not @t4487)))) % 40.01/40.20 (step @p5299 :rule chain_m_resolution :premises (@p5298 @p5296 @p2206 @p2204 @p136 @p134 @p5295 @p5293 @p133 @p131 @p130 @p128 @p127 @p125 @p5292 @p5290 @p110) :args ((or @t4482 @t239) @t267 (@list @t4487 @t2104 @t2106 @t248 @t249 @t2093 @t4485 @t245 @t247 @t242 @t243 @t240 @t241 @t4481 @t4483 @t220))) % 40.01/40.20 (step @p5300 :rule instantiate :premises (@p119) :args (@t4484)) % 40.01/40.20 (step @p5301 :rule cnf_or_pos :args (@t4489)) % 40.01/40.20 (step @p5302 :rule reordering :premises (@p5301) :args ((or @t270 @t4482 @t4488 @t3440 (not @t4489)))) % 40.01/40.20 (step @p5303 :rule instantiate :premises (@p120) :args (@t2090)) % 40.01/40.20 (step @p5304 :rule cnf_or_pos :args (@t4492)) % 40.01/40.20 (step @p5305 :rule reordering :premises (@p5304) :args ((or @t4491 @t4490 @t2091 (not @t4492)))) % 40.01/40.20 (step @p5306 :rule instantiate :premises (@p121) :args (@t2089)) % 40.01/40.20 (step @p5307 :rule cnf_or_pos :args (@t4494)) % 40.01/40.20 (step @p5308 :rule reordering :premises (@p5307) :args ((or @t2099 @t4473 @t4493 (not @t4494)))) % 40.01/40.20 (step @p5309 :rule chain_m_resolution :premises (@p4465 @p4463 @p1202 @p4492 @p4490 @p63 @p4468 @p4466 @p64 @p4489 @p4487 @p1231 @p4441 @p4439 @p1173 @p4516 @p4514 @p62 @p4444 @p4442 @p65 @p4513 @p4511 @p1260 @p4417 @p4415 @p1144 @p4540 @p4538 @p61 @p4420 @p4418 @p66 @p4537 @p4535 @p1289 @p4393 @p4391 @p1115 @p4564 @p4562 @p60 @p4396 @p4394 @p67 @p4561 @p4559 @p1318 @p4369 @p4367 @p1086 @p4588 @p4586 @p59 @p4372 @p4370 @p68 @p4585 @p4583 @p1347 @p4345 @p4343 @p1057 @p4612 @p4610 @p58 @p4348 @p4346 @p69 @p4609 @p4607 @p1376 @p4321 @p4319 @p1028 @p4636 @p4634 @p57 @p4324 @p4322 @p70 @p4633 @p4631 @p1405 @p4297 @p4295 @p999 @p4660 @p4658 @p56 @p4300 @p4298 @p71 @p4657 @p4655 @p1434 @p4273 @p4271 @p970 @p4684 @p4682 @p55 @p4276 @p4274 @p72 @p4681 @p4679 @p1463 @p4249 @p4247 @p941 @p4708 @p4706 @p54 @p4252 @p4250 @p73 @p4705 @p4703 @p1492 @p4225 @p4223 @p912 @p4732 @p4730 @p53 @p4228 @p4226 @p74 @p4729 @p4727 @p1521 @p4201 @p4199 @p883 @p4756 @p4754 @p52 @p4204 @p4202 @p75 @p4753 @p4751 @p1550 @p4177 @p4175 @p854 @p4780 @p4778 @p51 @p4180 @p4178 @p76 @p4777 @p4775 @p1579 @p4153 @p4151 @p825 @p4804 @p4802 @p50 @p4156 @p4154 @p77 @p4801 @p4799 @p1608 @p4129 @p4127 @p796 @p4828 @p4826 @p49 @p4132 @p4130 @p78 @p4825 @p4823 @p1637 @p4105 @p4103 @p767 @p4852 @p4850 @p48 @p4108 @p4106 @p79 @p4849 @p4847 @p1666 @p4081 @p4079 @p738 @p4876 @p4874 @p47 @p4084 @p4082 @p80 @p4873 @p4871 @p1695 @p4057 @p4055 @p709 @p4900 @p4898 @p46 @p4060 @p4058 @p81 @p4897 @p4895 @p1724 @p4033 @p4031 @p680 @p4924 @p4922 @p45 @p4036 @p4034 @p82 @p4921 @p4919 @p1753 @p4009 @p4007 @p651 @p4948 @p4946 @p44 @p4012 @p4010 @p83 @p4945 @p4943 @p1782 @p3985 @p3983 @p622 @p4972 @p4970 @p43 @p3988 @p3986 @p84 @p4969 @p4967 @p1811 @p3961 @p3959 @p593 @p4996 @p4994 @p42 @p3964 @p3962 @p85 @p4993 @p4991 @p1840 @p3937 @p3935 @p564 @p5020 @p5018 @p41 @p3940 @p3938 @p86 @p5017 @p5015 @p1869 @p3913 @p3911 @p535 @p5044 @p5042 @p40 @p3916 @p3914 @p87 @p5041 @p5039 @p1898 @p3889 @p3887 @p506 @p5068 @p5066 @p39 @p3892 @p3890 @p88 @p5065 @p5063 @p1927 @p3865 @p3863 @p477 @p5092 @p5090 @p38 @p3868 @p3866 @p89 @p5089 @p5087 @p1956 @p3841 @p3839 @p448 @p5116 @p5114 @p37 @p3844 @p3842 @p90 @p5113 @p5111 @p1985 @p3817 @p3815 @p419 @p5140 @p5138 @p36 @p3820 @p3818 @p91 @p5137 @p5135 @p2014 @p3793 @p3791 @p390 @p5164 @p5162 @p35 @p3796 @p3794 @p92 @p5161 @p5159 @p2043 @p3769 @p3767 @p361 @p5188 @p5186 @p34 @p3772 @p3770 @p93 @p5185 @p5183 @p2072 @p3745 @p3743 @p332 @p5212 @p5210 @p33 @p3748 @p3746 @p94 @p5209 @p5207 @p2101 @p3721 @p3719 @p303 @p5236 @p5234 @p32 @p3724 @p3722 @p95 @p5233 @p5231 @p2130 @p3697 @p3695 @p274 @p5260 @p5258 @p31 @p3700 @p3698 @p96 @p5257 @p5255 @p2159 @p3673 @p3671 @p245 @p5284 @p5282 @p30 @p3676 @p3674 @p97 @p5281 @p5279 @p2188 @p3649 @p3647 @p216 @p5308 @p5306 @p29 @p3652 @p3650 @p98 @p5305 @p5303 @p2217 @p3628 @p3626 @p187 @p5302 @p5300 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5299) :args (@t4482 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3967 @t1181 @t3963 @t3984 @t63 @t3966 @t3969 @t64 @t3981 @t3982 @t1207 @t3948 @t3952 @t1155 @t3978 @t3999 @t62 @t3951 @t3954 @t65 @t3996 @t3997 @t1233 @t3933 @t3937 @t1129 @t3993 @t4014 @t61 @t3936 @t3939 @t66 @t4011 @t4012 @t1259 @t3918 @t3922 @t1103 @t4008 @t4029 @t60 @t3921 @t3924 @t67 @t4026 @t4027 @t1285 @t3903 @t3907 @t1077 @t4023 @t4044 @t59 @t3906 @t3909 @t68 @t4041 @t4042 @t1311 @t3888 @t3892 @t1051 @t4038 @t4059 @t58 @t3891 @t3894 @t69 @t4056 @t4057 @t1337 @t3873 @t3877 @t1025 @t4053 @t4074 @t57 @t3876 @t3879 @t70 @t4071 @t4072 @t1363 @t3858 @t3862 @t999 @t4068 @t4089 @t56 @t3861 @t3864 @t71 @t4086 @t4087 @t1389 @t3843 @t3847 @t973 @t4083 @t4104 @t55 @t3846 @t3849 @t72 @t4101 @t4102 @t1415 @t3828 @t3832 @t947 @t4098 @t4119 @t54 @t3831 @t3834 @t73 @t4116 @t4117 @t1441 @t3813 @t3817 @t921 @t4113 @t4134 @t53 @t3816 @t3819 @t74 @t4131 @t4132 @t1467 @t3798 @t3802 @t895 @t4128 @t4149 @t52 @t3801 @t3804 @t75 @t4146 @t4147 @t1493 @t3783 @t3787 @t869 @t4143 @t4164 @t51 @t3786 @t3789 @t76 @t4161 @t4162 @t1519 @t3768 @t3772 @t843 @t4158 @t4179 @t50 @t3771 @t3774 @t77 @t4176 @t4177 @t1545 @t3753 @t3757 @t817 @t4173 @t4194 @t49 @t3756 @t3759 @t78 @t4191 @t4192 @t1571 @t3738 @t3742 @t791 @t4188 @t4209 @t48 @t3741 @t3744 @t79 @t4206 @t4207 @t1597 @t3723 @t3727 @t765 @t4203 @t4224 @t47 @t3726 @t3729 @t80 @t4221 @t4222 @t1623 @t3708 @t3712 @t739 @t4218 @t4239 @t46 @t3711 @t3714 @t81 @t4236 @t4237 @t1649 @t3693 @t3697 @t713 @t4233 @t4254 @t45 @t3696 @t3699 @t82 @t4251 @t4252 @t1675 @t3678 @t3682 @t687 @t4248 @t4269 @t44 @t3681 @t3684 @t83 @t4266 @t4267 @t1701 @t3663 @t3667 @t661 @t4263 @t4284 @t43 @t3666 @t3669 @t84 @t4281 @t4282 @t1727 @t3648 @t3652 @t635 @t4278 @t4299 @t42 @t3651 @t3654 @t85 @t4296 @t4297 @t1753 @t3633 @t3637 @t609 @t4293 @t4314 @t41 @t3636 @t3639 @t86 @t4311 @t4312 @t1779 @t3618 @t3622 @t583 @t4308 @t4329 @t40 @t3621 @t3624 @t87 @t4326 @t4327 @t1805 @t3603 @t3607 @t557 @t4323 @t4344 @t39 @t3606 @t3609 @t88 @t4341 @t4342 @t1831 @t3588 @t3592 @t531 @t4338 @t4359 @t38 @t3591 @t3594 @t89 @t4356 @t4357 @t1857 @t3573 @t3577 @t505 @t4353 @t4374 @t37 @t3576 @t3579 @t90 @t4371 @t4372 @t1883 @t3558 @t3562 @t479 @t4368 @t4389 @t36 @t3561 @t3564 @t91 @t4386 @t4387 @t1909 @t3543 @t3547 @t453 @t4383 @t4404 @t35 @t3546 @t3549 @t92 @t4401 @t4402 @t1935 @t3528 @t3532 @t427 @t4398 @t4419 @t34 @t3531 @t3534 @t93 @t4416 @t4417 @t1961 @t3513 @t3517 @t401 @t4413 @t4434 @t33 @t3516 @t3519 @t94 @t4431 @t4432 @t1987 @t3498 @t3502 @t375 @t4428 @t4449 @t32 @t3501 @t3504 @t95 @t4446 @t4447 @t2013 @t3483 @t3487 @t349 @t4443 @t4464 @t31 @t3486 @t3489 @t96 @t4461 @t4462 @t2039 @t3468 @t3472 @t323 @t4458 @t4479 @t30 @t3471 @t3474 @t97 @t4476 @t4477 @t2065 @t3453 @t3457 @t297 @t4473 @t4494 @t29 @t3456 @t3459 @t98 @t4491 @t4492 @t2091 @t3441 @t3444 @t276 @t4488 @t4489 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6165 @t220) % 40.01/40.20 (step @p5311 :rule instantiate :premises (@p110) :args (@t4495)) % 40.01/40.20 (step-pop @p6166 :rule scope :premises (@p5311)) % 40.01/40.20 (step @p5312 :rule process_scope :premises (@p6166) :args (@t4498)) % 40.01/40.20 (step @p5314 :rule implies_elim :premises (@p5312)) % 40.01/40.20 (step @p5315 :rule cnf_or_pos :args (@t4498)) % 40.01/40.20 (step @p5316 :rule reordering :premises (@p5315) :args ((or @t4497 @t4496 (not @t4498)))) % 40.01/40.20 (step @p5317 :rule instantiate :premises (@p112) :args (@t4499)) % 40.01/40.20 (step @p5318 :rule cnf_or_pos :args (@t4500)) % 40.01/40.20 (step @p5319 :rule reordering :premises (@p5318) :args ((or @t4497 @t244 @t2119 (not @t4500)))) % 40.01/40.20 (step @p5320 :rule instantiate :premises (@p108) :args (@t4495)) % 40.01/40.20 (step @p5321 :rule cnf_or_pos :args (@t4502)) % 40.01/40.20 (step @p5322 :rule reordering :premises (@p5321) :args ((or @t2130 @t265 @t264 @t4501 (not @t4502)))) % 40.01/40.20 (step @p5323 :rule chain_m_resolution :premises (@p5322 @p5320 @p2235 @p2233 @p136 @p134 @p5319 @p5317 @p133 @p131 @p130 @p128 @p127 @p125 @p5316 @p5314 @p110) :args ((or @t4497 @t239) @t267 (@list @t4502 @t2130 @t2132 @t248 @t249 @t2119 @t4500 @t245 @t247 @t242 @t243 @t240 @t241 @t4496 @t4498 @t220))) % 40.01/40.20 (step @p5324 :rule instantiate :premises (@p119) :args (@t4499)) % 40.01/40.20 (step @p5325 :rule cnf_or_pos :args (@t4504)) % 40.01/40.20 (step @p5326 :rule reordering :premises (@p5325) :args ((or @t270 @t4497 @t4503 @t3440 (not @t4504)))) % 40.01/40.20 (step @p5327 :rule instantiate :premises (@p120) :args (@t2116)) % 40.01/40.20 (step @p5328 :rule cnf_or_pos :args (@t4507)) % 40.01/40.20 (step @p5329 :rule reordering :premises (@p5328) :args ((or @t4506 @t4505 @t2117 (not @t4507)))) % 40.01/40.20 (step @p5330 :rule instantiate :premises (@p121) :args (@t2115)) % 40.01/40.20 (step @p5331 :rule cnf_or_pos :args (@t4509)) % 40.01/40.20 (step @p5332 :rule reordering :premises (@p5331) :args ((or @t2125 @t4488 @t4508 (not @t4509)))) % 40.01/40.20 (step @p5333 :rule chain_m_resolution :premises (@p4492 @p4490 @p63 @p4489 @p4487 @p1231 @p4465 @p4463 @p1202 @p4516 @p4514 @p62 @p4468 @p4466 @p64 @p4513 @p4511 @p1260 @p4441 @p4439 @p1173 @p4540 @p4538 @p61 @p4444 @p4442 @p65 @p4537 @p4535 @p1289 @p4417 @p4415 @p1144 @p4564 @p4562 @p60 @p4420 @p4418 @p66 @p4561 @p4559 @p1318 @p4393 @p4391 @p1115 @p4588 @p4586 @p59 @p4396 @p4394 @p67 @p4585 @p4583 @p1347 @p4369 @p4367 @p1086 @p4612 @p4610 @p58 @p4372 @p4370 @p68 @p4609 @p4607 @p1376 @p4345 @p4343 @p1057 @p4636 @p4634 @p57 @p4348 @p4346 @p69 @p4633 @p4631 @p1405 @p4321 @p4319 @p1028 @p4660 @p4658 @p56 @p4324 @p4322 @p70 @p4657 @p4655 @p1434 @p4297 @p4295 @p999 @p4684 @p4682 @p55 @p4300 @p4298 @p71 @p4681 @p4679 @p1463 @p4273 @p4271 @p970 @p4708 @p4706 @p54 @p4276 @p4274 @p72 @p4705 @p4703 @p1492 @p4249 @p4247 @p941 @p4732 @p4730 @p53 @p4252 @p4250 @p73 @p4729 @p4727 @p1521 @p4225 @p4223 @p912 @p4756 @p4754 @p52 @p4228 @p4226 @p74 @p4753 @p4751 @p1550 @p4201 @p4199 @p883 @p4780 @p4778 @p51 @p4204 @p4202 @p75 @p4777 @p4775 @p1579 @p4177 @p4175 @p854 @p4804 @p4802 @p50 @p4180 @p4178 @p76 @p4801 @p4799 @p1608 @p4153 @p4151 @p825 @p4828 @p4826 @p49 @p4156 @p4154 @p77 @p4825 @p4823 @p1637 @p4129 @p4127 @p796 @p4852 @p4850 @p48 @p4132 @p4130 @p78 @p4849 @p4847 @p1666 @p4105 @p4103 @p767 @p4876 @p4874 @p47 @p4108 @p4106 @p79 @p4873 @p4871 @p1695 @p4081 @p4079 @p738 @p4900 @p4898 @p46 @p4084 @p4082 @p80 @p4897 @p4895 @p1724 @p4057 @p4055 @p709 @p4924 @p4922 @p45 @p4060 @p4058 @p81 @p4921 @p4919 @p1753 @p4033 @p4031 @p680 @p4948 @p4946 @p44 @p4036 @p4034 @p82 @p4945 @p4943 @p1782 @p4009 @p4007 @p651 @p4972 @p4970 @p43 @p4012 @p4010 @p83 @p4969 @p4967 @p1811 @p3985 @p3983 @p622 @p4996 @p4994 @p42 @p3988 @p3986 @p84 @p4993 @p4991 @p1840 @p3961 @p3959 @p593 @p5020 @p5018 @p41 @p3964 @p3962 @p85 @p5017 @p5015 @p1869 @p3937 @p3935 @p564 @p5044 @p5042 @p40 @p3940 @p3938 @p86 @p5041 @p5039 @p1898 @p3913 @p3911 @p535 @p5068 @p5066 @p39 @p3916 @p3914 @p87 @p5065 @p5063 @p1927 @p3889 @p3887 @p506 @p5092 @p5090 @p38 @p3892 @p3890 @p88 @p5089 @p5087 @p1956 @p3865 @p3863 @p477 @p5116 @p5114 @p37 @p3868 @p3866 @p89 @p5113 @p5111 @p1985 @p3841 @p3839 @p448 @p5140 @p5138 @p36 @p3844 @p3842 @p90 @p5137 @p5135 @p2014 @p3817 @p3815 @p419 @p5164 @p5162 @p35 @p3820 @p3818 @p91 @p5161 @p5159 @p2043 @p3793 @p3791 @p390 @p5188 @p5186 @p34 @p3796 @p3794 @p92 @p5185 @p5183 @p2072 @p3769 @p3767 @p361 @p5212 @p5210 @p33 @p3772 @p3770 @p93 @p5209 @p5207 @p2101 @p3745 @p3743 @p332 @p5236 @p5234 @p32 @p3748 @p3746 @p94 @p5233 @p5231 @p2130 @p3721 @p3719 @p303 @p5260 @p5258 @p31 @p3724 @p3722 @p95 @p5257 @p5255 @p2159 @p3697 @p3695 @p274 @p5284 @p5282 @p30 @p3700 @p3698 @p96 @p5281 @p5279 @p2188 @p3673 @p3671 @p245 @p5308 @p5306 @p29 @p3676 @p3674 @p97 @p5305 @p5303 @p2217 @p3649 @p3647 @p216 @p5332 @p5330 @p28 @p3652 @p3650 @p98 @p5329 @p5327 @p2246 @p3628 @p3626 @p187 @p5326 @p5324 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5323) :args (@t4497 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3984 @t63 @t3981 @t3982 @t1207 @t3963 @t3967 @t1181 @t3978 @t3999 @t62 @t3966 @t3969 @t64 @t3996 @t3997 @t1233 @t3948 @t3952 @t1155 @t3993 @t4014 @t61 @t3951 @t3954 @t65 @t4011 @t4012 @t1259 @t3933 @t3937 @t1129 @t4008 @t4029 @t60 @t3936 @t3939 @t66 @t4026 @t4027 @t1285 @t3918 @t3922 @t1103 @t4023 @t4044 @t59 @t3921 @t3924 @t67 @t4041 @t4042 @t1311 @t3903 @t3907 @t1077 @t4038 @t4059 @t58 @t3906 @t3909 @t68 @t4056 @t4057 @t1337 @t3888 @t3892 @t1051 @t4053 @t4074 @t57 @t3891 @t3894 @t69 @t4071 @t4072 @t1363 @t3873 @t3877 @t1025 @t4068 @t4089 @t56 @t3876 @t3879 @t70 @t4086 @t4087 @t1389 @t3858 @t3862 @t999 @t4083 @t4104 @t55 @t3861 @t3864 @t71 @t4101 @t4102 @t1415 @t3843 @t3847 @t973 @t4098 @t4119 @t54 @t3846 @t3849 @t72 @t4116 @t4117 @t1441 @t3828 @t3832 @t947 @t4113 @t4134 @t53 @t3831 @t3834 @t73 @t4131 @t4132 @t1467 @t3813 @t3817 @t921 @t4128 @t4149 @t52 @t3816 @t3819 @t74 @t4146 @t4147 @t1493 @t3798 @t3802 @t895 @t4143 @t4164 @t51 @t3801 @t3804 @t75 @t4161 @t4162 @t1519 @t3783 @t3787 @t869 @t4158 @t4179 @t50 @t3786 @t3789 @t76 @t4176 @t4177 @t1545 @t3768 @t3772 @t843 @t4173 @t4194 @t49 @t3771 @t3774 @t77 @t4191 @t4192 @t1571 @t3753 @t3757 @t817 @t4188 @t4209 @t48 @t3756 @t3759 @t78 @t4206 @t4207 @t1597 @t3738 @t3742 @t791 @t4203 @t4224 @t47 @t3741 @t3744 @t79 @t4221 @t4222 @t1623 @t3723 @t3727 @t765 @t4218 @t4239 @t46 @t3726 @t3729 @t80 @t4236 @t4237 @t1649 @t3708 @t3712 @t739 @t4233 @t4254 @t45 @t3711 @t3714 @t81 @t4251 @t4252 @t1675 @t3693 @t3697 @t713 @t4248 @t4269 @t44 @t3696 @t3699 @t82 @t4266 @t4267 @t1701 @t3678 @t3682 @t687 @t4263 @t4284 @t43 @t3681 @t3684 @t83 @t4281 @t4282 @t1727 @t3663 @t3667 @t661 @t4278 @t4299 @t42 @t3666 @t3669 @t84 @t4296 @t4297 @t1753 @t3648 @t3652 @t635 @t4293 @t4314 @t41 @t3651 @t3654 @t85 @t4311 @t4312 @t1779 @t3633 @t3637 @t609 @t4308 @t4329 @t40 @t3636 @t3639 @t86 @t4326 @t4327 @t1805 @t3618 @t3622 @t583 @t4323 @t4344 @t39 @t3621 @t3624 @t87 @t4341 @t4342 @t1831 @t3603 @t3607 @t557 @t4338 @t4359 @t38 @t3606 @t3609 @t88 @t4356 @t4357 @t1857 @t3588 @t3592 @t531 @t4353 @t4374 @t37 @t3591 @t3594 @t89 @t4371 @t4372 @t1883 @t3573 @t3577 @t505 @t4368 @t4389 @t36 @t3576 @t3579 @t90 @t4386 @t4387 @t1909 @t3558 @t3562 @t479 @t4383 @t4404 @t35 @t3561 @t3564 @t91 @t4401 @t4402 @t1935 @t3543 @t3547 @t453 @t4398 @t4419 @t34 @t3546 @t3549 @t92 @t4416 @t4417 @t1961 @t3528 @t3532 @t427 @t4413 @t4434 @t33 @t3531 @t3534 @t93 @t4431 @t4432 @t1987 @t3513 @t3517 @t401 @t4428 @t4449 @t32 @t3516 @t3519 @t94 @t4446 @t4447 @t2013 @t3498 @t3502 @t375 @t4443 @t4464 @t31 @t3501 @t3504 @t95 @t4461 @t4462 @t2039 @t3483 @t3487 @t349 @t4458 @t4479 @t30 @t3486 @t3489 @t96 @t4476 @t4477 @t2065 @t3468 @t3472 @t323 @t4473 @t4494 @t29 @t3471 @t3474 @t97 @t4491 @t4492 @t2091 @t3453 @t3457 @t297 @t4488 @t4509 @t28 @t3456 @t3459 @t98 @t4506 @t4507 @t2117 @t3441 @t3444 @t276 @t4503 @t4504 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6167 @t220) % 40.01/40.20 (step @p5335 :rule instantiate :premises (@p110) :args (@t4510)) % 40.01/40.20 (step-pop @p6168 :rule scope :premises (@p5335)) % 40.01/40.20 (step @p5336 :rule process_scope :premises (@p6168) :args (@t4513)) % 40.01/40.20 (step @p5338 :rule implies_elim :premises (@p5336)) % 40.01/40.20 (step @p5339 :rule cnf_or_pos :args (@t4513)) % 40.01/40.20 (step @p5340 :rule reordering :premises (@p5339) :args ((or @t4512 @t4511 (not @t4513)))) % 40.01/40.20 (step @p5341 :rule instantiate :premises (@p112) :args (@t4514)) % 40.01/40.20 (step @p5342 :rule cnf_or_pos :args (@t4515)) % 40.01/40.20 (step @p5343 :rule reordering :premises (@p5342) :args ((or @t4512 @t244 @t2145 (not @t4515)))) % 40.01/40.20 (step @p5344 :rule instantiate :premises (@p108) :args (@t4510)) % 40.01/40.20 (step @p5345 :rule cnf_or_pos :args (@t4517)) % 40.01/40.20 (step @p5346 :rule reordering :premises (@p5345) :args ((or @t2156 @t265 @t264 @t4516 (not @t4517)))) % 40.01/40.20 (step @p5347 :rule chain_m_resolution :premises (@p5346 @p5344 @p2264 @p2262 @p136 @p134 @p5343 @p5341 @p133 @p131 @p130 @p128 @p127 @p125 @p5340 @p5338 @p110) :args ((or @t4512 @t239) @t267 (@list @t4517 @t2156 @t2158 @t248 @t249 @t2145 @t4515 @t245 @t247 @t242 @t243 @t240 @t241 @t4511 @t4513 @t220))) % 40.01/40.20 (step @p5348 :rule instantiate :premises (@p119) :args (@t4514)) % 40.01/40.20 (step @p5349 :rule cnf_or_pos :args (@t4519)) % 40.01/40.20 (step @p5350 :rule reordering :premises (@p5349) :args ((or @t270 @t4512 @t4518 @t3440 (not @t4519)))) % 40.01/40.20 (step @p5351 :rule instantiate :premises (@p120) :args (@t2142)) % 40.01/40.20 (step @p5352 :rule cnf_or_pos :args (@t4522)) % 40.01/40.20 (step @p5353 :rule reordering :premises (@p5352) :args ((or @t4521 @t4520 @t2143 (not @t4522)))) % 40.01/40.20 (step @p5354 :rule instantiate :premises (@p121) :args (@t2141)) % 40.01/40.20 (step @p5355 :rule cnf_or_pos :args (@t4524)) % 40.01/40.20 (step @p5356 :rule reordering :premises (@p5355) :args ((or @t2151 @t4503 @t4523 (not @t4524)))) % 40.01/40.20 (step @p5357 :rule chain_m_resolution :premises (@p4489 @p4487 @p1231 @p4516 @p4514 @p62 @p4492 @p4490 @p63 @p4513 @p4511 @p1260 @p4465 @p4463 @p1202 @p4540 @p4538 @p61 @p4468 @p4466 @p64 @p4537 @p4535 @p1289 @p4441 @p4439 @p1173 @p4564 @p4562 @p60 @p4444 @p4442 @p65 @p4561 @p4559 @p1318 @p4417 @p4415 @p1144 @p4588 @p4586 @p59 @p4420 @p4418 @p66 @p4585 @p4583 @p1347 @p4393 @p4391 @p1115 @p4612 @p4610 @p58 @p4396 @p4394 @p67 @p4609 @p4607 @p1376 @p4369 @p4367 @p1086 @p4636 @p4634 @p57 @p4372 @p4370 @p68 @p4633 @p4631 @p1405 @p4345 @p4343 @p1057 @p4660 @p4658 @p56 @p4348 @p4346 @p69 @p4657 @p4655 @p1434 @p4321 @p4319 @p1028 @p4684 @p4682 @p55 @p4324 @p4322 @p70 @p4681 @p4679 @p1463 @p4297 @p4295 @p999 @p4708 @p4706 @p54 @p4300 @p4298 @p71 @p4705 @p4703 @p1492 @p4273 @p4271 @p970 @p4732 @p4730 @p53 @p4276 @p4274 @p72 @p4729 @p4727 @p1521 @p4249 @p4247 @p941 @p4756 @p4754 @p52 @p4252 @p4250 @p73 @p4753 @p4751 @p1550 @p4225 @p4223 @p912 @p4780 @p4778 @p51 @p4228 @p4226 @p74 @p4777 @p4775 @p1579 @p4201 @p4199 @p883 @p4804 @p4802 @p50 @p4204 @p4202 @p75 @p4801 @p4799 @p1608 @p4177 @p4175 @p854 @p4828 @p4826 @p49 @p4180 @p4178 @p76 @p4825 @p4823 @p1637 @p4153 @p4151 @p825 @p4852 @p4850 @p48 @p4156 @p4154 @p77 @p4849 @p4847 @p1666 @p4129 @p4127 @p796 @p4876 @p4874 @p47 @p4132 @p4130 @p78 @p4873 @p4871 @p1695 @p4105 @p4103 @p767 @p4900 @p4898 @p46 @p4108 @p4106 @p79 @p4897 @p4895 @p1724 @p4081 @p4079 @p738 @p4924 @p4922 @p45 @p4084 @p4082 @p80 @p4921 @p4919 @p1753 @p4057 @p4055 @p709 @p4948 @p4946 @p44 @p4060 @p4058 @p81 @p4945 @p4943 @p1782 @p4033 @p4031 @p680 @p4972 @p4970 @p43 @p4036 @p4034 @p82 @p4969 @p4967 @p1811 @p4009 @p4007 @p651 @p4996 @p4994 @p42 @p4012 @p4010 @p83 @p4993 @p4991 @p1840 @p3985 @p3983 @p622 @p5020 @p5018 @p41 @p3988 @p3986 @p84 @p5017 @p5015 @p1869 @p3961 @p3959 @p593 @p5044 @p5042 @p40 @p3964 @p3962 @p85 @p5041 @p5039 @p1898 @p3937 @p3935 @p564 @p5068 @p5066 @p39 @p3940 @p3938 @p86 @p5065 @p5063 @p1927 @p3913 @p3911 @p535 @p5092 @p5090 @p38 @p3916 @p3914 @p87 @p5089 @p5087 @p1956 @p3889 @p3887 @p506 @p5116 @p5114 @p37 @p3892 @p3890 @p88 @p5113 @p5111 @p1985 @p3865 @p3863 @p477 @p5140 @p5138 @p36 @p3868 @p3866 @p89 @p5137 @p5135 @p2014 @p3841 @p3839 @p448 @p5164 @p5162 @p35 @p3844 @p3842 @p90 @p5161 @p5159 @p2043 @p3817 @p3815 @p419 @p5188 @p5186 @p34 @p3820 @p3818 @p91 @p5185 @p5183 @p2072 @p3793 @p3791 @p390 @p5212 @p5210 @p33 @p3796 @p3794 @p92 @p5209 @p5207 @p2101 @p3769 @p3767 @p361 @p5236 @p5234 @p32 @p3772 @p3770 @p93 @p5233 @p5231 @p2130 @p3745 @p3743 @p332 @p5260 @p5258 @p31 @p3748 @p3746 @p94 @p5257 @p5255 @p2159 @p3721 @p3719 @p303 @p5284 @p5282 @p30 @p3724 @p3722 @p95 @p5281 @p5279 @p2188 @p3697 @p3695 @p274 @p5308 @p5306 @p29 @p3700 @p3698 @p96 @p5305 @p5303 @p2217 @p3673 @p3671 @p245 @p5332 @p5330 @p28 @p3676 @p3674 @p97 @p5329 @p5327 @p2246 @p3649 @p3647 @p216 @p5356 @p5354 @p27 @p3652 @p3650 @p98 @p5353 @p5351 @p2275 @p3628 @p3626 @p187 @p5350 @p5348 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5347) :args (@t4512 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3982 @t1207 @t3978 @t3999 @t62 @t3981 @t3984 @t63 @t3996 @t3997 @t1233 @t3963 @t3967 @t1181 @t3993 @t4014 @t61 @t3966 @t3969 @t64 @t4011 @t4012 @t1259 @t3948 @t3952 @t1155 @t4008 @t4029 @t60 @t3951 @t3954 @t65 @t4026 @t4027 @t1285 @t3933 @t3937 @t1129 @t4023 @t4044 @t59 @t3936 @t3939 @t66 @t4041 @t4042 @t1311 @t3918 @t3922 @t1103 @t4038 @t4059 @t58 @t3921 @t3924 @t67 @t4056 @t4057 @t1337 @t3903 @t3907 @t1077 @t4053 @t4074 @t57 @t3906 @t3909 @t68 @t4071 @t4072 @t1363 @t3888 @t3892 @t1051 @t4068 @t4089 @t56 @t3891 @t3894 @t69 @t4086 @t4087 @t1389 @t3873 @t3877 @t1025 @t4083 @t4104 @t55 @t3876 @t3879 @t70 @t4101 @t4102 @t1415 @t3858 @t3862 @t999 @t4098 @t4119 @t54 @t3861 @t3864 @t71 @t4116 @t4117 @t1441 @t3843 @t3847 @t973 @t4113 @t4134 @t53 @t3846 @t3849 @t72 @t4131 @t4132 @t1467 @t3828 @t3832 @t947 @t4128 @t4149 @t52 @t3831 @t3834 @t73 @t4146 @t4147 @t1493 @t3813 @t3817 @t921 @t4143 @t4164 @t51 @t3816 @t3819 @t74 @t4161 @t4162 @t1519 @t3798 @t3802 @t895 @t4158 @t4179 @t50 @t3801 @t3804 @t75 @t4176 @t4177 @t1545 @t3783 @t3787 @t869 @t4173 @t4194 @t49 @t3786 @t3789 @t76 @t4191 @t4192 @t1571 @t3768 @t3772 @t843 @t4188 @t4209 @t48 @t3771 @t3774 @t77 @t4206 @t4207 @t1597 @t3753 @t3757 @t817 @t4203 @t4224 @t47 @t3756 @t3759 @t78 @t4221 @t4222 @t1623 @t3738 @t3742 @t791 @t4218 @t4239 @t46 @t3741 @t3744 @t79 @t4236 @t4237 @t1649 @t3723 @t3727 @t765 @t4233 @t4254 @t45 @t3726 @t3729 @t80 @t4251 @t4252 @t1675 @t3708 @t3712 @t739 @t4248 @t4269 @t44 @t3711 @t3714 @t81 @t4266 @t4267 @t1701 @t3693 @t3697 @t713 @t4263 @t4284 @t43 @t3696 @t3699 @t82 @t4281 @t4282 @t1727 @t3678 @t3682 @t687 @t4278 @t4299 @t42 @t3681 @t3684 @t83 @t4296 @t4297 @t1753 @t3663 @t3667 @t661 @t4293 @t4314 @t41 @t3666 @t3669 @t84 @t4311 @t4312 @t1779 @t3648 @t3652 @t635 @t4308 @t4329 @t40 @t3651 @t3654 @t85 @t4326 @t4327 @t1805 @t3633 @t3637 @t609 @t4323 @t4344 @t39 @t3636 @t3639 @t86 @t4341 @t4342 @t1831 @t3618 @t3622 @t583 @t4338 @t4359 @t38 @t3621 @t3624 @t87 @t4356 @t4357 @t1857 @t3603 @t3607 @t557 @t4353 @t4374 @t37 @t3606 @t3609 @t88 @t4371 @t4372 @t1883 @t3588 @t3592 @t531 @t4368 @t4389 @t36 @t3591 @t3594 @t89 @t4386 @t4387 @t1909 @t3573 @t3577 @t505 @t4383 @t4404 @t35 @t3576 @t3579 @t90 @t4401 @t4402 @t1935 @t3558 @t3562 @t479 @t4398 @t4419 @t34 @t3561 @t3564 @t91 @t4416 @t4417 @t1961 @t3543 @t3547 @t453 @t4413 @t4434 @t33 @t3546 @t3549 @t92 @t4431 @t4432 @t1987 @t3528 @t3532 @t427 @t4428 @t4449 @t32 @t3531 @t3534 @t93 @t4446 @t4447 @t2013 @t3513 @t3517 @t401 @t4443 @t4464 @t31 @t3516 @t3519 @t94 @t4461 @t4462 @t2039 @t3498 @t3502 @t375 @t4458 @t4479 @t30 @t3501 @t3504 @t95 @t4476 @t4477 @t2065 @t3483 @t3487 @t349 @t4473 @t4494 @t29 @t3486 @t3489 @t96 @t4491 @t4492 @t2091 @t3468 @t3472 @t323 @t4488 @t4509 @t28 @t3471 @t3474 @t97 @t4506 @t4507 @t2117 @t3453 @t3457 @t297 @t4503 @t4524 @t27 @t3456 @t3459 @t98 @t4521 @t4522 @t2143 @t3441 @t3444 @t276 @t4518 @t4519 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6169 @t220) % 40.01/40.20 (step @p5359 :rule instantiate :premises (@p110) :args (@t4525)) % 40.01/40.20 (step-pop @p6170 :rule scope :premises (@p5359)) % 40.01/40.20 (step @p5360 :rule process_scope :premises (@p6170) :args (@t4528)) % 40.01/40.20 (step @p5362 :rule implies_elim :premises (@p5360)) % 40.01/40.20 (step @p5363 :rule cnf_or_pos :args (@t4528)) % 40.01/40.20 (step @p5364 :rule reordering :premises (@p5363) :args ((or @t4527 @t4526 (not @t4528)))) % 40.01/40.20 (step @p5365 :rule instantiate :premises (@p112) :args (@t4529)) % 40.01/40.20 (step @p5366 :rule cnf_or_pos :args (@t4530)) % 40.01/40.20 (step @p5367 :rule reordering :premises (@p5366) :args ((or @t4527 @t244 @t2171 (not @t4530)))) % 40.01/40.20 (step @p5368 :rule instantiate :premises (@p108) :args (@t4525)) % 40.01/40.20 (step @p5369 :rule cnf_or_pos :args (@t4532)) % 40.01/40.20 (step @p5370 :rule reordering :premises (@p5369) :args ((or @t2182 @t265 @t264 @t4531 (not @t4532)))) % 40.01/40.20 (step @p5371 :rule chain_m_resolution :premises (@p5370 @p5368 @p2293 @p2291 @p136 @p134 @p5367 @p5365 @p133 @p131 @p130 @p128 @p127 @p125 @p5364 @p5362 @p110) :args ((or @t4527 @t239) @t267 (@list @t4532 @t2182 @t2184 @t248 @t249 @t2171 @t4530 @t245 @t247 @t242 @t243 @t240 @t241 @t4526 @t4528 @t220))) % 40.01/40.20 (step @p5372 :rule instantiate :premises (@p119) :args (@t4529)) % 40.01/40.20 (step @p5373 :rule cnf_or_pos :args (@t4534)) % 40.01/40.20 (step @p5374 :rule reordering :premises (@p5373) :args ((or @t270 @t4527 @t4533 @t3440 (not @t4534)))) % 40.01/40.20 (step @p5375 :rule instantiate :premises (@p120) :args (@t2168)) % 40.01/40.20 (step @p5376 :rule cnf_or_pos :args (@t4537)) % 40.01/40.20 (step @p5377 :rule reordering :premises (@p5376) :args ((or @t4536 @t4535 @t2169 (not @t4537)))) % 40.01/40.20 (step @p5378 :rule instantiate :premises (@p121) :args (@t2167)) % 40.01/40.20 (step @p5379 :rule cnf_or_pos :args (@t4539)) % 40.01/40.20 (step @p5380 :rule reordering :premises (@p5379) :args ((or @t2177 @t4518 @t4538 (not @t4539)))) % 40.01/40.20 (step @p5381 :rule chain_m_resolution :premises (@p4516 @p4514 @p62 @p4513 @p4511 @p1260 @p4489 @p4487 @p1231 @p4540 @p4538 @p61 @p4492 @p4490 @p63 @p4537 @p4535 @p1289 @p4465 @p4463 @p1202 @p4564 @p4562 @p60 @p4468 @p4466 @p64 @p4561 @p4559 @p1318 @p4441 @p4439 @p1173 @p4588 @p4586 @p59 @p4444 @p4442 @p65 @p4585 @p4583 @p1347 @p4417 @p4415 @p1144 @p4612 @p4610 @p58 @p4420 @p4418 @p66 @p4609 @p4607 @p1376 @p4393 @p4391 @p1115 @p4636 @p4634 @p57 @p4396 @p4394 @p67 @p4633 @p4631 @p1405 @p4369 @p4367 @p1086 @p4660 @p4658 @p56 @p4372 @p4370 @p68 @p4657 @p4655 @p1434 @p4345 @p4343 @p1057 @p4684 @p4682 @p55 @p4348 @p4346 @p69 @p4681 @p4679 @p1463 @p4321 @p4319 @p1028 @p4708 @p4706 @p54 @p4324 @p4322 @p70 @p4705 @p4703 @p1492 @p4297 @p4295 @p999 @p4732 @p4730 @p53 @p4300 @p4298 @p71 @p4729 @p4727 @p1521 @p4273 @p4271 @p970 @p4756 @p4754 @p52 @p4276 @p4274 @p72 @p4753 @p4751 @p1550 @p4249 @p4247 @p941 @p4780 @p4778 @p51 @p4252 @p4250 @p73 @p4777 @p4775 @p1579 @p4225 @p4223 @p912 @p4804 @p4802 @p50 @p4228 @p4226 @p74 @p4801 @p4799 @p1608 @p4201 @p4199 @p883 @p4828 @p4826 @p49 @p4204 @p4202 @p75 @p4825 @p4823 @p1637 @p4177 @p4175 @p854 @p4852 @p4850 @p48 @p4180 @p4178 @p76 @p4849 @p4847 @p1666 @p4153 @p4151 @p825 @p4876 @p4874 @p47 @p4156 @p4154 @p77 @p4873 @p4871 @p1695 @p4129 @p4127 @p796 @p4900 @p4898 @p46 @p4132 @p4130 @p78 @p4897 @p4895 @p1724 @p4105 @p4103 @p767 @p4924 @p4922 @p45 @p4108 @p4106 @p79 @p4921 @p4919 @p1753 @p4081 @p4079 @p738 @p4948 @p4946 @p44 @p4084 @p4082 @p80 @p4945 @p4943 @p1782 @p4057 @p4055 @p709 @p4972 @p4970 @p43 @p4060 @p4058 @p81 @p4969 @p4967 @p1811 @p4033 @p4031 @p680 @p4996 @p4994 @p42 @p4036 @p4034 @p82 @p4993 @p4991 @p1840 @p4009 @p4007 @p651 @p5020 @p5018 @p41 @p4012 @p4010 @p83 @p5017 @p5015 @p1869 @p3985 @p3983 @p622 @p5044 @p5042 @p40 @p3988 @p3986 @p84 @p5041 @p5039 @p1898 @p3961 @p3959 @p593 @p5068 @p5066 @p39 @p3964 @p3962 @p85 @p5065 @p5063 @p1927 @p3937 @p3935 @p564 @p5092 @p5090 @p38 @p3940 @p3938 @p86 @p5089 @p5087 @p1956 @p3913 @p3911 @p535 @p5116 @p5114 @p37 @p3916 @p3914 @p87 @p5113 @p5111 @p1985 @p3889 @p3887 @p506 @p5140 @p5138 @p36 @p3892 @p3890 @p88 @p5137 @p5135 @p2014 @p3865 @p3863 @p477 @p5164 @p5162 @p35 @p3868 @p3866 @p89 @p5161 @p5159 @p2043 @p3841 @p3839 @p448 @p5188 @p5186 @p34 @p3844 @p3842 @p90 @p5185 @p5183 @p2072 @p3817 @p3815 @p419 @p5212 @p5210 @p33 @p3820 @p3818 @p91 @p5209 @p5207 @p2101 @p3793 @p3791 @p390 @p5236 @p5234 @p32 @p3796 @p3794 @p92 @p5233 @p5231 @p2130 @p3769 @p3767 @p361 @p5260 @p5258 @p31 @p3772 @p3770 @p93 @p5257 @p5255 @p2159 @p3745 @p3743 @p332 @p5284 @p5282 @p30 @p3748 @p3746 @p94 @p5281 @p5279 @p2188 @p3721 @p3719 @p303 @p5308 @p5306 @p29 @p3724 @p3722 @p95 @p5305 @p5303 @p2217 @p3697 @p3695 @p274 @p5332 @p5330 @p28 @p3700 @p3698 @p96 @p5329 @p5327 @p2246 @p3673 @p3671 @p245 @p5356 @p5354 @p27 @p3676 @p3674 @p97 @p5353 @p5351 @p2275 @p3649 @p3647 @p216 @p5380 @p5378 @p26 @p3652 @p3650 @p98 @p5377 @p5375 @p2304 @p3628 @p3626 @p187 @p5374 @p5372 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5371) :args (@t4527 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3999 @t62 @t3996 @t3997 @t1233 @t3978 @t3982 @t1207 @t3993 @t4014 @t61 @t3981 @t3984 @t63 @t4011 @t4012 @t1259 @t3963 @t3967 @t1181 @t4008 @t4029 @t60 @t3966 @t3969 @t64 @t4026 @t4027 @t1285 @t3948 @t3952 @t1155 @t4023 @t4044 @t59 @t3951 @t3954 @t65 @t4041 @t4042 @t1311 @t3933 @t3937 @t1129 @t4038 @t4059 @t58 @t3936 @t3939 @t66 @t4056 @t4057 @t1337 @t3918 @t3922 @t1103 @t4053 @t4074 @t57 @t3921 @t3924 @t67 @t4071 @t4072 @t1363 @t3903 @t3907 @t1077 @t4068 @t4089 @t56 @t3906 @t3909 @t68 @t4086 @t4087 @t1389 @t3888 @t3892 @t1051 @t4083 @t4104 @t55 @t3891 @t3894 @t69 @t4101 @t4102 @t1415 @t3873 @t3877 @t1025 @t4098 @t4119 @t54 @t3876 @t3879 @t70 @t4116 @t4117 @t1441 @t3858 @t3862 @t999 @t4113 @t4134 @t53 @t3861 @t3864 @t71 @t4131 @t4132 @t1467 @t3843 @t3847 @t973 @t4128 @t4149 @t52 @t3846 @t3849 @t72 @t4146 @t4147 @t1493 @t3828 @t3832 @t947 @t4143 @t4164 @t51 @t3831 @t3834 @t73 @t4161 @t4162 @t1519 @t3813 @t3817 @t921 @t4158 @t4179 @t50 @t3816 @t3819 @t74 @t4176 @t4177 @t1545 @t3798 @t3802 @t895 @t4173 @t4194 @t49 @t3801 @t3804 @t75 @t4191 @t4192 @t1571 @t3783 @t3787 @t869 @t4188 @t4209 @t48 @t3786 @t3789 @t76 @t4206 @t4207 @t1597 @t3768 @t3772 @t843 @t4203 @t4224 @t47 @t3771 @t3774 @t77 @t4221 @t4222 @t1623 @t3753 @t3757 @t817 @t4218 @t4239 @t46 @t3756 @t3759 @t78 @t4236 @t4237 @t1649 @t3738 @t3742 @t791 @t4233 @t4254 @t45 @t3741 @t3744 @t79 @t4251 @t4252 @t1675 @t3723 @t3727 @t765 @t4248 @t4269 @t44 @t3726 @t3729 @t80 @t4266 @t4267 @t1701 @t3708 @t3712 @t739 @t4263 @t4284 @t43 @t3711 @t3714 @t81 @t4281 @t4282 @t1727 @t3693 @t3697 @t713 @t4278 @t4299 @t42 @t3696 @t3699 @t82 @t4296 @t4297 @t1753 @t3678 @t3682 @t687 @t4293 @t4314 @t41 @t3681 @t3684 @t83 @t4311 @t4312 @t1779 @t3663 @t3667 @t661 @t4308 @t4329 @t40 @t3666 @t3669 @t84 @t4326 @t4327 @t1805 @t3648 @t3652 @t635 @t4323 @t4344 @t39 @t3651 @t3654 @t85 @t4341 @t4342 @t1831 @t3633 @t3637 @t609 @t4338 @t4359 @t38 @t3636 @t3639 @t86 @t4356 @t4357 @t1857 @t3618 @t3622 @t583 @t4353 @t4374 @t37 @t3621 @t3624 @t87 @t4371 @t4372 @t1883 @t3603 @t3607 @t557 @t4368 @t4389 @t36 @t3606 @t3609 @t88 @t4386 @t4387 @t1909 @t3588 @t3592 @t531 @t4383 @t4404 @t35 @t3591 @t3594 @t89 @t4401 @t4402 @t1935 @t3573 @t3577 @t505 @t4398 @t4419 @t34 @t3576 @t3579 @t90 @t4416 @t4417 @t1961 @t3558 @t3562 @t479 @t4413 @t4434 @t33 @t3561 @t3564 @t91 @t4431 @t4432 @t1987 @t3543 @t3547 @t453 @t4428 @t4449 @t32 @t3546 @t3549 @t92 @t4446 @t4447 @t2013 @t3528 @t3532 @t427 @t4443 @t4464 @t31 @t3531 @t3534 @t93 @t4461 @t4462 @t2039 @t3513 @t3517 @t401 @t4458 @t4479 @t30 @t3516 @t3519 @t94 @t4476 @t4477 @t2065 @t3498 @t3502 @t375 @t4473 @t4494 @t29 @t3501 @t3504 @t95 @t4491 @t4492 @t2091 @t3483 @t3487 @t349 @t4488 @t4509 @t28 @t3486 @t3489 @t96 @t4506 @t4507 @t2117 @t3468 @t3472 @t323 @t4503 @t4524 @t27 @t3471 @t3474 @t97 @t4521 @t4522 @t2143 @t3453 @t3457 @t297 @t4518 @t4539 @t26 @t3456 @t3459 @t98 @t4536 @t4537 @t2169 @t3441 @t3444 @t276 @t4533 @t4534 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.20 (assume-push @p6171 @t220) % 40.01/40.20 (step @p5383 :rule instantiate :premises (@p110) :args (@t4540)) % 40.01/40.20 (step-pop @p6172 :rule scope :premises (@p5383)) % 40.01/40.20 (step @p5384 :rule process_scope :premises (@p6172) :args (@t4543)) % 40.01/40.20 (step @p5386 :rule implies_elim :premises (@p5384)) % 40.01/40.20 (step @p5387 :rule cnf_or_pos :args (@t4543)) % 40.01/40.20 (step @p5388 :rule reordering :premises (@p5387) :args ((or @t4542 @t4541 (not @t4543)))) % 40.01/40.20 (step @p5389 :rule instantiate :premises (@p112) :args (@t4544)) % 40.01/40.20 (step @p5390 :rule cnf_or_pos :args (@t4545)) % 40.01/40.20 (step @p5391 :rule reordering :premises (@p5390) :args ((or @t4542 @t244 @t2197 (not @t4545)))) % 40.01/40.20 (step @p5392 :rule instantiate :premises (@p108) :args (@t4540)) % 40.01/40.20 (step @p5393 :rule cnf_or_pos :args (@t4547)) % 40.01/40.20 (step @p5394 :rule reordering :premises (@p5393) :args ((or @t2208 @t265 @t264 @t4546 (not @t4547)))) % 40.01/40.20 (step @p5395 :rule chain_m_resolution :premises (@p5394 @p5392 @p2322 @p2320 @p136 @p134 @p5391 @p5389 @p133 @p131 @p130 @p128 @p127 @p125 @p5388 @p5386 @p110) :args ((or @t4542 @t239) @t267 (@list @t4547 @t2208 @t2210 @t248 @t249 @t2197 @t4545 @t245 @t247 @t242 @t243 @t240 @t241 @t4541 @t4543 @t220))) % 40.01/40.20 (step @p5396 :rule instantiate :premises (@p119) :args (@t4544)) % 40.01/40.20 (step @p5397 :rule cnf_or_pos :args (@t4549)) % 40.01/40.20 (step @p5398 :rule reordering :premises (@p5397) :args ((or @t270 @t4542 @t4548 @t3440 (not @t4549)))) % 40.01/40.20 (step @p5399 :rule instantiate :premises (@p120) :args (@t2194)) % 40.01/40.20 (step @p5400 :rule cnf_or_pos :args (@t4552)) % 40.01/40.20 (step @p5401 :rule reordering :premises (@p5400) :args ((or @t4551 @t4550 @t2195 (not @t4552)))) % 40.01/40.20 (step @p5402 :rule instantiate :premises (@p121) :args (@t2193)) % 40.01/40.20 (step @p5403 :rule cnf_or_pos :args (@t4554)) % 40.01/40.20 (step @p5404 :rule reordering :premises (@p5403) :args ((or @t2203 @t4533 @t4553 (not @t4554)))) % 40.01/40.20 (step @p5405 :rule chain_m_resolution :premises (@p4513 @p4511 @p1260 @p4540 @p4538 @p61 @p4516 @p4514 @p62 @p4537 @p4535 @p1289 @p4489 @p4487 @p1231 @p4564 @p4562 @p60 @p4492 @p4490 @p63 @p4561 @p4559 @p1318 @p4465 @p4463 @p1202 @p4588 @p4586 @p59 @p4468 @p4466 @p64 @p4585 @p4583 @p1347 @p4441 @p4439 @p1173 @p4612 @p4610 @p58 @p4444 @p4442 @p65 @p4609 @p4607 @p1376 @p4417 @p4415 @p1144 @p4636 @p4634 @p57 @p4420 @p4418 @p66 @p4633 @p4631 @p1405 @p4393 @p4391 @p1115 @p4660 @p4658 @p56 @p4396 @p4394 @p67 @p4657 @p4655 @p1434 @p4369 @p4367 @p1086 @p4684 @p4682 @p55 @p4372 @p4370 @p68 @p4681 @p4679 @p1463 @p4345 @p4343 @p1057 @p4708 @p4706 @p54 @p4348 @p4346 @p69 @p4705 @p4703 @p1492 @p4321 @p4319 @p1028 @p4732 @p4730 @p53 @p4324 @p4322 @p70 @p4729 @p4727 @p1521 @p4297 @p4295 @p999 @p4756 @p4754 @p52 @p4300 @p4298 @p71 @p4753 @p4751 @p1550 @p4273 @p4271 @p970 @p4780 @p4778 @p51 @p4276 @p4274 @p72 @p4777 @p4775 @p1579 @p4249 @p4247 @p941 @p4804 @p4802 @p50 @p4252 @p4250 @p73 @p4801 @p4799 @p1608 @p4225 @p4223 @p912 @p4828 @p4826 @p49 @p4228 @p4226 @p74 @p4825 @p4823 @p1637 @p4201 @p4199 @p883 @p4852 @p4850 @p48 @p4204 @p4202 @p75 @p4849 @p4847 @p1666 @p4177 @p4175 @p854 @p4876 @p4874 @p47 @p4180 @p4178 @p76 @p4873 @p4871 @p1695 @p4153 @p4151 @p825 @p4900 @p4898 @p46 @p4156 @p4154 @p77 @p4897 @p4895 @p1724 @p4129 @p4127 @p796 @p4924 @p4922 @p45 @p4132 @p4130 @p78 @p4921 @p4919 @p1753 @p4105 @p4103 @p767 @p4948 @p4946 @p44 @p4108 @p4106 @p79 @p4945 @p4943 @p1782 @p4081 @p4079 @p738 @p4972 @p4970 @p43 @p4084 @p4082 @p80 @p4969 @p4967 @p1811 @p4057 @p4055 @p709 @p4996 @p4994 @p42 @p4060 @p4058 @p81 @p4993 @p4991 @p1840 @p4033 @p4031 @p680 @p5020 @p5018 @p41 @p4036 @p4034 @p82 @p5017 @p5015 @p1869 @p4009 @p4007 @p651 @p5044 @p5042 @p40 @p4012 @p4010 @p83 @p5041 @p5039 @p1898 @p3985 @p3983 @p622 @p5068 @p5066 @p39 @p3988 @p3986 @p84 @p5065 @p5063 @p1927 @p3961 @p3959 @p593 @p5092 @p5090 @p38 @p3964 @p3962 @p85 @p5089 @p5087 @p1956 @p3937 @p3935 @p564 @p5116 @p5114 @p37 @p3940 @p3938 @p86 @p5113 @p5111 @p1985 @p3913 @p3911 @p535 @p5140 @p5138 @p36 @p3916 @p3914 @p87 @p5137 @p5135 @p2014 @p3889 @p3887 @p506 @p5164 @p5162 @p35 @p3892 @p3890 @p88 @p5161 @p5159 @p2043 @p3865 @p3863 @p477 @p5188 @p5186 @p34 @p3868 @p3866 @p89 @p5185 @p5183 @p2072 @p3841 @p3839 @p448 @p5212 @p5210 @p33 @p3844 @p3842 @p90 @p5209 @p5207 @p2101 @p3817 @p3815 @p419 @p5236 @p5234 @p32 @p3820 @p3818 @p91 @p5233 @p5231 @p2130 @p3793 @p3791 @p390 @p5260 @p5258 @p31 @p3796 @p3794 @p92 @p5257 @p5255 @p2159 @p3769 @p3767 @p361 @p5284 @p5282 @p30 @p3772 @p3770 @p93 @p5281 @p5279 @p2188 @p3745 @p3743 @p332 @p5308 @p5306 @p29 @p3748 @p3746 @p94 @p5305 @p5303 @p2217 @p3721 @p3719 @p303 @p5332 @p5330 @p28 @p3724 @p3722 @p95 @p5329 @p5327 @p2246 @p3697 @p3695 @p274 @p5356 @p5354 @p27 @p3700 @p3698 @p96 @p5353 @p5351 @p2275 @p3673 @p3671 @p245 @p5380 @p5378 @p26 @p3676 @p3674 @p97 @p5377 @p5375 @p2304 @p3649 @p3647 @p216 @p5404 @p5402 @p25 @p3652 @p3650 @p98 @p5401 @p5399 @p2333 @p3628 @p3626 @p187 @p5398 @p5396 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5395) :args (@t4542 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t3997 @t1233 @t3993 @t4014 @t61 @t3996 @t3999 @t62 @t4011 @t4012 @t1259 @t3978 @t3982 @t1207 @t4008 @t4029 @t60 @t3981 @t3984 @t63 @t4026 @t4027 @t1285 @t3963 @t3967 @t1181 @t4023 @t4044 @t59 @t3966 @t3969 @t64 @t4041 @t4042 @t1311 @t3948 @t3952 @t1155 @t4038 @t4059 @t58 @t3951 @t3954 @t65 @t4056 @t4057 @t1337 @t3933 @t3937 @t1129 @t4053 @t4074 @t57 @t3936 @t3939 @t66 @t4071 @t4072 @t1363 @t3918 @t3922 @t1103 @t4068 @t4089 @t56 @t3921 @t3924 @t67 @t4086 @t4087 @t1389 @t3903 @t3907 @t1077 @t4083 @t4104 @t55 @t3906 @t3909 @t68 @t4101 @t4102 @t1415 @t3888 @t3892 @t1051 @t4098 @t4119 @t54 @t3891 @t3894 @t69 @t4116 @t4117 @t1441 @t3873 @t3877 @t1025 @t4113 @t4134 @t53 @t3876 @t3879 @t70 @t4131 @t4132 @t1467 @t3858 @t3862 @t999 @t4128 @t4149 @t52 @t3861 @t3864 @t71 @t4146 @t4147 @t1493 @t3843 @t3847 @t973 @t4143 @t4164 @t51 @t3846 @t3849 @t72 @t4161 @t4162 @t1519 @t3828 @t3832 @t947 @t4158 @t4179 @t50 @t3831 @t3834 @t73 @t4176 @t4177 @t1545 @t3813 @t3817 @t921 @t4173 @t4194 @t49 @t3816 @t3819 @t74 @t4191 @t4192 @t1571 @t3798 @t3802 @t895 @t4188 @t4209 @t48 @t3801 @t3804 @t75 @t4206 @t4207 @t1597 @t3783 @t3787 @t869 @t4203 @t4224 @t47 @t3786 @t3789 @t76 @t4221 @t4222 @t1623 @t3768 @t3772 @t843 @t4218 @t4239 @t46 @t3771 @t3774 @t77 @t4236 @t4237 @t1649 @t3753 @t3757 @t817 @t4233 @t4254 @t45 @t3756 @t3759 @t78 @t4251 @t4252 @t1675 @t3738 @t3742 @t791 @t4248 @t4269 @t44 @t3741 @t3744 @t79 @t4266 @t4267 @t1701 @t3723 @t3727 @t765 @t4263 @t4284 @t43 @t3726 @t3729 @t80 @t4281 @t4282 @t1727 @t3708 @t3712 @t739 @t4278 @t4299 @t42 @t3711 @t3714 @t81 @t4296 @t4297 @t1753 @t3693 @t3697 @t713 @t4293 @t4314 @t41 @t3696 @t3699 @t82 @t4311 @t4312 @t1779 @t3678 @t3682 @t687 @t4308 @t4329 @t40 @t3681 @t3684 @t83 @t4326 @t4327 @t1805 @t3663 @t3667 @t661 @t4323 @t4344 @t39 @t3666 @t3669 @t84 @t4341 @t4342 @t1831 @t3648 @t3652 @t635 @t4338 @t4359 @t38 @t3651 @t3654 @t85 @t4356 @t4357 @t1857 @t3633 @t3637 @t609 @t4353 @t4374 @t37 @t3636 @t3639 @t86 @t4371 @t4372 @t1883 @t3618 @t3622 @t583 @t4368 @t4389 @t36 @t3621 @t3624 @t87 @t4386 @t4387 @t1909 @t3603 @t3607 @t557 @t4383 @t4404 @t35 @t3606 @t3609 @t88 @t4401 @t4402 @t1935 @t3588 @t3592 @t531 @t4398 @t4419 @t34 @t3591 @t3594 @t89 @t4416 @t4417 @t1961 @t3573 @t3577 @t505 @t4413 @t4434 @t33 @t3576 @t3579 @t90 @t4431 @t4432 @t1987 @t3558 @t3562 @t479 @t4428 @t4449 @t32 @t3561 @t3564 @t91 @t4446 @t4447 @t2013 @t3543 @t3547 @t453 @t4443 @t4464 @t31 @t3546 @t3549 @t92 @t4461 @t4462 @t2039 @t3528 @t3532 @t427 @t4458 @t4479 @t30 @t3531 @t3534 @t93 @t4476 @t4477 @t2065 @t3513 @t3517 @t401 @t4473 @t4494 @t29 @t3516 @t3519 @t94 @t4491 @t4492 @t2091 @t3498 @t3502 @t375 @t4488 @t4509 @t28 @t3501 @t3504 @t95 @t4506 @t4507 @t2117 @t3483 @t3487 @t349 @t4503 @t4524 @t27 @t3486 @t3489 @t96 @t4521 @t4522 @t2143 @t3468 @t3472 @t323 @t4518 @t4539 @t26 @t3471 @t3474 @t97 @t4536 @t4537 @t2169 @t3453 @t3457 @t297 @t4533 @t4554 @t25 @t3456 @t3459 @t98 @t4551 @t4552 @t2195 @t3441 @t3444 @t276 @t4548 @t4549 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6173 @t220) % 40.01/40.21 (step @p5407 :rule instantiate :premises (@p110) :args (@t4555)) % 40.01/40.21 (step-pop @p6174 :rule scope :premises (@p5407)) % 40.01/40.21 (step @p5408 :rule process_scope :premises (@p6174) :args (@t4558)) % 40.01/40.21 (step @p5410 :rule implies_elim :premises (@p5408)) % 40.01/40.21 (step @p5411 :rule cnf_or_pos :args (@t4558)) % 40.01/40.21 (step @p5412 :rule reordering :premises (@p5411) :args ((or @t4557 @t4556 (not @t4558)))) % 40.01/40.21 (step @p5413 :rule instantiate :premises (@p112) :args (@t4559)) % 40.01/40.21 (step @p5414 :rule cnf_or_pos :args (@t4560)) % 40.01/40.21 (step @p5415 :rule reordering :premises (@p5414) :args ((or @t4557 @t244 @t2223 (not @t4560)))) % 40.01/40.21 (step @p5416 :rule instantiate :premises (@p108) :args (@t4555)) % 40.01/40.21 (step @p5417 :rule cnf_or_pos :args (@t4562)) % 40.01/40.21 (step @p5418 :rule reordering :premises (@p5417) :args ((or @t2234 @t265 @t264 @t4561 (not @t4562)))) % 40.01/40.21 (step @p5419 :rule chain_m_resolution :premises (@p5418 @p5416 @p2351 @p2349 @p136 @p134 @p5415 @p5413 @p133 @p131 @p130 @p128 @p127 @p125 @p5412 @p5410 @p110) :args ((or @t4557 @t239) @t267 (@list @t4562 @t2234 @t2236 @t248 @t249 @t2223 @t4560 @t245 @t247 @t242 @t243 @t240 @t241 @t4556 @t4558 @t220))) % 40.01/40.21 (step @p5420 :rule instantiate :premises (@p119) :args (@t4559)) % 40.01/40.21 (step @p5421 :rule cnf_or_pos :args (@t4564)) % 40.01/40.21 (step @p5422 :rule reordering :premises (@p5421) :args ((or @t270 @t4557 @t4563 @t3440 (not @t4564)))) % 40.01/40.21 (step @p5423 :rule instantiate :premises (@p120) :args (@t2220)) % 40.01/40.21 (step @p5424 :rule cnf_or_pos :args (@t4567)) % 40.01/40.21 (step @p5425 :rule reordering :premises (@p5424) :args ((or @t4566 @t4565 @t2221 (not @t4567)))) % 40.01/40.21 (step @p5426 :rule instantiate :premises (@p121) :args (@t2219)) % 40.01/40.21 (step @p5427 :rule cnf_or_pos :args (@t4569)) % 40.01/40.21 (step @p5428 :rule reordering :premises (@p5427) :args ((or @t2229 @t4548 @t4568 (not @t4569)))) % 40.01/40.21 (step @p5429 :rule chain_m_resolution :premises (@p4540 @p4538 @p61 @p4537 @p4535 @p1289 @p4513 @p4511 @p1260 @p4564 @p4562 @p60 @p4516 @p4514 @p62 @p4561 @p4559 @p1318 @p4489 @p4487 @p1231 @p4588 @p4586 @p59 @p4492 @p4490 @p63 @p4585 @p4583 @p1347 @p4465 @p4463 @p1202 @p4612 @p4610 @p58 @p4468 @p4466 @p64 @p4609 @p4607 @p1376 @p4441 @p4439 @p1173 @p4636 @p4634 @p57 @p4444 @p4442 @p65 @p4633 @p4631 @p1405 @p4417 @p4415 @p1144 @p4660 @p4658 @p56 @p4420 @p4418 @p66 @p4657 @p4655 @p1434 @p4393 @p4391 @p1115 @p4684 @p4682 @p55 @p4396 @p4394 @p67 @p4681 @p4679 @p1463 @p4369 @p4367 @p1086 @p4708 @p4706 @p54 @p4372 @p4370 @p68 @p4705 @p4703 @p1492 @p4345 @p4343 @p1057 @p4732 @p4730 @p53 @p4348 @p4346 @p69 @p4729 @p4727 @p1521 @p4321 @p4319 @p1028 @p4756 @p4754 @p52 @p4324 @p4322 @p70 @p4753 @p4751 @p1550 @p4297 @p4295 @p999 @p4780 @p4778 @p51 @p4300 @p4298 @p71 @p4777 @p4775 @p1579 @p4273 @p4271 @p970 @p4804 @p4802 @p50 @p4276 @p4274 @p72 @p4801 @p4799 @p1608 @p4249 @p4247 @p941 @p4828 @p4826 @p49 @p4252 @p4250 @p73 @p4825 @p4823 @p1637 @p4225 @p4223 @p912 @p4852 @p4850 @p48 @p4228 @p4226 @p74 @p4849 @p4847 @p1666 @p4201 @p4199 @p883 @p4876 @p4874 @p47 @p4204 @p4202 @p75 @p4873 @p4871 @p1695 @p4177 @p4175 @p854 @p4900 @p4898 @p46 @p4180 @p4178 @p76 @p4897 @p4895 @p1724 @p4153 @p4151 @p825 @p4924 @p4922 @p45 @p4156 @p4154 @p77 @p4921 @p4919 @p1753 @p4129 @p4127 @p796 @p4948 @p4946 @p44 @p4132 @p4130 @p78 @p4945 @p4943 @p1782 @p4105 @p4103 @p767 @p4972 @p4970 @p43 @p4108 @p4106 @p79 @p4969 @p4967 @p1811 @p4081 @p4079 @p738 @p4996 @p4994 @p42 @p4084 @p4082 @p80 @p4993 @p4991 @p1840 @p4057 @p4055 @p709 @p5020 @p5018 @p41 @p4060 @p4058 @p81 @p5017 @p5015 @p1869 @p4033 @p4031 @p680 @p5044 @p5042 @p40 @p4036 @p4034 @p82 @p5041 @p5039 @p1898 @p4009 @p4007 @p651 @p5068 @p5066 @p39 @p4012 @p4010 @p83 @p5065 @p5063 @p1927 @p3985 @p3983 @p622 @p5092 @p5090 @p38 @p3988 @p3986 @p84 @p5089 @p5087 @p1956 @p3961 @p3959 @p593 @p5116 @p5114 @p37 @p3964 @p3962 @p85 @p5113 @p5111 @p1985 @p3937 @p3935 @p564 @p5140 @p5138 @p36 @p3940 @p3938 @p86 @p5137 @p5135 @p2014 @p3913 @p3911 @p535 @p5164 @p5162 @p35 @p3916 @p3914 @p87 @p5161 @p5159 @p2043 @p3889 @p3887 @p506 @p5188 @p5186 @p34 @p3892 @p3890 @p88 @p5185 @p5183 @p2072 @p3865 @p3863 @p477 @p5212 @p5210 @p33 @p3868 @p3866 @p89 @p5209 @p5207 @p2101 @p3841 @p3839 @p448 @p5236 @p5234 @p32 @p3844 @p3842 @p90 @p5233 @p5231 @p2130 @p3817 @p3815 @p419 @p5260 @p5258 @p31 @p3820 @p3818 @p91 @p5257 @p5255 @p2159 @p3793 @p3791 @p390 @p5284 @p5282 @p30 @p3796 @p3794 @p92 @p5281 @p5279 @p2188 @p3769 @p3767 @p361 @p5308 @p5306 @p29 @p3772 @p3770 @p93 @p5305 @p5303 @p2217 @p3745 @p3743 @p332 @p5332 @p5330 @p28 @p3748 @p3746 @p94 @p5329 @p5327 @p2246 @p3721 @p3719 @p303 @p5356 @p5354 @p27 @p3724 @p3722 @p95 @p5353 @p5351 @p2275 @p3697 @p3695 @p274 @p5380 @p5378 @p26 @p3700 @p3698 @p96 @p5377 @p5375 @p2304 @p3673 @p3671 @p245 @p5404 @p5402 @p25 @p3676 @p3674 @p97 @p5401 @p5399 @p2333 @p3649 @p3647 @p216 @p5428 @p5426 @p24 @p3652 @p3650 @p98 @p5425 @p5423 @p2362 @p3628 @p3626 @p187 @p5422 @p5420 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5419) :args (@t4557 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4014 @t61 @t4011 @t4012 @t1259 @t3993 @t3997 @t1233 @t4008 @t4029 @t60 @t3996 @t3999 @t62 @t4026 @t4027 @t1285 @t3978 @t3982 @t1207 @t4023 @t4044 @t59 @t3981 @t3984 @t63 @t4041 @t4042 @t1311 @t3963 @t3967 @t1181 @t4038 @t4059 @t58 @t3966 @t3969 @t64 @t4056 @t4057 @t1337 @t3948 @t3952 @t1155 @t4053 @t4074 @t57 @t3951 @t3954 @t65 @t4071 @t4072 @t1363 @t3933 @t3937 @t1129 @t4068 @t4089 @t56 @t3936 @t3939 @t66 @t4086 @t4087 @t1389 @t3918 @t3922 @t1103 @t4083 @t4104 @t55 @t3921 @t3924 @t67 @t4101 @t4102 @t1415 @t3903 @t3907 @t1077 @t4098 @t4119 @t54 @t3906 @t3909 @t68 @t4116 @t4117 @t1441 @t3888 @t3892 @t1051 @t4113 @t4134 @t53 @t3891 @t3894 @t69 @t4131 @t4132 @t1467 @t3873 @t3877 @t1025 @t4128 @t4149 @t52 @t3876 @t3879 @t70 @t4146 @t4147 @t1493 @t3858 @t3862 @t999 @t4143 @t4164 @t51 @t3861 @t3864 @t71 @t4161 @t4162 @t1519 @t3843 @t3847 @t973 @t4158 @t4179 @t50 @t3846 @t3849 @t72 @t4176 @t4177 @t1545 @t3828 @t3832 @t947 @t4173 @t4194 @t49 @t3831 @t3834 @t73 @t4191 @t4192 @t1571 @t3813 @t3817 @t921 @t4188 @t4209 @t48 @t3816 @t3819 @t74 @t4206 @t4207 @t1597 @t3798 @t3802 @t895 @t4203 @t4224 @t47 @t3801 @t3804 @t75 @t4221 @t4222 @t1623 @t3783 @t3787 @t869 @t4218 @t4239 @t46 @t3786 @t3789 @t76 @t4236 @t4237 @t1649 @t3768 @t3772 @t843 @t4233 @t4254 @t45 @t3771 @t3774 @t77 @t4251 @t4252 @t1675 @t3753 @t3757 @t817 @t4248 @t4269 @t44 @t3756 @t3759 @t78 @t4266 @t4267 @t1701 @t3738 @t3742 @t791 @t4263 @t4284 @t43 @t3741 @t3744 @t79 @t4281 @t4282 @t1727 @t3723 @t3727 @t765 @t4278 @t4299 @t42 @t3726 @t3729 @t80 @t4296 @t4297 @t1753 @t3708 @t3712 @t739 @t4293 @t4314 @t41 @t3711 @t3714 @t81 @t4311 @t4312 @t1779 @t3693 @t3697 @t713 @t4308 @t4329 @t40 @t3696 @t3699 @t82 @t4326 @t4327 @t1805 @t3678 @t3682 @t687 @t4323 @t4344 @t39 @t3681 @t3684 @t83 @t4341 @t4342 @t1831 @t3663 @t3667 @t661 @t4338 @t4359 @t38 @t3666 @t3669 @t84 @t4356 @t4357 @t1857 @t3648 @t3652 @t635 @t4353 @t4374 @t37 @t3651 @t3654 @t85 @t4371 @t4372 @t1883 @t3633 @t3637 @t609 @t4368 @t4389 @t36 @t3636 @t3639 @t86 @t4386 @t4387 @t1909 @t3618 @t3622 @t583 @t4383 @t4404 @t35 @t3621 @t3624 @t87 @t4401 @t4402 @t1935 @t3603 @t3607 @t557 @t4398 @t4419 @t34 @t3606 @t3609 @t88 @t4416 @t4417 @t1961 @t3588 @t3592 @t531 @t4413 @t4434 @t33 @t3591 @t3594 @t89 @t4431 @t4432 @t1987 @t3573 @t3577 @t505 @t4428 @t4449 @t32 @t3576 @t3579 @t90 @t4446 @t4447 @t2013 @t3558 @t3562 @t479 @t4443 @t4464 @t31 @t3561 @t3564 @t91 @t4461 @t4462 @t2039 @t3543 @t3547 @t453 @t4458 @t4479 @t30 @t3546 @t3549 @t92 @t4476 @t4477 @t2065 @t3528 @t3532 @t427 @t4473 @t4494 @t29 @t3531 @t3534 @t93 @t4491 @t4492 @t2091 @t3513 @t3517 @t401 @t4488 @t4509 @t28 @t3516 @t3519 @t94 @t4506 @t4507 @t2117 @t3498 @t3502 @t375 @t4503 @t4524 @t27 @t3501 @t3504 @t95 @t4521 @t4522 @t2143 @t3483 @t3487 @t349 @t4518 @t4539 @t26 @t3486 @t3489 @t96 @t4536 @t4537 @t2169 @t3468 @t3472 @t323 @t4533 @t4554 @t25 @t3471 @t3474 @t97 @t4551 @t4552 @t2195 @t3453 @t3457 @t297 @t4548 @t4569 @t24 @t3456 @t3459 @t98 @t4566 @t4567 @t2221 @t3441 @t3444 @t276 @t4563 @t4564 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6175 @t220) % 40.01/40.21 (step @p5431 :rule instantiate :premises (@p110) :args (@t4570)) % 40.01/40.21 (step-pop @p6176 :rule scope :premises (@p5431)) % 40.01/40.21 (step @p5432 :rule process_scope :premises (@p6176) :args (@t4573)) % 40.01/40.21 (step @p5434 :rule implies_elim :premises (@p5432)) % 40.01/40.21 (step @p5435 :rule cnf_or_pos :args (@t4573)) % 40.01/40.21 (step @p5436 :rule reordering :premises (@p5435) :args ((or @t4572 @t4571 (not @t4573)))) % 40.01/40.21 (step @p5437 :rule instantiate :premises (@p112) :args (@t4574)) % 40.01/40.21 (step @p5438 :rule cnf_or_pos :args (@t4575)) % 40.01/40.21 (step @p5439 :rule reordering :premises (@p5438) :args ((or @t4572 @t244 @t2249 (not @t4575)))) % 40.01/40.21 (step @p5440 :rule instantiate :premises (@p108) :args (@t4570)) % 40.01/40.21 (step @p5441 :rule cnf_or_pos :args (@t4577)) % 40.01/40.21 (step @p5442 :rule reordering :premises (@p5441) :args ((or @t2260 @t265 @t264 @t4576 (not @t4577)))) % 40.01/40.21 (step @p5443 :rule chain_m_resolution :premises (@p5442 @p5440 @p2380 @p2378 @p136 @p134 @p5439 @p5437 @p133 @p131 @p130 @p128 @p127 @p125 @p5436 @p5434 @p110) :args ((or @t4572 @t239) @t267 (@list @t4577 @t2260 @t2262 @t248 @t249 @t2249 @t4575 @t245 @t247 @t242 @t243 @t240 @t241 @t4571 @t4573 @t220))) % 40.01/40.21 (step @p5444 :rule instantiate :premises (@p119) :args (@t4574)) % 40.01/40.21 (step @p5445 :rule cnf_or_pos :args (@t4579)) % 40.01/40.21 (step @p5446 :rule reordering :premises (@p5445) :args ((or @t270 @t4572 @t4578 @t3440 (not @t4579)))) % 40.01/40.21 (step @p5447 :rule instantiate :premises (@p120) :args (@t2246)) % 40.01/40.21 (step @p5448 :rule cnf_or_pos :args (@t4582)) % 40.01/40.21 (step @p5449 :rule reordering :premises (@p5448) :args ((or @t4581 @t4580 @t2247 (not @t4582)))) % 40.01/40.21 (step @p5450 :rule instantiate :premises (@p121) :args (@t2245)) % 40.01/40.21 (step @p5451 :rule cnf_or_pos :args (@t4584)) % 40.01/40.21 (step @p5452 :rule reordering :premises (@p5451) :args ((or @t2255 @t4563 @t4583 (not @t4584)))) % 40.01/40.21 (step @p5453 :rule chain_m_resolution :premises (@p4537 @p4535 @p1289 @p4564 @p4562 @p60 @p4540 @p4538 @p61 @p4561 @p4559 @p1318 @p4513 @p4511 @p1260 @p4588 @p4586 @p59 @p4516 @p4514 @p62 @p4585 @p4583 @p1347 @p4489 @p4487 @p1231 @p4612 @p4610 @p58 @p4492 @p4490 @p63 @p4609 @p4607 @p1376 @p4465 @p4463 @p1202 @p4636 @p4634 @p57 @p4468 @p4466 @p64 @p4633 @p4631 @p1405 @p4441 @p4439 @p1173 @p4660 @p4658 @p56 @p4444 @p4442 @p65 @p4657 @p4655 @p1434 @p4417 @p4415 @p1144 @p4684 @p4682 @p55 @p4420 @p4418 @p66 @p4681 @p4679 @p1463 @p4393 @p4391 @p1115 @p4708 @p4706 @p54 @p4396 @p4394 @p67 @p4705 @p4703 @p1492 @p4369 @p4367 @p1086 @p4732 @p4730 @p53 @p4372 @p4370 @p68 @p4729 @p4727 @p1521 @p4345 @p4343 @p1057 @p4756 @p4754 @p52 @p4348 @p4346 @p69 @p4753 @p4751 @p1550 @p4321 @p4319 @p1028 @p4780 @p4778 @p51 @p4324 @p4322 @p70 @p4777 @p4775 @p1579 @p4297 @p4295 @p999 @p4804 @p4802 @p50 @p4300 @p4298 @p71 @p4801 @p4799 @p1608 @p4273 @p4271 @p970 @p4828 @p4826 @p49 @p4276 @p4274 @p72 @p4825 @p4823 @p1637 @p4249 @p4247 @p941 @p4852 @p4850 @p48 @p4252 @p4250 @p73 @p4849 @p4847 @p1666 @p4225 @p4223 @p912 @p4876 @p4874 @p47 @p4228 @p4226 @p74 @p4873 @p4871 @p1695 @p4201 @p4199 @p883 @p4900 @p4898 @p46 @p4204 @p4202 @p75 @p4897 @p4895 @p1724 @p4177 @p4175 @p854 @p4924 @p4922 @p45 @p4180 @p4178 @p76 @p4921 @p4919 @p1753 @p4153 @p4151 @p825 @p4948 @p4946 @p44 @p4156 @p4154 @p77 @p4945 @p4943 @p1782 @p4129 @p4127 @p796 @p4972 @p4970 @p43 @p4132 @p4130 @p78 @p4969 @p4967 @p1811 @p4105 @p4103 @p767 @p4996 @p4994 @p42 @p4108 @p4106 @p79 @p4993 @p4991 @p1840 @p4081 @p4079 @p738 @p5020 @p5018 @p41 @p4084 @p4082 @p80 @p5017 @p5015 @p1869 @p4057 @p4055 @p709 @p5044 @p5042 @p40 @p4060 @p4058 @p81 @p5041 @p5039 @p1898 @p4033 @p4031 @p680 @p5068 @p5066 @p39 @p4036 @p4034 @p82 @p5065 @p5063 @p1927 @p4009 @p4007 @p651 @p5092 @p5090 @p38 @p4012 @p4010 @p83 @p5089 @p5087 @p1956 @p3985 @p3983 @p622 @p5116 @p5114 @p37 @p3988 @p3986 @p84 @p5113 @p5111 @p1985 @p3961 @p3959 @p593 @p5140 @p5138 @p36 @p3964 @p3962 @p85 @p5137 @p5135 @p2014 @p3937 @p3935 @p564 @p5164 @p5162 @p35 @p3940 @p3938 @p86 @p5161 @p5159 @p2043 @p3913 @p3911 @p535 @p5188 @p5186 @p34 @p3916 @p3914 @p87 @p5185 @p5183 @p2072 @p3889 @p3887 @p506 @p5212 @p5210 @p33 @p3892 @p3890 @p88 @p5209 @p5207 @p2101 @p3865 @p3863 @p477 @p5236 @p5234 @p32 @p3868 @p3866 @p89 @p5233 @p5231 @p2130 @p3841 @p3839 @p448 @p5260 @p5258 @p31 @p3844 @p3842 @p90 @p5257 @p5255 @p2159 @p3817 @p3815 @p419 @p5284 @p5282 @p30 @p3820 @p3818 @p91 @p5281 @p5279 @p2188 @p3793 @p3791 @p390 @p5308 @p5306 @p29 @p3796 @p3794 @p92 @p5305 @p5303 @p2217 @p3769 @p3767 @p361 @p5332 @p5330 @p28 @p3772 @p3770 @p93 @p5329 @p5327 @p2246 @p3745 @p3743 @p332 @p5356 @p5354 @p27 @p3748 @p3746 @p94 @p5353 @p5351 @p2275 @p3721 @p3719 @p303 @p5380 @p5378 @p26 @p3724 @p3722 @p95 @p5377 @p5375 @p2304 @p3697 @p3695 @p274 @p5404 @p5402 @p25 @p3700 @p3698 @p96 @p5401 @p5399 @p2333 @p3673 @p3671 @p245 @p5428 @p5426 @p24 @p3676 @p3674 @p97 @p5425 @p5423 @p2362 @p3649 @p3647 @p216 @p5452 @p5450 @p23 @p3652 @p3650 @p98 @p5449 @p5447 @p2391 @p3628 @p3626 @p187 @p5446 @p5444 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5443) :args (@t4572 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4012 @t1259 @t4008 @t4029 @t60 @t4011 @t4014 @t61 @t4026 @t4027 @t1285 @t3993 @t3997 @t1233 @t4023 @t4044 @t59 @t3996 @t3999 @t62 @t4041 @t4042 @t1311 @t3978 @t3982 @t1207 @t4038 @t4059 @t58 @t3981 @t3984 @t63 @t4056 @t4057 @t1337 @t3963 @t3967 @t1181 @t4053 @t4074 @t57 @t3966 @t3969 @t64 @t4071 @t4072 @t1363 @t3948 @t3952 @t1155 @t4068 @t4089 @t56 @t3951 @t3954 @t65 @t4086 @t4087 @t1389 @t3933 @t3937 @t1129 @t4083 @t4104 @t55 @t3936 @t3939 @t66 @t4101 @t4102 @t1415 @t3918 @t3922 @t1103 @t4098 @t4119 @t54 @t3921 @t3924 @t67 @t4116 @t4117 @t1441 @t3903 @t3907 @t1077 @t4113 @t4134 @t53 @t3906 @t3909 @t68 @t4131 @t4132 @t1467 @t3888 @t3892 @t1051 @t4128 @t4149 @t52 @t3891 @t3894 @t69 @t4146 @t4147 @t1493 @t3873 @t3877 @t1025 @t4143 @t4164 @t51 @t3876 @t3879 @t70 @t4161 @t4162 @t1519 @t3858 @t3862 @t999 @t4158 @t4179 @t50 @t3861 @t3864 @t71 @t4176 @t4177 @t1545 @t3843 @t3847 @t973 @t4173 @t4194 @t49 @t3846 @t3849 @t72 @t4191 @t4192 @t1571 @t3828 @t3832 @t947 @t4188 @t4209 @t48 @t3831 @t3834 @t73 @t4206 @t4207 @t1597 @t3813 @t3817 @t921 @t4203 @t4224 @t47 @t3816 @t3819 @t74 @t4221 @t4222 @t1623 @t3798 @t3802 @t895 @t4218 @t4239 @t46 @t3801 @t3804 @t75 @t4236 @t4237 @t1649 @t3783 @t3787 @t869 @t4233 @t4254 @t45 @t3786 @t3789 @t76 @t4251 @t4252 @t1675 @t3768 @t3772 @t843 @t4248 @t4269 @t44 @t3771 @t3774 @t77 @t4266 @t4267 @t1701 @t3753 @t3757 @t817 @t4263 @t4284 @t43 @t3756 @t3759 @t78 @t4281 @t4282 @t1727 @t3738 @t3742 @t791 @t4278 @t4299 @t42 @t3741 @t3744 @t79 @t4296 @t4297 @t1753 @t3723 @t3727 @t765 @t4293 @t4314 @t41 @t3726 @t3729 @t80 @t4311 @t4312 @t1779 @t3708 @t3712 @t739 @t4308 @t4329 @t40 @t3711 @t3714 @t81 @t4326 @t4327 @t1805 @t3693 @t3697 @t713 @t4323 @t4344 @t39 @t3696 @t3699 @t82 @t4341 @t4342 @t1831 @t3678 @t3682 @t687 @t4338 @t4359 @t38 @t3681 @t3684 @t83 @t4356 @t4357 @t1857 @t3663 @t3667 @t661 @t4353 @t4374 @t37 @t3666 @t3669 @t84 @t4371 @t4372 @t1883 @t3648 @t3652 @t635 @t4368 @t4389 @t36 @t3651 @t3654 @t85 @t4386 @t4387 @t1909 @t3633 @t3637 @t609 @t4383 @t4404 @t35 @t3636 @t3639 @t86 @t4401 @t4402 @t1935 @t3618 @t3622 @t583 @t4398 @t4419 @t34 @t3621 @t3624 @t87 @t4416 @t4417 @t1961 @t3603 @t3607 @t557 @t4413 @t4434 @t33 @t3606 @t3609 @t88 @t4431 @t4432 @t1987 @t3588 @t3592 @t531 @t4428 @t4449 @t32 @t3591 @t3594 @t89 @t4446 @t4447 @t2013 @t3573 @t3577 @t505 @t4443 @t4464 @t31 @t3576 @t3579 @t90 @t4461 @t4462 @t2039 @t3558 @t3562 @t479 @t4458 @t4479 @t30 @t3561 @t3564 @t91 @t4476 @t4477 @t2065 @t3543 @t3547 @t453 @t4473 @t4494 @t29 @t3546 @t3549 @t92 @t4491 @t4492 @t2091 @t3528 @t3532 @t427 @t4488 @t4509 @t28 @t3531 @t3534 @t93 @t4506 @t4507 @t2117 @t3513 @t3517 @t401 @t4503 @t4524 @t27 @t3516 @t3519 @t94 @t4521 @t4522 @t2143 @t3498 @t3502 @t375 @t4518 @t4539 @t26 @t3501 @t3504 @t95 @t4536 @t4537 @t2169 @t3483 @t3487 @t349 @t4533 @t4554 @t25 @t3486 @t3489 @t96 @t4551 @t4552 @t2195 @t3468 @t3472 @t323 @t4548 @t4569 @t24 @t3471 @t3474 @t97 @t4566 @t4567 @t2221 @t3453 @t3457 @t297 @t4563 @t4584 @t23 @t3456 @t3459 @t98 @t4581 @t4582 @t2247 @t3441 @t3444 @t276 @t4578 @t4579 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6177 @t220) % 40.01/40.21 (step @p5455 :rule instantiate :premises (@p110) :args (@t4585)) % 40.01/40.21 (step-pop @p6178 :rule scope :premises (@p5455)) % 40.01/40.21 (step @p5456 :rule process_scope :premises (@p6178) :args (@t4588)) % 40.01/40.21 (step @p5458 :rule implies_elim :premises (@p5456)) % 40.01/40.21 (step @p5459 :rule cnf_or_pos :args (@t4588)) % 40.01/40.21 (step @p5460 :rule reordering :premises (@p5459) :args ((or @t4587 @t4586 (not @t4588)))) % 40.01/40.21 (step @p5461 :rule instantiate :premises (@p112) :args (@t4589)) % 40.01/40.21 (step @p5462 :rule cnf_or_pos :args (@t4590)) % 40.01/40.21 (step @p5463 :rule reordering :premises (@p5462) :args ((or @t4587 @t244 @t2275 (not @t4590)))) % 40.01/40.21 (step @p5464 :rule instantiate :premises (@p108) :args (@t4585)) % 40.01/40.21 (step @p5465 :rule cnf_or_pos :args (@t4592)) % 40.01/40.21 (step @p5466 :rule reordering :premises (@p5465) :args ((or @t2286 @t265 @t264 @t4591 (not @t4592)))) % 40.01/40.21 (step @p5467 :rule chain_m_resolution :premises (@p5466 @p5464 @p2409 @p2407 @p136 @p134 @p5463 @p5461 @p133 @p131 @p130 @p128 @p127 @p125 @p5460 @p5458 @p110) :args ((or @t4587 @t239) @t267 (@list @t4592 @t2286 @t2288 @t248 @t249 @t2275 @t4590 @t245 @t247 @t242 @t243 @t240 @t241 @t4586 @t4588 @t220))) % 40.01/40.21 (step @p5468 :rule instantiate :premises (@p119) :args (@t4589)) % 40.01/40.21 (step @p5469 :rule cnf_or_pos :args (@t4594)) % 40.01/40.21 (step @p5470 :rule reordering :premises (@p5469) :args ((or @t270 @t4587 @t4593 @t3440 (not @t4594)))) % 40.01/40.21 (step @p5471 :rule instantiate :premises (@p120) :args (@t2272)) % 40.01/40.21 (step @p5472 :rule cnf_or_pos :args (@t4597)) % 40.01/40.21 (step @p5473 :rule reordering :premises (@p5472) :args ((or @t4596 @t4595 @t2273 (not @t4597)))) % 40.01/40.21 (step @p5474 :rule instantiate :premises (@p121) :args (@t2271)) % 40.01/40.21 (step @p5475 :rule cnf_or_pos :args (@t4599)) % 40.01/40.21 (step @p5476 :rule reordering :premises (@p5475) :args ((or @t2281 @t4578 @t4598 (not @t4599)))) % 40.01/40.21 (step @p5477 :rule chain_m_resolution :premises (@p4564 @p4562 @p60 @p4561 @p4559 @p1318 @p4537 @p4535 @p1289 @p4588 @p4586 @p59 @p4540 @p4538 @p61 @p4585 @p4583 @p1347 @p4513 @p4511 @p1260 @p4612 @p4610 @p58 @p4516 @p4514 @p62 @p4609 @p4607 @p1376 @p4489 @p4487 @p1231 @p4636 @p4634 @p57 @p4492 @p4490 @p63 @p4633 @p4631 @p1405 @p4465 @p4463 @p1202 @p4660 @p4658 @p56 @p4468 @p4466 @p64 @p4657 @p4655 @p1434 @p4441 @p4439 @p1173 @p4684 @p4682 @p55 @p4444 @p4442 @p65 @p4681 @p4679 @p1463 @p4417 @p4415 @p1144 @p4708 @p4706 @p54 @p4420 @p4418 @p66 @p4705 @p4703 @p1492 @p4393 @p4391 @p1115 @p4732 @p4730 @p53 @p4396 @p4394 @p67 @p4729 @p4727 @p1521 @p4369 @p4367 @p1086 @p4756 @p4754 @p52 @p4372 @p4370 @p68 @p4753 @p4751 @p1550 @p4345 @p4343 @p1057 @p4780 @p4778 @p51 @p4348 @p4346 @p69 @p4777 @p4775 @p1579 @p4321 @p4319 @p1028 @p4804 @p4802 @p50 @p4324 @p4322 @p70 @p4801 @p4799 @p1608 @p4297 @p4295 @p999 @p4828 @p4826 @p49 @p4300 @p4298 @p71 @p4825 @p4823 @p1637 @p4273 @p4271 @p970 @p4852 @p4850 @p48 @p4276 @p4274 @p72 @p4849 @p4847 @p1666 @p4249 @p4247 @p941 @p4876 @p4874 @p47 @p4252 @p4250 @p73 @p4873 @p4871 @p1695 @p4225 @p4223 @p912 @p4900 @p4898 @p46 @p4228 @p4226 @p74 @p4897 @p4895 @p1724 @p4201 @p4199 @p883 @p4924 @p4922 @p45 @p4204 @p4202 @p75 @p4921 @p4919 @p1753 @p4177 @p4175 @p854 @p4948 @p4946 @p44 @p4180 @p4178 @p76 @p4945 @p4943 @p1782 @p4153 @p4151 @p825 @p4972 @p4970 @p43 @p4156 @p4154 @p77 @p4969 @p4967 @p1811 @p4129 @p4127 @p796 @p4996 @p4994 @p42 @p4132 @p4130 @p78 @p4993 @p4991 @p1840 @p4105 @p4103 @p767 @p5020 @p5018 @p41 @p4108 @p4106 @p79 @p5017 @p5015 @p1869 @p4081 @p4079 @p738 @p5044 @p5042 @p40 @p4084 @p4082 @p80 @p5041 @p5039 @p1898 @p4057 @p4055 @p709 @p5068 @p5066 @p39 @p4060 @p4058 @p81 @p5065 @p5063 @p1927 @p4033 @p4031 @p680 @p5092 @p5090 @p38 @p4036 @p4034 @p82 @p5089 @p5087 @p1956 @p4009 @p4007 @p651 @p5116 @p5114 @p37 @p4012 @p4010 @p83 @p5113 @p5111 @p1985 @p3985 @p3983 @p622 @p5140 @p5138 @p36 @p3988 @p3986 @p84 @p5137 @p5135 @p2014 @p3961 @p3959 @p593 @p5164 @p5162 @p35 @p3964 @p3962 @p85 @p5161 @p5159 @p2043 @p3937 @p3935 @p564 @p5188 @p5186 @p34 @p3940 @p3938 @p86 @p5185 @p5183 @p2072 @p3913 @p3911 @p535 @p5212 @p5210 @p33 @p3916 @p3914 @p87 @p5209 @p5207 @p2101 @p3889 @p3887 @p506 @p5236 @p5234 @p32 @p3892 @p3890 @p88 @p5233 @p5231 @p2130 @p3865 @p3863 @p477 @p5260 @p5258 @p31 @p3868 @p3866 @p89 @p5257 @p5255 @p2159 @p3841 @p3839 @p448 @p5284 @p5282 @p30 @p3844 @p3842 @p90 @p5281 @p5279 @p2188 @p3817 @p3815 @p419 @p5308 @p5306 @p29 @p3820 @p3818 @p91 @p5305 @p5303 @p2217 @p3793 @p3791 @p390 @p5332 @p5330 @p28 @p3796 @p3794 @p92 @p5329 @p5327 @p2246 @p3769 @p3767 @p361 @p5356 @p5354 @p27 @p3772 @p3770 @p93 @p5353 @p5351 @p2275 @p3745 @p3743 @p332 @p5380 @p5378 @p26 @p3748 @p3746 @p94 @p5377 @p5375 @p2304 @p3721 @p3719 @p303 @p5404 @p5402 @p25 @p3724 @p3722 @p95 @p5401 @p5399 @p2333 @p3697 @p3695 @p274 @p5428 @p5426 @p24 @p3700 @p3698 @p96 @p5425 @p5423 @p2362 @p3673 @p3671 @p245 @p5452 @p5450 @p23 @p3676 @p3674 @p97 @p5449 @p5447 @p2391 @p3649 @p3647 @p216 @p5476 @p5474 @p22 @p3652 @p3650 @p98 @p5473 @p5471 @p2420 @p3628 @p3626 @p187 @p5470 @p5468 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5467) :args (@t4587 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4029 @t60 @t4026 @t4027 @t1285 @t4008 @t4012 @t1259 @t4023 @t4044 @t59 @t4011 @t4014 @t61 @t4041 @t4042 @t1311 @t3993 @t3997 @t1233 @t4038 @t4059 @t58 @t3996 @t3999 @t62 @t4056 @t4057 @t1337 @t3978 @t3982 @t1207 @t4053 @t4074 @t57 @t3981 @t3984 @t63 @t4071 @t4072 @t1363 @t3963 @t3967 @t1181 @t4068 @t4089 @t56 @t3966 @t3969 @t64 @t4086 @t4087 @t1389 @t3948 @t3952 @t1155 @t4083 @t4104 @t55 @t3951 @t3954 @t65 @t4101 @t4102 @t1415 @t3933 @t3937 @t1129 @t4098 @t4119 @t54 @t3936 @t3939 @t66 @t4116 @t4117 @t1441 @t3918 @t3922 @t1103 @t4113 @t4134 @t53 @t3921 @t3924 @t67 @t4131 @t4132 @t1467 @t3903 @t3907 @t1077 @t4128 @t4149 @t52 @t3906 @t3909 @t68 @t4146 @t4147 @t1493 @t3888 @t3892 @t1051 @t4143 @t4164 @t51 @t3891 @t3894 @t69 @t4161 @t4162 @t1519 @t3873 @t3877 @t1025 @t4158 @t4179 @t50 @t3876 @t3879 @t70 @t4176 @t4177 @t1545 @t3858 @t3862 @t999 @t4173 @t4194 @t49 @t3861 @t3864 @t71 @t4191 @t4192 @t1571 @t3843 @t3847 @t973 @t4188 @t4209 @t48 @t3846 @t3849 @t72 @t4206 @t4207 @t1597 @t3828 @t3832 @t947 @t4203 @t4224 @t47 @t3831 @t3834 @t73 @t4221 @t4222 @t1623 @t3813 @t3817 @t921 @t4218 @t4239 @t46 @t3816 @t3819 @t74 @t4236 @t4237 @t1649 @t3798 @t3802 @t895 @t4233 @t4254 @t45 @t3801 @t3804 @t75 @t4251 @t4252 @t1675 @t3783 @t3787 @t869 @t4248 @t4269 @t44 @t3786 @t3789 @t76 @t4266 @t4267 @t1701 @t3768 @t3772 @t843 @t4263 @t4284 @t43 @t3771 @t3774 @t77 @t4281 @t4282 @t1727 @t3753 @t3757 @t817 @t4278 @t4299 @t42 @t3756 @t3759 @t78 @t4296 @t4297 @t1753 @t3738 @t3742 @t791 @t4293 @t4314 @t41 @t3741 @t3744 @t79 @t4311 @t4312 @t1779 @t3723 @t3727 @t765 @t4308 @t4329 @t40 @t3726 @t3729 @t80 @t4326 @t4327 @t1805 @t3708 @t3712 @t739 @t4323 @t4344 @t39 @t3711 @t3714 @t81 @t4341 @t4342 @t1831 @t3693 @t3697 @t713 @t4338 @t4359 @t38 @t3696 @t3699 @t82 @t4356 @t4357 @t1857 @t3678 @t3682 @t687 @t4353 @t4374 @t37 @t3681 @t3684 @t83 @t4371 @t4372 @t1883 @t3663 @t3667 @t661 @t4368 @t4389 @t36 @t3666 @t3669 @t84 @t4386 @t4387 @t1909 @t3648 @t3652 @t635 @t4383 @t4404 @t35 @t3651 @t3654 @t85 @t4401 @t4402 @t1935 @t3633 @t3637 @t609 @t4398 @t4419 @t34 @t3636 @t3639 @t86 @t4416 @t4417 @t1961 @t3618 @t3622 @t583 @t4413 @t4434 @t33 @t3621 @t3624 @t87 @t4431 @t4432 @t1987 @t3603 @t3607 @t557 @t4428 @t4449 @t32 @t3606 @t3609 @t88 @t4446 @t4447 @t2013 @t3588 @t3592 @t531 @t4443 @t4464 @t31 @t3591 @t3594 @t89 @t4461 @t4462 @t2039 @t3573 @t3577 @t505 @t4458 @t4479 @t30 @t3576 @t3579 @t90 @t4476 @t4477 @t2065 @t3558 @t3562 @t479 @t4473 @t4494 @t29 @t3561 @t3564 @t91 @t4491 @t4492 @t2091 @t3543 @t3547 @t453 @t4488 @t4509 @t28 @t3546 @t3549 @t92 @t4506 @t4507 @t2117 @t3528 @t3532 @t427 @t4503 @t4524 @t27 @t3531 @t3534 @t93 @t4521 @t4522 @t2143 @t3513 @t3517 @t401 @t4518 @t4539 @t26 @t3516 @t3519 @t94 @t4536 @t4537 @t2169 @t3498 @t3502 @t375 @t4533 @t4554 @t25 @t3501 @t3504 @t95 @t4551 @t4552 @t2195 @t3483 @t3487 @t349 @t4548 @t4569 @t24 @t3486 @t3489 @t96 @t4566 @t4567 @t2221 @t3468 @t3472 @t323 @t4563 @t4584 @t23 @t3471 @t3474 @t97 @t4581 @t4582 @t2247 @t3453 @t3457 @t297 @t4578 @t4599 @t22 @t3456 @t3459 @t98 @t4596 @t4597 @t2273 @t3441 @t3444 @t276 @t4593 @t4594 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6179 @t220) % 40.01/40.21 (step @p5479 :rule instantiate :premises (@p110) :args (@t4600)) % 40.01/40.21 (step-pop @p6180 :rule scope :premises (@p5479)) % 40.01/40.21 (step @p5480 :rule process_scope :premises (@p6180) :args (@t4603)) % 40.01/40.21 (step @p5482 :rule implies_elim :premises (@p5480)) % 40.01/40.21 (step @p5483 :rule cnf_or_pos :args (@t4603)) % 40.01/40.21 (step @p5484 :rule reordering :premises (@p5483) :args ((or @t4602 @t4601 (not @t4603)))) % 40.01/40.21 (step @p5485 :rule instantiate :premises (@p112) :args (@t4604)) % 40.01/40.21 (step @p5486 :rule cnf_or_pos :args (@t4605)) % 40.01/40.21 (step @p5487 :rule reordering :premises (@p5486) :args ((or @t4602 @t244 @t2301 (not @t4605)))) % 40.01/40.21 (step @p5488 :rule instantiate :premises (@p108) :args (@t4600)) % 40.01/40.21 (step @p5489 :rule cnf_or_pos :args (@t4607)) % 40.01/40.21 (step @p5490 :rule reordering :premises (@p5489) :args ((or @t2312 @t265 @t264 @t4606 (not @t4607)))) % 40.01/40.21 (step @p5491 :rule chain_m_resolution :premises (@p5490 @p5488 @p2438 @p2436 @p136 @p134 @p5487 @p5485 @p133 @p131 @p130 @p128 @p127 @p125 @p5484 @p5482 @p110) :args ((or @t4602 @t239) @t267 (@list @t4607 @t2312 @t2314 @t248 @t249 @t2301 @t4605 @t245 @t247 @t242 @t243 @t240 @t241 @t4601 @t4603 @t220))) % 40.01/40.21 (step @p5492 :rule instantiate :premises (@p119) :args (@t4604)) % 40.01/40.21 (step @p5493 :rule cnf_or_pos :args (@t4609)) % 40.01/40.21 (step @p5494 :rule reordering :premises (@p5493) :args ((or @t270 @t4602 @t4608 @t3440 (not @t4609)))) % 40.01/40.21 (step @p5495 :rule instantiate :premises (@p120) :args (@t2298)) % 40.01/40.21 (step @p5496 :rule cnf_or_pos :args (@t4612)) % 40.01/40.21 (step @p5497 :rule reordering :premises (@p5496) :args ((or @t4611 @t4610 @t2299 (not @t4612)))) % 40.01/40.21 (step @p5498 :rule instantiate :premises (@p121) :args (@t2297)) % 40.01/40.21 (step @p5499 :rule cnf_or_pos :args (@t4614)) % 40.01/40.21 (step @p5500 :rule reordering :premises (@p5499) :args ((or @t2307 @t4593 @t4613 (not @t4614)))) % 40.01/40.21 (step @p5501 :rule chain_m_resolution :premises (@p4561 @p4559 @p1318 @p4588 @p4586 @p59 @p4564 @p4562 @p60 @p4585 @p4583 @p1347 @p4537 @p4535 @p1289 @p4612 @p4610 @p58 @p4540 @p4538 @p61 @p4609 @p4607 @p1376 @p4513 @p4511 @p1260 @p4636 @p4634 @p57 @p4516 @p4514 @p62 @p4633 @p4631 @p1405 @p4489 @p4487 @p1231 @p4660 @p4658 @p56 @p4492 @p4490 @p63 @p4657 @p4655 @p1434 @p4465 @p4463 @p1202 @p4684 @p4682 @p55 @p4468 @p4466 @p64 @p4681 @p4679 @p1463 @p4441 @p4439 @p1173 @p4708 @p4706 @p54 @p4444 @p4442 @p65 @p4705 @p4703 @p1492 @p4417 @p4415 @p1144 @p4732 @p4730 @p53 @p4420 @p4418 @p66 @p4729 @p4727 @p1521 @p4393 @p4391 @p1115 @p4756 @p4754 @p52 @p4396 @p4394 @p67 @p4753 @p4751 @p1550 @p4369 @p4367 @p1086 @p4780 @p4778 @p51 @p4372 @p4370 @p68 @p4777 @p4775 @p1579 @p4345 @p4343 @p1057 @p4804 @p4802 @p50 @p4348 @p4346 @p69 @p4801 @p4799 @p1608 @p4321 @p4319 @p1028 @p4828 @p4826 @p49 @p4324 @p4322 @p70 @p4825 @p4823 @p1637 @p4297 @p4295 @p999 @p4852 @p4850 @p48 @p4300 @p4298 @p71 @p4849 @p4847 @p1666 @p4273 @p4271 @p970 @p4876 @p4874 @p47 @p4276 @p4274 @p72 @p4873 @p4871 @p1695 @p4249 @p4247 @p941 @p4900 @p4898 @p46 @p4252 @p4250 @p73 @p4897 @p4895 @p1724 @p4225 @p4223 @p912 @p4924 @p4922 @p45 @p4228 @p4226 @p74 @p4921 @p4919 @p1753 @p4201 @p4199 @p883 @p4948 @p4946 @p44 @p4204 @p4202 @p75 @p4945 @p4943 @p1782 @p4177 @p4175 @p854 @p4972 @p4970 @p43 @p4180 @p4178 @p76 @p4969 @p4967 @p1811 @p4153 @p4151 @p825 @p4996 @p4994 @p42 @p4156 @p4154 @p77 @p4993 @p4991 @p1840 @p4129 @p4127 @p796 @p5020 @p5018 @p41 @p4132 @p4130 @p78 @p5017 @p5015 @p1869 @p4105 @p4103 @p767 @p5044 @p5042 @p40 @p4108 @p4106 @p79 @p5041 @p5039 @p1898 @p4081 @p4079 @p738 @p5068 @p5066 @p39 @p4084 @p4082 @p80 @p5065 @p5063 @p1927 @p4057 @p4055 @p709 @p5092 @p5090 @p38 @p4060 @p4058 @p81 @p5089 @p5087 @p1956 @p4033 @p4031 @p680 @p5116 @p5114 @p37 @p4036 @p4034 @p82 @p5113 @p5111 @p1985 @p4009 @p4007 @p651 @p5140 @p5138 @p36 @p4012 @p4010 @p83 @p5137 @p5135 @p2014 @p3985 @p3983 @p622 @p5164 @p5162 @p35 @p3988 @p3986 @p84 @p5161 @p5159 @p2043 @p3961 @p3959 @p593 @p5188 @p5186 @p34 @p3964 @p3962 @p85 @p5185 @p5183 @p2072 @p3937 @p3935 @p564 @p5212 @p5210 @p33 @p3940 @p3938 @p86 @p5209 @p5207 @p2101 @p3913 @p3911 @p535 @p5236 @p5234 @p32 @p3916 @p3914 @p87 @p5233 @p5231 @p2130 @p3889 @p3887 @p506 @p5260 @p5258 @p31 @p3892 @p3890 @p88 @p5257 @p5255 @p2159 @p3865 @p3863 @p477 @p5284 @p5282 @p30 @p3868 @p3866 @p89 @p5281 @p5279 @p2188 @p3841 @p3839 @p448 @p5308 @p5306 @p29 @p3844 @p3842 @p90 @p5305 @p5303 @p2217 @p3817 @p3815 @p419 @p5332 @p5330 @p28 @p3820 @p3818 @p91 @p5329 @p5327 @p2246 @p3793 @p3791 @p390 @p5356 @p5354 @p27 @p3796 @p3794 @p92 @p5353 @p5351 @p2275 @p3769 @p3767 @p361 @p5380 @p5378 @p26 @p3772 @p3770 @p93 @p5377 @p5375 @p2304 @p3745 @p3743 @p332 @p5404 @p5402 @p25 @p3748 @p3746 @p94 @p5401 @p5399 @p2333 @p3721 @p3719 @p303 @p5428 @p5426 @p24 @p3724 @p3722 @p95 @p5425 @p5423 @p2362 @p3697 @p3695 @p274 @p5452 @p5450 @p23 @p3700 @p3698 @p96 @p5449 @p5447 @p2391 @p3673 @p3671 @p245 @p5476 @p5474 @p22 @p3676 @p3674 @p97 @p5473 @p5471 @p2420 @p3649 @p3647 @p216 @p5500 @p5498 @p21 @p3652 @p3650 @p98 @p5497 @p5495 @p2449 @p3628 @p3626 @p187 @p5494 @p5492 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5491) :args (@t4602 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4027 @t1285 @t4023 @t4044 @t59 @t4026 @t4029 @t60 @t4041 @t4042 @t1311 @t4008 @t4012 @t1259 @t4038 @t4059 @t58 @t4011 @t4014 @t61 @t4056 @t4057 @t1337 @t3993 @t3997 @t1233 @t4053 @t4074 @t57 @t3996 @t3999 @t62 @t4071 @t4072 @t1363 @t3978 @t3982 @t1207 @t4068 @t4089 @t56 @t3981 @t3984 @t63 @t4086 @t4087 @t1389 @t3963 @t3967 @t1181 @t4083 @t4104 @t55 @t3966 @t3969 @t64 @t4101 @t4102 @t1415 @t3948 @t3952 @t1155 @t4098 @t4119 @t54 @t3951 @t3954 @t65 @t4116 @t4117 @t1441 @t3933 @t3937 @t1129 @t4113 @t4134 @t53 @t3936 @t3939 @t66 @t4131 @t4132 @t1467 @t3918 @t3922 @t1103 @t4128 @t4149 @t52 @t3921 @t3924 @t67 @t4146 @t4147 @t1493 @t3903 @t3907 @t1077 @t4143 @t4164 @t51 @t3906 @t3909 @t68 @t4161 @t4162 @t1519 @t3888 @t3892 @t1051 @t4158 @t4179 @t50 @t3891 @t3894 @t69 @t4176 @t4177 @t1545 @t3873 @t3877 @t1025 @t4173 @t4194 @t49 @t3876 @t3879 @t70 @t4191 @t4192 @t1571 @t3858 @t3862 @t999 @t4188 @t4209 @t48 @t3861 @t3864 @t71 @t4206 @t4207 @t1597 @t3843 @t3847 @t973 @t4203 @t4224 @t47 @t3846 @t3849 @t72 @t4221 @t4222 @t1623 @t3828 @t3832 @t947 @t4218 @t4239 @t46 @t3831 @t3834 @t73 @t4236 @t4237 @t1649 @t3813 @t3817 @t921 @t4233 @t4254 @t45 @t3816 @t3819 @t74 @t4251 @t4252 @t1675 @t3798 @t3802 @t895 @t4248 @t4269 @t44 @t3801 @t3804 @t75 @t4266 @t4267 @t1701 @t3783 @t3787 @t869 @t4263 @t4284 @t43 @t3786 @t3789 @t76 @t4281 @t4282 @t1727 @t3768 @t3772 @t843 @t4278 @t4299 @t42 @t3771 @t3774 @t77 @t4296 @t4297 @t1753 @t3753 @t3757 @t817 @t4293 @t4314 @t41 @t3756 @t3759 @t78 @t4311 @t4312 @t1779 @t3738 @t3742 @t791 @t4308 @t4329 @t40 @t3741 @t3744 @t79 @t4326 @t4327 @t1805 @t3723 @t3727 @t765 @t4323 @t4344 @t39 @t3726 @t3729 @t80 @t4341 @t4342 @t1831 @t3708 @t3712 @t739 @t4338 @t4359 @t38 @t3711 @t3714 @t81 @t4356 @t4357 @t1857 @t3693 @t3697 @t713 @t4353 @t4374 @t37 @t3696 @t3699 @t82 @t4371 @t4372 @t1883 @t3678 @t3682 @t687 @t4368 @t4389 @t36 @t3681 @t3684 @t83 @t4386 @t4387 @t1909 @t3663 @t3667 @t661 @t4383 @t4404 @t35 @t3666 @t3669 @t84 @t4401 @t4402 @t1935 @t3648 @t3652 @t635 @t4398 @t4419 @t34 @t3651 @t3654 @t85 @t4416 @t4417 @t1961 @t3633 @t3637 @t609 @t4413 @t4434 @t33 @t3636 @t3639 @t86 @t4431 @t4432 @t1987 @t3618 @t3622 @t583 @t4428 @t4449 @t32 @t3621 @t3624 @t87 @t4446 @t4447 @t2013 @t3603 @t3607 @t557 @t4443 @t4464 @t31 @t3606 @t3609 @t88 @t4461 @t4462 @t2039 @t3588 @t3592 @t531 @t4458 @t4479 @t30 @t3591 @t3594 @t89 @t4476 @t4477 @t2065 @t3573 @t3577 @t505 @t4473 @t4494 @t29 @t3576 @t3579 @t90 @t4491 @t4492 @t2091 @t3558 @t3562 @t479 @t4488 @t4509 @t28 @t3561 @t3564 @t91 @t4506 @t4507 @t2117 @t3543 @t3547 @t453 @t4503 @t4524 @t27 @t3546 @t3549 @t92 @t4521 @t4522 @t2143 @t3528 @t3532 @t427 @t4518 @t4539 @t26 @t3531 @t3534 @t93 @t4536 @t4537 @t2169 @t3513 @t3517 @t401 @t4533 @t4554 @t25 @t3516 @t3519 @t94 @t4551 @t4552 @t2195 @t3498 @t3502 @t375 @t4548 @t4569 @t24 @t3501 @t3504 @t95 @t4566 @t4567 @t2221 @t3483 @t3487 @t349 @t4563 @t4584 @t23 @t3486 @t3489 @t96 @t4581 @t4582 @t2247 @t3468 @t3472 @t323 @t4578 @t4599 @t22 @t3471 @t3474 @t97 @t4596 @t4597 @t2273 @t3453 @t3457 @t297 @t4593 @t4614 @t21 @t3456 @t3459 @t98 @t4611 @t4612 @t2299 @t3441 @t3444 @t276 @t4608 @t4609 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6181 @t220) % 40.01/40.21 (step @p5503 :rule instantiate :premises (@p110) :args (@t4615)) % 40.01/40.21 (step-pop @p6182 :rule scope :premises (@p5503)) % 40.01/40.21 (step @p5504 :rule process_scope :premises (@p6182) :args (@t4618)) % 40.01/40.21 (step @p5506 :rule implies_elim :premises (@p5504)) % 40.01/40.21 (step @p5507 :rule cnf_or_pos :args (@t4618)) % 40.01/40.21 (step @p5508 :rule reordering :premises (@p5507) :args ((or @t4617 @t4616 (not @t4618)))) % 40.01/40.21 (step @p5509 :rule instantiate :premises (@p112) :args (@t4619)) % 40.01/40.21 (step @p5510 :rule cnf_or_pos :args (@t4620)) % 40.01/40.21 (step @p5511 :rule reordering :premises (@p5510) :args ((or @t4617 @t244 @t2327 (not @t4620)))) % 40.01/40.21 (step @p5512 :rule instantiate :premises (@p108) :args (@t4615)) % 40.01/40.21 (step @p5513 :rule cnf_or_pos :args (@t4622)) % 40.01/40.21 (step @p5514 :rule reordering :premises (@p5513) :args ((or @t2338 @t265 @t264 @t4621 (not @t4622)))) % 40.01/40.21 (step @p5515 :rule chain_m_resolution :premises (@p5514 @p5512 @p2467 @p2465 @p136 @p134 @p5511 @p5509 @p133 @p131 @p130 @p128 @p127 @p125 @p5508 @p5506 @p110) :args ((or @t4617 @t239) @t267 (@list @t4622 @t2338 @t2340 @t248 @t249 @t2327 @t4620 @t245 @t247 @t242 @t243 @t240 @t241 @t4616 @t4618 @t220))) % 40.01/40.21 (step @p5516 :rule instantiate :premises (@p119) :args (@t4619)) % 40.01/40.21 (step @p5517 :rule cnf_or_pos :args (@t4624)) % 40.01/40.21 (step @p5518 :rule reordering :premises (@p5517) :args ((or @t270 @t4617 @t4623 @t3440 (not @t4624)))) % 40.01/40.21 (step @p5519 :rule instantiate :premises (@p120) :args (@t2324)) % 40.01/40.21 (step @p5520 :rule cnf_or_pos :args (@t4627)) % 40.01/40.21 (step @p5521 :rule reordering :premises (@p5520) :args ((or @t4626 @t4625 @t2325 (not @t4627)))) % 40.01/40.21 (step @p5522 :rule instantiate :premises (@p121) :args (@t2323)) % 40.01/40.21 (step @p5523 :rule cnf_or_pos :args (@t4629)) % 40.01/40.21 (step @p5524 :rule reordering :premises (@p5523) :args ((or @t2333 @t4608 @t4628 (not @t4629)))) % 40.01/40.21 (step @p5525 :rule chain_m_resolution :premises (@p4588 @p4586 @p59 @p4585 @p4583 @p1347 @p4561 @p4559 @p1318 @p4612 @p4610 @p58 @p4564 @p4562 @p60 @p4609 @p4607 @p1376 @p4537 @p4535 @p1289 @p4636 @p4634 @p57 @p4540 @p4538 @p61 @p4633 @p4631 @p1405 @p4513 @p4511 @p1260 @p4660 @p4658 @p56 @p4516 @p4514 @p62 @p4657 @p4655 @p1434 @p4489 @p4487 @p1231 @p4684 @p4682 @p55 @p4492 @p4490 @p63 @p4681 @p4679 @p1463 @p4465 @p4463 @p1202 @p4708 @p4706 @p54 @p4468 @p4466 @p64 @p4705 @p4703 @p1492 @p4441 @p4439 @p1173 @p4732 @p4730 @p53 @p4444 @p4442 @p65 @p4729 @p4727 @p1521 @p4417 @p4415 @p1144 @p4756 @p4754 @p52 @p4420 @p4418 @p66 @p4753 @p4751 @p1550 @p4393 @p4391 @p1115 @p4780 @p4778 @p51 @p4396 @p4394 @p67 @p4777 @p4775 @p1579 @p4369 @p4367 @p1086 @p4804 @p4802 @p50 @p4372 @p4370 @p68 @p4801 @p4799 @p1608 @p4345 @p4343 @p1057 @p4828 @p4826 @p49 @p4348 @p4346 @p69 @p4825 @p4823 @p1637 @p4321 @p4319 @p1028 @p4852 @p4850 @p48 @p4324 @p4322 @p70 @p4849 @p4847 @p1666 @p4297 @p4295 @p999 @p4876 @p4874 @p47 @p4300 @p4298 @p71 @p4873 @p4871 @p1695 @p4273 @p4271 @p970 @p4900 @p4898 @p46 @p4276 @p4274 @p72 @p4897 @p4895 @p1724 @p4249 @p4247 @p941 @p4924 @p4922 @p45 @p4252 @p4250 @p73 @p4921 @p4919 @p1753 @p4225 @p4223 @p912 @p4948 @p4946 @p44 @p4228 @p4226 @p74 @p4945 @p4943 @p1782 @p4201 @p4199 @p883 @p4972 @p4970 @p43 @p4204 @p4202 @p75 @p4969 @p4967 @p1811 @p4177 @p4175 @p854 @p4996 @p4994 @p42 @p4180 @p4178 @p76 @p4993 @p4991 @p1840 @p4153 @p4151 @p825 @p5020 @p5018 @p41 @p4156 @p4154 @p77 @p5017 @p5015 @p1869 @p4129 @p4127 @p796 @p5044 @p5042 @p40 @p4132 @p4130 @p78 @p5041 @p5039 @p1898 @p4105 @p4103 @p767 @p5068 @p5066 @p39 @p4108 @p4106 @p79 @p5065 @p5063 @p1927 @p4081 @p4079 @p738 @p5092 @p5090 @p38 @p4084 @p4082 @p80 @p5089 @p5087 @p1956 @p4057 @p4055 @p709 @p5116 @p5114 @p37 @p4060 @p4058 @p81 @p5113 @p5111 @p1985 @p4033 @p4031 @p680 @p5140 @p5138 @p36 @p4036 @p4034 @p82 @p5137 @p5135 @p2014 @p4009 @p4007 @p651 @p5164 @p5162 @p35 @p4012 @p4010 @p83 @p5161 @p5159 @p2043 @p3985 @p3983 @p622 @p5188 @p5186 @p34 @p3988 @p3986 @p84 @p5185 @p5183 @p2072 @p3961 @p3959 @p593 @p5212 @p5210 @p33 @p3964 @p3962 @p85 @p5209 @p5207 @p2101 @p3937 @p3935 @p564 @p5236 @p5234 @p32 @p3940 @p3938 @p86 @p5233 @p5231 @p2130 @p3913 @p3911 @p535 @p5260 @p5258 @p31 @p3916 @p3914 @p87 @p5257 @p5255 @p2159 @p3889 @p3887 @p506 @p5284 @p5282 @p30 @p3892 @p3890 @p88 @p5281 @p5279 @p2188 @p3865 @p3863 @p477 @p5308 @p5306 @p29 @p3868 @p3866 @p89 @p5305 @p5303 @p2217 @p3841 @p3839 @p448 @p5332 @p5330 @p28 @p3844 @p3842 @p90 @p5329 @p5327 @p2246 @p3817 @p3815 @p419 @p5356 @p5354 @p27 @p3820 @p3818 @p91 @p5353 @p5351 @p2275 @p3793 @p3791 @p390 @p5380 @p5378 @p26 @p3796 @p3794 @p92 @p5377 @p5375 @p2304 @p3769 @p3767 @p361 @p5404 @p5402 @p25 @p3772 @p3770 @p93 @p5401 @p5399 @p2333 @p3745 @p3743 @p332 @p5428 @p5426 @p24 @p3748 @p3746 @p94 @p5425 @p5423 @p2362 @p3721 @p3719 @p303 @p5452 @p5450 @p23 @p3724 @p3722 @p95 @p5449 @p5447 @p2391 @p3697 @p3695 @p274 @p5476 @p5474 @p22 @p3700 @p3698 @p96 @p5473 @p5471 @p2420 @p3673 @p3671 @p245 @p5500 @p5498 @p21 @p3676 @p3674 @p97 @p5497 @p5495 @p2449 @p3649 @p3647 @p216 @p5524 @p5522 @p20 @p3652 @p3650 @p98 @p5521 @p5519 @p2478 @p3628 @p3626 @p187 @p5518 @p5516 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5515) :args (@t4617 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4044 @t59 @t4041 @t4042 @t1311 @t4023 @t4027 @t1285 @t4038 @t4059 @t58 @t4026 @t4029 @t60 @t4056 @t4057 @t1337 @t4008 @t4012 @t1259 @t4053 @t4074 @t57 @t4011 @t4014 @t61 @t4071 @t4072 @t1363 @t3993 @t3997 @t1233 @t4068 @t4089 @t56 @t3996 @t3999 @t62 @t4086 @t4087 @t1389 @t3978 @t3982 @t1207 @t4083 @t4104 @t55 @t3981 @t3984 @t63 @t4101 @t4102 @t1415 @t3963 @t3967 @t1181 @t4098 @t4119 @t54 @t3966 @t3969 @t64 @t4116 @t4117 @t1441 @t3948 @t3952 @t1155 @t4113 @t4134 @t53 @t3951 @t3954 @t65 @t4131 @t4132 @t1467 @t3933 @t3937 @t1129 @t4128 @t4149 @t52 @t3936 @t3939 @t66 @t4146 @t4147 @t1493 @t3918 @t3922 @t1103 @t4143 @t4164 @t51 @t3921 @t3924 @t67 @t4161 @t4162 @t1519 @t3903 @t3907 @t1077 @t4158 @t4179 @t50 @t3906 @t3909 @t68 @t4176 @t4177 @t1545 @t3888 @t3892 @t1051 @t4173 @t4194 @t49 @t3891 @t3894 @t69 @t4191 @t4192 @t1571 @t3873 @t3877 @t1025 @t4188 @t4209 @t48 @t3876 @t3879 @t70 @t4206 @t4207 @t1597 @t3858 @t3862 @t999 @t4203 @t4224 @t47 @t3861 @t3864 @t71 @t4221 @t4222 @t1623 @t3843 @t3847 @t973 @t4218 @t4239 @t46 @t3846 @t3849 @t72 @t4236 @t4237 @t1649 @t3828 @t3832 @t947 @t4233 @t4254 @t45 @t3831 @t3834 @t73 @t4251 @t4252 @t1675 @t3813 @t3817 @t921 @t4248 @t4269 @t44 @t3816 @t3819 @t74 @t4266 @t4267 @t1701 @t3798 @t3802 @t895 @t4263 @t4284 @t43 @t3801 @t3804 @t75 @t4281 @t4282 @t1727 @t3783 @t3787 @t869 @t4278 @t4299 @t42 @t3786 @t3789 @t76 @t4296 @t4297 @t1753 @t3768 @t3772 @t843 @t4293 @t4314 @t41 @t3771 @t3774 @t77 @t4311 @t4312 @t1779 @t3753 @t3757 @t817 @t4308 @t4329 @t40 @t3756 @t3759 @t78 @t4326 @t4327 @t1805 @t3738 @t3742 @t791 @t4323 @t4344 @t39 @t3741 @t3744 @t79 @t4341 @t4342 @t1831 @t3723 @t3727 @t765 @t4338 @t4359 @t38 @t3726 @t3729 @t80 @t4356 @t4357 @t1857 @t3708 @t3712 @t739 @t4353 @t4374 @t37 @t3711 @t3714 @t81 @t4371 @t4372 @t1883 @t3693 @t3697 @t713 @t4368 @t4389 @t36 @t3696 @t3699 @t82 @t4386 @t4387 @t1909 @t3678 @t3682 @t687 @t4383 @t4404 @t35 @t3681 @t3684 @t83 @t4401 @t4402 @t1935 @t3663 @t3667 @t661 @t4398 @t4419 @t34 @t3666 @t3669 @t84 @t4416 @t4417 @t1961 @t3648 @t3652 @t635 @t4413 @t4434 @t33 @t3651 @t3654 @t85 @t4431 @t4432 @t1987 @t3633 @t3637 @t609 @t4428 @t4449 @t32 @t3636 @t3639 @t86 @t4446 @t4447 @t2013 @t3618 @t3622 @t583 @t4443 @t4464 @t31 @t3621 @t3624 @t87 @t4461 @t4462 @t2039 @t3603 @t3607 @t557 @t4458 @t4479 @t30 @t3606 @t3609 @t88 @t4476 @t4477 @t2065 @t3588 @t3592 @t531 @t4473 @t4494 @t29 @t3591 @t3594 @t89 @t4491 @t4492 @t2091 @t3573 @t3577 @t505 @t4488 @t4509 @t28 @t3576 @t3579 @t90 @t4506 @t4507 @t2117 @t3558 @t3562 @t479 @t4503 @t4524 @t27 @t3561 @t3564 @t91 @t4521 @t4522 @t2143 @t3543 @t3547 @t453 @t4518 @t4539 @t26 @t3546 @t3549 @t92 @t4536 @t4537 @t2169 @t3528 @t3532 @t427 @t4533 @t4554 @t25 @t3531 @t3534 @t93 @t4551 @t4552 @t2195 @t3513 @t3517 @t401 @t4548 @t4569 @t24 @t3516 @t3519 @t94 @t4566 @t4567 @t2221 @t3498 @t3502 @t375 @t4563 @t4584 @t23 @t3501 @t3504 @t95 @t4581 @t4582 @t2247 @t3483 @t3487 @t349 @t4578 @t4599 @t22 @t3486 @t3489 @t96 @t4596 @t4597 @t2273 @t3468 @t3472 @t323 @t4593 @t4614 @t21 @t3471 @t3474 @t97 @t4611 @t4612 @t2299 @t3453 @t3457 @t297 @t4608 @t4629 @t20 @t3456 @t3459 @t98 @t4626 @t4627 @t2325 @t3441 @t3444 @t276 @t4623 @t4624 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6183 @t220) % 40.01/40.21 (step @p5527 :rule instantiate :premises (@p110) :args (@t4630)) % 40.01/40.21 (step-pop @p6184 :rule scope :premises (@p5527)) % 40.01/40.21 (step @p5528 :rule process_scope :premises (@p6184) :args (@t4633)) % 40.01/40.21 (step @p5530 :rule implies_elim :premises (@p5528)) % 40.01/40.21 (step @p5531 :rule cnf_or_pos :args (@t4633)) % 40.01/40.21 (step @p5532 :rule reordering :premises (@p5531) :args ((or @t4632 @t4631 (not @t4633)))) % 40.01/40.21 (step @p5533 :rule instantiate :premises (@p112) :args (@t4634)) % 40.01/40.21 (step @p5534 :rule cnf_or_pos :args (@t4635)) % 40.01/40.21 (step @p5535 :rule reordering :premises (@p5534) :args ((or @t4632 @t244 @t2353 (not @t4635)))) % 40.01/40.21 (step @p5536 :rule instantiate :premises (@p108) :args (@t4630)) % 40.01/40.21 (step @p5537 :rule cnf_or_pos :args (@t4637)) % 40.01/40.21 (step @p5538 :rule reordering :premises (@p5537) :args ((or @t2364 @t265 @t264 @t4636 (not @t4637)))) % 40.01/40.21 (step @p5539 :rule chain_m_resolution :premises (@p5538 @p5536 @p2496 @p2494 @p136 @p134 @p5535 @p5533 @p133 @p131 @p130 @p128 @p127 @p125 @p5532 @p5530 @p110) :args ((or @t4632 @t239) @t267 (@list @t4637 @t2364 @t2366 @t248 @t249 @t2353 @t4635 @t245 @t247 @t242 @t243 @t240 @t241 @t4631 @t4633 @t220))) % 40.01/40.21 (step @p5540 :rule instantiate :premises (@p119) :args (@t4634)) % 40.01/40.21 (step @p5541 :rule cnf_or_pos :args (@t4639)) % 40.01/40.21 (step @p5542 :rule reordering :premises (@p5541) :args ((or @t270 @t4632 @t4638 @t3440 (not @t4639)))) % 40.01/40.21 (step @p5543 :rule instantiate :premises (@p120) :args (@t2350)) % 40.01/40.21 (step @p5544 :rule cnf_or_pos :args (@t4642)) % 40.01/40.21 (step @p5545 :rule reordering :premises (@p5544) :args ((or @t4641 @t4640 @t2351 (not @t4642)))) % 40.01/40.21 (step @p5546 :rule instantiate :premises (@p121) :args (@t2349)) % 40.01/40.21 (step @p5547 :rule cnf_or_pos :args (@t4644)) % 40.01/40.21 (step @p5548 :rule reordering :premises (@p5547) :args ((or @t2359 @t4623 @t4643 (not @t4644)))) % 40.01/40.21 (step @p5549 :rule chain_m_resolution :premises (@p4585 @p4583 @p1347 @p4612 @p4610 @p58 @p4588 @p4586 @p59 @p4609 @p4607 @p1376 @p4561 @p4559 @p1318 @p4636 @p4634 @p57 @p4564 @p4562 @p60 @p4633 @p4631 @p1405 @p4537 @p4535 @p1289 @p4660 @p4658 @p56 @p4540 @p4538 @p61 @p4657 @p4655 @p1434 @p4513 @p4511 @p1260 @p4684 @p4682 @p55 @p4516 @p4514 @p62 @p4681 @p4679 @p1463 @p4489 @p4487 @p1231 @p4708 @p4706 @p54 @p4492 @p4490 @p63 @p4705 @p4703 @p1492 @p4465 @p4463 @p1202 @p4732 @p4730 @p53 @p4468 @p4466 @p64 @p4729 @p4727 @p1521 @p4441 @p4439 @p1173 @p4756 @p4754 @p52 @p4444 @p4442 @p65 @p4753 @p4751 @p1550 @p4417 @p4415 @p1144 @p4780 @p4778 @p51 @p4420 @p4418 @p66 @p4777 @p4775 @p1579 @p4393 @p4391 @p1115 @p4804 @p4802 @p50 @p4396 @p4394 @p67 @p4801 @p4799 @p1608 @p4369 @p4367 @p1086 @p4828 @p4826 @p49 @p4372 @p4370 @p68 @p4825 @p4823 @p1637 @p4345 @p4343 @p1057 @p4852 @p4850 @p48 @p4348 @p4346 @p69 @p4849 @p4847 @p1666 @p4321 @p4319 @p1028 @p4876 @p4874 @p47 @p4324 @p4322 @p70 @p4873 @p4871 @p1695 @p4297 @p4295 @p999 @p4900 @p4898 @p46 @p4300 @p4298 @p71 @p4897 @p4895 @p1724 @p4273 @p4271 @p970 @p4924 @p4922 @p45 @p4276 @p4274 @p72 @p4921 @p4919 @p1753 @p4249 @p4247 @p941 @p4948 @p4946 @p44 @p4252 @p4250 @p73 @p4945 @p4943 @p1782 @p4225 @p4223 @p912 @p4972 @p4970 @p43 @p4228 @p4226 @p74 @p4969 @p4967 @p1811 @p4201 @p4199 @p883 @p4996 @p4994 @p42 @p4204 @p4202 @p75 @p4993 @p4991 @p1840 @p4177 @p4175 @p854 @p5020 @p5018 @p41 @p4180 @p4178 @p76 @p5017 @p5015 @p1869 @p4153 @p4151 @p825 @p5044 @p5042 @p40 @p4156 @p4154 @p77 @p5041 @p5039 @p1898 @p4129 @p4127 @p796 @p5068 @p5066 @p39 @p4132 @p4130 @p78 @p5065 @p5063 @p1927 @p4105 @p4103 @p767 @p5092 @p5090 @p38 @p4108 @p4106 @p79 @p5089 @p5087 @p1956 @p4081 @p4079 @p738 @p5116 @p5114 @p37 @p4084 @p4082 @p80 @p5113 @p5111 @p1985 @p4057 @p4055 @p709 @p5140 @p5138 @p36 @p4060 @p4058 @p81 @p5137 @p5135 @p2014 @p4033 @p4031 @p680 @p5164 @p5162 @p35 @p4036 @p4034 @p82 @p5161 @p5159 @p2043 @p4009 @p4007 @p651 @p5188 @p5186 @p34 @p4012 @p4010 @p83 @p5185 @p5183 @p2072 @p3985 @p3983 @p622 @p5212 @p5210 @p33 @p3988 @p3986 @p84 @p5209 @p5207 @p2101 @p3961 @p3959 @p593 @p5236 @p5234 @p32 @p3964 @p3962 @p85 @p5233 @p5231 @p2130 @p3937 @p3935 @p564 @p5260 @p5258 @p31 @p3940 @p3938 @p86 @p5257 @p5255 @p2159 @p3913 @p3911 @p535 @p5284 @p5282 @p30 @p3916 @p3914 @p87 @p5281 @p5279 @p2188 @p3889 @p3887 @p506 @p5308 @p5306 @p29 @p3892 @p3890 @p88 @p5305 @p5303 @p2217 @p3865 @p3863 @p477 @p5332 @p5330 @p28 @p3868 @p3866 @p89 @p5329 @p5327 @p2246 @p3841 @p3839 @p448 @p5356 @p5354 @p27 @p3844 @p3842 @p90 @p5353 @p5351 @p2275 @p3817 @p3815 @p419 @p5380 @p5378 @p26 @p3820 @p3818 @p91 @p5377 @p5375 @p2304 @p3793 @p3791 @p390 @p5404 @p5402 @p25 @p3796 @p3794 @p92 @p5401 @p5399 @p2333 @p3769 @p3767 @p361 @p5428 @p5426 @p24 @p3772 @p3770 @p93 @p5425 @p5423 @p2362 @p3745 @p3743 @p332 @p5452 @p5450 @p23 @p3748 @p3746 @p94 @p5449 @p5447 @p2391 @p3721 @p3719 @p303 @p5476 @p5474 @p22 @p3724 @p3722 @p95 @p5473 @p5471 @p2420 @p3697 @p3695 @p274 @p5500 @p5498 @p21 @p3700 @p3698 @p96 @p5497 @p5495 @p2449 @p3673 @p3671 @p245 @p5524 @p5522 @p20 @p3676 @p3674 @p97 @p5521 @p5519 @p2478 @p3649 @p3647 @p216 @p5548 @p5546 @p19 @p3652 @p3650 @p98 @p5545 @p5543 @p2507 @p3628 @p3626 @p187 @p5542 @p5540 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5539) :args (@t4632 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4042 @t1311 @t4038 @t4059 @t58 @t4041 @t4044 @t59 @t4056 @t4057 @t1337 @t4023 @t4027 @t1285 @t4053 @t4074 @t57 @t4026 @t4029 @t60 @t4071 @t4072 @t1363 @t4008 @t4012 @t1259 @t4068 @t4089 @t56 @t4011 @t4014 @t61 @t4086 @t4087 @t1389 @t3993 @t3997 @t1233 @t4083 @t4104 @t55 @t3996 @t3999 @t62 @t4101 @t4102 @t1415 @t3978 @t3982 @t1207 @t4098 @t4119 @t54 @t3981 @t3984 @t63 @t4116 @t4117 @t1441 @t3963 @t3967 @t1181 @t4113 @t4134 @t53 @t3966 @t3969 @t64 @t4131 @t4132 @t1467 @t3948 @t3952 @t1155 @t4128 @t4149 @t52 @t3951 @t3954 @t65 @t4146 @t4147 @t1493 @t3933 @t3937 @t1129 @t4143 @t4164 @t51 @t3936 @t3939 @t66 @t4161 @t4162 @t1519 @t3918 @t3922 @t1103 @t4158 @t4179 @t50 @t3921 @t3924 @t67 @t4176 @t4177 @t1545 @t3903 @t3907 @t1077 @t4173 @t4194 @t49 @t3906 @t3909 @t68 @t4191 @t4192 @t1571 @t3888 @t3892 @t1051 @t4188 @t4209 @t48 @t3891 @t3894 @t69 @t4206 @t4207 @t1597 @t3873 @t3877 @t1025 @t4203 @t4224 @t47 @t3876 @t3879 @t70 @t4221 @t4222 @t1623 @t3858 @t3862 @t999 @t4218 @t4239 @t46 @t3861 @t3864 @t71 @t4236 @t4237 @t1649 @t3843 @t3847 @t973 @t4233 @t4254 @t45 @t3846 @t3849 @t72 @t4251 @t4252 @t1675 @t3828 @t3832 @t947 @t4248 @t4269 @t44 @t3831 @t3834 @t73 @t4266 @t4267 @t1701 @t3813 @t3817 @t921 @t4263 @t4284 @t43 @t3816 @t3819 @t74 @t4281 @t4282 @t1727 @t3798 @t3802 @t895 @t4278 @t4299 @t42 @t3801 @t3804 @t75 @t4296 @t4297 @t1753 @t3783 @t3787 @t869 @t4293 @t4314 @t41 @t3786 @t3789 @t76 @t4311 @t4312 @t1779 @t3768 @t3772 @t843 @t4308 @t4329 @t40 @t3771 @t3774 @t77 @t4326 @t4327 @t1805 @t3753 @t3757 @t817 @t4323 @t4344 @t39 @t3756 @t3759 @t78 @t4341 @t4342 @t1831 @t3738 @t3742 @t791 @t4338 @t4359 @t38 @t3741 @t3744 @t79 @t4356 @t4357 @t1857 @t3723 @t3727 @t765 @t4353 @t4374 @t37 @t3726 @t3729 @t80 @t4371 @t4372 @t1883 @t3708 @t3712 @t739 @t4368 @t4389 @t36 @t3711 @t3714 @t81 @t4386 @t4387 @t1909 @t3693 @t3697 @t713 @t4383 @t4404 @t35 @t3696 @t3699 @t82 @t4401 @t4402 @t1935 @t3678 @t3682 @t687 @t4398 @t4419 @t34 @t3681 @t3684 @t83 @t4416 @t4417 @t1961 @t3663 @t3667 @t661 @t4413 @t4434 @t33 @t3666 @t3669 @t84 @t4431 @t4432 @t1987 @t3648 @t3652 @t635 @t4428 @t4449 @t32 @t3651 @t3654 @t85 @t4446 @t4447 @t2013 @t3633 @t3637 @t609 @t4443 @t4464 @t31 @t3636 @t3639 @t86 @t4461 @t4462 @t2039 @t3618 @t3622 @t583 @t4458 @t4479 @t30 @t3621 @t3624 @t87 @t4476 @t4477 @t2065 @t3603 @t3607 @t557 @t4473 @t4494 @t29 @t3606 @t3609 @t88 @t4491 @t4492 @t2091 @t3588 @t3592 @t531 @t4488 @t4509 @t28 @t3591 @t3594 @t89 @t4506 @t4507 @t2117 @t3573 @t3577 @t505 @t4503 @t4524 @t27 @t3576 @t3579 @t90 @t4521 @t4522 @t2143 @t3558 @t3562 @t479 @t4518 @t4539 @t26 @t3561 @t3564 @t91 @t4536 @t4537 @t2169 @t3543 @t3547 @t453 @t4533 @t4554 @t25 @t3546 @t3549 @t92 @t4551 @t4552 @t2195 @t3528 @t3532 @t427 @t4548 @t4569 @t24 @t3531 @t3534 @t93 @t4566 @t4567 @t2221 @t3513 @t3517 @t401 @t4563 @t4584 @t23 @t3516 @t3519 @t94 @t4581 @t4582 @t2247 @t3498 @t3502 @t375 @t4578 @t4599 @t22 @t3501 @t3504 @t95 @t4596 @t4597 @t2273 @t3483 @t3487 @t349 @t4593 @t4614 @t21 @t3486 @t3489 @t96 @t4611 @t4612 @t2299 @t3468 @t3472 @t323 @t4608 @t4629 @t20 @t3471 @t3474 @t97 @t4626 @t4627 @t2325 @t3453 @t3457 @t297 @t4623 @t4644 @t19 @t3456 @t3459 @t98 @t4641 @t4642 @t2351 @t3441 @t3444 @t276 @t4638 @t4639 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6185 @t220) % 40.01/40.21 (step @p5551 :rule instantiate :premises (@p110) :args (@t4645)) % 40.01/40.21 (step-pop @p6186 :rule scope :premises (@p5551)) % 40.01/40.21 (step @p5552 :rule process_scope :premises (@p6186) :args (@t4648)) % 40.01/40.21 (step @p5554 :rule implies_elim :premises (@p5552)) % 40.01/40.21 (step @p5555 :rule cnf_or_pos :args (@t4648)) % 40.01/40.21 (step @p5556 :rule reordering :premises (@p5555) :args ((or @t4647 @t4646 (not @t4648)))) % 40.01/40.21 (step @p5557 :rule instantiate :premises (@p112) :args (@t4649)) % 40.01/40.21 (step @p5558 :rule cnf_or_pos :args (@t4650)) % 40.01/40.21 (step @p5559 :rule reordering :premises (@p5558) :args ((or @t4647 @t244 @t2379 (not @t4650)))) % 40.01/40.21 (step @p5560 :rule instantiate :premises (@p108) :args (@t4645)) % 40.01/40.21 (step @p5561 :rule cnf_or_pos :args (@t4652)) % 40.01/40.21 (step @p5562 :rule reordering :premises (@p5561) :args ((or @t2390 @t265 @t264 @t4651 (not @t4652)))) % 40.01/40.21 (step @p5563 :rule chain_m_resolution :premises (@p5562 @p5560 @p2525 @p2523 @p136 @p134 @p5559 @p5557 @p133 @p131 @p130 @p128 @p127 @p125 @p5556 @p5554 @p110) :args ((or @t4647 @t239) @t267 (@list @t4652 @t2390 @t2392 @t248 @t249 @t2379 @t4650 @t245 @t247 @t242 @t243 @t240 @t241 @t4646 @t4648 @t220))) % 40.01/40.21 (step @p5564 :rule instantiate :premises (@p119) :args (@t4649)) % 40.01/40.21 (step @p5565 :rule cnf_or_pos :args (@t4654)) % 40.01/40.21 (step @p5566 :rule reordering :premises (@p5565) :args ((or @t270 @t4647 @t4653 @t3440 (not @t4654)))) % 40.01/40.21 (step @p5567 :rule instantiate :premises (@p120) :args (@t2376)) % 40.01/40.21 (step @p5568 :rule cnf_or_pos :args (@t4657)) % 40.01/40.21 (step @p5569 :rule reordering :premises (@p5568) :args ((or @t4656 @t4655 @t2377 (not @t4657)))) % 40.01/40.21 (step @p5570 :rule instantiate :premises (@p121) :args (@t2375)) % 40.01/40.21 (step @p5571 :rule cnf_or_pos :args (@t4659)) % 40.01/40.21 (step @p5572 :rule reordering :premises (@p5571) :args ((or @t2385 @t4638 @t4658 (not @t4659)))) % 40.01/40.21 (step @p5573 :rule chain_m_resolution :premises (@p4612 @p4610 @p58 @p4609 @p4607 @p1376 @p4585 @p4583 @p1347 @p4636 @p4634 @p57 @p4588 @p4586 @p59 @p4633 @p4631 @p1405 @p4561 @p4559 @p1318 @p4660 @p4658 @p56 @p4564 @p4562 @p60 @p4657 @p4655 @p1434 @p4537 @p4535 @p1289 @p4684 @p4682 @p55 @p4540 @p4538 @p61 @p4681 @p4679 @p1463 @p4513 @p4511 @p1260 @p4708 @p4706 @p54 @p4516 @p4514 @p62 @p4705 @p4703 @p1492 @p4489 @p4487 @p1231 @p4732 @p4730 @p53 @p4492 @p4490 @p63 @p4729 @p4727 @p1521 @p4465 @p4463 @p1202 @p4756 @p4754 @p52 @p4468 @p4466 @p64 @p4753 @p4751 @p1550 @p4441 @p4439 @p1173 @p4780 @p4778 @p51 @p4444 @p4442 @p65 @p4777 @p4775 @p1579 @p4417 @p4415 @p1144 @p4804 @p4802 @p50 @p4420 @p4418 @p66 @p4801 @p4799 @p1608 @p4393 @p4391 @p1115 @p4828 @p4826 @p49 @p4396 @p4394 @p67 @p4825 @p4823 @p1637 @p4369 @p4367 @p1086 @p4852 @p4850 @p48 @p4372 @p4370 @p68 @p4849 @p4847 @p1666 @p4345 @p4343 @p1057 @p4876 @p4874 @p47 @p4348 @p4346 @p69 @p4873 @p4871 @p1695 @p4321 @p4319 @p1028 @p4900 @p4898 @p46 @p4324 @p4322 @p70 @p4897 @p4895 @p1724 @p4297 @p4295 @p999 @p4924 @p4922 @p45 @p4300 @p4298 @p71 @p4921 @p4919 @p1753 @p4273 @p4271 @p970 @p4948 @p4946 @p44 @p4276 @p4274 @p72 @p4945 @p4943 @p1782 @p4249 @p4247 @p941 @p4972 @p4970 @p43 @p4252 @p4250 @p73 @p4969 @p4967 @p1811 @p4225 @p4223 @p912 @p4996 @p4994 @p42 @p4228 @p4226 @p74 @p4993 @p4991 @p1840 @p4201 @p4199 @p883 @p5020 @p5018 @p41 @p4204 @p4202 @p75 @p5017 @p5015 @p1869 @p4177 @p4175 @p854 @p5044 @p5042 @p40 @p4180 @p4178 @p76 @p5041 @p5039 @p1898 @p4153 @p4151 @p825 @p5068 @p5066 @p39 @p4156 @p4154 @p77 @p5065 @p5063 @p1927 @p4129 @p4127 @p796 @p5092 @p5090 @p38 @p4132 @p4130 @p78 @p5089 @p5087 @p1956 @p4105 @p4103 @p767 @p5116 @p5114 @p37 @p4108 @p4106 @p79 @p5113 @p5111 @p1985 @p4081 @p4079 @p738 @p5140 @p5138 @p36 @p4084 @p4082 @p80 @p5137 @p5135 @p2014 @p4057 @p4055 @p709 @p5164 @p5162 @p35 @p4060 @p4058 @p81 @p5161 @p5159 @p2043 @p4033 @p4031 @p680 @p5188 @p5186 @p34 @p4036 @p4034 @p82 @p5185 @p5183 @p2072 @p4009 @p4007 @p651 @p5212 @p5210 @p33 @p4012 @p4010 @p83 @p5209 @p5207 @p2101 @p3985 @p3983 @p622 @p5236 @p5234 @p32 @p3988 @p3986 @p84 @p5233 @p5231 @p2130 @p3961 @p3959 @p593 @p5260 @p5258 @p31 @p3964 @p3962 @p85 @p5257 @p5255 @p2159 @p3937 @p3935 @p564 @p5284 @p5282 @p30 @p3940 @p3938 @p86 @p5281 @p5279 @p2188 @p3913 @p3911 @p535 @p5308 @p5306 @p29 @p3916 @p3914 @p87 @p5305 @p5303 @p2217 @p3889 @p3887 @p506 @p5332 @p5330 @p28 @p3892 @p3890 @p88 @p5329 @p5327 @p2246 @p3865 @p3863 @p477 @p5356 @p5354 @p27 @p3868 @p3866 @p89 @p5353 @p5351 @p2275 @p3841 @p3839 @p448 @p5380 @p5378 @p26 @p3844 @p3842 @p90 @p5377 @p5375 @p2304 @p3817 @p3815 @p419 @p5404 @p5402 @p25 @p3820 @p3818 @p91 @p5401 @p5399 @p2333 @p3793 @p3791 @p390 @p5428 @p5426 @p24 @p3796 @p3794 @p92 @p5425 @p5423 @p2362 @p3769 @p3767 @p361 @p5452 @p5450 @p23 @p3772 @p3770 @p93 @p5449 @p5447 @p2391 @p3745 @p3743 @p332 @p5476 @p5474 @p22 @p3748 @p3746 @p94 @p5473 @p5471 @p2420 @p3721 @p3719 @p303 @p5500 @p5498 @p21 @p3724 @p3722 @p95 @p5497 @p5495 @p2449 @p3697 @p3695 @p274 @p5524 @p5522 @p20 @p3700 @p3698 @p96 @p5521 @p5519 @p2478 @p3673 @p3671 @p245 @p5548 @p5546 @p19 @p3676 @p3674 @p97 @p5545 @p5543 @p2507 @p3649 @p3647 @p216 @p5572 @p5570 @p18 @p3652 @p3650 @p98 @p5569 @p5567 @p2536 @p3628 @p3626 @p187 @p5566 @p5564 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5563) :args (@t4647 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4059 @t58 @t4056 @t4057 @t1337 @t4038 @t4042 @t1311 @t4053 @t4074 @t57 @t4041 @t4044 @t59 @t4071 @t4072 @t1363 @t4023 @t4027 @t1285 @t4068 @t4089 @t56 @t4026 @t4029 @t60 @t4086 @t4087 @t1389 @t4008 @t4012 @t1259 @t4083 @t4104 @t55 @t4011 @t4014 @t61 @t4101 @t4102 @t1415 @t3993 @t3997 @t1233 @t4098 @t4119 @t54 @t3996 @t3999 @t62 @t4116 @t4117 @t1441 @t3978 @t3982 @t1207 @t4113 @t4134 @t53 @t3981 @t3984 @t63 @t4131 @t4132 @t1467 @t3963 @t3967 @t1181 @t4128 @t4149 @t52 @t3966 @t3969 @t64 @t4146 @t4147 @t1493 @t3948 @t3952 @t1155 @t4143 @t4164 @t51 @t3951 @t3954 @t65 @t4161 @t4162 @t1519 @t3933 @t3937 @t1129 @t4158 @t4179 @t50 @t3936 @t3939 @t66 @t4176 @t4177 @t1545 @t3918 @t3922 @t1103 @t4173 @t4194 @t49 @t3921 @t3924 @t67 @t4191 @t4192 @t1571 @t3903 @t3907 @t1077 @t4188 @t4209 @t48 @t3906 @t3909 @t68 @t4206 @t4207 @t1597 @t3888 @t3892 @t1051 @t4203 @t4224 @t47 @t3891 @t3894 @t69 @t4221 @t4222 @t1623 @t3873 @t3877 @t1025 @t4218 @t4239 @t46 @t3876 @t3879 @t70 @t4236 @t4237 @t1649 @t3858 @t3862 @t999 @t4233 @t4254 @t45 @t3861 @t3864 @t71 @t4251 @t4252 @t1675 @t3843 @t3847 @t973 @t4248 @t4269 @t44 @t3846 @t3849 @t72 @t4266 @t4267 @t1701 @t3828 @t3832 @t947 @t4263 @t4284 @t43 @t3831 @t3834 @t73 @t4281 @t4282 @t1727 @t3813 @t3817 @t921 @t4278 @t4299 @t42 @t3816 @t3819 @t74 @t4296 @t4297 @t1753 @t3798 @t3802 @t895 @t4293 @t4314 @t41 @t3801 @t3804 @t75 @t4311 @t4312 @t1779 @t3783 @t3787 @t869 @t4308 @t4329 @t40 @t3786 @t3789 @t76 @t4326 @t4327 @t1805 @t3768 @t3772 @t843 @t4323 @t4344 @t39 @t3771 @t3774 @t77 @t4341 @t4342 @t1831 @t3753 @t3757 @t817 @t4338 @t4359 @t38 @t3756 @t3759 @t78 @t4356 @t4357 @t1857 @t3738 @t3742 @t791 @t4353 @t4374 @t37 @t3741 @t3744 @t79 @t4371 @t4372 @t1883 @t3723 @t3727 @t765 @t4368 @t4389 @t36 @t3726 @t3729 @t80 @t4386 @t4387 @t1909 @t3708 @t3712 @t739 @t4383 @t4404 @t35 @t3711 @t3714 @t81 @t4401 @t4402 @t1935 @t3693 @t3697 @t713 @t4398 @t4419 @t34 @t3696 @t3699 @t82 @t4416 @t4417 @t1961 @t3678 @t3682 @t687 @t4413 @t4434 @t33 @t3681 @t3684 @t83 @t4431 @t4432 @t1987 @t3663 @t3667 @t661 @t4428 @t4449 @t32 @t3666 @t3669 @t84 @t4446 @t4447 @t2013 @t3648 @t3652 @t635 @t4443 @t4464 @t31 @t3651 @t3654 @t85 @t4461 @t4462 @t2039 @t3633 @t3637 @t609 @t4458 @t4479 @t30 @t3636 @t3639 @t86 @t4476 @t4477 @t2065 @t3618 @t3622 @t583 @t4473 @t4494 @t29 @t3621 @t3624 @t87 @t4491 @t4492 @t2091 @t3603 @t3607 @t557 @t4488 @t4509 @t28 @t3606 @t3609 @t88 @t4506 @t4507 @t2117 @t3588 @t3592 @t531 @t4503 @t4524 @t27 @t3591 @t3594 @t89 @t4521 @t4522 @t2143 @t3573 @t3577 @t505 @t4518 @t4539 @t26 @t3576 @t3579 @t90 @t4536 @t4537 @t2169 @t3558 @t3562 @t479 @t4533 @t4554 @t25 @t3561 @t3564 @t91 @t4551 @t4552 @t2195 @t3543 @t3547 @t453 @t4548 @t4569 @t24 @t3546 @t3549 @t92 @t4566 @t4567 @t2221 @t3528 @t3532 @t427 @t4563 @t4584 @t23 @t3531 @t3534 @t93 @t4581 @t4582 @t2247 @t3513 @t3517 @t401 @t4578 @t4599 @t22 @t3516 @t3519 @t94 @t4596 @t4597 @t2273 @t3498 @t3502 @t375 @t4593 @t4614 @t21 @t3501 @t3504 @t95 @t4611 @t4612 @t2299 @t3483 @t3487 @t349 @t4608 @t4629 @t20 @t3486 @t3489 @t96 @t4626 @t4627 @t2325 @t3468 @t3472 @t323 @t4623 @t4644 @t19 @t3471 @t3474 @t97 @t4641 @t4642 @t2351 @t3453 @t3457 @t297 @t4638 @t4659 @t18 @t3456 @t3459 @t98 @t4656 @t4657 @t2377 @t3441 @t3444 @t276 @t4653 @t4654 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6187 @t220) % 40.01/40.21 (step @p5575 :rule instantiate :premises (@p110) :args (@t4660)) % 40.01/40.21 (step-pop @p6188 :rule scope :premises (@p5575)) % 40.01/40.21 (step @p5576 :rule process_scope :premises (@p6188) :args (@t4663)) % 40.01/40.21 (step @p5578 :rule implies_elim :premises (@p5576)) % 40.01/40.21 (step @p5579 :rule cnf_or_pos :args (@t4663)) % 40.01/40.21 (step @p5580 :rule reordering :premises (@p5579) :args ((or @t4662 @t4661 (not @t4663)))) % 40.01/40.21 (step @p5581 :rule instantiate :premises (@p112) :args (@t4664)) % 40.01/40.21 (step @p5582 :rule cnf_or_pos :args (@t4665)) % 40.01/40.21 (step @p5583 :rule reordering :premises (@p5582) :args ((or @t4662 @t244 @t2405 (not @t4665)))) % 40.01/40.21 (step @p5584 :rule instantiate :premises (@p108) :args (@t4660)) % 40.01/40.21 (step @p5585 :rule cnf_or_pos :args (@t4667)) % 40.01/40.21 (step @p5586 :rule reordering :premises (@p5585) :args ((or @t2416 @t265 @t264 @t4666 (not @t4667)))) % 40.01/40.21 (step @p5587 :rule chain_m_resolution :premises (@p5586 @p5584 @p2554 @p2552 @p136 @p134 @p5583 @p5581 @p133 @p131 @p130 @p128 @p127 @p125 @p5580 @p5578 @p110) :args ((or @t4662 @t239) @t267 (@list @t4667 @t2416 @t2418 @t248 @t249 @t2405 @t4665 @t245 @t247 @t242 @t243 @t240 @t241 @t4661 @t4663 @t220))) % 40.01/40.21 (step @p5588 :rule instantiate :premises (@p119) :args (@t4664)) % 40.01/40.21 (step @p5589 :rule cnf_or_pos :args (@t4669)) % 40.01/40.21 (step @p5590 :rule reordering :premises (@p5589) :args ((or @t270 @t4662 @t4668 @t3440 (not @t4669)))) % 40.01/40.21 (step @p5591 :rule instantiate :premises (@p120) :args (@t2402)) % 40.01/40.21 (step @p5592 :rule cnf_or_pos :args (@t4672)) % 40.01/40.21 (step @p5593 :rule reordering :premises (@p5592) :args ((or @t4671 @t4670 @t2403 (not @t4672)))) % 40.01/40.21 (step @p5594 :rule instantiate :premises (@p121) :args (@t2401)) % 40.01/40.21 (step @p5595 :rule cnf_or_pos :args (@t4674)) % 40.01/40.21 (step @p5596 :rule reordering :premises (@p5595) :args ((or @t2411 @t4653 @t4673 (not @t4674)))) % 40.01/40.21 (step @p5597 :rule chain_m_resolution :premises (@p4609 @p4607 @p1376 @p4636 @p4634 @p57 @p4612 @p4610 @p58 @p4633 @p4631 @p1405 @p4585 @p4583 @p1347 @p4660 @p4658 @p56 @p4588 @p4586 @p59 @p4657 @p4655 @p1434 @p4561 @p4559 @p1318 @p4684 @p4682 @p55 @p4564 @p4562 @p60 @p4681 @p4679 @p1463 @p4537 @p4535 @p1289 @p4708 @p4706 @p54 @p4540 @p4538 @p61 @p4705 @p4703 @p1492 @p4513 @p4511 @p1260 @p4732 @p4730 @p53 @p4516 @p4514 @p62 @p4729 @p4727 @p1521 @p4489 @p4487 @p1231 @p4756 @p4754 @p52 @p4492 @p4490 @p63 @p4753 @p4751 @p1550 @p4465 @p4463 @p1202 @p4780 @p4778 @p51 @p4468 @p4466 @p64 @p4777 @p4775 @p1579 @p4441 @p4439 @p1173 @p4804 @p4802 @p50 @p4444 @p4442 @p65 @p4801 @p4799 @p1608 @p4417 @p4415 @p1144 @p4828 @p4826 @p49 @p4420 @p4418 @p66 @p4825 @p4823 @p1637 @p4393 @p4391 @p1115 @p4852 @p4850 @p48 @p4396 @p4394 @p67 @p4849 @p4847 @p1666 @p4369 @p4367 @p1086 @p4876 @p4874 @p47 @p4372 @p4370 @p68 @p4873 @p4871 @p1695 @p4345 @p4343 @p1057 @p4900 @p4898 @p46 @p4348 @p4346 @p69 @p4897 @p4895 @p1724 @p4321 @p4319 @p1028 @p4924 @p4922 @p45 @p4324 @p4322 @p70 @p4921 @p4919 @p1753 @p4297 @p4295 @p999 @p4948 @p4946 @p44 @p4300 @p4298 @p71 @p4945 @p4943 @p1782 @p4273 @p4271 @p970 @p4972 @p4970 @p43 @p4276 @p4274 @p72 @p4969 @p4967 @p1811 @p4249 @p4247 @p941 @p4996 @p4994 @p42 @p4252 @p4250 @p73 @p4993 @p4991 @p1840 @p4225 @p4223 @p912 @p5020 @p5018 @p41 @p4228 @p4226 @p74 @p5017 @p5015 @p1869 @p4201 @p4199 @p883 @p5044 @p5042 @p40 @p4204 @p4202 @p75 @p5041 @p5039 @p1898 @p4177 @p4175 @p854 @p5068 @p5066 @p39 @p4180 @p4178 @p76 @p5065 @p5063 @p1927 @p4153 @p4151 @p825 @p5092 @p5090 @p38 @p4156 @p4154 @p77 @p5089 @p5087 @p1956 @p4129 @p4127 @p796 @p5116 @p5114 @p37 @p4132 @p4130 @p78 @p5113 @p5111 @p1985 @p4105 @p4103 @p767 @p5140 @p5138 @p36 @p4108 @p4106 @p79 @p5137 @p5135 @p2014 @p4081 @p4079 @p738 @p5164 @p5162 @p35 @p4084 @p4082 @p80 @p5161 @p5159 @p2043 @p4057 @p4055 @p709 @p5188 @p5186 @p34 @p4060 @p4058 @p81 @p5185 @p5183 @p2072 @p4033 @p4031 @p680 @p5212 @p5210 @p33 @p4036 @p4034 @p82 @p5209 @p5207 @p2101 @p4009 @p4007 @p651 @p5236 @p5234 @p32 @p4012 @p4010 @p83 @p5233 @p5231 @p2130 @p3985 @p3983 @p622 @p5260 @p5258 @p31 @p3988 @p3986 @p84 @p5257 @p5255 @p2159 @p3961 @p3959 @p593 @p5284 @p5282 @p30 @p3964 @p3962 @p85 @p5281 @p5279 @p2188 @p3937 @p3935 @p564 @p5308 @p5306 @p29 @p3940 @p3938 @p86 @p5305 @p5303 @p2217 @p3913 @p3911 @p535 @p5332 @p5330 @p28 @p3916 @p3914 @p87 @p5329 @p5327 @p2246 @p3889 @p3887 @p506 @p5356 @p5354 @p27 @p3892 @p3890 @p88 @p5353 @p5351 @p2275 @p3865 @p3863 @p477 @p5380 @p5378 @p26 @p3868 @p3866 @p89 @p5377 @p5375 @p2304 @p3841 @p3839 @p448 @p5404 @p5402 @p25 @p3844 @p3842 @p90 @p5401 @p5399 @p2333 @p3817 @p3815 @p419 @p5428 @p5426 @p24 @p3820 @p3818 @p91 @p5425 @p5423 @p2362 @p3793 @p3791 @p390 @p5452 @p5450 @p23 @p3796 @p3794 @p92 @p5449 @p5447 @p2391 @p3769 @p3767 @p361 @p5476 @p5474 @p22 @p3772 @p3770 @p93 @p5473 @p5471 @p2420 @p3745 @p3743 @p332 @p5500 @p5498 @p21 @p3748 @p3746 @p94 @p5497 @p5495 @p2449 @p3721 @p3719 @p303 @p5524 @p5522 @p20 @p3724 @p3722 @p95 @p5521 @p5519 @p2478 @p3697 @p3695 @p274 @p5548 @p5546 @p19 @p3700 @p3698 @p96 @p5545 @p5543 @p2507 @p3673 @p3671 @p245 @p5572 @p5570 @p18 @p3676 @p3674 @p97 @p5569 @p5567 @p2536 @p3649 @p3647 @p216 @p5596 @p5594 @p17 @p3652 @p3650 @p98 @p5593 @p5591 @p2565 @p3628 @p3626 @p187 @p5590 @p5588 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5587) :args (@t4662 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4057 @t1337 @t4053 @t4074 @t57 @t4056 @t4059 @t58 @t4071 @t4072 @t1363 @t4038 @t4042 @t1311 @t4068 @t4089 @t56 @t4041 @t4044 @t59 @t4086 @t4087 @t1389 @t4023 @t4027 @t1285 @t4083 @t4104 @t55 @t4026 @t4029 @t60 @t4101 @t4102 @t1415 @t4008 @t4012 @t1259 @t4098 @t4119 @t54 @t4011 @t4014 @t61 @t4116 @t4117 @t1441 @t3993 @t3997 @t1233 @t4113 @t4134 @t53 @t3996 @t3999 @t62 @t4131 @t4132 @t1467 @t3978 @t3982 @t1207 @t4128 @t4149 @t52 @t3981 @t3984 @t63 @t4146 @t4147 @t1493 @t3963 @t3967 @t1181 @t4143 @t4164 @t51 @t3966 @t3969 @t64 @t4161 @t4162 @t1519 @t3948 @t3952 @t1155 @t4158 @t4179 @t50 @t3951 @t3954 @t65 @t4176 @t4177 @t1545 @t3933 @t3937 @t1129 @t4173 @t4194 @t49 @t3936 @t3939 @t66 @t4191 @t4192 @t1571 @t3918 @t3922 @t1103 @t4188 @t4209 @t48 @t3921 @t3924 @t67 @t4206 @t4207 @t1597 @t3903 @t3907 @t1077 @t4203 @t4224 @t47 @t3906 @t3909 @t68 @t4221 @t4222 @t1623 @t3888 @t3892 @t1051 @t4218 @t4239 @t46 @t3891 @t3894 @t69 @t4236 @t4237 @t1649 @t3873 @t3877 @t1025 @t4233 @t4254 @t45 @t3876 @t3879 @t70 @t4251 @t4252 @t1675 @t3858 @t3862 @t999 @t4248 @t4269 @t44 @t3861 @t3864 @t71 @t4266 @t4267 @t1701 @t3843 @t3847 @t973 @t4263 @t4284 @t43 @t3846 @t3849 @t72 @t4281 @t4282 @t1727 @t3828 @t3832 @t947 @t4278 @t4299 @t42 @t3831 @t3834 @t73 @t4296 @t4297 @t1753 @t3813 @t3817 @t921 @t4293 @t4314 @t41 @t3816 @t3819 @t74 @t4311 @t4312 @t1779 @t3798 @t3802 @t895 @t4308 @t4329 @t40 @t3801 @t3804 @t75 @t4326 @t4327 @t1805 @t3783 @t3787 @t869 @t4323 @t4344 @t39 @t3786 @t3789 @t76 @t4341 @t4342 @t1831 @t3768 @t3772 @t843 @t4338 @t4359 @t38 @t3771 @t3774 @t77 @t4356 @t4357 @t1857 @t3753 @t3757 @t817 @t4353 @t4374 @t37 @t3756 @t3759 @t78 @t4371 @t4372 @t1883 @t3738 @t3742 @t791 @t4368 @t4389 @t36 @t3741 @t3744 @t79 @t4386 @t4387 @t1909 @t3723 @t3727 @t765 @t4383 @t4404 @t35 @t3726 @t3729 @t80 @t4401 @t4402 @t1935 @t3708 @t3712 @t739 @t4398 @t4419 @t34 @t3711 @t3714 @t81 @t4416 @t4417 @t1961 @t3693 @t3697 @t713 @t4413 @t4434 @t33 @t3696 @t3699 @t82 @t4431 @t4432 @t1987 @t3678 @t3682 @t687 @t4428 @t4449 @t32 @t3681 @t3684 @t83 @t4446 @t4447 @t2013 @t3663 @t3667 @t661 @t4443 @t4464 @t31 @t3666 @t3669 @t84 @t4461 @t4462 @t2039 @t3648 @t3652 @t635 @t4458 @t4479 @t30 @t3651 @t3654 @t85 @t4476 @t4477 @t2065 @t3633 @t3637 @t609 @t4473 @t4494 @t29 @t3636 @t3639 @t86 @t4491 @t4492 @t2091 @t3618 @t3622 @t583 @t4488 @t4509 @t28 @t3621 @t3624 @t87 @t4506 @t4507 @t2117 @t3603 @t3607 @t557 @t4503 @t4524 @t27 @t3606 @t3609 @t88 @t4521 @t4522 @t2143 @t3588 @t3592 @t531 @t4518 @t4539 @t26 @t3591 @t3594 @t89 @t4536 @t4537 @t2169 @t3573 @t3577 @t505 @t4533 @t4554 @t25 @t3576 @t3579 @t90 @t4551 @t4552 @t2195 @t3558 @t3562 @t479 @t4548 @t4569 @t24 @t3561 @t3564 @t91 @t4566 @t4567 @t2221 @t3543 @t3547 @t453 @t4563 @t4584 @t23 @t3546 @t3549 @t92 @t4581 @t4582 @t2247 @t3528 @t3532 @t427 @t4578 @t4599 @t22 @t3531 @t3534 @t93 @t4596 @t4597 @t2273 @t3513 @t3517 @t401 @t4593 @t4614 @t21 @t3516 @t3519 @t94 @t4611 @t4612 @t2299 @t3498 @t3502 @t375 @t4608 @t4629 @t20 @t3501 @t3504 @t95 @t4626 @t4627 @t2325 @t3483 @t3487 @t349 @t4623 @t4644 @t19 @t3486 @t3489 @t96 @t4641 @t4642 @t2351 @t3468 @t3472 @t323 @t4638 @t4659 @t18 @t3471 @t3474 @t97 @t4656 @t4657 @t2377 @t3453 @t3457 @t297 @t4653 @t4674 @t17 @t3456 @t3459 @t98 @t4671 @t4672 @t2403 @t3441 @t3444 @t276 @t4668 @t4669 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6189 @t220) % 40.01/40.21 (step @p5599 :rule instantiate :premises (@p110) :args (@t4675)) % 40.01/40.21 (step-pop @p6190 :rule scope :premises (@p5599)) % 40.01/40.21 (step @p5600 :rule process_scope :premises (@p6190) :args (@t4678)) % 40.01/40.21 (step @p5602 :rule implies_elim :premises (@p5600)) % 40.01/40.21 (step @p5603 :rule cnf_or_pos :args (@t4678)) % 40.01/40.21 (step @p5604 :rule reordering :premises (@p5603) :args ((or @t4677 @t4676 (not @t4678)))) % 40.01/40.21 (step @p5605 :rule instantiate :premises (@p112) :args (@t4679)) % 40.01/40.21 (step @p5606 :rule cnf_or_pos :args (@t4680)) % 40.01/40.21 (step @p5607 :rule reordering :premises (@p5606) :args ((or @t4677 @t244 @t2431 (not @t4680)))) % 40.01/40.21 (step @p5608 :rule instantiate :premises (@p108) :args (@t4675)) % 40.01/40.21 (step @p5609 :rule cnf_or_pos :args (@t4682)) % 40.01/40.21 (step @p5610 :rule reordering :premises (@p5609) :args ((or @t2442 @t265 @t264 @t4681 (not @t4682)))) % 40.01/40.21 (step @p5611 :rule chain_m_resolution :premises (@p5610 @p5608 @p2583 @p2581 @p136 @p134 @p5607 @p5605 @p133 @p131 @p130 @p128 @p127 @p125 @p5604 @p5602 @p110) :args ((or @t4677 @t239) @t267 (@list @t4682 @t2442 @t2444 @t248 @t249 @t2431 @t4680 @t245 @t247 @t242 @t243 @t240 @t241 @t4676 @t4678 @t220))) % 40.01/40.21 (step @p5612 :rule instantiate :premises (@p119) :args (@t4679)) % 40.01/40.21 (step @p5613 :rule cnf_or_pos :args (@t4684)) % 40.01/40.21 (step @p5614 :rule reordering :premises (@p5613) :args ((or @t270 @t4677 @t4683 @t3440 (not @t4684)))) % 40.01/40.21 (step @p5615 :rule instantiate :premises (@p120) :args (@t2428)) % 40.01/40.21 (step @p5616 :rule cnf_or_pos :args (@t4687)) % 40.01/40.21 (step @p5617 :rule reordering :premises (@p5616) :args ((or @t4686 @t4685 @t2429 (not @t4687)))) % 40.01/40.21 (step @p5618 :rule instantiate :premises (@p121) :args (@t2427)) % 40.01/40.21 (step @p5619 :rule cnf_or_pos :args (@t4689)) % 40.01/40.21 (step @p5620 :rule reordering :premises (@p5619) :args ((or @t2437 @t4668 @t4688 (not @t4689)))) % 40.01/40.21 (step @p5621 :rule chain_m_resolution :premises (@p4636 @p4634 @p57 @p4633 @p4631 @p1405 @p4609 @p4607 @p1376 @p4660 @p4658 @p56 @p4612 @p4610 @p58 @p4657 @p4655 @p1434 @p4585 @p4583 @p1347 @p4684 @p4682 @p55 @p4588 @p4586 @p59 @p4681 @p4679 @p1463 @p4561 @p4559 @p1318 @p4708 @p4706 @p54 @p4564 @p4562 @p60 @p4705 @p4703 @p1492 @p4537 @p4535 @p1289 @p4732 @p4730 @p53 @p4540 @p4538 @p61 @p4729 @p4727 @p1521 @p4513 @p4511 @p1260 @p4756 @p4754 @p52 @p4516 @p4514 @p62 @p4753 @p4751 @p1550 @p4489 @p4487 @p1231 @p4780 @p4778 @p51 @p4492 @p4490 @p63 @p4777 @p4775 @p1579 @p4465 @p4463 @p1202 @p4804 @p4802 @p50 @p4468 @p4466 @p64 @p4801 @p4799 @p1608 @p4441 @p4439 @p1173 @p4828 @p4826 @p49 @p4444 @p4442 @p65 @p4825 @p4823 @p1637 @p4417 @p4415 @p1144 @p4852 @p4850 @p48 @p4420 @p4418 @p66 @p4849 @p4847 @p1666 @p4393 @p4391 @p1115 @p4876 @p4874 @p47 @p4396 @p4394 @p67 @p4873 @p4871 @p1695 @p4369 @p4367 @p1086 @p4900 @p4898 @p46 @p4372 @p4370 @p68 @p4897 @p4895 @p1724 @p4345 @p4343 @p1057 @p4924 @p4922 @p45 @p4348 @p4346 @p69 @p4921 @p4919 @p1753 @p4321 @p4319 @p1028 @p4948 @p4946 @p44 @p4324 @p4322 @p70 @p4945 @p4943 @p1782 @p4297 @p4295 @p999 @p4972 @p4970 @p43 @p4300 @p4298 @p71 @p4969 @p4967 @p1811 @p4273 @p4271 @p970 @p4996 @p4994 @p42 @p4276 @p4274 @p72 @p4993 @p4991 @p1840 @p4249 @p4247 @p941 @p5020 @p5018 @p41 @p4252 @p4250 @p73 @p5017 @p5015 @p1869 @p4225 @p4223 @p912 @p5044 @p5042 @p40 @p4228 @p4226 @p74 @p5041 @p5039 @p1898 @p4201 @p4199 @p883 @p5068 @p5066 @p39 @p4204 @p4202 @p75 @p5065 @p5063 @p1927 @p4177 @p4175 @p854 @p5092 @p5090 @p38 @p4180 @p4178 @p76 @p5089 @p5087 @p1956 @p4153 @p4151 @p825 @p5116 @p5114 @p37 @p4156 @p4154 @p77 @p5113 @p5111 @p1985 @p4129 @p4127 @p796 @p5140 @p5138 @p36 @p4132 @p4130 @p78 @p5137 @p5135 @p2014 @p4105 @p4103 @p767 @p5164 @p5162 @p35 @p4108 @p4106 @p79 @p5161 @p5159 @p2043 @p4081 @p4079 @p738 @p5188 @p5186 @p34 @p4084 @p4082 @p80 @p5185 @p5183 @p2072 @p4057 @p4055 @p709 @p5212 @p5210 @p33 @p4060 @p4058 @p81 @p5209 @p5207 @p2101 @p4033 @p4031 @p680 @p5236 @p5234 @p32 @p4036 @p4034 @p82 @p5233 @p5231 @p2130 @p4009 @p4007 @p651 @p5260 @p5258 @p31 @p4012 @p4010 @p83 @p5257 @p5255 @p2159 @p3985 @p3983 @p622 @p5284 @p5282 @p30 @p3988 @p3986 @p84 @p5281 @p5279 @p2188 @p3961 @p3959 @p593 @p5308 @p5306 @p29 @p3964 @p3962 @p85 @p5305 @p5303 @p2217 @p3937 @p3935 @p564 @p5332 @p5330 @p28 @p3940 @p3938 @p86 @p5329 @p5327 @p2246 @p3913 @p3911 @p535 @p5356 @p5354 @p27 @p3916 @p3914 @p87 @p5353 @p5351 @p2275 @p3889 @p3887 @p506 @p5380 @p5378 @p26 @p3892 @p3890 @p88 @p5377 @p5375 @p2304 @p3865 @p3863 @p477 @p5404 @p5402 @p25 @p3868 @p3866 @p89 @p5401 @p5399 @p2333 @p3841 @p3839 @p448 @p5428 @p5426 @p24 @p3844 @p3842 @p90 @p5425 @p5423 @p2362 @p3817 @p3815 @p419 @p5452 @p5450 @p23 @p3820 @p3818 @p91 @p5449 @p5447 @p2391 @p3793 @p3791 @p390 @p5476 @p5474 @p22 @p3796 @p3794 @p92 @p5473 @p5471 @p2420 @p3769 @p3767 @p361 @p5500 @p5498 @p21 @p3772 @p3770 @p93 @p5497 @p5495 @p2449 @p3745 @p3743 @p332 @p5524 @p5522 @p20 @p3748 @p3746 @p94 @p5521 @p5519 @p2478 @p3721 @p3719 @p303 @p5548 @p5546 @p19 @p3724 @p3722 @p95 @p5545 @p5543 @p2507 @p3697 @p3695 @p274 @p5572 @p5570 @p18 @p3700 @p3698 @p96 @p5569 @p5567 @p2536 @p3673 @p3671 @p245 @p5596 @p5594 @p17 @p3676 @p3674 @p97 @p5593 @p5591 @p2565 @p3649 @p3647 @p216 @p5620 @p5618 @p16 @p3652 @p3650 @p98 @p5617 @p5615 @p2594 @p3628 @p3626 @p187 @p5614 @p5612 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5611) :args (@t4677 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4074 @t57 @t4071 @t4072 @t1363 @t4053 @t4057 @t1337 @t4068 @t4089 @t56 @t4056 @t4059 @t58 @t4086 @t4087 @t1389 @t4038 @t4042 @t1311 @t4083 @t4104 @t55 @t4041 @t4044 @t59 @t4101 @t4102 @t1415 @t4023 @t4027 @t1285 @t4098 @t4119 @t54 @t4026 @t4029 @t60 @t4116 @t4117 @t1441 @t4008 @t4012 @t1259 @t4113 @t4134 @t53 @t4011 @t4014 @t61 @t4131 @t4132 @t1467 @t3993 @t3997 @t1233 @t4128 @t4149 @t52 @t3996 @t3999 @t62 @t4146 @t4147 @t1493 @t3978 @t3982 @t1207 @t4143 @t4164 @t51 @t3981 @t3984 @t63 @t4161 @t4162 @t1519 @t3963 @t3967 @t1181 @t4158 @t4179 @t50 @t3966 @t3969 @t64 @t4176 @t4177 @t1545 @t3948 @t3952 @t1155 @t4173 @t4194 @t49 @t3951 @t3954 @t65 @t4191 @t4192 @t1571 @t3933 @t3937 @t1129 @t4188 @t4209 @t48 @t3936 @t3939 @t66 @t4206 @t4207 @t1597 @t3918 @t3922 @t1103 @t4203 @t4224 @t47 @t3921 @t3924 @t67 @t4221 @t4222 @t1623 @t3903 @t3907 @t1077 @t4218 @t4239 @t46 @t3906 @t3909 @t68 @t4236 @t4237 @t1649 @t3888 @t3892 @t1051 @t4233 @t4254 @t45 @t3891 @t3894 @t69 @t4251 @t4252 @t1675 @t3873 @t3877 @t1025 @t4248 @t4269 @t44 @t3876 @t3879 @t70 @t4266 @t4267 @t1701 @t3858 @t3862 @t999 @t4263 @t4284 @t43 @t3861 @t3864 @t71 @t4281 @t4282 @t1727 @t3843 @t3847 @t973 @t4278 @t4299 @t42 @t3846 @t3849 @t72 @t4296 @t4297 @t1753 @t3828 @t3832 @t947 @t4293 @t4314 @t41 @t3831 @t3834 @t73 @t4311 @t4312 @t1779 @t3813 @t3817 @t921 @t4308 @t4329 @t40 @t3816 @t3819 @t74 @t4326 @t4327 @t1805 @t3798 @t3802 @t895 @t4323 @t4344 @t39 @t3801 @t3804 @t75 @t4341 @t4342 @t1831 @t3783 @t3787 @t869 @t4338 @t4359 @t38 @t3786 @t3789 @t76 @t4356 @t4357 @t1857 @t3768 @t3772 @t843 @t4353 @t4374 @t37 @t3771 @t3774 @t77 @t4371 @t4372 @t1883 @t3753 @t3757 @t817 @t4368 @t4389 @t36 @t3756 @t3759 @t78 @t4386 @t4387 @t1909 @t3738 @t3742 @t791 @t4383 @t4404 @t35 @t3741 @t3744 @t79 @t4401 @t4402 @t1935 @t3723 @t3727 @t765 @t4398 @t4419 @t34 @t3726 @t3729 @t80 @t4416 @t4417 @t1961 @t3708 @t3712 @t739 @t4413 @t4434 @t33 @t3711 @t3714 @t81 @t4431 @t4432 @t1987 @t3693 @t3697 @t713 @t4428 @t4449 @t32 @t3696 @t3699 @t82 @t4446 @t4447 @t2013 @t3678 @t3682 @t687 @t4443 @t4464 @t31 @t3681 @t3684 @t83 @t4461 @t4462 @t2039 @t3663 @t3667 @t661 @t4458 @t4479 @t30 @t3666 @t3669 @t84 @t4476 @t4477 @t2065 @t3648 @t3652 @t635 @t4473 @t4494 @t29 @t3651 @t3654 @t85 @t4491 @t4492 @t2091 @t3633 @t3637 @t609 @t4488 @t4509 @t28 @t3636 @t3639 @t86 @t4506 @t4507 @t2117 @t3618 @t3622 @t583 @t4503 @t4524 @t27 @t3621 @t3624 @t87 @t4521 @t4522 @t2143 @t3603 @t3607 @t557 @t4518 @t4539 @t26 @t3606 @t3609 @t88 @t4536 @t4537 @t2169 @t3588 @t3592 @t531 @t4533 @t4554 @t25 @t3591 @t3594 @t89 @t4551 @t4552 @t2195 @t3573 @t3577 @t505 @t4548 @t4569 @t24 @t3576 @t3579 @t90 @t4566 @t4567 @t2221 @t3558 @t3562 @t479 @t4563 @t4584 @t23 @t3561 @t3564 @t91 @t4581 @t4582 @t2247 @t3543 @t3547 @t453 @t4578 @t4599 @t22 @t3546 @t3549 @t92 @t4596 @t4597 @t2273 @t3528 @t3532 @t427 @t4593 @t4614 @t21 @t3531 @t3534 @t93 @t4611 @t4612 @t2299 @t3513 @t3517 @t401 @t4608 @t4629 @t20 @t3516 @t3519 @t94 @t4626 @t4627 @t2325 @t3498 @t3502 @t375 @t4623 @t4644 @t19 @t3501 @t3504 @t95 @t4641 @t4642 @t2351 @t3483 @t3487 @t349 @t4638 @t4659 @t18 @t3486 @t3489 @t96 @t4656 @t4657 @t2377 @t3468 @t3472 @t323 @t4653 @t4674 @t17 @t3471 @t3474 @t97 @t4671 @t4672 @t2403 @t3453 @t3457 @t297 @t4668 @t4689 @t16 @t3456 @t3459 @t98 @t4686 @t4687 @t2429 @t3441 @t3444 @t276 @t4683 @t4684 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6191 @t220) % 40.01/40.21 (step @p5623 :rule instantiate :premises (@p110) :args (@t4690)) % 40.01/40.21 (step-pop @p6192 :rule scope :premises (@p5623)) % 40.01/40.21 (step @p5624 :rule process_scope :premises (@p6192) :args (@t4693)) % 40.01/40.21 (step @p5626 :rule implies_elim :premises (@p5624)) % 40.01/40.21 (step @p5627 :rule cnf_or_pos :args (@t4693)) % 40.01/40.21 (step @p5628 :rule reordering :premises (@p5627) :args ((or @t4692 @t4691 (not @t4693)))) % 40.01/40.21 (step @p5629 :rule instantiate :premises (@p112) :args (@t4694)) % 40.01/40.21 (step @p5630 :rule cnf_or_pos :args (@t4695)) % 40.01/40.21 (step @p5631 :rule reordering :premises (@p5630) :args ((or @t4692 @t244 @t2457 (not @t4695)))) % 40.01/40.21 (step @p5632 :rule instantiate :premises (@p108) :args (@t4690)) % 40.01/40.21 (step @p5633 :rule cnf_or_pos :args (@t4697)) % 40.01/40.21 (step @p5634 :rule reordering :premises (@p5633) :args ((or @t2468 @t265 @t264 @t4696 (not @t4697)))) % 40.01/40.21 (step @p5635 :rule chain_m_resolution :premises (@p5634 @p5632 @p2612 @p2610 @p136 @p134 @p5631 @p5629 @p133 @p131 @p130 @p128 @p127 @p125 @p5628 @p5626 @p110) :args ((or @t4692 @t239) @t267 (@list @t4697 @t2468 @t2470 @t248 @t249 @t2457 @t4695 @t245 @t247 @t242 @t243 @t240 @t241 @t4691 @t4693 @t220))) % 40.01/40.21 (step @p5636 :rule instantiate :premises (@p119) :args (@t4694)) % 40.01/40.21 (step @p5637 :rule cnf_or_pos :args (@t4699)) % 40.01/40.21 (step @p5638 :rule reordering :premises (@p5637) :args ((or @t270 @t4692 @t4698 @t3440 (not @t4699)))) % 40.01/40.21 (step @p5639 :rule instantiate :premises (@p120) :args (@t2454)) % 40.01/40.21 (step @p5640 :rule cnf_or_pos :args (@t4702)) % 40.01/40.21 (step @p5641 :rule reordering :premises (@p5640) :args ((or @t4701 @t4700 @t2455 (not @t4702)))) % 40.01/40.21 (step @p5642 :rule instantiate :premises (@p121) :args (@t2453)) % 40.01/40.21 (step @p5643 :rule cnf_or_pos :args (@t4704)) % 40.01/40.21 (step @p5644 :rule reordering :premises (@p5643) :args ((or @t2463 @t4683 @t4703 (not @t4704)))) % 40.01/40.21 (step @p5645 :rule chain_m_resolution :premises (@p4633 @p4631 @p1405 @p4660 @p4658 @p56 @p4636 @p4634 @p57 @p4657 @p4655 @p1434 @p4609 @p4607 @p1376 @p4684 @p4682 @p55 @p4612 @p4610 @p58 @p4681 @p4679 @p1463 @p4585 @p4583 @p1347 @p4708 @p4706 @p54 @p4588 @p4586 @p59 @p4705 @p4703 @p1492 @p4561 @p4559 @p1318 @p4732 @p4730 @p53 @p4564 @p4562 @p60 @p4729 @p4727 @p1521 @p4537 @p4535 @p1289 @p4756 @p4754 @p52 @p4540 @p4538 @p61 @p4753 @p4751 @p1550 @p4513 @p4511 @p1260 @p4780 @p4778 @p51 @p4516 @p4514 @p62 @p4777 @p4775 @p1579 @p4489 @p4487 @p1231 @p4804 @p4802 @p50 @p4492 @p4490 @p63 @p4801 @p4799 @p1608 @p4465 @p4463 @p1202 @p4828 @p4826 @p49 @p4468 @p4466 @p64 @p4825 @p4823 @p1637 @p4441 @p4439 @p1173 @p4852 @p4850 @p48 @p4444 @p4442 @p65 @p4849 @p4847 @p1666 @p4417 @p4415 @p1144 @p4876 @p4874 @p47 @p4420 @p4418 @p66 @p4873 @p4871 @p1695 @p4393 @p4391 @p1115 @p4900 @p4898 @p46 @p4396 @p4394 @p67 @p4897 @p4895 @p1724 @p4369 @p4367 @p1086 @p4924 @p4922 @p45 @p4372 @p4370 @p68 @p4921 @p4919 @p1753 @p4345 @p4343 @p1057 @p4948 @p4946 @p44 @p4348 @p4346 @p69 @p4945 @p4943 @p1782 @p4321 @p4319 @p1028 @p4972 @p4970 @p43 @p4324 @p4322 @p70 @p4969 @p4967 @p1811 @p4297 @p4295 @p999 @p4996 @p4994 @p42 @p4300 @p4298 @p71 @p4993 @p4991 @p1840 @p4273 @p4271 @p970 @p5020 @p5018 @p41 @p4276 @p4274 @p72 @p5017 @p5015 @p1869 @p4249 @p4247 @p941 @p5044 @p5042 @p40 @p4252 @p4250 @p73 @p5041 @p5039 @p1898 @p4225 @p4223 @p912 @p5068 @p5066 @p39 @p4228 @p4226 @p74 @p5065 @p5063 @p1927 @p4201 @p4199 @p883 @p5092 @p5090 @p38 @p4204 @p4202 @p75 @p5089 @p5087 @p1956 @p4177 @p4175 @p854 @p5116 @p5114 @p37 @p4180 @p4178 @p76 @p5113 @p5111 @p1985 @p4153 @p4151 @p825 @p5140 @p5138 @p36 @p4156 @p4154 @p77 @p5137 @p5135 @p2014 @p4129 @p4127 @p796 @p5164 @p5162 @p35 @p4132 @p4130 @p78 @p5161 @p5159 @p2043 @p4105 @p4103 @p767 @p5188 @p5186 @p34 @p4108 @p4106 @p79 @p5185 @p5183 @p2072 @p4081 @p4079 @p738 @p5212 @p5210 @p33 @p4084 @p4082 @p80 @p5209 @p5207 @p2101 @p4057 @p4055 @p709 @p5236 @p5234 @p32 @p4060 @p4058 @p81 @p5233 @p5231 @p2130 @p4033 @p4031 @p680 @p5260 @p5258 @p31 @p4036 @p4034 @p82 @p5257 @p5255 @p2159 @p4009 @p4007 @p651 @p5284 @p5282 @p30 @p4012 @p4010 @p83 @p5281 @p5279 @p2188 @p3985 @p3983 @p622 @p5308 @p5306 @p29 @p3988 @p3986 @p84 @p5305 @p5303 @p2217 @p3961 @p3959 @p593 @p5332 @p5330 @p28 @p3964 @p3962 @p85 @p5329 @p5327 @p2246 @p3937 @p3935 @p564 @p5356 @p5354 @p27 @p3940 @p3938 @p86 @p5353 @p5351 @p2275 @p3913 @p3911 @p535 @p5380 @p5378 @p26 @p3916 @p3914 @p87 @p5377 @p5375 @p2304 @p3889 @p3887 @p506 @p5404 @p5402 @p25 @p3892 @p3890 @p88 @p5401 @p5399 @p2333 @p3865 @p3863 @p477 @p5428 @p5426 @p24 @p3868 @p3866 @p89 @p5425 @p5423 @p2362 @p3841 @p3839 @p448 @p5452 @p5450 @p23 @p3844 @p3842 @p90 @p5449 @p5447 @p2391 @p3817 @p3815 @p419 @p5476 @p5474 @p22 @p3820 @p3818 @p91 @p5473 @p5471 @p2420 @p3793 @p3791 @p390 @p5500 @p5498 @p21 @p3796 @p3794 @p92 @p5497 @p5495 @p2449 @p3769 @p3767 @p361 @p5524 @p5522 @p20 @p3772 @p3770 @p93 @p5521 @p5519 @p2478 @p3745 @p3743 @p332 @p5548 @p5546 @p19 @p3748 @p3746 @p94 @p5545 @p5543 @p2507 @p3721 @p3719 @p303 @p5572 @p5570 @p18 @p3724 @p3722 @p95 @p5569 @p5567 @p2536 @p3697 @p3695 @p274 @p5596 @p5594 @p17 @p3700 @p3698 @p96 @p5593 @p5591 @p2565 @p3673 @p3671 @p245 @p5620 @p5618 @p16 @p3676 @p3674 @p97 @p5617 @p5615 @p2594 @p3649 @p3647 @p216 @p5644 @p5642 @p15 @p3652 @p3650 @p98 @p5641 @p5639 @p2623 @p3628 @p3626 @p187 @p5638 @p5636 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5635) :args (@t4692 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4072 @t1363 @t4068 @t4089 @t56 @t4071 @t4074 @t57 @t4086 @t4087 @t1389 @t4053 @t4057 @t1337 @t4083 @t4104 @t55 @t4056 @t4059 @t58 @t4101 @t4102 @t1415 @t4038 @t4042 @t1311 @t4098 @t4119 @t54 @t4041 @t4044 @t59 @t4116 @t4117 @t1441 @t4023 @t4027 @t1285 @t4113 @t4134 @t53 @t4026 @t4029 @t60 @t4131 @t4132 @t1467 @t4008 @t4012 @t1259 @t4128 @t4149 @t52 @t4011 @t4014 @t61 @t4146 @t4147 @t1493 @t3993 @t3997 @t1233 @t4143 @t4164 @t51 @t3996 @t3999 @t62 @t4161 @t4162 @t1519 @t3978 @t3982 @t1207 @t4158 @t4179 @t50 @t3981 @t3984 @t63 @t4176 @t4177 @t1545 @t3963 @t3967 @t1181 @t4173 @t4194 @t49 @t3966 @t3969 @t64 @t4191 @t4192 @t1571 @t3948 @t3952 @t1155 @t4188 @t4209 @t48 @t3951 @t3954 @t65 @t4206 @t4207 @t1597 @t3933 @t3937 @t1129 @t4203 @t4224 @t47 @t3936 @t3939 @t66 @t4221 @t4222 @t1623 @t3918 @t3922 @t1103 @t4218 @t4239 @t46 @t3921 @t3924 @t67 @t4236 @t4237 @t1649 @t3903 @t3907 @t1077 @t4233 @t4254 @t45 @t3906 @t3909 @t68 @t4251 @t4252 @t1675 @t3888 @t3892 @t1051 @t4248 @t4269 @t44 @t3891 @t3894 @t69 @t4266 @t4267 @t1701 @t3873 @t3877 @t1025 @t4263 @t4284 @t43 @t3876 @t3879 @t70 @t4281 @t4282 @t1727 @t3858 @t3862 @t999 @t4278 @t4299 @t42 @t3861 @t3864 @t71 @t4296 @t4297 @t1753 @t3843 @t3847 @t973 @t4293 @t4314 @t41 @t3846 @t3849 @t72 @t4311 @t4312 @t1779 @t3828 @t3832 @t947 @t4308 @t4329 @t40 @t3831 @t3834 @t73 @t4326 @t4327 @t1805 @t3813 @t3817 @t921 @t4323 @t4344 @t39 @t3816 @t3819 @t74 @t4341 @t4342 @t1831 @t3798 @t3802 @t895 @t4338 @t4359 @t38 @t3801 @t3804 @t75 @t4356 @t4357 @t1857 @t3783 @t3787 @t869 @t4353 @t4374 @t37 @t3786 @t3789 @t76 @t4371 @t4372 @t1883 @t3768 @t3772 @t843 @t4368 @t4389 @t36 @t3771 @t3774 @t77 @t4386 @t4387 @t1909 @t3753 @t3757 @t817 @t4383 @t4404 @t35 @t3756 @t3759 @t78 @t4401 @t4402 @t1935 @t3738 @t3742 @t791 @t4398 @t4419 @t34 @t3741 @t3744 @t79 @t4416 @t4417 @t1961 @t3723 @t3727 @t765 @t4413 @t4434 @t33 @t3726 @t3729 @t80 @t4431 @t4432 @t1987 @t3708 @t3712 @t739 @t4428 @t4449 @t32 @t3711 @t3714 @t81 @t4446 @t4447 @t2013 @t3693 @t3697 @t713 @t4443 @t4464 @t31 @t3696 @t3699 @t82 @t4461 @t4462 @t2039 @t3678 @t3682 @t687 @t4458 @t4479 @t30 @t3681 @t3684 @t83 @t4476 @t4477 @t2065 @t3663 @t3667 @t661 @t4473 @t4494 @t29 @t3666 @t3669 @t84 @t4491 @t4492 @t2091 @t3648 @t3652 @t635 @t4488 @t4509 @t28 @t3651 @t3654 @t85 @t4506 @t4507 @t2117 @t3633 @t3637 @t609 @t4503 @t4524 @t27 @t3636 @t3639 @t86 @t4521 @t4522 @t2143 @t3618 @t3622 @t583 @t4518 @t4539 @t26 @t3621 @t3624 @t87 @t4536 @t4537 @t2169 @t3603 @t3607 @t557 @t4533 @t4554 @t25 @t3606 @t3609 @t88 @t4551 @t4552 @t2195 @t3588 @t3592 @t531 @t4548 @t4569 @t24 @t3591 @t3594 @t89 @t4566 @t4567 @t2221 @t3573 @t3577 @t505 @t4563 @t4584 @t23 @t3576 @t3579 @t90 @t4581 @t4582 @t2247 @t3558 @t3562 @t479 @t4578 @t4599 @t22 @t3561 @t3564 @t91 @t4596 @t4597 @t2273 @t3543 @t3547 @t453 @t4593 @t4614 @t21 @t3546 @t3549 @t92 @t4611 @t4612 @t2299 @t3528 @t3532 @t427 @t4608 @t4629 @t20 @t3531 @t3534 @t93 @t4626 @t4627 @t2325 @t3513 @t3517 @t401 @t4623 @t4644 @t19 @t3516 @t3519 @t94 @t4641 @t4642 @t2351 @t3498 @t3502 @t375 @t4638 @t4659 @t18 @t3501 @t3504 @t95 @t4656 @t4657 @t2377 @t3483 @t3487 @t349 @t4653 @t4674 @t17 @t3486 @t3489 @t96 @t4671 @t4672 @t2403 @t3468 @t3472 @t323 @t4668 @t4689 @t16 @t3471 @t3474 @t97 @t4686 @t4687 @t2429 @t3453 @t3457 @t297 @t4683 @t4704 @t15 @t3456 @t3459 @t98 @t4701 @t4702 @t2455 @t3441 @t3444 @t276 @t4698 @t4699 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6193 @t220) % 40.01/40.21 (step @p5647 :rule instantiate :premises (@p110) :args (@t4705)) % 40.01/40.21 (step-pop @p6194 :rule scope :premises (@p5647)) % 40.01/40.21 (step @p5648 :rule process_scope :premises (@p6194) :args (@t4708)) % 40.01/40.21 (step @p5650 :rule implies_elim :premises (@p5648)) % 40.01/40.21 (step @p5651 :rule cnf_or_pos :args (@t4708)) % 40.01/40.21 (step @p5652 :rule reordering :premises (@p5651) :args ((or @t4707 @t4706 (not @t4708)))) % 40.01/40.21 (step @p5653 :rule instantiate :premises (@p112) :args (@t4709)) % 40.01/40.21 (step @p5654 :rule cnf_or_pos :args (@t4710)) % 40.01/40.21 (step @p5655 :rule reordering :premises (@p5654) :args ((or @t4707 @t244 @t2483 (not @t4710)))) % 40.01/40.21 (step @p5656 :rule instantiate :premises (@p108) :args (@t4705)) % 40.01/40.21 (step @p5657 :rule cnf_or_pos :args (@t4712)) % 40.01/40.21 (step @p5658 :rule reordering :premises (@p5657) :args ((or @t2494 @t265 @t264 @t4711 (not @t4712)))) % 40.01/40.21 (step @p5659 :rule chain_m_resolution :premises (@p5658 @p5656 @p2641 @p2639 @p136 @p134 @p5655 @p5653 @p133 @p131 @p130 @p128 @p127 @p125 @p5652 @p5650 @p110) :args ((or @t4707 @t239) @t267 (@list @t4712 @t2494 @t2496 @t248 @t249 @t2483 @t4710 @t245 @t247 @t242 @t243 @t240 @t241 @t4706 @t4708 @t220))) % 40.01/40.21 (step @p5660 :rule instantiate :premises (@p119) :args (@t4709)) % 40.01/40.21 (step @p5661 :rule cnf_or_pos :args (@t4714)) % 40.01/40.21 (step @p5662 :rule reordering :premises (@p5661) :args ((or @t270 @t4707 @t4713 @t3440 (not @t4714)))) % 40.01/40.21 (step @p5663 :rule instantiate :premises (@p120) :args (@t2480)) % 40.01/40.21 (step @p5664 :rule cnf_or_pos :args (@t4717)) % 40.01/40.21 (step @p5665 :rule reordering :premises (@p5664) :args ((or @t4716 @t4715 @t2481 (not @t4717)))) % 40.01/40.21 (step @p5666 :rule instantiate :premises (@p121) :args (@t2479)) % 40.01/40.21 (step @p5667 :rule cnf_or_pos :args (@t4719)) % 40.01/40.21 (step @p5668 :rule reordering :premises (@p5667) :args ((or @t2489 @t4698 @t4718 (not @t4719)))) % 40.01/40.21 (step @p5669 :rule chain_m_resolution :premises (@p4660 @p4658 @p56 @p4657 @p4655 @p1434 @p4633 @p4631 @p1405 @p4684 @p4682 @p55 @p4636 @p4634 @p57 @p4681 @p4679 @p1463 @p4609 @p4607 @p1376 @p4708 @p4706 @p54 @p4612 @p4610 @p58 @p4705 @p4703 @p1492 @p4585 @p4583 @p1347 @p4732 @p4730 @p53 @p4588 @p4586 @p59 @p4729 @p4727 @p1521 @p4561 @p4559 @p1318 @p4756 @p4754 @p52 @p4564 @p4562 @p60 @p4753 @p4751 @p1550 @p4537 @p4535 @p1289 @p4780 @p4778 @p51 @p4540 @p4538 @p61 @p4777 @p4775 @p1579 @p4513 @p4511 @p1260 @p4804 @p4802 @p50 @p4516 @p4514 @p62 @p4801 @p4799 @p1608 @p4489 @p4487 @p1231 @p4828 @p4826 @p49 @p4492 @p4490 @p63 @p4825 @p4823 @p1637 @p4465 @p4463 @p1202 @p4852 @p4850 @p48 @p4468 @p4466 @p64 @p4849 @p4847 @p1666 @p4441 @p4439 @p1173 @p4876 @p4874 @p47 @p4444 @p4442 @p65 @p4873 @p4871 @p1695 @p4417 @p4415 @p1144 @p4900 @p4898 @p46 @p4420 @p4418 @p66 @p4897 @p4895 @p1724 @p4393 @p4391 @p1115 @p4924 @p4922 @p45 @p4396 @p4394 @p67 @p4921 @p4919 @p1753 @p4369 @p4367 @p1086 @p4948 @p4946 @p44 @p4372 @p4370 @p68 @p4945 @p4943 @p1782 @p4345 @p4343 @p1057 @p4972 @p4970 @p43 @p4348 @p4346 @p69 @p4969 @p4967 @p1811 @p4321 @p4319 @p1028 @p4996 @p4994 @p42 @p4324 @p4322 @p70 @p4993 @p4991 @p1840 @p4297 @p4295 @p999 @p5020 @p5018 @p41 @p4300 @p4298 @p71 @p5017 @p5015 @p1869 @p4273 @p4271 @p970 @p5044 @p5042 @p40 @p4276 @p4274 @p72 @p5041 @p5039 @p1898 @p4249 @p4247 @p941 @p5068 @p5066 @p39 @p4252 @p4250 @p73 @p5065 @p5063 @p1927 @p4225 @p4223 @p912 @p5092 @p5090 @p38 @p4228 @p4226 @p74 @p5089 @p5087 @p1956 @p4201 @p4199 @p883 @p5116 @p5114 @p37 @p4204 @p4202 @p75 @p5113 @p5111 @p1985 @p4177 @p4175 @p854 @p5140 @p5138 @p36 @p4180 @p4178 @p76 @p5137 @p5135 @p2014 @p4153 @p4151 @p825 @p5164 @p5162 @p35 @p4156 @p4154 @p77 @p5161 @p5159 @p2043 @p4129 @p4127 @p796 @p5188 @p5186 @p34 @p4132 @p4130 @p78 @p5185 @p5183 @p2072 @p4105 @p4103 @p767 @p5212 @p5210 @p33 @p4108 @p4106 @p79 @p5209 @p5207 @p2101 @p4081 @p4079 @p738 @p5236 @p5234 @p32 @p4084 @p4082 @p80 @p5233 @p5231 @p2130 @p4057 @p4055 @p709 @p5260 @p5258 @p31 @p4060 @p4058 @p81 @p5257 @p5255 @p2159 @p4033 @p4031 @p680 @p5284 @p5282 @p30 @p4036 @p4034 @p82 @p5281 @p5279 @p2188 @p4009 @p4007 @p651 @p5308 @p5306 @p29 @p4012 @p4010 @p83 @p5305 @p5303 @p2217 @p3985 @p3983 @p622 @p5332 @p5330 @p28 @p3988 @p3986 @p84 @p5329 @p5327 @p2246 @p3961 @p3959 @p593 @p5356 @p5354 @p27 @p3964 @p3962 @p85 @p5353 @p5351 @p2275 @p3937 @p3935 @p564 @p5380 @p5378 @p26 @p3940 @p3938 @p86 @p5377 @p5375 @p2304 @p3913 @p3911 @p535 @p5404 @p5402 @p25 @p3916 @p3914 @p87 @p5401 @p5399 @p2333 @p3889 @p3887 @p506 @p5428 @p5426 @p24 @p3892 @p3890 @p88 @p5425 @p5423 @p2362 @p3865 @p3863 @p477 @p5452 @p5450 @p23 @p3868 @p3866 @p89 @p5449 @p5447 @p2391 @p3841 @p3839 @p448 @p5476 @p5474 @p22 @p3844 @p3842 @p90 @p5473 @p5471 @p2420 @p3817 @p3815 @p419 @p5500 @p5498 @p21 @p3820 @p3818 @p91 @p5497 @p5495 @p2449 @p3793 @p3791 @p390 @p5524 @p5522 @p20 @p3796 @p3794 @p92 @p5521 @p5519 @p2478 @p3769 @p3767 @p361 @p5548 @p5546 @p19 @p3772 @p3770 @p93 @p5545 @p5543 @p2507 @p3745 @p3743 @p332 @p5572 @p5570 @p18 @p3748 @p3746 @p94 @p5569 @p5567 @p2536 @p3721 @p3719 @p303 @p5596 @p5594 @p17 @p3724 @p3722 @p95 @p5593 @p5591 @p2565 @p3697 @p3695 @p274 @p5620 @p5618 @p16 @p3700 @p3698 @p96 @p5617 @p5615 @p2594 @p3673 @p3671 @p245 @p5644 @p5642 @p15 @p3676 @p3674 @p97 @p5641 @p5639 @p2623 @p3649 @p3647 @p216 @p5668 @p5666 @p14 @p3652 @p3650 @p98 @p5665 @p5663 @p2652 @p3628 @p3626 @p187 @p5662 @p5660 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5659) :args (@t4707 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4089 @t56 @t4086 @t4087 @t1389 @t4068 @t4072 @t1363 @t4083 @t4104 @t55 @t4071 @t4074 @t57 @t4101 @t4102 @t1415 @t4053 @t4057 @t1337 @t4098 @t4119 @t54 @t4056 @t4059 @t58 @t4116 @t4117 @t1441 @t4038 @t4042 @t1311 @t4113 @t4134 @t53 @t4041 @t4044 @t59 @t4131 @t4132 @t1467 @t4023 @t4027 @t1285 @t4128 @t4149 @t52 @t4026 @t4029 @t60 @t4146 @t4147 @t1493 @t4008 @t4012 @t1259 @t4143 @t4164 @t51 @t4011 @t4014 @t61 @t4161 @t4162 @t1519 @t3993 @t3997 @t1233 @t4158 @t4179 @t50 @t3996 @t3999 @t62 @t4176 @t4177 @t1545 @t3978 @t3982 @t1207 @t4173 @t4194 @t49 @t3981 @t3984 @t63 @t4191 @t4192 @t1571 @t3963 @t3967 @t1181 @t4188 @t4209 @t48 @t3966 @t3969 @t64 @t4206 @t4207 @t1597 @t3948 @t3952 @t1155 @t4203 @t4224 @t47 @t3951 @t3954 @t65 @t4221 @t4222 @t1623 @t3933 @t3937 @t1129 @t4218 @t4239 @t46 @t3936 @t3939 @t66 @t4236 @t4237 @t1649 @t3918 @t3922 @t1103 @t4233 @t4254 @t45 @t3921 @t3924 @t67 @t4251 @t4252 @t1675 @t3903 @t3907 @t1077 @t4248 @t4269 @t44 @t3906 @t3909 @t68 @t4266 @t4267 @t1701 @t3888 @t3892 @t1051 @t4263 @t4284 @t43 @t3891 @t3894 @t69 @t4281 @t4282 @t1727 @t3873 @t3877 @t1025 @t4278 @t4299 @t42 @t3876 @t3879 @t70 @t4296 @t4297 @t1753 @t3858 @t3862 @t999 @t4293 @t4314 @t41 @t3861 @t3864 @t71 @t4311 @t4312 @t1779 @t3843 @t3847 @t973 @t4308 @t4329 @t40 @t3846 @t3849 @t72 @t4326 @t4327 @t1805 @t3828 @t3832 @t947 @t4323 @t4344 @t39 @t3831 @t3834 @t73 @t4341 @t4342 @t1831 @t3813 @t3817 @t921 @t4338 @t4359 @t38 @t3816 @t3819 @t74 @t4356 @t4357 @t1857 @t3798 @t3802 @t895 @t4353 @t4374 @t37 @t3801 @t3804 @t75 @t4371 @t4372 @t1883 @t3783 @t3787 @t869 @t4368 @t4389 @t36 @t3786 @t3789 @t76 @t4386 @t4387 @t1909 @t3768 @t3772 @t843 @t4383 @t4404 @t35 @t3771 @t3774 @t77 @t4401 @t4402 @t1935 @t3753 @t3757 @t817 @t4398 @t4419 @t34 @t3756 @t3759 @t78 @t4416 @t4417 @t1961 @t3738 @t3742 @t791 @t4413 @t4434 @t33 @t3741 @t3744 @t79 @t4431 @t4432 @t1987 @t3723 @t3727 @t765 @t4428 @t4449 @t32 @t3726 @t3729 @t80 @t4446 @t4447 @t2013 @t3708 @t3712 @t739 @t4443 @t4464 @t31 @t3711 @t3714 @t81 @t4461 @t4462 @t2039 @t3693 @t3697 @t713 @t4458 @t4479 @t30 @t3696 @t3699 @t82 @t4476 @t4477 @t2065 @t3678 @t3682 @t687 @t4473 @t4494 @t29 @t3681 @t3684 @t83 @t4491 @t4492 @t2091 @t3663 @t3667 @t661 @t4488 @t4509 @t28 @t3666 @t3669 @t84 @t4506 @t4507 @t2117 @t3648 @t3652 @t635 @t4503 @t4524 @t27 @t3651 @t3654 @t85 @t4521 @t4522 @t2143 @t3633 @t3637 @t609 @t4518 @t4539 @t26 @t3636 @t3639 @t86 @t4536 @t4537 @t2169 @t3618 @t3622 @t583 @t4533 @t4554 @t25 @t3621 @t3624 @t87 @t4551 @t4552 @t2195 @t3603 @t3607 @t557 @t4548 @t4569 @t24 @t3606 @t3609 @t88 @t4566 @t4567 @t2221 @t3588 @t3592 @t531 @t4563 @t4584 @t23 @t3591 @t3594 @t89 @t4581 @t4582 @t2247 @t3573 @t3577 @t505 @t4578 @t4599 @t22 @t3576 @t3579 @t90 @t4596 @t4597 @t2273 @t3558 @t3562 @t479 @t4593 @t4614 @t21 @t3561 @t3564 @t91 @t4611 @t4612 @t2299 @t3543 @t3547 @t453 @t4608 @t4629 @t20 @t3546 @t3549 @t92 @t4626 @t4627 @t2325 @t3528 @t3532 @t427 @t4623 @t4644 @t19 @t3531 @t3534 @t93 @t4641 @t4642 @t2351 @t3513 @t3517 @t401 @t4638 @t4659 @t18 @t3516 @t3519 @t94 @t4656 @t4657 @t2377 @t3498 @t3502 @t375 @t4653 @t4674 @t17 @t3501 @t3504 @t95 @t4671 @t4672 @t2403 @t3483 @t3487 @t349 @t4668 @t4689 @t16 @t3486 @t3489 @t96 @t4686 @t4687 @t2429 @t3468 @t3472 @t323 @t4683 @t4704 @t15 @t3471 @t3474 @t97 @t4701 @t4702 @t2455 @t3453 @t3457 @t297 @t4698 @t4719 @t14 @t3456 @t3459 @t98 @t4716 @t4717 @t2481 @t3441 @t3444 @t276 @t4713 @t4714 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6195 @t220) % 40.01/40.21 (step @p5671 :rule instantiate :premises (@p110) :args (@t4720)) % 40.01/40.21 (step-pop @p6196 :rule scope :premises (@p5671)) % 40.01/40.21 (step @p5672 :rule process_scope :premises (@p6196) :args (@t4723)) % 40.01/40.21 (step @p5674 :rule implies_elim :premises (@p5672)) % 40.01/40.21 (step @p5675 :rule cnf_or_pos :args (@t4723)) % 40.01/40.21 (step @p5676 :rule reordering :premises (@p5675) :args ((or @t4722 @t4721 (not @t4723)))) % 40.01/40.21 (step @p5677 :rule instantiate :premises (@p112) :args (@t4724)) % 40.01/40.21 (step @p5678 :rule cnf_or_pos :args (@t4725)) % 40.01/40.21 (step @p5679 :rule reordering :premises (@p5678) :args ((or @t4722 @t244 @t2509 (not @t4725)))) % 40.01/40.21 (step @p5680 :rule instantiate :premises (@p108) :args (@t4720)) % 40.01/40.21 (step @p5681 :rule cnf_or_pos :args (@t4727)) % 40.01/40.21 (step @p5682 :rule reordering :premises (@p5681) :args ((or @t2520 @t265 @t264 @t4726 (not @t4727)))) % 40.01/40.21 (step @p5683 :rule chain_m_resolution :premises (@p5682 @p5680 @p2670 @p2668 @p136 @p134 @p5679 @p5677 @p133 @p131 @p130 @p128 @p127 @p125 @p5676 @p5674 @p110) :args ((or @t4722 @t239) @t267 (@list @t4727 @t2520 @t2522 @t248 @t249 @t2509 @t4725 @t245 @t247 @t242 @t243 @t240 @t241 @t4721 @t4723 @t220))) % 40.01/40.21 (step @p5684 :rule instantiate :premises (@p119) :args (@t4724)) % 40.01/40.21 (step @p5685 :rule cnf_or_pos :args (@t4729)) % 40.01/40.21 (step @p5686 :rule reordering :premises (@p5685) :args ((or @t270 @t4722 @t4728 @t3440 (not @t4729)))) % 40.01/40.21 (step @p5687 :rule instantiate :premises (@p120) :args (@t2506)) % 40.01/40.21 (step @p5688 :rule cnf_or_pos :args (@t4732)) % 40.01/40.21 (step @p5689 :rule reordering :premises (@p5688) :args ((or @t4731 @t4730 @t2507 (not @t4732)))) % 40.01/40.21 (step @p5690 :rule instantiate :premises (@p121) :args (@t2505)) % 40.01/40.21 (step @p5691 :rule cnf_or_pos :args (@t4734)) % 40.01/40.21 (step @p5692 :rule reordering :premises (@p5691) :args ((or @t2515 @t4713 @t4733 (not @t4734)))) % 40.01/40.21 (step @p5693 :rule chain_m_resolution :premises (@p4657 @p4655 @p1434 @p4684 @p4682 @p55 @p4660 @p4658 @p56 @p4681 @p4679 @p1463 @p4633 @p4631 @p1405 @p4708 @p4706 @p54 @p4636 @p4634 @p57 @p4705 @p4703 @p1492 @p4609 @p4607 @p1376 @p4732 @p4730 @p53 @p4612 @p4610 @p58 @p4729 @p4727 @p1521 @p4585 @p4583 @p1347 @p4756 @p4754 @p52 @p4588 @p4586 @p59 @p4753 @p4751 @p1550 @p4561 @p4559 @p1318 @p4780 @p4778 @p51 @p4564 @p4562 @p60 @p4777 @p4775 @p1579 @p4537 @p4535 @p1289 @p4804 @p4802 @p50 @p4540 @p4538 @p61 @p4801 @p4799 @p1608 @p4513 @p4511 @p1260 @p4828 @p4826 @p49 @p4516 @p4514 @p62 @p4825 @p4823 @p1637 @p4489 @p4487 @p1231 @p4852 @p4850 @p48 @p4492 @p4490 @p63 @p4849 @p4847 @p1666 @p4465 @p4463 @p1202 @p4876 @p4874 @p47 @p4468 @p4466 @p64 @p4873 @p4871 @p1695 @p4441 @p4439 @p1173 @p4900 @p4898 @p46 @p4444 @p4442 @p65 @p4897 @p4895 @p1724 @p4417 @p4415 @p1144 @p4924 @p4922 @p45 @p4420 @p4418 @p66 @p4921 @p4919 @p1753 @p4393 @p4391 @p1115 @p4948 @p4946 @p44 @p4396 @p4394 @p67 @p4945 @p4943 @p1782 @p4369 @p4367 @p1086 @p4972 @p4970 @p43 @p4372 @p4370 @p68 @p4969 @p4967 @p1811 @p4345 @p4343 @p1057 @p4996 @p4994 @p42 @p4348 @p4346 @p69 @p4993 @p4991 @p1840 @p4321 @p4319 @p1028 @p5020 @p5018 @p41 @p4324 @p4322 @p70 @p5017 @p5015 @p1869 @p4297 @p4295 @p999 @p5044 @p5042 @p40 @p4300 @p4298 @p71 @p5041 @p5039 @p1898 @p4273 @p4271 @p970 @p5068 @p5066 @p39 @p4276 @p4274 @p72 @p5065 @p5063 @p1927 @p4249 @p4247 @p941 @p5092 @p5090 @p38 @p4252 @p4250 @p73 @p5089 @p5087 @p1956 @p4225 @p4223 @p912 @p5116 @p5114 @p37 @p4228 @p4226 @p74 @p5113 @p5111 @p1985 @p4201 @p4199 @p883 @p5140 @p5138 @p36 @p4204 @p4202 @p75 @p5137 @p5135 @p2014 @p4177 @p4175 @p854 @p5164 @p5162 @p35 @p4180 @p4178 @p76 @p5161 @p5159 @p2043 @p4153 @p4151 @p825 @p5188 @p5186 @p34 @p4156 @p4154 @p77 @p5185 @p5183 @p2072 @p4129 @p4127 @p796 @p5212 @p5210 @p33 @p4132 @p4130 @p78 @p5209 @p5207 @p2101 @p4105 @p4103 @p767 @p5236 @p5234 @p32 @p4108 @p4106 @p79 @p5233 @p5231 @p2130 @p4081 @p4079 @p738 @p5260 @p5258 @p31 @p4084 @p4082 @p80 @p5257 @p5255 @p2159 @p4057 @p4055 @p709 @p5284 @p5282 @p30 @p4060 @p4058 @p81 @p5281 @p5279 @p2188 @p4033 @p4031 @p680 @p5308 @p5306 @p29 @p4036 @p4034 @p82 @p5305 @p5303 @p2217 @p4009 @p4007 @p651 @p5332 @p5330 @p28 @p4012 @p4010 @p83 @p5329 @p5327 @p2246 @p3985 @p3983 @p622 @p5356 @p5354 @p27 @p3988 @p3986 @p84 @p5353 @p5351 @p2275 @p3961 @p3959 @p593 @p5380 @p5378 @p26 @p3964 @p3962 @p85 @p5377 @p5375 @p2304 @p3937 @p3935 @p564 @p5404 @p5402 @p25 @p3940 @p3938 @p86 @p5401 @p5399 @p2333 @p3913 @p3911 @p535 @p5428 @p5426 @p24 @p3916 @p3914 @p87 @p5425 @p5423 @p2362 @p3889 @p3887 @p506 @p5452 @p5450 @p23 @p3892 @p3890 @p88 @p5449 @p5447 @p2391 @p3865 @p3863 @p477 @p5476 @p5474 @p22 @p3868 @p3866 @p89 @p5473 @p5471 @p2420 @p3841 @p3839 @p448 @p5500 @p5498 @p21 @p3844 @p3842 @p90 @p5497 @p5495 @p2449 @p3817 @p3815 @p419 @p5524 @p5522 @p20 @p3820 @p3818 @p91 @p5521 @p5519 @p2478 @p3793 @p3791 @p390 @p5548 @p5546 @p19 @p3796 @p3794 @p92 @p5545 @p5543 @p2507 @p3769 @p3767 @p361 @p5572 @p5570 @p18 @p3772 @p3770 @p93 @p5569 @p5567 @p2536 @p3745 @p3743 @p332 @p5596 @p5594 @p17 @p3748 @p3746 @p94 @p5593 @p5591 @p2565 @p3721 @p3719 @p303 @p5620 @p5618 @p16 @p3724 @p3722 @p95 @p5617 @p5615 @p2594 @p3697 @p3695 @p274 @p5644 @p5642 @p15 @p3700 @p3698 @p96 @p5641 @p5639 @p2623 @p3673 @p3671 @p245 @p5668 @p5666 @p14 @p3676 @p3674 @p97 @p5665 @p5663 @p2652 @p3649 @p3647 @p216 @p5692 @p5690 @p13 @p3652 @p3650 @p98 @p5689 @p5687 @p2681 @p3628 @p3626 @p187 @p5686 @p5684 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5683) :args (@t4722 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4087 @t1389 @t4083 @t4104 @t55 @t4086 @t4089 @t56 @t4101 @t4102 @t1415 @t4068 @t4072 @t1363 @t4098 @t4119 @t54 @t4071 @t4074 @t57 @t4116 @t4117 @t1441 @t4053 @t4057 @t1337 @t4113 @t4134 @t53 @t4056 @t4059 @t58 @t4131 @t4132 @t1467 @t4038 @t4042 @t1311 @t4128 @t4149 @t52 @t4041 @t4044 @t59 @t4146 @t4147 @t1493 @t4023 @t4027 @t1285 @t4143 @t4164 @t51 @t4026 @t4029 @t60 @t4161 @t4162 @t1519 @t4008 @t4012 @t1259 @t4158 @t4179 @t50 @t4011 @t4014 @t61 @t4176 @t4177 @t1545 @t3993 @t3997 @t1233 @t4173 @t4194 @t49 @t3996 @t3999 @t62 @t4191 @t4192 @t1571 @t3978 @t3982 @t1207 @t4188 @t4209 @t48 @t3981 @t3984 @t63 @t4206 @t4207 @t1597 @t3963 @t3967 @t1181 @t4203 @t4224 @t47 @t3966 @t3969 @t64 @t4221 @t4222 @t1623 @t3948 @t3952 @t1155 @t4218 @t4239 @t46 @t3951 @t3954 @t65 @t4236 @t4237 @t1649 @t3933 @t3937 @t1129 @t4233 @t4254 @t45 @t3936 @t3939 @t66 @t4251 @t4252 @t1675 @t3918 @t3922 @t1103 @t4248 @t4269 @t44 @t3921 @t3924 @t67 @t4266 @t4267 @t1701 @t3903 @t3907 @t1077 @t4263 @t4284 @t43 @t3906 @t3909 @t68 @t4281 @t4282 @t1727 @t3888 @t3892 @t1051 @t4278 @t4299 @t42 @t3891 @t3894 @t69 @t4296 @t4297 @t1753 @t3873 @t3877 @t1025 @t4293 @t4314 @t41 @t3876 @t3879 @t70 @t4311 @t4312 @t1779 @t3858 @t3862 @t999 @t4308 @t4329 @t40 @t3861 @t3864 @t71 @t4326 @t4327 @t1805 @t3843 @t3847 @t973 @t4323 @t4344 @t39 @t3846 @t3849 @t72 @t4341 @t4342 @t1831 @t3828 @t3832 @t947 @t4338 @t4359 @t38 @t3831 @t3834 @t73 @t4356 @t4357 @t1857 @t3813 @t3817 @t921 @t4353 @t4374 @t37 @t3816 @t3819 @t74 @t4371 @t4372 @t1883 @t3798 @t3802 @t895 @t4368 @t4389 @t36 @t3801 @t3804 @t75 @t4386 @t4387 @t1909 @t3783 @t3787 @t869 @t4383 @t4404 @t35 @t3786 @t3789 @t76 @t4401 @t4402 @t1935 @t3768 @t3772 @t843 @t4398 @t4419 @t34 @t3771 @t3774 @t77 @t4416 @t4417 @t1961 @t3753 @t3757 @t817 @t4413 @t4434 @t33 @t3756 @t3759 @t78 @t4431 @t4432 @t1987 @t3738 @t3742 @t791 @t4428 @t4449 @t32 @t3741 @t3744 @t79 @t4446 @t4447 @t2013 @t3723 @t3727 @t765 @t4443 @t4464 @t31 @t3726 @t3729 @t80 @t4461 @t4462 @t2039 @t3708 @t3712 @t739 @t4458 @t4479 @t30 @t3711 @t3714 @t81 @t4476 @t4477 @t2065 @t3693 @t3697 @t713 @t4473 @t4494 @t29 @t3696 @t3699 @t82 @t4491 @t4492 @t2091 @t3678 @t3682 @t687 @t4488 @t4509 @t28 @t3681 @t3684 @t83 @t4506 @t4507 @t2117 @t3663 @t3667 @t661 @t4503 @t4524 @t27 @t3666 @t3669 @t84 @t4521 @t4522 @t2143 @t3648 @t3652 @t635 @t4518 @t4539 @t26 @t3651 @t3654 @t85 @t4536 @t4537 @t2169 @t3633 @t3637 @t609 @t4533 @t4554 @t25 @t3636 @t3639 @t86 @t4551 @t4552 @t2195 @t3618 @t3622 @t583 @t4548 @t4569 @t24 @t3621 @t3624 @t87 @t4566 @t4567 @t2221 @t3603 @t3607 @t557 @t4563 @t4584 @t23 @t3606 @t3609 @t88 @t4581 @t4582 @t2247 @t3588 @t3592 @t531 @t4578 @t4599 @t22 @t3591 @t3594 @t89 @t4596 @t4597 @t2273 @t3573 @t3577 @t505 @t4593 @t4614 @t21 @t3576 @t3579 @t90 @t4611 @t4612 @t2299 @t3558 @t3562 @t479 @t4608 @t4629 @t20 @t3561 @t3564 @t91 @t4626 @t4627 @t2325 @t3543 @t3547 @t453 @t4623 @t4644 @t19 @t3546 @t3549 @t92 @t4641 @t4642 @t2351 @t3528 @t3532 @t427 @t4638 @t4659 @t18 @t3531 @t3534 @t93 @t4656 @t4657 @t2377 @t3513 @t3517 @t401 @t4653 @t4674 @t17 @t3516 @t3519 @t94 @t4671 @t4672 @t2403 @t3498 @t3502 @t375 @t4668 @t4689 @t16 @t3501 @t3504 @t95 @t4686 @t4687 @t2429 @t3483 @t3487 @t349 @t4683 @t4704 @t15 @t3486 @t3489 @t96 @t4701 @t4702 @t2455 @t3468 @t3472 @t323 @t4698 @t4719 @t14 @t3471 @t3474 @t97 @t4716 @t4717 @t2481 @t3453 @t3457 @t297 @t4713 @t4734 @t13 @t3456 @t3459 @t98 @t4731 @t4732 @t2507 @t3441 @t3444 @t276 @t4728 @t4729 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6197 @t220) % 40.01/40.21 (step @p5695 :rule instantiate :premises (@p110) :args (@t4735)) % 40.01/40.21 (step-pop @p6198 :rule scope :premises (@p5695)) % 40.01/40.21 (step @p5696 :rule process_scope :premises (@p6198) :args (@t4738)) % 40.01/40.21 (step @p5698 :rule implies_elim :premises (@p5696)) % 40.01/40.21 (step @p5699 :rule cnf_or_pos :args (@t4738)) % 40.01/40.21 (step @p5700 :rule reordering :premises (@p5699) :args ((or @t4737 @t4736 (not @t4738)))) % 40.01/40.21 (step @p5701 :rule instantiate :premises (@p112) :args (@t4739)) % 40.01/40.21 (step @p5702 :rule cnf_or_pos :args (@t4740)) % 40.01/40.21 (step @p5703 :rule reordering :premises (@p5702) :args ((or @t4737 @t244 @t2535 (not @t4740)))) % 40.01/40.21 (step @p5704 :rule instantiate :premises (@p108) :args (@t4735)) % 40.01/40.21 (step @p5705 :rule cnf_or_pos :args (@t4742)) % 40.01/40.21 (step @p5706 :rule reordering :premises (@p5705) :args ((or @t2546 @t265 @t264 @t4741 (not @t4742)))) % 40.01/40.21 (step @p5707 :rule chain_m_resolution :premises (@p5706 @p5704 @p2699 @p2697 @p136 @p134 @p5703 @p5701 @p133 @p131 @p130 @p128 @p127 @p125 @p5700 @p5698 @p110) :args ((or @t4737 @t239) @t267 (@list @t4742 @t2546 @t2548 @t248 @t249 @t2535 @t4740 @t245 @t247 @t242 @t243 @t240 @t241 @t4736 @t4738 @t220))) % 40.01/40.21 (step @p5708 :rule instantiate :premises (@p119) :args (@t4739)) % 40.01/40.21 (step @p5709 :rule cnf_or_pos :args (@t4744)) % 40.01/40.21 (step @p5710 :rule reordering :premises (@p5709) :args ((or @t270 @t4737 @t4743 @t3440 (not @t4744)))) % 40.01/40.21 (step @p5711 :rule instantiate :premises (@p120) :args (@t2532)) % 40.01/40.21 (step @p5712 :rule cnf_or_pos :args (@t4747)) % 40.01/40.21 (step @p5713 :rule reordering :premises (@p5712) :args ((or @t4746 @t4745 @t2533 (not @t4747)))) % 40.01/40.21 (step @p5714 :rule instantiate :premises (@p121) :args (@t2531)) % 40.01/40.21 (step @p5715 :rule cnf_or_pos :args (@t4749)) % 40.01/40.21 (step @p5716 :rule reordering :premises (@p5715) :args ((or @t2541 @t4728 @t4748 (not @t4749)))) % 40.01/40.21 (step @p5717 :rule chain_m_resolution :premises (@p4684 @p4682 @p55 @p4681 @p4679 @p1463 @p4657 @p4655 @p1434 @p4708 @p4706 @p54 @p4660 @p4658 @p56 @p4705 @p4703 @p1492 @p4633 @p4631 @p1405 @p4732 @p4730 @p53 @p4636 @p4634 @p57 @p4729 @p4727 @p1521 @p4609 @p4607 @p1376 @p4756 @p4754 @p52 @p4612 @p4610 @p58 @p4753 @p4751 @p1550 @p4585 @p4583 @p1347 @p4780 @p4778 @p51 @p4588 @p4586 @p59 @p4777 @p4775 @p1579 @p4561 @p4559 @p1318 @p4804 @p4802 @p50 @p4564 @p4562 @p60 @p4801 @p4799 @p1608 @p4537 @p4535 @p1289 @p4828 @p4826 @p49 @p4540 @p4538 @p61 @p4825 @p4823 @p1637 @p4513 @p4511 @p1260 @p4852 @p4850 @p48 @p4516 @p4514 @p62 @p4849 @p4847 @p1666 @p4489 @p4487 @p1231 @p4876 @p4874 @p47 @p4492 @p4490 @p63 @p4873 @p4871 @p1695 @p4465 @p4463 @p1202 @p4900 @p4898 @p46 @p4468 @p4466 @p64 @p4897 @p4895 @p1724 @p4441 @p4439 @p1173 @p4924 @p4922 @p45 @p4444 @p4442 @p65 @p4921 @p4919 @p1753 @p4417 @p4415 @p1144 @p4948 @p4946 @p44 @p4420 @p4418 @p66 @p4945 @p4943 @p1782 @p4393 @p4391 @p1115 @p4972 @p4970 @p43 @p4396 @p4394 @p67 @p4969 @p4967 @p1811 @p4369 @p4367 @p1086 @p4996 @p4994 @p42 @p4372 @p4370 @p68 @p4993 @p4991 @p1840 @p4345 @p4343 @p1057 @p5020 @p5018 @p41 @p4348 @p4346 @p69 @p5017 @p5015 @p1869 @p4321 @p4319 @p1028 @p5044 @p5042 @p40 @p4324 @p4322 @p70 @p5041 @p5039 @p1898 @p4297 @p4295 @p999 @p5068 @p5066 @p39 @p4300 @p4298 @p71 @p5065 @p5063 @p1927 @p4273 @p4271 @p970 @p5092 @p5090 @p38 @p4276 @p4274 @p72 @p5089 @p5087 @p1956 @p4249 @p4247 @p941 @p5116 @p5114 @p37 @p4252 @p4250 @p73 @p5113 @p5111 @p1985 @p4225 @p4223 @p912 @p5140 @p5138 @p36 @p4228 @p4226 @p74 @p5137 @p5135 @p2014 @p4201 @p4199 @p883 @p5164 @p5162 @p35 @p4204 @p4202 @p75 @p5161 @p5159 @p2043 @p4177 @p4175 @p854 @p5188 @p5186 @p34 @p4180 @p4178 @p76 @p5185 @p5183 @p2072 @p4153 @p4151 @p825 @p5212 @p5210 @p33 @p4156 @p4154 @p77 @p5209 @p5207 @p2101 @p4129 @p4127 @p796 @p5236 @p5234 @p32 @p4132 @p4130 @p78 @p5233 @p5231 @p2130 @p4105 @p4103 @p767 @p5260 @p5258 @p31 @p4108 @p4106 @p79 @p5257 @p5255 @p2159 @p4081 @p4079 @p738 @p5284 @p5282 @p30 @p4084 @p4082 @p80 @p5281 @p5279 @p2188 @p4057 @p4055 @p709 @p5308 @p5306 @p29 @p4060 @p4058 @p81 @p5305 @p5303 @p2217 @p4033 @p4031 @p680 @p5332 @p5330 @p28 @p4036 @p4034 @p82 @p5329 @p5327 @p2246 @p4009 @p4007 @p651 @p5356 @p5354 @p27 @p4012 @p4010 @p83 @p5353 @p5351 @p2275 @p3985 @p3983 @p622 @p5380 @p5378 @p26 @p3988 @p3986 @p84 @p5377 @p5375 @p2304 @p3961 @p3959 @p593 @p5404 @p5402 @p25 @p3964 @p3962 @p85 @p5401 @p5399 @p2333 @p3937 @p3935 @p564 @p5428 @p5426 @p24 @p3940 @p3938 @p86 @p5425 @p5423 @p2362 @p3913 @p3911 @p535 @p5452 @p5450 @p23 @p3916 @p3914 @p87 @p5449 @p5447 @p2391 @p3889 @p3887 @p506 @p5476 @p5474 @p22 @p3892 @p3890 @p88 @p5473 @p5471 @p2420 @p3865 @p3863 @p477 @p5500 @p5498 @p21 @p3868 @p3866 @p89 @p5497 @p5495 @p2449 @p3841 @p3839 @p448 @p5524 @p5522 @p20 @p3844 @p3842 @p90 @p5521 @p5519 @p2478 @p3817 @p3815 @p419 @p5548 @p5546 @p19 @p3820 @p3818 @p91 @p5545 @p5543 @p2507 @p3793 @p3791 @p390 @p5572 @p5570 @p18 @p3796 @p3794 @p92 @p5569 @p5567 @p2536 @p3769 @p3767 @p361 @p5596 @p5594 @p17 @p3772 @p3770 @p93 @p5593 @p5591 @p2565 @p3745 @p3743 @p332 @p5620 @p5618 @p16 @p3748 @p3746 @p94 @p5617 @p5615 @p2594 @p3721 @p3719 @p303 @p5644 @p5642 @p15 @p3724 @p3722 @p95 @p5641 @p5639 @p2623 @p3697 @p3695 @p274 @p5668 @p5666 @p14 @p3700 @p3698 @p96 @p5665 @p5663 @p2652 @p3673 @p3671 @p245 @p5692 @p5690 @p13 @p3676 @p3674 @p97 @p5689 @p5687 @p2681 @p3649 @p3647 @p216 @p5716 @p5714 @p12 @p3652 @p3650 @p98 @p5713 @p5711 @p2710 @p3628 @p3626 @p187 @p5710 @p5708 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5707) :args (@t4737 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4104 @t55 @t4101 @t4102 @t1415 @t4083 @t4087 @t1389 @t4098 @t4119 @t54 @t4086 @t4089 @t56 @t4116 @t4117 @t1441 @t4068 @t4072 @t1363 @t4113 @t4134 @t53 @t4071 @t4074 @t57 @t4131 @t4132 @t1467 @t4053 @t4057 @t1337 @t4128 @t4149 @t52 @t4056 @t4059 @t58 @t4146 @t4147 @t1493 @t4038 @t4042 @t1311 @t4143 @t4164 @t51 @t4041 @t4044 @t59 @t4161 @t4162 @t1519 @t4023 @t4027 @t1285 @t4158 @t4179 @t50 @t4026 @t4029 @t60 @t4176 @t4177 @t1545 @t4008 @t4012 @t1259 @t4173 @t4194 @t49 @t4011 @t4014 @t61 @t4191 @t4192 @t1571 @t3993 @t3997 @t1233 @t4188 @t4209 @t48 @t3996 @t3999 @t62 @t4206 @t4207 @t1597 @t3978 @t3982 @t1207 @t4203 @t4224 @t47 @t3981 @t3984 @t63 @t4221 @t4222 @t1623 @t3963 @t3967 @t1181 @t4218 @t4239 @t46 @t3966 @t3969 @t64 @t4236 @t4237 @t1649 @t3948 @t3952 @t1155 @t4233 @t4254 @t45 @t3951 @t3954 @t65 @t4251 @t4252 @t1675 @t3933 @t3937 @t1129 @t4248 @t4269 @t44 @t3936 @t3939 @t66 @t4266 @t4267 @t1701 @t3918 @t3922 @t1103 @t4263 @t4284 @t43 @t3921 @t3924 @t67 @t4281 @t4282 @t1727 @t3903 @t3907 @t1077 @t4278 @t4299 @t42 @t3906 @t3909 @t68 @t4296 @t4297 @t1753 @t3888 @t3892 @t1051 @t4293 @t4314 @t41 @t3891 @t3894 @t69 @t4311 @t4312 @t1779 @t3873 @t3877 @t1025 @t4308 @t4329 @t40 @t3876 @t3879 @t70 @t4326 @t4327 @t1805 @t3858 @t3862 @t999 @t4323 @t4344 @t39 @t3861 @t3864 @t71 @t4341 @t4342 @t1831 @t3843 @t3847 @t973 @t4338 @t4359 @t38 @t3846 @t3849 @t72 @t4356 @t4357 @t1857 @t3828 @t3832 @t947 @t4353 @t4374 @t37 @t3831 @t3834 @t73 @t4371 @t4372 @t1883 @t3813 @t3817 @t921 @t4368 @t4389 @t36 @t3816 @t3819 @t74 @t4386 @t4387 @t1909 @t3798 @t3802 @t895 @t4383 @t4404 @t35 @t3801 @t3804 @t75 @t4401 @t4402 @t1935 @t3783 @t3787 @t869 @t4398 @t4419 @t34 @t3786 @t3789 @t76 @t4416 @t4417 @t1961 @t3768 @t3772 @t843 @t4413 @t4434 @t33 @t3771 @t3774 @t77 @t4431 @t4432 @t1987 @t3753 @t3757 @t817 @t4428 @t4449 @t32 @t3756 @t3759 @t78 @t4446 @t4447 @t2013 @t3738 @t3742 @t791 @t4443 @t4464 @t31 @t3741 @t3744 @t79 @t4461 @t4462 @t2039 @t3723 @t3727 @t765 @t4458 @t4479 @t30 @t3726 @t3729 @t80 @t4476 @t4477 @t2065 @t3708 @t3712 @t739 @t4473 @t4494 @t29 @t3711 @t3714 @t81 @t4491 @t4492 @t2091 @t3693 @t3697 @t713 @t4488 @t4509 @t28 @t3696 @t3699 @t82 @t4506 @t4507 @t2117 @t3678 @t3682 @t687 @t4503 @t4524 @t27 @t3681 @t3684 @t83 @t4521 @t4522 @t2143 @t3663 @t3667 @t661 @t4518 @t4539 @t26 @t3666 @t3669 @t84 @t4536 @t4537 @t2169 @t3648 @t3652 @t635 @t4533 @t4554 @t25 @t3651 @t3654 @t85 @t4551 @t4552 @t2195 @t3633 @t3637 @t609 @t4548 @t4569 @t24 @t3636 @t3639 @t86 @t4566 @t4567 @t2221 @t3618 @t3622 @t583 @t4563 @t4584 @t23 @t3621 @t3624 @t87 @t4581 @t4582 @t2247 @t3603 @t3607 @t557 @t4578 @t4599 @t22 @t3606 @t3609 @t88 @t4596 @t4597 @t2273 @t3588 @t3592 @t531 @t4593 @t4614 @t21 @t3591 @t3594 @t89 @t4611 @t4612 @t2299 @t3573 @t3577 @t505 @t4608 @t4629 @t20 @t3576 @t3579 @t90 @t4626 @t4627 @t2325 @t3558 @t3562 @t479 @t4623 @t4644 @t19 @t3561 @t3564 @t91 @t4641 @t4642 @t2351 @t3543 @t3547 @t453 @t4638 @t4659 @t18 @t3546 @t3549 @t92 @t4656 @t4657 @t2377 @t3528 @t3532 @t427 @t4653 @t4674 @t17 @t3531 @t3534 @t93 @t4671 @t4672 @t2403 @t3513 @t3517 @t401 @t4668 @t4689 @t16 @t3516 @t3519 @t94 @t4686 @t4687 @t2429 @t3498 @t3502 @t375 @t4683 @t4704 @t15 @t3501 @t3504 @t95 @t4701 @t4702 @t2455 @t3483 @t3487 @t349 @t4698 @t4719 @t14 @t3486 @t3489 @t96 @t4716 @t4717 @t2481 @t3468 @t3472 @t323 @t4713 @t4734 @t13 @t3471 @t3474 @t97 @t4731 @t4732 @t2507 @t3453 @t3457 @t297 @t4728 @t4749 @t12 @t3456 @t3459 @t98 @t4746 @t4747 @t2533 @t3441 @t3444 @t276 @t4743 @t4744 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6199 @t220) % 40.01/40.21 (step @p5719 :rule instantiate :premises (@p110) :args (@t4750)) % 40.01/40.21 (step-pop @p6200 :rule scope :premises (@p5719)) % 40.01/40.21 (step @p5720 :rule process_scope :premises (@p6200) :args (@t4753)) % 40.01/40.21 (step @p5722 :rule implies_elim :premises (@p5720)) % 40.01/40.21 (step @p5723 :rule cnf_or_pos :args (@t4753)) % 40.01/40.21 (step @p5724 :rule reordering :premises (@p5723) :args ((or @t4752 @t4751 (not @t4753)))) % 40.01/40.21 (step @p5725 :rule instantiate :premises (@p112) :args (@t4754)) % 40.01/40.21 (step @p5726 :rule cnf_or_pos :args (@t4755)) % 40.01/40.21 (step @p5727 :rule reordering :premises (@p5726) :args ((or @t4752 @t244 @t2561 (not @t4755)))) % 40.01/40.21 (step @p5728 :rule instantiate :premises (@p108) :args (@t4750)) % 40.01/40.21 (step @p5729 :rule cnf_or_pos :args (@t4757)) % 40.01/40.21 (step @p5730 :rule reordering :premises (@p5729) :args ((or @t2572 @t265 @t264 @t4756 (not @t4757)))) % 40.01/40.21 (step @p5731 :rule chain_m_resolution :premises (@p5730 @p5728 @p2728 @p2726 @p136 @p134 @p5727 @p5725 @p133 @p131 @p130 @p128 @p127 @p125 @p5724 @p5722 @p110) :args ((or @t4752 @t239) @t267 (@list @t4757 @t2572 @t2574 @t248 @t249 @t2561 @t4755 @t245 @t247 @t242 @t243 @t240 @t241 @t4751 @t4753 @t220))) % 40.01/40.21 (step @p5732 :rule instantiate :premises (@p119) :args (@t4754)) % 40.01/40.21 (step @p5733 :rule cnf_or_pos :args (@t4759)) % 40.01/40.21 (step @p5734 :rule reordering :premises (@p5733) :args ((or @t270 @t4752 @t4758 @t3440 (not @t4759)))) % 40.01/40.21 (step @p5735 :rule instantiate :premises (@p120) :args (@t2558)) % 40.01/40.21 (step @p5736 :rule cnf_or_pos :args (@t4762)) % 40.01/40.21 (step @p5737 :rule reordering :premises (@p5736) :args ((or @t4761 @t4760 @t2559 (not @t4762)))) % 40.01/40.21 (step @p5738 :rule instantiate :premises (@p121) :args (@t2557)) % 40.01/40.21 (step @p5739 :rule cnf_or_pos :args (@t4764)) % 40.01/40.21 (step @p5740 :rule reordering :premises (@p5739) :args ((or @t2567 @t4743 @t4763 (not @t4764)))) % 40.01/40.21 (step @p5741 :rule chain_m_resolution :premises (@p4681 @p4679 @p1463 @p4708 @p4706 @p54 @p4684 @p4682 @p55 @p4705 @p4703 @p1492 @p4657 @p4655 @p1434 @p4732 @p4730 @p53 @p4660 @p4658 @p56 @p4729 @p4727 @p1521 @p4633 @p4631 @p1405 @p4756 @p4754 @p52 @p4636 @p4634 @p57 @p4753 @p4751 @p1550 @p4609 @p4607 @p1376 @p4780 @p4778 @p51 @p4612 @p4610 @p58 @p4777 @p4775 @p1579 @p4585 @p4583 @p1347 @p4804 @p4802 @p50 @p4588 @p4586 @p59 @p4801 @p4799 @p1608 @p4561 @p4559 @p1318 @p4828 @p4826 @p49 @p4564 @p4562 @p60 @p4825 @p4823 @p1637 @p4537 @p4535 @p1289 @p4852 @p4850 @p48 @p4540 @p4538 @p61 @p4849 @p4847 @p1666 @p4513 @p4511 @p1260 @p4876 @p4874 @p47 @p4516 @p4514 @p62 @p4873 @p4871 @p1695 @p4489 @p4487 @p1231 @p4900 @p4898 @p46 @p4492 @p4490 @p63 @p4897 @p4895 @p1724 @p4465 @p4463 @p1202 @p4924 @p4922 @p45 @p4468 @p4466 @p64 @p4921 @p4919 @p1753 @p4441 @p4439 @p1173 @p4948 @p4946 @p44 @p4444 @p4442 @p65 @p4945 @p4943 @p1782 @p4417 @p4415 @p1144 @p4972 @p4970 @p43 @p4420 @p4418 @p66 @p4969 @p4967 @p1811 @p4393 @p4391 @p1115 @p4996 @p4994 @p42 @p4396 @p4394 @p67 @p4993 @p4991 @p1840 @p4369 @p4367 @p1086 @p5020 @p5018 @p41 @p4372 @p4370 @p68 @p5017 @p5015 @p1869 @p4345 @p4343 @p1057 @p5044 @p5042 @p40 @p4348 @p4346 @p69 @p5041 @p5039 @p1898 @p4321 @p4319 @p1028 @p5068 @p5066 @p39 @p4324 @p4322 @p70 @p5065 @p5063 @p1927 @p4297 @p4295 @p999 @p5092 @p5090 @p38 @p4300 @p4298 @p71 @p5089 @p5087 @p1956 @p4273 @p4271 @p970 @p5116 @p5114 @p37 @p4276 @p4274 @p72 @p5113 @p5111 @p1985 @p4249 @p4247 @p941 @p5140 @p5138 @p36 @p4252 @p4250 @p73 @p5137 @p5135 @p2014 @p4225 @p4223 @p912 @p5164 @p5162 @p35 @p4228 @p4226 @p74 @p5161 @p5159 @p2043 @p4201 @p4199 @p883 @p5188 @p5186 @p34 @p4204 @p4202 @p75 @p5185 @p5183 @p2072 @p4177 @p4175 @p854 @p5212 @p5210 @p33 @p4180 @p4178 @p76 @p5209 @p5207 @p2101 @p4153 @p4151 @p825 @p5236 @p5234 @p32 @p4156 @p4154 @p77 @p5233 @p5231 @p2130 @p4129 @p4127 @p796 @p5260 @p5258 @p31 @p4132 @p4130 @p78 @p5257 @p5255 @p2159 @p4105 @p4103 @p767 @p5284 @p5282 @p30 @p4108 @p4106 @p79 @p5281 @p5279 @p2188 @p4081 @p4079 @p738 @p5308 @p5306 @p29 @p4084 @p4082 @p80 @p5305 @p5303 @p2217 @p4057 @p4055 @p709 @p5332 @p5330 @p28 @p4060 @p4058 @p81 @p5329 @p5327 @p2246 @p4033 @p4031 @p680 @p5356 @p5354 @p27 @p4036 @p4034 @p82 @p5353 @p5351 @p2275 @p4009 @p4007 @p651 @p5380 @p5378 @p26 @p4012 @p4010 @p83 @p5377 @p5375 @p2304 @p3985 @p3983 @p622 @p5404 @p5402 @p25 @p3988 @p3986 @p84 @p5401 @p5399 @p2333 @p3961 @p3959 @p593 @p5428 @p5426 @p24 @p3964 @p3962 @p85 @p5425 @p5423 @p2362 @p3937 @p3935 @p564 @p5452 @p5450 @p23 @p3940 @p3938 @p86 @p5449 @p5447 @p2391 @p3913 @p3911 @p535 @p5476 @p5474 @p22 @p3916 @p3914 @p87 @p5473 @p5471 @p2420 @p3889 @p3887 @p506 @p5500 @p5498 @p21 @p3892 @p3890 @p88 @p5497 @p5495 @p2449 @p3865 @p3863 @p477 @p5524 @p5522 @p20 @p3868 @p3866 @p89 @p5521 @p5519 @p2478 @p3841 @p3839 @p448 @p5548 @p5546 @p19 @p3844 @p3842 @p90 @p5545 @p5543 @p2507 @p3817 @p3815 @p419 @p5572 @p5570 @p18 @p3820 @p3818 @p91 @p5569 @p5567 @p2536 @p3793 @p3791 @p390 @p5596 @p5594 @p17 @p3796 @p3794 @p92 @p5593 @p5591 @p2565 @p3769 @p3767 @p361 @p5620 @p5618 @p16 @p3772 @p3770 @p93 @p5617 @p5615 @p2594 @p3745 @p3743 @p332 @p5644 @p5642 @p15 @p3748 @p3746 @p94 @p5641 @p5639 @p2623 @p3721 @p3719 @p303 @p5668 @p5666 @p14 @p3724 @p3722 @p95 @p5665 @p5663 @p2652 @p3697 @p3695 @p274 @p5692 @p5690 @p13 @p3700 @p3698 @p96 @p5689 @p5687 @p2681 @p3673 @p3671 @p245 @p5716 @p5714 @p12 @p3676 @p3674 @p97 @p5713 @p5711 @p2710 @p3649 @p3647 @p216 @p5740 @p5738 @p11 @p3652 @p3650 @p98 @p5737 @p5735 @p2739 @p3628 @p3626 @p187 @p5734 @p5732 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5731) :args (@t4752 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4102 @t1415 @t4098 @t4119 @t54 @t4101 @t4104 @t55 @t4116 @t4117 @t1441 @t4083 @t4087 @t1389 @t4113 @t4134 @t53 @t4086 @t4089 @t56 @t4131 @t4132 @t1467 @t4068 @t4072 @t1363 @t4128 @t4149 @t52 @t4071 @t4074 @t57 @t4146 @t4147 @t1493 @t4053 @t4057 @t1337 @t4143 @t4164 @t51 @t4056 @t4059 @t58 @t4161 @t4162 @t1519 @t4038 @t4042 @t1311 @t4158 @t4179 @t50 @t4041 @t4044 @t59 @t4176 @t4177 @t1545 @t4023 @t4027 @t1285 @t4173 @t4194 @t49 @t4026 @t4029 @t60 @t4191 @t4192 @t1571 @t4008 @t4012 @t1259 @t4188 @t4209 @t48 @t4011 @t4014 @t61 @t4206 @t4207 @t1597 @t3993 @t3997 @t1233 @t4203 @t4224 @t47 @t3996 @t3999 @t62 @t4221 @t4222 @t1623 @t3978 @t3982 @t1207 @t4218 @t4239 @t46 @t3981 @t3984 @t63 @t4236 @t4237 @t1649 @t3963 @t3967 @t1181 @t4233 @t4254 @t45 @t3966 @t3969 @t64 @t4251 @t4252 @t1675 @t3948 @t3952 @t1155 @t4248 @t4269 @t44 @t3951 @t3954 @t65 @t4266 @t4267 @t1701 @t3933 @t3937 @t1129 @t4263 @t4284 @t43 @t3936 @t3939 @t66 @t4281 @t4282 @t1727 @t3918 @t3922 @t1103 @t4278 @t4299 @t42 @t3921 @t3924 @t67 @t4296 @t4297 @t1753 @t3903 @t3907 @t1077 @t4293 @t4314 @t41 @t3906 @t3909 @t68 @t4311 @t4312 @t1779 @t3888 @t3892 @t1051 @t4308 @t4329 @t40 @t3891 @t3894 @t69 @t4326 @t4327 @t1805 @t3873 @t3877 @t1025 @t4323 @t4344 @t39 @t3876 @t3879 @t70 @t4341 @t4342 @t1831 @t3858 @t3862 @t999 @t4338 @t4359 @t38 @t3861 @t3864 @t71 @t4356 @t4357 @t1857 @t3843 @t3847 @t973 @t4353 @t4374 @t37 @t3846 @t3849 @t72 @t4371 @t4372 @t1883 @t3828 @t3832 @t947 @t4368 @t4389 @t36 @t3831 @t3834 @t73 @t4386 @t4387 @t1909 @t3813 @t3817 @t921 @t4383 @t4404 @t35 @t3816 @t3819 @t74 @t4401 @t4402 @t1935 @t3798 @t3802 @t895 @t4398 @t4419 @t34 @t3801 @t3804 @t75 @t4416 @t4417 @t1961 @t3783 @t3787 @t869 @t4413 @t4434 @t33 @t3786 @t3789 @t76 @t4431 @t4432 @t1987 @t3768 @t3772 @t843 @t4428 @t4449 @t32 @t3771 @t3774 @t77 @t4446 @t4447 @t2013 @t3753 @t3757 @t817 @t4443 @t4464 @t31 @t3756 @t3759 @t78 @t4461 @t4462 @t2039 @t3738 @t3742 @t791 @t4458 @t4479 @t30 @t3741 @t3744 @t79 @t4476 @t4477 @t2065 @t3723 @t3727 @t765 @t4473 @t4494 @t29 @t3726 @t3729 @t80 @t4491 @t4492 @t2091 @t3708 @t3712 @t739 @t4488 @t4509 @t28 @t3711 @t3714 @t81 @t4506 @t4507 @t2117 @t3693 @t3697 @t713 @t4503 @t4524 @t27 @t3696 @t3699 @t82 @t4521 @t4522 @t2143 @t3678 @t3682 @t687 @t4518 @t4539 @t26 @t3681 @t3684 @t83 @t4536 @t4537 @t2169 @t3663 @t3667 @t661 @t4533 @t4554 @t25 @t3666 @t3669 @t84 @t4551 @t4552 @t2195 @t3648 @t3652 @t635 @t4548 @t4569 @t24 @t3651 @t3654 @t85 @t4566 @t4567 @t2221 @t3633 @t3637 @t609 @t4563 @t4584 @t23 @t3636 @t3639 @t86 @t4581 @t4582 @t2247 @t3618 @t3622 @t583 @t4578 @t4599 @t22 @t3621 @t3624 @t87 @t4596 @t4597 @t2273 @t3603 @t3607 @t557 @t4593 @t4614 @t21 @t3606 @t3609 @t88 @t4611 @t4612 @t2299 @t3588 @t3592 @t531 @t4608 @t4629 @t20 @t3591 @t3594 @t89 @t4626 @t4627 @t2325 @t3573 @t3577 @t505 @t4623 @t4644 @t19 @t3576 @t3579 @t90 @t4641 @t4642 @t2351 @t3558 @t3562 @t479 @t4638 @t4659 @t18 @t3561 @t3564 @t91 @t4656 @t4657 @t2377 @t3543 @t3547 @t453 @t4653 @t4674 @t17 @t3546 @t3549 @t92 @t4671 @t4672 @t2403 @t3528 @t3532 @t427 @t4668 @t4689 @t16 @t3531 @t3534 @t93 @t4686 @t4687 @t2429 @t3513 @t3517 @t401 @t4683 @t4704 @t15 @t3516 @t3519 @t94 @t4701 @t4702 @t2455 @t3498 @t3502 @t375 @t4698 @t4719 @t14 @t3501 @t3504 @t95 @t4716 @t4717 @t2481 @t3483 @t3487 @t349 @t4713 @t4734 @t13 @t3486 @t3489 @t96 @t4731 @t4732 @t2507 @t3468 @t3472 @t323 @t4728 @t4749 @t12 @t3471 @t3474 @t97 @t4746 @t4747 @t2533 @t3453 @t3457 @t297 @t4743 @t4764 @t11 @t3456 @t3459 @t98 @t4761 @t4762 @t2559 @t3441 @t3444 @t276 @t4758 @t4759 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6201 @t220) % 40.01/40.21 (step @p5743 :rule instantiate :premises (@p110) :args (@t4765)) % 40.01/40.21 (step-pop @p6202 :rule scope :premises (@p5743)) % 40.01/40.21 (step @p5744 :rule process_scope :premises (@p6202) :args (@t4768)) % 40.01/40.21 (step @p5746 :rule implies_elim :premises (@p5744)) % 40.01/40.21 (step @p5747 :rule cnf_or_pos :args (@t4768)) % 40.01/40.21 (step @p5748 :rule reordering :premises (@p5747) :args ((or @t4767 @t4766 (not @t4768)))) % 40.01/40.21 (step @p5749 :rule instantiate :premises (@p112) :args (@t4769)) % 40.01/40.21 (step @p5750 :rule cnf_or_pos :args (@t4770)) % 40.01/40.21 (step @p5751 :rule reordering :premises (@p5750) :args ((or @t4767 @t244 @t2587 (not @t4770)))) % 40.01/40.21 (step @p5752 :rule instantiate :premises (@p108) :args (@t4765)) % 40.01/40.21 (step @p5753 :rule cnf_or_pos :args (@t4772)) % 40.01/40.21 (step @p5754 :rule reordering :premises (@p5753) :args ((or @t2598 @t265 @t264 @t4771 (not @t4772)))) % 40.01/40.21 (step @p5755 :rule chain_m_resolution :premises (@p5754 @p5752 @p2757 @p2755 @p136 @p134 @p5751 @p5749 @p133 @p131 @p130 @p128 @p127 @p125 @p5748 @p5746 @p110) :args ((or @t4767 @t239) @t267 (@list @t4772 @t2598 @t2600 @t248 @t249 @t2587 @t4770 @t245 @t247 @t242 @t243 @t240 @t241 @t4766 @t4768 @t220))) % 40.01/40.21 (step @p5756 :rule instantiate :premises (@p119) :args (@t4769)) % 40.01/40.21 (step @p5757 :rule cnf_or_pos :args (@t4774)) % 40.01/40.21 (step @p5758 :rule reordering :premises (@p5757) :args ((or @t270 @t4767 @t4773 @t3440 (not @t4774)))) % 40.01/40.21 (step @p5759 :rule instantiate :premises (@p120) :args (@t2584)) % 40.01/40.21 (step @p5760 :rule cnf_or_pos :args (@t4777)) % 40.01/40.21 (step @p5761 :rule reordering :premises (@p5760) :args ((or @t4776 @t4775 @t2585 (not @t4777)))) % 40.01/40.21 (step @p5762 :rule instantiate :premises (@p121) :args (@t2583)) % 40.01/40.21 (step @p5763 :rule cnf_or_pos :args (@t4779)) % 40.01/40.21 (step @p5764 :rule reordering :premises (@p5763) :args ((or @t2593 @t4758 @t4778 (not @t4779)))) % 40.01/40.21 (step @p5765 :rule chain_m_resolution :premises (@p4708 @p4706 @p54 @p4705 @p4703 @p1492 @p4681 @p4679 @p1463 @p4732 @p4730 @p53 @p4684 @p4682 @p55 @p4729 @p4727 @p1521 @p4657 @p4655 @p1434 @p4756 @p4754 @p52 @p4660 @p4658 @p56 @p4753 @p4751 @p1550 @p4633 @p4631 @p1405 @p4780 @p4778 @p51 @p4636 @p4634 @p57 @p4777 @p4775 @p1579 @p4609 @p4607 @p1376 @p4804 @p4802 @p50 @p4612 @p4610 @p58 @p4801 @p4799 @p1608 @p4585 @p4583 @p1347 @p4828 @p4826 @p49 @p4588 @p4586 @p59 @p4825 @p4823 @p1637 @p4561 @p4559 @p1318 @p4852 @p4850 @p48 @p4564 @p4562 @p60 @p4849 @p4847 @p1666 @p4537 @p4535 @p1289 @p4876 @p4874 @p47 @p4540 @p4538 @p61 @p4873 @p4871 @p1695 @p4513 @p4511 @p1260 @p4900 @p4898 @p46 @p4516 @p4514 @p62 @p4897 @p4895 @p1724 @p4489 @p4487 @p1231 @p4924 @p4922 @p45 @p4492 @p4490 @p63 @p4921 @p4919 @p1753 @p4465 @p4463 @p1202 @p4948 @p4946 @p44 @p4468 @p4466 @p64 @p4945 @p4943 @p1782 @p4441 @p4439 @p1173 @p4972 @p4970 @p43 @p4444 @p4442 @p65 @p4969 @p4967 @p1811 @p4417 @p4415 @p1144 @p4996 @p4994 @p42 @p4420 @p4418 @p66 @p4993 @p4991 @p1840 @p4393 @p4391 @p1115 @p5020 @p5018 @p41 @p4396 @p4394 @p67 @p5017 @p5015 @p1869 @p4369 @p4367 @p1086 @p5044 @p5042 @p40 @p4372 @p4370 @p68 @p5041 @p5039 @p1898 @p4345 @p4343 @p1057 @p5068 @p5066 @p39 @p4348 @p4346 @p69 @p5065 @p5063 @p1927 @p4321 @p4319 @p1028 @p5092 @p5090 @p38 @p4324 @p4322 @p70 @p5089 @p5087 @p1956 @p4297 @p4295 @p999 @p5116 @p5114 @p37 @p4300 @p4298 @p71 @p5113 @p5111 @p1985 @p4273 @p4271 @p970 @p5140 @p5138 @p36 @p4276 @p4274 @p72 @p5137 @p5135 @p2014 @p4249 @p4247 @p941 @p5164 @p5162 @p35 @p4252 @p4250 @p73 @p5161 @p5159 @p2043 @p4225 @p4223 @p912 @p5188 @p5186 @p34 @p4228 @p4226 @p74 @p5185 @p5183 @p2072 @p4201 @p4199 @p883 @p5212 @p5210 @p33 @p4204 @p4202 @p75 @p5209 @p5207 @p2101 @p4177 @p4175 @p854 @p5236 @p5234 @p32 @p4180 @p4178 @p76 @p5233 @p5231 @p2130 @p4153 @p4151 @p825 @p5260 @p5258 @p31 @p4156 @p4154 @p77 @p5257 @p5255 @p2159 @p4129 @p4127 @p796 @p5284 @p5282 @p30 @p4132 @p4130 @p78 @p5281 @p5279 @p2188 @p4105 @p4103 @p767 @p5308 @p5306 @p29 @p4108 @p4106 @p79 @p5305 @p5303 @p2217 @p4081 @p4079 @p738 @p5332 @p5330 @p28 @p4084 @p4082 @p80 @p5329 @p5327 @p2246 @p4057 @p4055 @p709 @p5356 @p5354 @p27 @p4060 @p4058 @p81 @p5353 @p5351 @p2275 @p4033 @p4031 @p680 @p5380 @p5378 @p26 @p4036 @p4034 @p82 @p5377 @p5375 @p2304 @p4009 @p4007 @p651 @p5404 @p5402 @p25 @p4012 @p4010 @p83 @p5401 @p5399 @p2333 @p3985 @p3983 @p622 @p5428 @p5426 @p24 @p3988 @p3986 @p84 @p5425 @p5423 @p2362 @p3961 @p3959 @p593 @p5452 @p5450 @p23 @p3964 @p3962 @p85 @p5449 @p5447 @p2391 @p3937 @p3935 @p564 @p5476 @p5474 @p22 @p3940 @p3938 @p86 @p5473 @p5471 @p2420 @p3913 @p3911 @p535 @p5500 @p5498 @p21 @p3916 @p3914 @p87 @p5497 @p5495 @p2449 @p3889 @p3887 @p506 @p5524 @p5522 @p20 @p3892 @p3890 @p88 @p5521 @p5519 @p2478 @p3865 @p3863 @p477 @p5548 @p5546 @p19 @p3868 @p3866 @p89 @p5545 @p5543 @p2507 @p3841 @p3839 @p448 @p5572 @p5570 @p18 @p3844 @p3842 @p90 @p5569 @p5567 @p2536 @p3817 @p3815 @p419 @p5596 @p5594 @p17 @p3820 @p3818 @p91 @p5593 @p5591 @p2565 @p3793 @p3791 @p390 @p5620 @p5618 @p16 @p3796 @p3794 @p92 @p5617 @p5615 @p2594 @p3769 @p3767 @p361 @p5644 @p5642 @p15 @p3772 @p3770 @p93 @p5641 @p5639 @p2623 @p3745 @p3743 @p332 @p5668 @p5666 @p14 @p3748 @p3746 @p94 @p5665 @p5663 @p2652 @p3721 @p3719 @p303 @p5692 @p5690 @p13 @p3724 @p3722 @p95 @p5689 @p5687 @p2681 @p3697 @p3695 @p274 @p5716 @p5714 @p12 @p3700 @p3698 @p96 @p5713 @p5711 @p2710 @p3673 @p3671 @p245 @p5740 @p5738 @p11 @p3676 @p3674 @p97 @p5737 @p5735 @p2739 @p3649 @p3647 @p216 @p5764 @p5762 @p10 @p3652 @p3650 @p98 @p5761 @p5759 @p2768 @p3628 @p3626 @p187 @p5758 @p5756 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5755) :args (@t4767 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4119 @t54 @t4116 @t4117 @t1441 @t4098 @t4102 @t1415 @t4113 @t4134 @t53 @t4101 @t4104 @t55 @t4131 @t4132 @t1467 @t4083 @t4087 @t1389 @t4128 @t4149 @t52 @t4086 @t4089 @t56 @t4146 @t4147 @t1493 @t4068 @t4072 @t1363 @t4143 @t4164 @t51 @t4071 @t4074 @t57 @t4161 @t4162 @t1519 @t4053 @t4057 @t1337 @t4158 @t4179 @t50 @t4056 @t4059 @t58 @t4176 @t4177 @t1545 @t4038 @t4042 @t1311 @t4173 @t4194 @t49 @t4041 @t4044 @t59 @t4191 @t4192 @t1571 @t4023 @t4027 @t1285 @t4188 @t4209 @t48 @t4026 @t4029 @t60 @t4206 @t4207 @t1597 @t4008 @t4012 @t1259 @t4203 @t4224 @t47 @t4011 @t4014 @t61 @t4221 @t4222 @t1623 @t3993 @t3997 @t1233 @t4218 @t4239 @t46 @t3996 @t3999 @t62 @t4236 @t4237 @t1649 @t3978 @t3982 @t1207 @t4233 @t4254 @t45 @t3981 @t3984 @t63 @t4251 @t4252 @t1675 @t3963 @t3967 @t1181 @t4248 @t4269 @t44 @t3966 @t3969 @t64 @t4266 @t4267 @t1701 @t3948 @t3952 @t1155 @t4263 @t4284 @t43 @t3951 @t3954 @t65 @t4281 @t4282 @t1727 @t3933 @t3937 @t1129 @t4278 @t4299 @t42 @t3936 @t3939 @t66 @t4296 @t4297 @t1753 @t3918 @t3922 @t1103 @t4293 @t4314 @t41 @t3921 @t3924 @t67 @t4311 @t4312 @t1779 @t3903 @t3907 @t1077 @t4308 @t4329 @t40 @t3906 @t3909 @t68 @t4326 @t4327 @t1805 @t3888 @t3892 @t1051 @t4323 @t4344 @t39 @t3891 @t3894 @t69 @t4341 @t4342 @t1831 @t3873 @t3877 @t1025 @t4338 @t4359 @t38 @t3876 @t3879 @t70 @t4356 @t4357 @t1857 @t3858 @t3862 @t999 @t4353 @t4374 @t37 @t3861 @t3864 @t71 @t4371 @t4372 @t1883 @t3843 @t3847 @t973 @t4368 @t4389 @t36 @t3846 @t3849 @t72 @t4386 @t4387 @t1909 @t3828 @t3832 @t947 @t4383 @t4404 @t35 @t3831 @t3834 @t73 @t4401 @t4402 @t1935 @t3813 @t3817 @t921 @t4398 @t4419 @t34 @t3816 @t3819 @t74 @t4416 @t4417 @t1961 @t3798 @t3802 @t895 @t4413 @t4434 @t33 @t3801 @t3804 @t75 @t4431 @t4432 @t1987 @t3783 @t3787 @t869 @t4428 @t4449 @t32 @t3786 @t3789 @t76 @t4446 @t4447 @t2013 @t3768 @t3772 @t843 @t4443 @t4464 @t31 @t3771 @t3774 @t77 @t4461 @t4462 @t2039 @t3753 @t3757 @t817 @t4458 @t4479 @t30 @t3756 @t3759 @t78 @t4476 @t4477 @t2065 @t3738 @t3742 @t791 @t4473 @t4494 @t29 @t3741 @t3744 @t79 @t4491 @t4492 @t2091 @t3723 @t3727 @t765 @t4488 @t4509 @t28 @t3726 @t3729 @t80 @t4506 @t4507 @t2117 @t3708 @t3712 @t739 @t4503 @t4524 @t27 @t3711 @t3714 @t81 @t4521 @t4522 @t2143 @t3693 @t3697 @t713 @t4518 @t4539 @t26 @t3696 @t3699 @t82 @t4536 @t4537 @t2169 @t3678 @t3682 @t687 @t4533 @t4554 @t25 @t3681 @t3684 @t83 @t4551 @t4552 @t2195 @t3663 @t3667 @t661 @t4548 @t4569 @t24 @t3666 @t3669 @t84 @t4566 @t4567 @t2221 @t3648 @t3652 @t635 @t4563 @t4584 @t23 @t3651 @t3654 @t85 @t4581 @t4582 @t2247 @t3633 @t3637 @t609 @t4578 @t4599 @t22 @t3636 @t3639 @t86 @t4596 @t4597 @t2273 @t3618 @t3622 @t583 @t4593 @t4614 @t21 @t3621 @t3624 @t87 @t4611 @t4612 @t2299 @t3603 @t3607 @t557 @t4608 @t4629 @t20 @t3606 @t3609 @t88 @t4626 @t4627 @t2325 @t3588 @t3592 @t531 @t4623 @t4644 @t19 @t3591 @t3594 @t89 @t4641 @t4642 @t2351 @t3573 @t3577 @t505 @t4638 @t4659 @t18 @t3576 @t3579 @t90 @t4656 @t4657 @t2377 @t3558 @t3562 @t479 @t4653 @t4674 @t17 @t3561 @t3564 @t91 @t4671 @t4672 @t2403 @t3543 @t3547 @t453 @t4668 @t4689 @t16 @t3546 @t3549 @t92 @t4686 @t4687 @t2429 @t3528 @t3532 @t427 @t4683 @t4704 @t15 @t3531 @t3534 @t93 @t4701 @t4702 @t2455 @t3513 @t3517 @t401 @t4698 @t4719 @t14 @t3516 @t3519 @t94 @t4716 @t4717 @t2481 @t3498 @t3502 @t375 @t4713 @t4734 @t13 @t3501 @t3504 @t95 @t4731 @t4732 @t2507 @t3483 @t3487 @t349 @t4728 @t4749 @t12 @t3486 @t3489 @t96 @t4746 @t4747 @t2533 @t3468 @t3472 @t323 @t4743 @t4764 @t11 @t3471 @t3474 @t97 @t4761 @t4762 @t2559 @t3453 @t3457 @t297 @t4758 @t4779 @t10 @t3456 @t3459 @t98 @t4776 @t4777 @t2585 @t3441 @t3444 @t276 @t4773 @t4774 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6203 @t220) % 40.01/40.21 (step @p5767 :rule instantiate :premises (@p110) :args (@t4780)) % 40.01/40.21 (step-pop @p6204 :rule scope :premises (@p5767)) % 40.01/40.21 (step @p5768 :rule process_scope :premises (@p6204) :args (@t4783)) % 40.01/40.21 (step @p5770 :rule implies_elim :premises (@p5768)) % 40.01/40.21 (step @p5771 :rule cnf_or_pos :args (@t4783)) % 40.01/40.21 (step @p5772 :rule reordering :premises (@p5771) :args ((or @t4782 @t4781 (not @t4783)))) % 40.01/40.21 (step @p5773 :rule instantiate :premises (@p112) :args (@t4784)) % 40.01/40.21 (step @p5774 :rule cnf_or_pos :args (@t4785)) % 40.01/40.21 (step @p5775 :rule reordering :premises (@p5774) :args ((or @t4782 @t244 @t2613 (not @t4785)))) % 40.01/40.21 (step @p5776 :rule instantiate :premises (@p108) :args (@t4780)) % 40.01/40.21 (step @p5777 :rule cnf_or_pos :args (@t4787)) % 40.01/40.21 (step @p5778 :rule reordering :premises (@p5777) :args ((or @t2624 @t265 @t264 @t4786 (not @t4787)))) % 40.01/40.21 (step @p5779 :rule chain_m_resolution :premises (@p5778 @p5776 @p2786 @p2784 @p136 @p134 @p5775 @p5773 @p133 @p131 @p130 @p128 @p127 @p125 @p5772 @p5770 @p110) :args ((or @t4782 @t239) @t267 (@list @t4787 @t2624 @t2626 @t248 @t249 @t2613 @t4785 @t245 @t247 @t242 @t243 @t240 @t241 @t4781 @t4783 @t220))) % 40.01/40.21 (step @p5780 :rule instantiate :premises (@p119) :args (@t4784)) % 40.01/40.21 (step @p5781 :rule cnf_or_pos :args (@t4789)) % 40.01/40.21 (step @p5782 :rule reordering :premises (@p5781) :args ((or @t270 @t4782 @t4788 @t3440 (not @t4789)))) % 40.01/40.21 (step @p5783 :rule instantiate :premises (@p120) :args (@t2610)) % 40.01/40.21 (step @p5784 :rule cnf_or_pos :args (@t4792)) % 40.01/40.21 (step @p5785 :rule reordering :premises (@p5784) :args ((or @t4791 @t4790 @t2611 (not @t4792)))) % 40.01/40.21 (step @p5786 :rule instantiate :premises (@p121) :args (@t2609)) % 40.01/40.21 (step @p5787 :rule cnf_or_pos :args (@t4794)) % 40.01/40.21 (step @p5788 :rule reordering :premises (@p5787) :args ((or @t2619 @t4773 @t4793 (not @t4794)))) % 40.01/40.21 (step @p5789 :rule chain_m_resolution :premises (@p4705 @p4703 @p1492 @p4732 @p4730 @p53 @p4708 @p4706 @p54 @p4729 @p4727 @p1521 @p4681 @p4679 @p1463 @p4756 @p4754 @p52 @p4684 @p4682 @p55 @p4753 @p4751 @p1550 @p4657 @p4655 @p1434 @p4780 @p4778 @p51 @p4660 @p4658 @p56 @p4777 @p4775 @p1579 @p4633 @p4631 @p1405 @p4804 @p4802 @p50 @p4636 @p4634 @p57 @p4801 @p4799 @p1608 @p4609 @p4607 @p1376 @p4828 @p4826 @p49 @p4612 @p4610 @p58 @p4825 @p4823 @p1637 @p4585 @p4583 @p1347 @p4852 @p4850 @p48 @p4588 @p4586 @p59 @p4849 @p4847 @p1666 @p4561 @p4559 @p1318 @p4876 @p4874 @p47 @p4564 @p4562 @p60 @p4873 @p4871 @p1695 @p4537 @p4535 @p1289 @p4900 @p4898 @p46 @p4540 @p4538 @p61 @p4897 @p4895 @p1724 @p4513 @p4511 @p1260 @p4924 @p4922 @p45 @p4516 @p4514 @p62 @p4921 @p4919 @p1753 @p4489 @p4487 @p1231 @p4948 @p4946 @p44 @p4492 @p4490 @p63 @p4945 @p4943 @p1782 @p4465 @p4463 @p1202 @p4972 @p4970 @p43 @p4468 @p4466 @p64 @p4969 @p4967 @p1811 @p4441 @p4439 @p1173 @p4996 @p4994 @p42 @p4444 @p4442 @p65 @p4993 @p4991 @p1840 @p4417 @p4415 @p1144 @p5020 @p5018 @p41 @p4420 @p4418 @p66 @p5017 @p5015 @p1869 @p4393 @p4391 @p1115 @p5044 @p5042 @p40 @p4396 @p4394 @p67 @p5041 @p5039 @p1898 @p4369 @p4367 @p1086 @p5068 @p5066 @p39 @p4372 @p4370 @p68 @p5065 @p5063 @p1927 @p4345 @p4343 @p1057 @p5092 @p5090 @p38 @p4348 @p4346 @p69 @p5089 @p5087 @p1956 @p4321 @p4319 @p1028 @p5116 @p5114 @p37 @p4324 @p4322 @p70 @p5113 @p5111 @p1985 @p4297 @p4295 @p999 @p5140 @p5138 @p36 @p4300 @p4298 @p71 @p5137 @p5135 @p2014 @p4273 @p4271 @p970 @p5164 @p5162 @p35 @p4276 @p4274 @p72 @p5161 @p5159 @p2043 @p4249 @p4247 @p941 @p5188 @p5186 @p34 @p4252 @p4250 @p73 @p5185 @p5183 @p2072 @p4225 @p4223 @p912 @p5212 @p5210 @p33 @p4228 @p4226 @p74 @p5209 @p5207 @p2101 @p4201 @p4199 @p883 @p5236 @p5234 @p32 @p4204 @p4202 @p75 @p5233 @p5231 @p2130 @p4177 @p4175 @p854 @p5260 @p5258 @p31 @p4180 @p4178 @p76 @p5257 @p5255 @p2159 @p4153 @p4151 @p825 @p5284 @p5282 @p30 @p4156 @p4154 @p77 @p5281 @p5279 @p2188 @p4129 @p4127 @p796 @p5308 @p5306 @p29 @p4132 @p4130 @p78 @p5305 @p5303 @p2217 @p4105 @p4103 @p767 @p5332 @p5330 @p28 @p4108 @p4106 @p79 @p5329 @p5327 @p2246 @p4081 @p4079 @p738 @p5356 @p5354 @p27 @p4084 @p4082 @p80 @p5353 @p5351 @p2275 @p4057 @p4055 @p709 @p5380 @p5378 @p26 @p4060 @p4058 @p81 @p5377 @p5375 @p2304 @p4033 @p4031 @p680 @p5404 @p5402 @p25 @p4036 @p4034 @p82 @p5401 @p5399 @p2333 @p4009 @p4007 @p651 @p5428 @p5426 @p24 @p4012 @p4010 @p83 @p5425 @p5423 @p2362 @p3985 @p3983 @p622 @p5452 @p5450 @p23 @p3988 @p3986 @p84 @p5449 @p5447 @p2391 @p3961 @p3959 @p593 @p5476 @p5474 @p22 @p3964 @p3962 @p85 @p5473 @p5471 @p2420 @p3937 @p3935 @p564 @p5500 @p5498 @p21 @p3940 @p3938 @p86 @p5497 @p5495 @p2449 @p3913 @p3911 @p535 @p5524 @p5522 @p20 @p3916 @p3914 @p87 @p5521 @p5519 @p2478 @p3889 @p3887 @p506 @p5548 @p5546 @p19 @p3892 @p3890 @p88 @p5545 @p5543 @p2507 @p3865 @p3863 @p477 @p5572 @p5570 @p18 @p3868 @p3866 @p89 @p5569 @p5567 @p2536 @p3841 @p3839 @p448 @p5596 @p5594 @p17 @p3844 @p3842 @p90 @p5593 @p5591 @p2565 @p3817 @p3815 @p419 @p5620 @p5618 @p16 @p3820 @p3818 @p91 @p5617 @p5615 @p2594 @p3793 @p3791 @p390 @p5644 @p5642 @p15 @p3796 @p3794 @p92 @p5641 @p5639 @p2623 @p3769 @p3767 @p361 @p5668 @p5666 @p14 @p3772 @p3770 @p93 @p5665 @p5663 @p2652 @p3745 @p3743 @p332 @p5692 @p5690 @p13 @p3748 @p3746 @p94 @p5689 @p5687 @p2681 @p3721 @p3719 @p303 @p5716 @p5714 @p12 @p3724 @p3722 @p95 @p5713 @p5711 @p2710 @p3697 @p3695 @p274 @p5740 @p5738 @p11 @p3700 @p3698 @p96 @p5737 @p5735 @p2739 @p3673 @p3671 @p245 @p5764 @p5762 @p10 @p3676 @p3674 @p97 @p5761 @p5759 @p2768 @p3649 @p3647 @p216 @p5788 @p5786 @p9 @p3652 @p3650 @p98 @p5785 @p5783 @p2797 @p3628 @p3626 @p187 @p5782 @p5780 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5779) :args (@t4782 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4117 @t1441 @t4113 @t4134 @t53 @t4116 @t4119 @t54 @t4131 @t4132 @t1467 @t4098 @t4102 @t1415 @t4128 @t4149 @t52 @t4101 @t4104 @t55 @t4146 @t4147 @t1493 @t4083 @t4087 @t1389 @t4143 @t4164 @t51 @t4086 @t4089 @t56 @t4161 @t4162 @t1519 @t4068 @t4072 @t1363 @t4158 @t4179 @t50 @t4071 @t4074 @t57 @t4176 @t4177 @t1545 @t4053 @t4057 @t1337 @t4173 @t4194 @t49 @t4056 @t4059 @t58 @t4191 @t4192 @t1571 @t4038 @t4042 @t1311 @t4188 @t4209 @t48 @t4041 @t4044 @t59 @t4206 @t4207 @t1597 @t4023 @t4027 @t1285 @t4203 @t4224 @t47 @t4026 @t4029 @t60 @t4221 @t4222 @t1623 @t4008 @t4012 @t1259 @t4218 @t4239 @t46 @t4011 @t4014 @t61 @t4236 @t4237 @t1649 @t3993 @t3997 @t1233 @t4233 @t4254 @t45 @t3996 @t3999 @t62 @t4251 @t4252 @t1675 @t3978 @t3982 @t1207 @t4248 @t4269 @t44 @t3981 @t3984 @t63 @t4266 @t4267 @t1701 @t3963 @t3967 @t1181 @t4263 @t4284 @t43 @t3966 @t3969 @t64 @t4281 @t4282 @t1727 @t3948 @t3952 @t1155 @t4278 @t4299 @t42 @t3951 @t3954 @t65 @t4296 @t4297 @t1753 @t3933 @t3937 @t1129 @t4293 @t4314 @t41 @t3936 @t3939 @t66 @t4311 @t4312 @t1779 @t3918 @t3922 @t1103 @t4308 @t4329 @t40 @t3921 @t3924 @t67 @t4326 @t4327 @t1805 @t3903 @t3907 @t1077 @t4323 @t4344 @t39 @t3906 @t3909 @t68 @t4341 @t4342 @t1831 @t3888 @t3892 @t1051 @t4338 @t4359 @t38 @t3891 @t3894 @t69 @t4356 @t4357 @t1857 @t3873 @t3877 @t1025 @t4353 @t4374 @t37 @t3876 @t3879 @t70 @t4371 @t4372 @t1883 @t3858 @t3862 @t999 @t4368 @t4389 @t36 @t3861 @t3864 @t71 @t4386 @t4387 @t1909 @t3843 @t3847 @t973 @t4383 @t4404 @t35 @t3846 @t3849 @t72 @t4401 @t4402 @t1935 @t3828 @t3832 @t947 @t4398 @t4419 @t34 @t3831 @t3834 @t73 @t4416 @t4417 @t1961 @t3813 @t3817 @t921 @t4413 @t4434 @t33 @t3816 @t3819 @t74 @t4431 @t4432 @t1987 @t3798 @t3802 @t895 @t4428 @t4449 @t32 @t3801 @t3804 @t75 @t4446 @t4447 @t2013 @t3783 @t3787 @t869 @t4443 @t4464 @t31 @t3786 @t3789 @t76 @t4461 @t4462 @t2039 @t3768 @t3772 @t843 @t4458 @t4479 @t30 @t3771 @t3774 @t77 @t4476 @t4477 @t2065 @t3753 @t3757 @t817 @t4473 @t4494 @t29 @t3756 @t3759 @t78 @t4491 @t4492 @t2091 @t3738 @t3742 @t791 @t4488 @t4509 @t28 @t3741 @t3744 @t79 @t4506 @t4507 @t2117 @t3723 @t3727 @t765 @t4503 @t4524 @t27 @t3726 @t3729 @t80 @t4521 @t4522 @t2143 @t3708 @t3712 @t739 @t4518 @t4539 @t26 @t3711 @t3714 @t81 @t4536 @t4537 @t2169 @t3693 @t3697 @t713 @t4533 @t4554 @t25 @t3696 @t3699 @t82 @t4551 @t4552 @t2195 @t3678 @t3682 @t687 @t4548 @t4569 @t24 @t3681 @t3684 @t83 @t4566 @t4567 @t2221 @t3663 @t3667 @t661 @t4563 @t4584 @t23 @t3666 @t3669 @t84 @t4581 @t4582 @t2247 @t3648 @t3652 @t635 @t4578 @t4599 @t22 @t3651 @t3654 @t85 @t4596 @t4597 @t2273 @t3633 @t3637 @t609 @t4593 @t4614 @t21 @t3636 @t3639 @t86 @t4611 @t4612 @t2299 @t3618 @t3622 @t583 @t4608 @t4629 @t20 @t3621 @t3624 @t87 @t4626 @t4627 @t2325 @t3603 @t3607 @t557 @t4623 @t4644 @t19 @t3606 @t3609 @t88 @t4641 @t4642 @t2351 @t3588 @t3592 @t531 @t4638 @t4659 @t18 @t3591 @t3594 @t89 @t4656 @t4657 @t2377 @t3573 @t3577 @t505 @t4653 @t4674 @t17 @t3576 @t3579 @t90 @t4671 @t4672 @t2403 @t3558 @t3562 @t479 @t4668 @t4689 @t16 @t3561 @t3564 @t91 @t4686 @t4687 @t2429 @t3543 @t3547 @t453 @t4683 @t4704 @t15 @t3546 @t3549 @t92 @t4701 @t4702 @t2455 @t3528 @t3532 @t427 @t4698 @t4719 @t14 @t3531 @t3534 @t93 @t4716 @t4717 @t2481 @t3513 @t3517 @t401 @t4713 @t4734 @t13 @t3516 @t3519 @t94 @t4731 @t4732 @t2507 @t3498 @t3502 @t375 @t4728 @t4749 @t12 @t3501 @t3504 @t95 @t4746 @t4747 @t2533 @t3483 @t3487 @t349 @t4743 @t4764 @t11 @t3486 @t3489 @t96 @t4761 @t4762 @t2559 @t3468 @t3472 @t323 @t4758 @t4779 @t10 @t3471 @t3474 @t97 @t4776 @t4777 @t2585 @t3453 @t3457 @t297 @t4773 @t4794 @t9 @t3456 @t3459 @t98 @t4791 @t4792 @t2611 @t3441 @t3444 @t276 @t4788 @t4789 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6205 @t220) % 40.01/40.21 (step @p5791 :rule instantiate :premises (@p110) :args (@t4795)) % 40.01/40.21 (step-pop @p6206 :rule scope :premises (@p5791)) % 40.01/40.21 (step @p5792 :rule process_scope :premises (@p6206) :args (@t4798)) % 40.01/40.21 (step @p5794 :rule implies_elim :premises (@p5792)) % 40.01/40.21 (step @p5795 :rule cnf_or_pos :args (@t4798)) % 40.01/40.21 (step @p5796 :rule reordering :premises (@p5795) :args ((or @t4797 @t4796 (not @t4798)))) % 40.01/40.21 (step @p5797 :rule instantiate :premises (@p112) :args (@t4799)) % 40.01/40.21 (step @p5798 :rule cnf_or_pos :args (@t4800)) % 40.01/40.21 (step @p5799 :rule reordering :premises (@p5798) :args ((or @t4797 @t244 @t2639 (not @t4800)))) % 40.01/40.21 (step @p5800 :rule instantiate :premises (@p108) :args (@t4795)) % 40.01/40.21 (step @p5801 :rule cnf_or_pos :args (@t4802)) % 40.01/40.21 (step @p5802 :rule reordering :premises (@p5801) :args ((or @t2650 @t265 @t264 @t4801 (not @t4802)))) % 40.01/40.21 (step @p5803 :rule chain_m_resolution :premises (@p5802 @p5800 @p2815 @p2813 @p136 @p134 @p5799 @p5797 @p133 @p131 @p130 @p128 @p127 @p125 @p5796 @p5794 @p110) :args ((or @t4797 @t239) @t267 (@list @t4802 @t2650 @t2652 @t248 @t249 @t2639 @t4800 @t245 @t247 @t242 @t243 @t240 @t241 @t4796 @t4798 @t220))) % 40.01/40.21 (step @p5804 :rule instantiate :premises (@p119) :args (@t4799)) % 40.01/40.21 (step @p5805 :rule cnf_or_pos :args (@t4804)) % 40.01/40.21 (step @p5806 :rule reordering :premises (@p5805) :args ((or @t270 @t4797 @t4803 @t3440 (not @t4804)))) % 40.01/40.21 (step @p5807 :rule instantiate :premises (@p120) :args (@t2636)) % 40.01/40.21 (step @p5808 :rule cnf_or_pos :args (@t4807)) % 40.01/40.21 (step @p5809 :rule reordering :premises (@p5808) :args ((or @t4806 @t4805 @t2637 (not @t4807)))) % 40.01/40.21 (step @p5810 :rule instantiate :premises (@p121) :args (@t2635)) % 40.01/40.21 (step @p5811 :rule cnf_or_pos :args (@t4809)) % 40.01/40.21 (step @p5812 :rule reordering :premises (@p5811) :args ((or @t2645 @t4788 @t4808 (not @t4809)))) % 40.01/40.21 (step @p5813 :rule chain_m_resolution :premises (@p4732 @p4730 @p53 @p4729 @p4727 @p1521 @p4705 @p4703 @p1492 @p4756 @p4754 @p52 @p4708 @p4706 @p54 @p4753 @p4751 @p1550 @p4681 @p4679 @p1463 @p4780 @p4778 @p51 @p4684 @p4682 @p55 @p4777 @p4775 @p1579 @p4657 @p4655 @p1434 @p4804 @p4802 @p50 @p4660 @p4658 @p56 @p4801 @p4799 @p1608 @p4633 @p4631 @p1405 @p4828 @p4826 @p49 @p4636 @p4634 @p57 @p4825 @p4823 @p1637 @p4609 @p4607 @p1376 @p4852 @p4850 @p48 @p4612 @p4610 @p58 @p4849 @p4847 @p1666 @p4585 @p4583 @p1347 @p4876 @p4874 @p47 @p4588 @p4586 @p59 @p4873 @p4871 @p1695 @p4561 @p4559 @p1318 @p4900 @p4898 @p46 @p4564 @p4562 @p60 @p4897 @p4895 @p1724 @p4537 @p4535 @p1289 @p4924 @p4922 @p45 @p4540 @p4538 @p61 @p4921 @p4919 @p1753 @p4513 @p4511 @p1260 @p4948 @p4946 @p44 @p4516 @p4514 @p62 @p4945 @p4943 @p1782 @p4489 @p4487 @p1231 @p4972 @p4970 @p43 @p4492 @p4490 @p63 @p4969 @p4967 @p1811 @p4465 @p4463 @p1202 @p4996 @p4994 @p42 @p4468 @p4466 @p64 @p4993 @p4991 @p1840 @p4441 @p4439 @p1173 @p5020 @p5018 @p41 @p4444 @p4442 @p65 @p5017 @p5015 @p1869 @p4417 @p4415 @p1144 @p5044 @p5042 @p40 @p4420 @p4418 @p66 @p5041 @p5039 @p1898 @p4393 @p4391 @p1115 @p5068 @p5066 @p39 @p4396 @p4394 @p67 @p5065 @p5063 @p1927 @p4369 @p4367 @p1086 @p5092 @p5090 @p38 @p4372 @p4370 @p68 @p5089 @p5087 @p1956 @p4345 @p4343 @p1057 @p5116 @p5114 @p37 @p4348 @p4346 @p69 @p5113 @p5111 @p1985 @p4321 @p4319 @p1028 @p5140 @p5138 @p36 @p4324 @p4322 @p70 @p5137 @p5135 @p2014 @p4297 @p4295 @p999 @p5164 @p5162 @p35 @p4300 @p4298 @p71 @p5161 @p5159 @p2043 @p4273 @p4271 @p970 @p5188 @p5186 @p34 @p4276 @p4274 @p72 @p5185 @p5183 @p2072 @p4249 @p4247 @p941 @p5212 @p5210 @p33 @p4252 @p4250 @p73 @p5209 @p5207 @p2101 @p4225 @p4223 @p912 @p5236 @p5234 @p32 @p4228 @p4226 @p74 @p5233 @p5231 @p2130 @p4201 @p4199 @p883 @p5260 @p5258 @p31 @p4204 @p4202 @p75 @p5257 @p5255 @p2159 @p4177 @p4175 @p854 @p5284 @p5282 @p30 @p4180 @p4178 @p76 @p5281 @p5279 @p2188 @p4153 @p4151 @p825 @p5308 @p5306 @p29 @p4156 @p4154 @p77 @p5305 @p5303 @p2217 @p4129 @p4127 @p796 @p5332 @p5330 @p28 @p4132 @p4130 @p78 @p5329 @p5327 @p2246 @p4105 @p4103 @p767 @p5356 @p5354 @p27 @p4108 @p4106 @p79 @p5353 @p5351 @p2275 @p4081 @p4079 @p738 @p5380 @p5378 @p26 @p4084 @p4082 @p80 @p5377 @p5375 @p2304 @p4057 @p4055 @p709 @p5404 @p5402 @p25 @p4060 @p4058 @p81 @p5401 @p5399 @p2333 @p4033 @p4031 @p680 @p5428 @p5426 @p24 @p4036 @p4034 @p82 @p5425 @p5423 @p2362 @p4009 @p4007 @p651 @p5452 @p5450 @p23 @p4012 @p4010 @p83 @p5449 @p5447 @p2391 @p3985 @p3983 @p622 @p5476 @p5474 @p22 @p3988 @p3986 @p84 @p5473 @p5471 @p2420 @p3961 @p3959 @p593 @p5500 @p5498 @p21 @p3964 @p3962 @p85 @p5497 @p5495 @p2449 @p3937 @p3935 @p564 @p5524 @p5522 @p20 @p3940 @p3938 @p86 @p5521 @p5519 @p2478 @p3913 @p3911 @p535 @p5548 @p5546 @p19 @p3916 @p3914 @p87 @p5545 @p5543 @p2507 @p3889 @p3887 @p506 @p5572 @p5570 @p18 @p3892 @p3890 @p88 @p5569 @p5567 @p2536 @p3865 @p3863 @p477 @p5596 @p5594 @p17 @p3868 @p3866 @p89 @p5593 @p5591 @p2565 @p3841 @p3839 @p448 @p5620 @p5618 @p16 @p3844 @p3842 @p90 @p5617 @p5615 @p2594 @p3817 @p3815 @p419 @p5644 @p5642 @p15 @p3820 @p3818 @p91 @p5641 @p5639 @p2623 @p3793 @p3791 @p390 @p5668 @p5666 @p14 @p3796 @p3794 @p92 @p5665 @p5663 @p2652 @p3769 @p3767 @p361 @p5692 @p5690 @p13 @p3772 @p3770 @p93 @p5689 @p5687 @p2681 @p3745 @p3743 @p332 @p5716 @p5714 @p12 @p3748 @p3746 @p94 @p5713 @p5711 @p2710 @p3721 @p3719 @p303 @p5740 @p5738 @p11 @p3724 @p3722 @p95 @p5737 @p5735 @p2739 @p3697 @p3695 @p274 @p5764 @p5762 @p10 @p3700 @p3698 @p96 @p5761 @p5759 @p2768 @p3673 @p3671 @p245 @p5788 @p5786 @p9 @p3676 @p3674 @p97 @p5785 @p5783 @p2797 @p3649 @p3647 @p216 @p5812 @p5810 @p8 @p3652 @p3650 @p98 @p5809 @p5807 @p2826 @p3628 @p3626 @p187 @p5806 @p5804 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5803) :args (@t4797 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4134 @t53 @t4131 @t4132 @t1467 @t4113 @t4117 @t1441 @t4128 @t4149 @t52 @t4116 @t4119 @t54 @t4146 @t4147 @t1493 @t4098 @t4102 @t1415 @t4143 @t4164 @t51 @t4101 @t4104 @t55 @t4161 @t4162 @t1519 @t4083 @t4087 @t1389 @t4158 @t4179 @t50 @t4086 @t4089 @t56 @t4176 @t4177 @t1545 @t4068 @t4072 @t1363 @t4173 @t4194 @t49 @t4071 @t4074 @t57 @t4191 @t4192 @t1571 @t4053 @t4057 @t1337 @t4188 @t4209 @t48 @t4056 @t4059 @t58 @t4206 @t4207 @t1597 @t4038 @t4042 @t1311 @t4203 @t4224 @t47 @t4041 @t4044 @t59 @t4221 @t4222 @t1623 @t4023 @t4027 @t1285 @t4218 @t4239 @t46 @t4026 @t4029 @t60 @t4236 @t4237 @t1649 @t4008 @t4012 @t1259 @t4233 @t4254 @t45 @t4011 @t4014 @t61 @t4251 @t4252 @t1675 @t3993 @t3997 @t1233 @t4248 @t4269 @t44 @t3996 @t3999 @t62 @t4266 @t4267 @t1701 @t3978 @t3982 @t1207 @t4263 @t4284 @t43 @t3981 @t3984 @t63 @t4281 @t4282 @t1727 @t3963 @t3967 @t1181 @t4278 @t4299 @t42 @t3966 @t3969 @t64 @t4296 @t4297 @t1753 @t3948 @t3952 @t1155 @t4293 @t4314 @t41 @t3951 @t3954 @t65 @t4311 @t4312 @t1779 @t3933 @t3937 @t1129 @t4308 @t4329 @t40 @t3936 @t3939 @t66 @t4326 @t4327 @t1805 @t3918 @t3922 @t1103 @t4323 @t4344 @t39 @t3921 @t3924 @t67 @t4341 @t4342 @t1831 @t3903 @t3907 @t1077 @t4338 @t4359 @t38 @t3906 @t3909 @t68 @t4356 @t4357 @t1857 @t3888 @t3892 @t1051 @t4353 @t4374 @t37 @t3891 @t3894 @t69 @t4371 @t4372 @t1883 @t3873 @t3877 @t1025 @t4368 @t4389 @t36 @t3876 @t3879 @t70 @t4386 @t4387 @t1909 @t3858 @t3862 @t999 @t4383 @t4404 @t35 @t3861 @t3864 @t71 @t4401 @t4402 @t1935 @t3843 @t3847 @t973 @t4398 @t4419 @t34 @t3846 @t3849 @t72 @t4416 @t4417 @t1961 @t3828 @t3832 @t947 @t4413 @t4434 @t33 @t3831 @t3834 @t73 @t4431 @t4432 @t1987 @t3813 @t3817 @t921 @t4428 @t4449 @t32 @t3816 @t3819 @t74 @t4446 @t4447 @t2013 @t3798 @t3802 @t895 @t4443 @t4464 @t31 @t3801 @t3804 @t75 @t4461 @t4462 @t2039 @t3783 @t3787 @t869 @t4458 @t4479 @t30 @t3786 @t3789 @t76 @t4476 @t4477 @t2065 @t3768 @t3772 @t843 @t4473 @t4494 @t29 @t3771 @t3774 @t77 @t4491 @t4492 @t2091 @t3753 @t3757 @t817 @t4488 @t4509 @t28 @t3756 @t3759 @t78 @t4506 @t4507 @t2117 @t3738 @t3742 @t791 @t4503 @t4524 @t27 @t3741 @t3744 @t79 @t4521 @t4522 @t2143 @t3723 @t3727 @t765 @t4518 @t4539 @t26 @t3726 @t3729 @t80 @t4536 @t4537 @t2169 @t3708 @t3712 @t739 @t4533 @t4554 @t25 @t3711 @t3714 @t81 @t4551 @t4552 @t2195 @t3693 @t3697 @t713 @t4548 @t4569 @t24 @t3696 @t3699 @t82 @t4566 @t4567 @t2221 @t3678 @t3682 @t687 @t4563 @t4584 @t23 @t3681 @t3684 @t83 @t4581 @t4582 @t2247 @t3663 @t3667 @t661 @t4578 @t4599 @t22 @t3666 @t3669 @t84 @t4596 @t4597 @t2273 @t3648 @t3652 @t635 @t4593 @t4614 @t21 @t3651 @t3654 @t85 @t4611 @t4612 @t2299 @t3633 @t3637 @t609 @t4608 @t4629 @t20 @t3636 @t3639 @t86 @t4626 @t4627 @t2325 @t3618 @t3622 @t583 @t4623 @t4644 @t19 @t3621 @t3624 @t87 @t4641 @t4642 @t2351 @t3603 @t3607 @t557 @t4638 @t4659 @t18 @t3606 @t3609 @t88 @t4656 @t4657 @t2377 @t3588 @t3592 @t531 @t4653 @t4674 @t17 @t3591 @t3594 @t89 @t4671 @t4672 @t2403 @t3573 @t3577 @t505 @t4668 @t4689 @t16 @t3576 @t3579 @t90 @t4686 @t4687 @t2429 @t3558 @t3562 @t479 @t4683 @t4704 @t15 @t3561 @t3564 @t91 @t4701 @t4702 @t2455 @t3543 @t3547 @t453 @t4698 @t4719 @t14 @t3546 @t3549 @t92 @t4716 @t4717 @t2481 @t3528 @t3532 @t427 @t4713 @t4734 @t13 @t3531 @t3534 @t93 @t4731 @t4732 @t2507 @t3513 @t3517 @t401 @t4728 @t4749 @t12 @t3516 @t3519 @t94 @t4746 @t4747 @t2533 @t3498 @t3502 @t375 @t4743 @t4764 @t11 @t3501 @t3504 @t95 @t4761 @t4762 @t2559 @t3483 @t3487 @t349 @t4758 @t4779 @t10 @t3486 @t3489 @t96 @t4776 @t4777 @t2585 @t3468 @t3472 @t323 @t4773 @t4794 @t9 @t3471 @t3474 @t97 @t4791 @t4792 @t2611 @t3453 @t3457 @t297 @t4788 @t4809 @t8 @t3456 @t3459 @t98 @t4806 @t4807 @t2637 @t3441 @t3444 @t276 @t4803 @t4804 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6207 @t220) % 40.01/40.21 (step @p5815 :rule instantiate :premises (@p110) :args (@t4810)) % 40.01/40.21 (step-pop @p6208 :rule scope :premises (@p5815)) % 40.01/40.21 (step @p5816 :rule process_scope :premises (@p6208) :args (@t4813)) % 40.01/40.21 (step @p5818 :rule implies_elim :premises (@p5816)) % 40.01/40.21 (step @p5819 :rule cnf_or_pos :args (@t4813)) % 40.01/40.21 (step @p5820 :rule reordering :premises (@p5819) :args ((or @t4812 @t4811 (not @t4813)))) % 40.01/40.21 (step @p5821 :rule instantiate :premises (@p112) :args (@t4814)) % 40.01/40.21 (step @p5822 :rule cnf_or_pos :args (@t4815)) % 40.01/40.21 (step @p5823 :rule reordering :premises (@p5822) :args ((or @t4812 @t244 @t2665 (not @t4815)))) % 40.01/40.21 (step @p5824 :rule instantiate :premises (@p108) :args (@t4810)) % 40.01/40.21 (step @p5825 :rule cnf_or_pos :args (@t4817)) % 40.01/40.21 (step @p5826 :rule reordering :premises (@p5825) :args ((or @t2676 @t265 @t264 @t4816 (not @t4817)))) % 40.01/40.21 (step @p5827 :rule chain_m_resolution :premises (@p5826 @p5824 @p2844 @p2842 @p136 @p134 @p5823 @p5821 @p133 @p131 @p130 @p128 @p127 @p125 @p5820 @p5818 @p110) :args ((or @t4812 @t239) @t267 (@list @t4817 @t2676 @t2678 @t248 @t249 @t2665 @t4815 @t245 @t247 @t242 @t243 @t240 @t241 @t4811 @t4813 @t220))) % 40.01/40.21 (step @p5828 :rule instantiate :premises (@p119) :args (@t4814)) % 40.01/40.21 (step @p5829 :rule cnf_or_pos :args (@t4819)) % 40.01/40.21 (step @p5830 :rule reordering :premises (@p5829) :args ((or @t270 @t4812 @t4818 @t3440 (not @t4819)))) % 40.01/40.21 (step @p5831 :rule instantiate :premises (@p120) :args (@t2662)) % 40.01/40.21 (step @p5832 :rule cnf_or_pos :args (@t4822)) % 40.01/40.21 (step @p5833 :rule reordering :premises (@p5832) :args ((or @t4821 @t4820 @t2663 (not @t4822)))) % 40.01/40.21 (step @p5834 :rule instantiate :premises (@p121) :args (@t2661)) % 40.01/40.21 (step @p5835 :rule cnf_or_pos :args (@t4824)) % 40.01/40.21 (step @p5836 :rule reordering :premises (@p5835) :args ((or @t2671 @t4803 @t4823 (not @t4824)))) % 40.01/40.21 (step @p5837 :rule chain_m_resolution :premises (@p4729 @p4727 @p1521 @p4756 @p4754 @p52 @p4732 @p4730 @p53 @p4753 @p4751 @p1550 @p4705 @p4703 @p1492 @p4780 @p4778 @p51 @p4708 @p4706 @p54 @p4777 @p4775 @p1579 @p4681 @p4679 @p1463 @p4804 @p4802 @p50 @p4684 @p4682 @p55 @p4801 @p4799 @p1608 @p4657 @p4655 @p1434 @p4828 @p4826 @p49 @p4660 @p4658 @p56 @p4825 @p4823 @p1637 @p4633 @p4631 @p1405 @p4852 @p4850 @p48 @p4636 @p4634 @p57 @p4849 @p4847 @p1666 @p4609 @p4607 @p1376 @p4876 @p4874 @p47 @p4612 @p4610 @p58 @p4873 @p4871 @p1695 @p4585 @p4583 @p1347 @p4900 @p4898 @p46 @p4588 @p4586 @p59 @p4897 @p4895 @p1724 @p4561 @p4559 @p1318 @p4924 @p4922 @p45 @p4564 @p4562 @p60 @p4921 @p4919 @p1753 @p4537 @p4535 @p1289 @p4948 @p4946 @p44 @p4540 @p4538 @p61 @p4945 @p4943 @p1782 @p4513 @p4511 @p1260 @p4972 @p4970 @p43 @p4516 @p4514 @p62 @p4969 @p4967 @p1811 @p4489 @p4487 @p1231 @p4996 @p4994 @p42 @p4492 @p4490 @p63 @p4993 @p4991 @p1840 @p4465 @p4463 @p1202 @p5020 @p5018 @p41 @p4468 @p4466 @p64 @p5017 @p5015 @p1869 @p4441 @p4439 @p1173 @p5044 @p5042 @p40 @p4444 @p4442 @p65 @p5041 @p5039 @p1898 @p4417 @p4415 @p1144 @p5068 @p5066 @p39 @p4420 @p4418 @p66 @p5065 @p5063 @p1927 @p4393 @p4391 @p1115 @p5092 @p5090 @p38 @p4396 @p4394 @p67 @p5089 @p5087 @p1956 @p4369 @p4367 @p1086 @p5116 @p5114 @p37 @p4372 @p4370 @p68 @p5113 @p5111 @p1985 @p4345 @p4343 @p1057 @p5140 @p5138 @p36 @p4348 @p4346 @p69 @p5137 @p5135 @p2014 @p4321 @p4319 @p1028 @p5164 @p5162 @p35 @p4324 @p4322 @p70 @p5161 @p5159 @p2043 @p4297 @p4295 @p999 @p5188 @p5186 @p34 @p4300 @p4298 @p71 @p5185 @p5183 @p2072 @p4273 @p4271 @p970 @p5212 @p5210 @p33 @p4276 @p4274 @p72 @p5209 @p5207 @p2101 @p4249 @p4247 @p941 @p5236 @p5234 @p32 @p4252 @p4250 @p73 @p5233 @p5231 @p2130 @p4225 @p4223 @p912 @p5260 @p5258 @p31 @p4228 @p4226 @p74 @p5257 @p5255 @p2159 @p4201 @p4199 @p883 @p5284 @p5282 @p30 @p4204 @p4202 @p75 @p5281 @p5279 @p2188 @p4177 @p4175 @p854 @p5308 @p5306 @p29 @p4180 @p4178 @p76 @p5305 @p5303 @p2217 @p4153 @p4151 @p825 @p5332 @p5330 @p28 @p4156 @p4154 @p77 @p5329 @p5327 @p2246 @p4129 @p4127 @p796 @p5356 @p5354 @p27 @p4132 @p4130 @p78 @p5353 @p5351 @p2275 @p4105 @p4103 @p767 @p5380 @p5378 @p26 @p4108 @p4106 @p79 @p5377 @p5375 @p2304 @p4081 @p4079 @p738 @p5404 @p5402 @p25 @p4084 @p4082 @p80 @p5401 @p5399 @p2333 @p4057 @p4055 @p709 @p5428 @p5426 @p24 @p4060 @p4058 @p81 @p5425 @p5423 @p2362 @p4033 @p4031 @p680 @p5452 @p5450 @p23 @p4036 @p4034 @p82 @p5449 @p5447 @p2391 @p4009 @p4007 @p651 @p5476 @p5474 @p22 @p4012 @p4010 @p83 @p5473 @p5471 @p2420 @p3985 @p3983 @p622 @p5500 @p5498 @p21 @p3988 @p3986 @p84 @p5497 @p5495 @p2449 @p3961 @p3959 @p593 @p5524 @p5522 @p20 @p3964 @p3962 @p85 @p5521 @p5519 @p2478 @p3937 @p3935 @p564 @p5548 @p5546 @p19 @p3940 @p3938 @p86 @p5545 @p5543 @p2507 @p3913 @p3911 @p535 @p5572 @p5570 @p18 @p3916 @p3914 @p87 @p5569 @p5567 @p2536 @p3889 @p3887 @p506 @p5596 @p5594 @p17 @p3892 @p3890 @p88 @p5593 @p5591 @p2565 @p3865 @p3863 @p477 @p5620 @p5618 @p16 @p3868 @p3866 @p89 @p5617 @p5615 @p2594 @p3841 @p3839 @p448 @p5644 @p5642 @p15 @p3844 @p3842 @p90 @p5641 @p5639 @p2623 @p3817 @p3815 @p419 @p5668 @p5666 @p14 @p3820 @p3818 @p91 @p5665 @p5663 @p2652 @p3793 @p3791 @p390 @p5692 @p5690 @p13 @p3796 @p3794 @p92 @p5689 @p5687 @p2681 @p3769 @p3767 @p361 @p5716 @p5714 @p12 @p3772 @p3770 @p93 @p5713 @p5711 @p2710 @p3745 @p3743 @p332 @p5740 @p5738 @p11 @p3748 @p3746 @p94 @p5737 @p5735 @p2739 @p3721 @p3719 @p303 @p5764 @p5762 @p10 @p3724 @p3722 @p95 @p5761 @p5759 @p2768 @p3697 @p3695 @p274 @p5788 @p5786 @p9 @p3700 @p3698 @p96 @p5785 @p5783 @p2797 @p3673 @p3671 @p245 @p5812 @p5810 @p8 @p3676 @p3674 @p97 @p5809 @p5807 @p2826 @p3649 @p3647 @p216 @p5836 @p5834 @p7 @p3652 @p3650 @p98 @p5833 @p5831 @p2855 @p3628 @p3626 @p187 @p5830 @p5828 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5827) :args (@t4812 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4132 @t1467 @t4128 @t4149 @t52 @t4131 @t4134 @t53 @t4146 @t4147 @t1493 @t4113 @t4117 @t1441 @t4143 @t4164 @t51 @t4116 @t4119 @t54 @t4161 @t4162 @t1519 @t4098 @t4102 @t1415 @t4158 @t4179 @t50 @t4101 @t4104 @t55 @t4176 @t4177 @t1545 @t4083 @t4087 @t1389 @t4173 @t4194 @t49 @t4086 @t4089 @t56 @t4191 @t4192 @t1571 @t4068 @t4072 @t1363 @t4188 @t4209 @t48 @t4071 @t4074 @t57 @t4206 @t4207 @t1597 @t4053 @t4057 @t1337 @t4203 @t4224 @t47 @t4056 @t4059 @t58 @t4221 @t4222 @t1623 @t4038 @t4042 @t1311 @t4218 @t4239 @t46 @t4041 @t4044 @t59 @t4236 @t4237 @t1649 @t4023 @t4027 @t1285 @t4233 @t4254 @t45 @t4026 @t4029 @t60 @t4251 @t4252 @t1675 @t4008 @t4012 @t1259 @t4248 @t4269 @t44 @t4011 @t4014 @t61 @t4266 @t4267 @t1701 @t3993 @t3997 @t1233 @t4263 @t4284 @t43 @t3996 @t3999 @t62 @t4281 @t4282 @t1727 @t3978 @t3982 @t1207 @t4278 @t4299 @t42 @t3981 @t3984 @t63 @t4296 @t4297 @t1753 @t3963 @t3967 @t1181 @t4293 @t4314 @t41 @t3966 @t3969 @t64 @t4311 @t4312 @t1779 @t3948 @t3952 @t1155 @t4308 @t4329 @t40 @t3951 @t3954 @t65 @t4326 @t4327 @t1805 @t3933 @t3937 @t1129 @t4323 @t4344 @t39 @t3936 @t3939 @t66 @t4341 @t4342 @t1831 @t3918 @t3922 @t1103 @t4338 @t4359 @t38 @t3921 @t3924 @t67 @t4356 @t4357 @t1857 @t3903 @t3907 @t1077 @t4353 @t4374 @t37 @t3906 @t3909 @t68 @t4371 @t4372 @t1883 @t3888 @t3892 @t1051 @t4368 @t4389 @t36 @t3891 @t3894 @t69 @t4386 @t4387 @t1909 @t3873 @t3877 @t1025 @t4383 @t4404 @t35 @t3876 @t3879 @t70 @t4401 @t4402 @t1935 @t3858 @t3862 @t999 @t4398 @t4419 @t34 @t3861 @t3864 @t71 @t4416 @t4417 @t1961 @t3843 @t3847 @t973 @t4413 @t4434 @t33 @t3846 @t3849 @t72 @t4431 @t4432 @t1987 @t3828 @t3832 @t947 @t4428 @t4449 @t32 @t3831 @t3834 @t73 @t4446 @t4447 @t2013 @t3813 @t3817 @t921 @t4443 @t4464 @t31 @t3816 @t3819 @t74 @t4461 @t4462 @t2039 @t3798 @t3802 @t895 @t4458 @t4479 @t30 @t3801 @t3804 @t75 @t4476 @t4477 @t2065 @t3783 @t3787 @t869 @t4473 @t4494 @t29 @t3786 @t3789 @t76 @t4491 @t4492 @t2091 @t3768 @t3772 @t843 @t4488 @t4509 @t28 @t3771 @t3774 @t77 @t4506 @t4507 @t2117 @t3753 @t3757 @t817 @t4503 @t4524 @t27 @t3756 @t3759 @t78 @t4521 @t4522 @t2143 @t3738 @t3742 @t791 @t4518 @t4539 @t26 @t3741 @t3744 @t79 @t4536 @t4537 @t2169 @t3723 @t3727 @t765 @t4533 @t4554 @t25 @t3726 @t3729 @t80 @t4551 @t4552 @t2195 @t3708 @t3712 @t739 @t4548 @t4569 @t24 @t3711 @t3714 @t81 @t4566 @t4567 @t2221 @t3693 @t3697 @t713 @t4563 @t4584 @t23 @t3696 @t3699 @t82 @t4581 @t4582 @t2247 @t3678 @t3682 @t687 @t4578 @t4599 @t22 @t3681 @t3684 @t83 @t4596 @t4597 @t2273 @t3663 @t3667 @t661 @t4593 @t4614 @t21 @t3666 @t3669 @t84 @t4611 @t4612 @t2299 @t3648 @t3652 @t635 @t4608 @t4629 @t20 @t3651 @t3654 @t85 @t4626 @t4627 @t2325 @t3633 @t3637 @t609 @t4623 @t4644 @t19 @t3636 @t3639 @t86 @t4641 @t4642 @t2351 @t3618 @t3622 @t583 @t4638 @t4659 @t18 @t3621 @t3624 @t87 @t4656 @t4657 @t2377 @t3603 @t3607 @t557 @t4653 @t4674 @t17 @t3606 @t3609 @t88 @t4671 @t4672 @t2403 @t3588 @t3592 @t531 @t4668 @t4689 @t16 @t3591 @t3594 @t89 @t4686 @t4687 @t2429 @t3573 @t3577 @t505 @t4683 @t4704 @t15 @t3576 @t3579 @t90 @t4701 @t4702 @t2455 @t3558 @t3562 @t479 @t4698 @t4719 @t14 @t3561 @t3564 @t91 @t4716 @t4717 @t2481 @t3543 @t3547 @t453 @t4713 @t4734 @t13 @t3546 @t3549 @t92 @t4731 @t4732 @t2507 @t3528 @t3532 @t427 @t4728 @t4749 @t12 @t3531 @t3534 @t93 @t4746 @t4747 @t2533 @t3513 @t3517 @t401 @t4743 @t4764 @t11 @t3516 @t3519 @t94 @t4761 @t4762 @t2559 @t3498 @t3502 @t375 @t4758 @t4779 @t10 @t3501 @t3504 @t95 @t4776 @t4777 @t2585 @t3483 @t3487 @t349 @t4773 @t4794 @t9 @t3486 @t3489 @t96 @t4791 @t4792 @t2611 @t3468 @t3472 @t323 @t4788 @t4809 @t8 @t3471 @t3474 @t97 @t4806 @t4807 @t2637 @t3453 @t3457 @t297 @t4803 @t4824 @t7 @t3456 @t3459 @t98 @t4821 @t4822 @t2663 @t3441 @t3444 @t276 @t4818 @t4819 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6209 @t220) % 40.01/40.21 (step @p5839 :rule instantiate :premises (@p110) :args (@t4825)) % 40.01/40.21 (step-pop @p6210 :rule scope :premises (@p5839)) % 40.01/40.21 (step @p5840 :rule process_scope :premises (@p6210) :args (@t4828)) % 40.01/40.21 (step @p5842 :rule implies_elim :premises (@p5840)) % 40.01/40.21 (step @p5843 :rule cnf_or_pos :args (@t4828)) % 40.01/40.21 (step @p5844 :rule reordering :premises (@p5843) :args ((or @t4827 @t4826 (not @t4828)))) % 40.01/40.21 (step @p5845 :rule instantiate :premises (@p112) :args (@t4829)) % 40.01/40.21 (step @p5846 :rule cnf_or_pos :args (@t4830)) % 40.01/40.21 (step @p5847 :rule reordering :premises (@p5846) :args ((or @t4827 @t244 @t2691 (not @t4830)))) % 40.01/40.21 (step @p5848 :rule instantiate :premises (@p108) :args (@t4825)) % 40.01/40.21 (step @p5849 :rule cnf_or_pos :args (@t4832)) % 40.01/40.21 (step @p5850 :rule reordering :premises (@p5849) :args ((or @t2702 @t265 @t264 @t4831 (not @t4832)))) % 40.01/40.21 (step @p5851 :rule chain_m_resolution :premises (@p5850 @p5848 @p2873 @p2871 @p136 @p134 @p5847 @p5845 @p133 @p131 @p130 @p128 @p127 @p125 @p5844 @p5842 @p110) :args ((or @t4827 @t239) @t267 (@list @t4832 @t2702 @t2704 @t248 @t249 @t2691 @t4830 @t245 @t247 @t242 @t243 @t240 @t241 @t4826 @t4828 @t220))) % 40.01/40.21 (step @p5852 :rule instantiate :premises (@p119) :args (@t4829)) % 40.01/40.21 (step @p5853 :rule cnf_or_pos :args (@t4834)) % 40.01/40.21 (step @p5854 :rule reordering :premises (@p5853) :args ((or @t270 @t4827 @t4833 @t3440 (not @t4834)))) % 40.01/40.21 (step @p5855 :rule instantiate :premises (@p120) :args (@t2688)) % 40.01/40.21 (step @p5856 :rule cnf_or_pos :args (@t4837)) % 40.01/40.21 (step @p5857 :rule reordering :premises (@p5856) :args ((or @t4836 @t4835 @t2689 (not @t4837)))) % 40.01/40.21 (step @p5858 :rule instantiate :premises (@p121) :args (@t2687)) % 40.01/40.21 (step @p5859 :rule cnf_or_pos :args (@t4839)) % 40.01/40.21 (step @p5860 :rule reordering :premises (@p5859) :args ((or @t2697 @t4818 @t4838 (not @t4839)))) % 40.01/40.21 (step @p5861 :rule chain_m_resolution :premises (@p4756 @p4754 @p52 @p4753 @p4751 @p1550 @p4729 @p4727 @p1521 @p4780 @p4778 @p51 @p4732 @p4730 @p53 @p4777 @p4775 @p1579 @p4705 @p4703 @p1492 @p4804 @p4802 @p50 @p4708 @p4706 @p54 @p4801 @p4799 @p1608 @p4681 @p4679 @p1463 @p4828 @p4826 @p49 @p4684 @p4682 @p55 @p4825 @p4823 @p1637 @p4657 @p4655 @p1434 @p4852 @p4850 @p48 @p4660 @p4658 @p56 @p4849 @p4847 @p1666 @p4633 @p4631 @p1405 @p4876 @p4874 @p47 @p4636 @p4634 @p57 @p4873 @p4871 @p1695 @p4609 @p4607 @p1376 @p4900 @p4898 @p46 @p4612 @p4610 @p58 @p4897 @p4895 @p1724 @p4585 @p4583 @p1347 @p4924 @p4922 @p45 @p4588 @p4586 @p59 @p4921 @p4919 @p1753 @p4561 @p4559 @p1318 @p4948 @p4946 @p44 @p4564 @p4562 @p60 @p4945 @p4943 @p1782 @p4537 @p4535 @p1289 @p4972 @p4970 @p43 @p4540 @p4538 @p61 @p4969 @p4967 @p1811 @p4513 @p4511 @p1260 @p4996 @p4994 @p42 @p4516 @p4514 @p62 @p4993 @p4991 @p1840 @p4489 @p4487 @p1231 @p5020 @p5018 @p41 @p4492 @p4490 @p63 @p5017 @p5015 @p1869 @p4465 @p4463 @p1202 @p5044 @p5042 @p40 @p4468 @p4466 @p64 @p5041 @p5039 @p1898 @p4441 @p4439 @p1173 @p5068 @p5066 @p39 @p4444 @p4442 @p65 @p5065 @p5063 @p1927 @p4417 @p4415 @p1144 @p5092 @p5090 @p38 @p4420 @p4418 @p66 @p5089 @p5087 @p1956 @p4393 @p4391 @p1115 @p5116 @p5114 @p37 @p4396 @p4394 @p67 @p5113 @p5111 @p1985 @p4369 @p4367 @p1086 @p5140 @p5138 @p36 @p4372 @p4370 @p68 @p5137 @p5135 @p2014 @p4345 @p4343 @p1057 @p5164 @p5162 @p35 @p4348 @p4346 @p69 @p5161 @p5159 @p2043 @p4321 @p4319 @p1028 @p5188 @p5186 @p34 @p4324 @p4322 @p70 @p5185 @p5183 @p2072 @p4297 @p4295 @p999 @p5212 @p5210 @p33 @p4300 @p4298 @p71 @p5209 @p5207 @p2101 @p4273 @p4271 @p970 @p5236 @p5234 @p32 @p4276 @p4274 @p72 @p5233 @p5231 @p2130 @p4249 @p4247 @p941 @p5260 @p5258 @p31 @p4252 @p4250 @p73 @p5257 @p5255 @p2159 @p4225 @p4223 @p912 @p5284 @p5282 @p30 @p4228 @p4226 @p74 @p5281 @p5279 @p2188 @p4201 @p4199 @p883 @p5308 @p5306 @p29 @p4204 @p4202 @p75 @p5305 @p5303 @p2217 @p4177 @p4175 @p854 @p5332 @p5330 @p28 @p4180 @p4178 @p76 @p5329 @p5327 @p2246 @p4153 @p4151 @p825 @p5356 @p5354 @p27 @p4156 @p4154 @p77 @p5353 @p5351 @p2275 @p4129 @p4127 @p796 @p5380 @p5378 @p26 @p4132 @p4130 @p78 @p5377 @p5375 @p2304 @p4105 @p4103 @p767 @p5404 @p5402 @p25 @p4108 @p4106 @p79 @p5401 @p5399 @p2333 @p4081 @p4079 @p738 @p5428 @p5426 @p24 @p4084 @p4082 @p80 @p5425 @p5423 @p2362 @p4057 @p4055 @p709 @p5452 @p5450 @p23 @p4060 @p4058 @p81 @p5449 @p5447 @p2391 @p4033 @p4031 @p680 @p5476 @p5474 @p22 @p4036 @p4034 @p82 @p5473 @p5471 @p2420 @p4009 @p4007 @p651 @p5500 @p5498 @p21 @p4012 @p4010 @p83 @p5497 @p5495 @p2449 @p3985 @p3983 @p622 @p5524 @p5522 @p20 @p3988 @p3986 @p84 @p5521 @p5519 @p2478 @p3961 @p3959 @p593 @p5548 @p5546 @p19 @p3964 @p3962 @p85 @p5545 @p5543 @p2507 @p3937 @p3935 @p564 @p5572 @p5570 @p18 @p3940 @p3938 @p86 @p5569 @p5567 @p2536 @p3913 @p3911 @p535 @p5596 @p5594 @p17 @p3916 @p3914 @p87 @p5593 @p5591 @p2565 @p3889 @p3887 @p506 @p5620 @p5618 @p16 @p3892 @p3890 @p88 @p5617 @p5615 @p2594 @p3865 @p3863 @p477 @p5644 @p5642 @p15 @p3868 @p3866 @p89 @p5641 @p5639 @p2623 @p3841 @p3839 @p448 @p5668 @p5666 @p14 @p3844 @p3842 @p90 @p5665 @p5663 @p2652 @p3817 @p3815 @p419 @p5692 @p5690 @p13 @p3820 @p3818 @p91 @p5689 @p5687 @p2681 @p3793 @p3791 @p390 @p5716 @p5714 @p12 @p3796 @p3794 @p92 @p5713 @p5711 @p2710 @p3769 @p3767 @p361 @p5740 @p5738 @p11 @p3772 @p3770 @p93 @p5737 @p5735 @p2739 @p3745 @p3743 @p332 @p5764 @p5762 @p10 @p3748 @p3746 @p94 @p5761 @p5759 @p2768 @p3721 @p3719 @p303 @p5788 @p5786 @p9 @p3724 @p3722 @p95 @p5785 @p5783 @p2797 @p3697 @p3695 @p274 @p5812 @p5810 @p8 @p3700 @p3698 @p96 @p5809 @p5807 @p2826 @p3673 @p3671 @p245 @p5836 @p5834 @p7 @p3676 @p3674 @p97 @p5833 @p5831 @p2855 @p3649 @p3647 @p216 @p5860 @p5858 @p6 @p3652 @p3650 @p98 @p5857 @p5855 @p2884 @p3628 @p3626 @p187 @p5854 @p5852 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5851) :args (@t4827 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4149 @t52 @t4146 @t4147 @t1493 @t4128 @t4132 @t1467 @t4143 @t4164 @t51 @t4131 @t4134 @t53 @t4161 @t4162 @t1519 @t4113 @t4117 @t1441 @t4158 @t4179 @t50 @t4116 @t4119 @t54 @t4176 @t4177 @t1545 @t4098 @t4102 @t1415 @t4173 @t4194 @t49 @t4101 @t4104 @t55 @t4191 @t4192 @t1571 @t4083 @t4087 @t1389 @t4188 @t4209 @t48 @t4086 @t4089 @t56 @t4206 @t4207 @t1597 @t4068 @t4072 @t1363 @t4203 @t4224 @t47 @t4071 @t4074 @t57 @t4221 @t4222 @t1623 @t4053 @t4057 @t1337 @t4218 @t4239 @t46 @t4056 @t4059 @t58 @t4236 @t4237 @t1649 @t4038 @t4042 @t1311 @t4233 @t4254 @t45 @t4041 @t4044 @t59 @t4251 @t4252 @t1675 @t4023 @t4027 @t1285 @t4248 @t4269 @t44 @t4026 @t4029 @t60 @t4266 @t4267 @t1701 @t4008 @t4012 @t1259 @t4263 @t4284 @t43 @t4011 @t4014 @t61 @t4281 @t4282 @t1727 @t3993 @t3997 @t1233 @t4278 @t4299 @t42 @t3996 @t3999 @t62 @t4296 @t4297 @t1753 @t3978 @t3982 @t1207 @t4293 @t4314 @t41 @t3981 @t3984 @t63 @t4311 @t4312 @t1779 @t3963 @t3967 @t1181 @t4308 @t4329 @t40 @t3966 @t3969 @t64 @t4326 @t4327 @t1805 @t3948 @t3952 @t1155 @t4323 @t4344 @t39 @t3951 @t3954 @t65 @t4341 @t4342 @t1831 @t3933 @t3937 @t1129 @t4338 @t4359 @t38 @t3936 @t3939 @t66 @t4356 @t4357 @t1857 @t3918 @t3922 @t1103 @t4353 @t4374 @t37 @t3921 @t3924 @t67 @t4371 @t4372 @t1883 @t3903 @t3907 @t1077 @t4368 @t4389 @t36 @t3906 @t3909 @t68 @t4386 @t4387 @t1909 @t3888 @t3892 @t1051 @t4383 @t4404 @t35 @t3891 @t3894 @t69 @t4401 @t4402 @t1935 @t3873 @t3877 @t1025 @t4398 @t4419 @t34 @t3876 @t3879 @t70 @t4416 @t4417 @t1961 @t3858 @t3862 @t999 @t4413 @t4434 @t33 @t3861 @t3864 @t71 @t4431 @t4432 @t1987 @t3843 @t3847 @t973 @t4428 @t4449 @t32 @t3846 @t3849 @t72 @t4446 @t4447 @t2013 @t3828 @t3832 @t947 @t4443 @t4464 @t31 @t3831 @t3834 @t73 @t4461 @t4462 @t2039 @t3813 @t3817 @t921 @t4458 @t4479 @t30 @t3816 @t3819 @t74 @t4476 @t4477 @t2065 @t3798 @t3802 @t895 @t4473 @t4494 @t29 @t3801 @t3804 @t75 @t4491 @t4492 @t2091 @t3783 @t3787 @t869 @t4488 @t4509 @t28 @t3786 @t3789 @t76 @t4506 @t4507 @t2117 @t3768 @t3772 @t843 @t4503 @t4524 @t27 @t3771 @t3774 @t77 @t4521 @t4522 @t2143 @t3753 @t3757 @t817 @t4518 @t4539 @t26 @t3756 @t3759 @t78 @t4536 @t4537 @t2169 @t3738 @t3742 @t791 @t4533 @t4554 @t25 @t3741 @t3744 @t79 @t4551 @t4552 @t2195 @t3723 @t3727 @t765 @t4548 @t4569 @t24 @t3726 @t3729 @t80 @t4566 @t4567 @t2221 @t3708 @t3712 @t739 @t4563 @t4584 @t23 @t3711 @t3714 @t81 @t4581 @t4582 @t2247 @t3693 @t3697 @t713 @t4578 @t4599 @t22 @t3696 @t3699 @t82 @t4596 @t4597 @t2273 @t3678 @t3682 @t687 @t4593 @t4614 @t21 @t3681 @t3684 @t83 @t4611 @t4612 @t2299 @t3663 @t3667 @t661 @t4608 @t4629 @t20 @t3666 @t3669 @t84 @t4626 @t4627 @t2325 @t3648 @t3652 @t635 @t4623 @t4644 @t19 @t3651 @t3654 @t85 @t4641 @t4642 @t2351 @t3633 @t3637 @t609 @t4638 @t4659 @t18 @t3636 @t3639 @t86 @t4656 @t4657 @t2377 @t3618 @t3622 @t583 @t4653 @t4674 @t17 @t3621 @t3624 @t87 @t4671 @t4672 @t2403 @t3603 @t3607 @t557 @t4668 @t4689 @t16 @t3606 @t3609 @t88 @t4686 @t4687 @t2429 @t3588 @t3592 @t531 @t4683 @t4704 @t15 @t3591 @t3594 @t89 @t4701 @t4702 @t2455 @t3573 @t3577 @t505 @t4698 @t4719 @t14 @t3576 @t3579 @t90 @t4716 @t4717 @t2481 @t3558 @t3562 @t479 @t4713 @t4734 @t13 @t3561 @t3564 @t91 @t4731 @t4732 @t2507 @t3543 @t3547 @t453 @t4728 @t4749 @t12 @t3546 @t3549 @t92 @t4746 @t4747 @t2533 @t3528 @t3532 @t427 @t4743 @t4764 @t11 @t3531 @t3534 @t93 @t4761 @t4762 @t2559 @t3513 @t3517 @t401 @t4758 @t4779 @t10 @t3516 @t3519 @t94 @t4776 @t4777 @t2585 @t3498 @t3502 @t375 @t4773 @t4794 @t9 @t3501 @t3504 @t95 @t4791 @t4792 @t2611 @t3483 @t3487 @t349 @t4788 @t4809 @t8 @t3486 @t3489 @t96 @t4806 @t4807 @t2637 @t3468 @t3472 @t323 @t4803 @t4824 @t7 @t3471 @t3474 @t97 @t4821 @t4822 @t2663 @t3453 @t3457 @t297 @t4818 @t4839 @t6 @t3456 @t3459 @t98 @t4836 @t4837 @t2689 @t3441 @t3444 @t276 @t4833 @t4834 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6211 @t220) % 40.01/40.21 (step @p5863 :rule instantiate :premises (@p110) :args (@t4840)) % 40.01/40.21 (step-pop @p6212 :rule scope :premises (@p5863)) % 40.01/40.21 (step @p5864 :rule process_scope :premises (@p6212) :args (@t4843)) % 40.01/40.21 (step @p5866 :rule implies_elim :premises (@p5864)) % 40.01/40.21 (step @p5867 :rule cnf_or_pos :args (@t4843)) % 40.01/40.21 (step @p5868 :rule reordering :premises (@p5867) :args ((or @t4842 @t4841 (not @t4843)))) % 40.01/40.21 (step @p5869 :rule instantiate :premises (@p112) :args (@t4844)) % 40.01/40.21 (step @p5870 :rule cnf_or_pos :args (@t4845)) % 40.01/40.21 (step @p5871 :rule reordering :premises (@p5870) :args ((or @t4842 @t244 @t2717 (not @t4845)))) % 40.01/40.21 (step @p5872 :rule instantiate :premises (@p108) :args (@t4840)) % 40.01/40.21 (step @p5873 :rule cnf_or_pos :args (@t4847)) % 40.01/40.21 (step @p5874 :rule reordering :premises (@p5873) :args ((or @t2728 @t265 @t264 @t4846 (not @t4847)))) % 40.01/40.21 (step @p5875 :rule chain_m_resolution :premises (@p5874 @p5872 @p2902 @p2900 @p136 @p134 @p5871 @p5869 @p133 @p131 @p130 @p128 @p127 @p125 @p5868 @p5866 @p110) :args ((or @t4842 @t239) @t267 (@list @t4847 @t2728 @t2730 @t248 @t249 @t2717 @t4845 @t245 @t247 @t242 @t243 @t240 @t241 @t4841 @t4843 @t220))) % 40.01/40.21 (step @p5876 :rule instantiate :premises (@p119) :args (@t4844)) % 40.01/40.21 (step @p5877 :rule cnf_or_pos :args (@t4849)) % 40.01/40.21 (step @p5878 :rule reordering :premises (@p5877) :args ((or @t270 @t4842 @t4848 @t3440 (not @t4849)))) % 40.01/40.21 (step @p5879 :rule instantiate :premises (@p120) :args (@t2714)) % 40.01/40.21 (step @p5880 :rule cnf_or_pos :args (@t4852)) % 40.01/40.21 (step @p5881 :rule reordering :premises (@p5880) :args ((or @t4851 @t4850 @t2715 (not @t4852)))) % 40.01/40.21 (step @p5882 :rule instantiate :premises (@p121) :args (@t2713)) % 40.01/40.21 (step @p5883 :rule cnf_or_pos :args (@t4854)) % 40.01/40.21 (step @p5884 :rule reordering :premises (@p5883) :args ((or @t2723 @t4833 @t4853 (not @t4854)))) % 40.01/40.21 (step @p5885 :rule chain_m_resolution :premises (@p4753 @p4751 @p1550 @p4780 @p4778 @p51 @p4756 @p4754 @p52 @p4777 @p4775 @p1579 @p4729 @p4727 @p1521 @p4804 @p4802 @p50 @p4732 @p4730 @p53 @p4801 @p4799 @p1608 @p4705 @p4703 @p1492 @p4828 @p4826 @p49 @p4708 @p4706 @p54 @p4825 @p4823 @p1637 @p4681 @p4679 @p1463 @p4852 @p4850 @p48 @p4684 @p4682 @p55 @p4849 @p4847 @p1666 @p4657 @p4655 @p1434 @p4876 @p4874 @p47 @p4660 @p4658 @p56 @p4873 @p4871 @p1695 @p4633 @p4631 @p1405 @p4900 @p4898 @p46 @p4636 @p4634 @p57 @p4897 @p4895 @p1724 @p4609 @p4607 @p1376 @p4924 @p4922 @p45 @p4612 @p4610 @p58 @p4921 @p4919 @p1753 @p4585 @p4583 @p1347 @p4948 @p4946 @p44 @p4588 @p4586 @p59 @p4945 @p4943 @p1782 @p4561 @p4559 @p1318 @p4972 @p4970 @p43 @p4564 @p4562 @p60 @p4969 @p4967 @p1811 @p4537 @p4535 @p1289 @p4996 @p4994 @p42 @p4540 @p4538 @p61 @p4993 @p4991 @p1840 @p4513 @p4511 @p1260 @p5020 @p5018 @p41 @p4516 @p4514 @p62 @p5017 @p5015 @p1869 @p4489 @p4487 @p1231 @p5044 @p5042 @p40 @p4492 @p4490 @p63 @p5041 @p5039 @p1898 @p4465 @p4463 @p1202 @p5068 @p5066 @p39 @p4468 @p4466 @p64 @p5065 @p5063 @p1927 @p4441 @p4439 @p1173 @p5092 @p5090 @p38 @p4444 @p4442 @p65 @p5089 @p5087 @p1956 @p4417 @p4415 @p1144 @p5116 @p5114 @p37 @p4420 @p4418 @p66 @p5113 @p5111 @p1985 @p4393 @p4391 @p1115 @p5140 @p5138 @p36 @p4396 @p4394 @p67 @p5137 @p5135 @p2014 @p4369 @p4367 @p1086 @p5164 @p5162 @p35 @p4372 @p4370 @p68 @p5161 @p5159 @p2043 @p4345 @p4343 @p1057 @p5188 @p5186 @p34 @p4348 @p4346 @p69 @p5185 @p5183 @p2072 @p4321 @p4319 @p1028 @p5212 @p5210 @p33 @p4324 @p4322 @p70 @p5209 @p5207 @p2101 @p4297 @p4295 @p999 @p5236 @p5234 @p32 @p4300 @p4298 @p71 @p5233 @p5231 @p2130 @p4273 @p4271 @p970 @p5260 @p5258 @p31 @p4276 @p4274 @p72 @p5257 @p5255 @p2159 @p4249 @p4247 @p941 @p5284 @p5282 @p30 @p4252 @p4250 @p73 @p5281 @p5279 @p2188 @p4225 @p4223 @p912 @p5308 @p5306 @p29 @p4228 @p4226 @p74 @p5305 @p5303 @p2217 @p4201 @p4199 @p883 @p5332 @p5330 @p28 @p4204 @p4202 @p75 @p5329 @p5327 @p2246 @p4177 @p4175 @p854 @p5356 @p5354 @p27 @p4180 @p4178 @p76 @p5353 @p5351 @p2275 @p4153 @p4151 @p825 @p5380 @p5378 @p26 @p4156 @p4154 @p77 @p5377 @p5375 @p2304 @p4129 @p4127 @p796 @p5404 @p5402 @p25 @p4132 @p4130 @p78 @p5401 @p5399 @p2333 @p4105 @p4103 @p767 @p5428 @p5426 @p24 @p4108 @p4106 @p79 @p5425 @p5423 @p2362 @p4081 @p4079 @p738 @p5452 @p5450 @p23 @p4084 @p4082 @p80 @p5449 @p5447 @p2391 @p4057 @p4055 @p709 @p5476 @p5474 @p22 @p4060 @p4058 @p81 @p5473 @p5471 @p2420 @p4033 @p4031 @p680 @p5500 @p5498 @p21 @p4036 @p4034 @p82 @p5497 @p5495 @p2449 @p4009 @p4007 @p651 @p5524 @p5522 @p20 @p4012 @p4010 @p83 @p5521 @p5519 @p2478 @p3985 @p3983 @p622 @p5548 @p5546 @p19 @p3988 @p3986 @p84 @p5545 @p5543 @p2507 @p3961 @p3959 @p593 @p5572 @p5570 @p18 @p3964 @p3962 @p85 @p5569 @p5567 @p2536 @p3937 @p3935 @p564 @p5596 @p5594 @p17 @p3940 @p3938 @p86 @p5593 @p5591 @p2565 @p3913 @p3911 @p535 @p5620 @p5618 @p16 @p3916 @p3914 @p87 @p5617 @p5615 @p2594 @p3889 @p3887 @p506 @p5644 @p5642 @p15 @p3892 @p3890 @p88 @p5641 @p5639 @p2623 @p3865 @p3863 @p477 @p5668 @p5666 @p14 @p3868 @p3866 @p89 @p5665 @p5663 @p2652 @p3841 @p3839 @p448 @p5692 @p5690 @p13 @p3844 @p3842 @p90 @p5689 @p5687 @p2681 @p3817 @p3815 @p419 @p5716 @p5714 @p12 @p3820 @p3818 @p91 @p5713 @p5711 @p2710 @p3793 @p3791 @p390 @p5740 @p5738 @p11 @p3796 @p3794 @p92 @p5737 @p5735 @p2739 @p3769 @p3767 @p361 @p5764 @p5762 @p10 @p3772 @p3770 @p93 @p5761 @p5759 @p2768 @p3745 @p3743 @p332 @p5788 @p5786 @p9 @p3748 @p3746 @p94 @p5785 @p5783 @p2797 @p3721 @p3719 @p303 @p5812 @p5810 @p8 @p3724 @p3722 @p95 @p5809 @p5807 @p2826 @p3697 @p3695 @p274 @p5836 @p5834 @p7 @p3700 @p3698 @p96 @p5833 @p5831 @p2855 @p3673 @p3671 @p245 @p5860 @p5858 @p6 @p3676 @p3674 @p97 @p5857 @p5855 @p2884 @p3649 @p3647 @p216 @p5884 @p5882 @p5 @p3652 @p3650 @p98 @p5881 @p5879 @p2913 @p3628 @p3626 @p187 @p5878 @p5876 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5875) :args (@t4842 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4147 @t1493 @t4143 @t4164 @t51 @t4146 @t4149 @t52 @t4161 @t4162 @t1519 @t4128 @t4132 @t1467 @t4158 @t4179 @t50 @t4131 @t4134 @t53 @t4176 @t4177 @t1545 @t4113 @t4117 @t1441 @t4173 @t4194 @t49 @t4116 @t4119 @t54 @t4191 @t4192 @t1571 @t4098 @t4102 @t1415 @t4188 @t4209 @t48 @t4101 @t4104 @t55 @t4206 @t4207 @t1597 @t4083 @t4087 @t1389 @t4203 @t4224 @t47 @t4086 @t4089 @t56 @t4221 @t4222 @t1623 @t4068 @t4072 @t1363 @t4218 @t4239 @t46 @t4071 @t4074 @t57 @t4236 @t4237 @t1649 @t4053 @t4057 @t1337 @t4233 @t4254 @t45 @t4056 @t4059 @t58 @t4251 @t4252 @t1675 @t4038 @t4042 @t1311 @t4248 @t4269 @t44 @t4041 @t4044 @t59 @t4266 @t4267 @t1701 @t4023 @t4027 @t1285 @t4263 @t4284 @t43 @t4026 @t4029 @t60 @t4281 @t4282 @t1727 @t4008 @t4012 @t1259 @t4278 @t4299 @t42 @t4011 @t4014 @t61 @t4296 @t4297 @t1753 @t3993 @t3997 @t1233 @t4293 @t4314 @t41 @t3996 @t3999 @t62 @t4311 @t4312 @t1779 @t3978 @t3982 @t1207 @t4308 @t4329 @t40 @t3981 @t3984 @t63 @t4326 @t4327 @t1805 @t3963 @t3967 @t1181 @t4323 @t4344 @t39 @t3966 @t3969 @t64 @t4341 @t4342 @t1831 @t3948 @t3952 @t1155 @t4338 @t4359 @t38 @t3951 @t3954 @t65 @t4356 @t4357 @t1857 @t3933 @t3937 @t1129 @t4353 @t4374 @t37 @t3936 @t3939 @t66 @t4371 @t4372 @t1883 @t3918 @t3922 @t1103 @t4368 @t4389 @t36 @t3921 @t3924 @t67 @t4386 @t4387 @t1909 @t3903 @t3907 @t1077 @t4383 @t4404 @t35 @t3906 @t3909 @t68 @t4401 @t4402 @t1935 @t3888 @t3892 @t1051 @t4398 @t4419 @t34 @t3891 @t3894 @t69 @t4416 @t4417 @t1961 @t3873 @t3877 @t1025 @t4413 @t4434 @t33 @t3876 @t3879 @t70 @t4431 @t4432 @t1987 @t3858 @t3862 @t999 @t4428 @t4449 @t32 @t3861 @t3864 @t71 @t4446 @t4447 @t2013 @t3843 @t3847 @t973 @t4443 @t4464 @t31 @t3846 @t3849 @t72 @t4461 @t4462 @t2039 @t3828 @t3832 @t947 @t4458 @t4479 @t30 @t3831 @t3834 @t73 @t4476 @t4477 @t2065 @t3813 @t3817 @t921 @t4473 @t4494 @t29 @t3816 @t3819 @t74 @t4491 @t4492 @t2091 @t3798 @t3802 @t895 @t4488 @t4509 @t28 @t3801 @t3804 @t75 @t4506 @t4507 @t2117 @t3783 @t3787 @t869 @t4503 @t4524 @t27 @t3786 @t3789 @t76 @t4521 @t4522 @t2143 @t3768 @t3772 @t843 @t4518 @t4539 @t26 @t3771 @t3774 @t77 @t4536 @t4537 @t2169 @t3753 @t3757 @t817 @t4533 @t4554 @t25 @t3756 @t3759 @t78 @t4551 @t4552 @t2195 @t3738 @t3742 @t791 @t4548 @t4569 @t24 @t3741 @t3744 @t79 @t4566 @t4567 @t2221 @t3723 @t3727 @t765 @t4563 @t4584 @t23 @t3726 @t3729 @t80 @t4581 @t4582 @t2247 @t3708 @t3712 @t739 @t4578 @t4599 @t22 @t3711 @t3714 @t81 @t4596 @t4597 @t2273 @t3693 @t3697 @t713 @t4593 @t4614 @t21 @t3696 @t3699 @t82 @t4611 @t4612 @t2299 @t3678 @t3682 @t687 @t4608 @t4629 @t20 @t3681 @t3684 @t83 @t4626 @t4627 @t2325 @t3663 @t3667 @t661 @t4623 @t4644 @t19 @t3666 @t3669 @t84 @t4641 @t4642 @t2351 @t3648 @t3652 @t635 @t4638 @t4659 @t18 @t3651 @t3654 @t85 @t4656 @t4657 @t2377 @t3633 @t3637 @t609 @t4653 @t4674 @t17 @t3636 @t3639 @t86 @t4671 @t4672 @t2403 @t3618 @t3622 @t583 @t4668 @t4689 @t16 @t3621 @t3624 @t87 @t4686 @t4687 @t2429 @t3603 @t3607 @t557 @t4683 @t4704 @t15 @t3606 @t3609 @t88 @t4701 @t4702 @t2455 @t3588 @t3592 @t531 @t4698 @t4719 @t14 @t3591 @t3594 @t89 @t4716 @t4717 @t2481 @t3573 @t3577 @t505 @t4713 @t4734 @t13 @t3576 @t3579 @t90 @t4731 @t4732 @t2507 @t3558 @t3562 @t479 @t4728 @t4749 @t12 @t3561 @t3564 @t91 @t4746 @t4747 @t2533 @t3543 @t3547 @t453 @t4743 @t4764 @t11 @t3546 @t3549 @t92 @t4761 @t4762 @t2559 @t3528 @t3532 @t427 @t4758 @t4779 @t10 @t3531 @t3534 @t93 @t4776 @t4777 @t2585 @t3513 @t3517 @t401 @t4773 @t4794 @t9 @t3516 @t3519 @t94 @t4791 @t4792 @t2611 @t3498 @t3502 @t375 @t4788 @t4809 @t8 @t3501 @t3504 @t95 @t4806 @t4807 @t2637 @t3483 @t3487 @t349 @t4803 @t4824 @t7 @t3486 @t3489 @t96 @t4821 @t4822 @t2663 @t3468 @t3472 @t323 @t4818 @t4839 @t6 @t3471 @t3474 @t97 @t4836 @t4837 @t2689 @t3453 @t3457 @t297 @t4833 @t4854 @t5 @t3456 @t3459 @t98 @t4851 @t4852 @t2715 @t3441 @t3444 @t276 @t4848 @t4849 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6213 @t220) % 40.01/40.21 (step @p5887 :rule instantiate :premises (@p110) :args (@t4855)) % 40.01/40.21 (step-pop @p6214 :rule scope :premises (@p5887)) % 40.01/40.21 (step @p5888 :rule process_scope :premises (@p6214) :args (@t4858)) % 40.01/40.21 (step @p5890 :rule implies_elim :premises (@p5888)) % 40.01/40.21 (step @p5891 :rule cnf_or_pos :args (@t4858)) % 40.01/40.21 (step @p5892 :rule reordering :premises (@p5891) :args ((or @t4857 @t4856 (not @t4858)))) % 40.01/40.21 (step @p5893 :rule instantiate :premises (@p112) :args (@t4859)) % 40.01/40.21 (step @p5894 :rule cnf_or_pos :args (@t4860)) % 40.01/40.21 (step @p5895 :rule reordering :premises (@p5894) :args ((or @t4857 @t244 @t2743 (not @t4860)))) % 40.01/40.21 (step @p5896 :rule instantiate :premises (@p108) :args (@t4855)) % 40.01/40.21 (step @p5897 :rule cnf_or_pos :args (@t4862)) % 40.01/40.21 (step @p5898 :rule reordering :premises (@p5897) :args ((or @t2754 @t265 @t264 @t4861 (not @t4862)))) % 40.01/40.21 (step @p5899 :rule chain_m_resolution :premises (@p5898 @p5896 @p2931 @p2929 @p136 @p134 @p5895 @p5893 @p133 @p131 @p130 @p128 @p127 @p125 @p5892 @p5890 @p110) :args ((or @t4857 @t239) @t267 (@list @t4862 @t2754 @t2756 @t248 @t249 @t2743 @t4860 @t245 @t247 @t242 @t243 @t240 @t241 @t4856 @t4858 @t220))) % 40.01/40.21 (step @p5900 :rule instantiate :premises (@p119) :args (@t4859)) % 40.01/40.21 (step @p5901 :rule cnf_or_pos :args (@t4864)) % 40.01/40.21 (step @p5902 :rule reordering :premises (@p5901) :args ((or @t270 @t4857 @t4863 @t3440 (not @t4864)))) % 40.01/40.21 (step @p5903 :rule instantiate :premises (@p120) :args (@t2740)) % 40.01/40.21 (step @p5904 :rule cnf_or_pos :args (@t4867)) % 40.01/40.21 (step @p5905 :rule reordering :premises (@p5904) :args ((or @t4866 @t4865 @t2741 (not @t4867)))) % 40.01/40.21 (step @p5906 :rule instantiate :premises (@p121) :args (@t2739)) % 40.01/40.21 (step @p5907 :rule cnf_or_pos :args (@t4869)) % 40.01/40.21 (step @p5908 :rule reordering :premises (@p5907) :args ((or @t2749 @t4848 @t4868 (not @t4869)))) % 40.01/40.21 (step @p5909 :rule chain_m_resolution :premises (@p4780 @p4778 @p51 @p4777 @p4775 @p1579 @p4753 @p4751 @p1550 @p4804 @p4802 @p50 @p4756 @p4754 @p52 @p4801 @p4799 @p1608 @p4729 @p4727 @p1521 @p4828 @p4826 @p49 @p4732 @p4730 @p53 @p4825 @p4823 @p1637 @p4705 @p4703 @p1492 @p4852 @p4850 @p48 @p4708 @p4706 @p54 @p4849 @p4847 @p1666 @p4681 @p4679 @p1463 @p4876 @p4874 @p47 @p4684 @p4682 @p55 @p4873 @p4871 @p1695 @p4657 @p4655 @p1434 @p4900 @p4898 @p46 @p4660 @p4658 @p56 @p4897 @p4895 @p1724 @p4633 @p4631 @p1405 @p4924 @p4922 @p45 @p4636 @p4634 @p57 @p4921 @p4919 @p1753 @p4609 @p4607 @p1376 @p4948 @p4946 @p44 @p4612 @p4610 @p58 @p4945 @p4943 @p1782 @p4585 @p4583 @p1347 @p4972 @p4970 @p43 @p4588 @p4586 @p59 @p4969 @p4967 @p1811 @p4561 @p4559 @p1318 @p4996 @p4994 @p42 @p4564 @p4562 @p60 @p4993 @p4991 @p1840 @p4537 @p4535 @p1289 @p5020 @p5018 @p41 @p4540 @p4538 @p61 @p5017 @p5015 @p1869 @p4513 @p4511 @p1260 @p5044 @p5042 @p40 @p4516 @p4514 @p62 @p5041 @p5039 @p1898 @p4489 @p4487 @p1231 @p5068 @p5066 @p39 @p4492 @p4490 @p63 @p5065 @p5063 @p1927 @p4465 @p4463 @p1202 @p5092 @p5090 @p38 @p4468 @p4466 @p64 @p5089 @p5087 @p1956 @p4441 @p4439 @p1173 @p5116 @p5114 @p37 @p4444 @p4442 @p65 @p5113 @p5111 @p1985 @p4417 @p4415 @p1144 @p5140 @p5138 @p36 @p4420 @p4418 @p66 @p5137 @p5135 @p2014 @p4393 @p4391 @p1115 @p5164 @p5162 @p35 @p4396 @p4394 @p67 @p5161 @p5159 @p2043 @p4369 @p4367 @p1086 @p5188 @p5186 @p34 @p4372 @p4370 @p68 @p5185 @p5183 @p2072 @p4345 @p4343 @p1057 @p5212 @p5210 @p33 @p4348 @p4346 @p69 @p5209 @p5207 @p2101 @p4321 @p4319 @p1028 @p5236 @p5234 @p32 @p4324 @p4322 @p70 @p5233 @p5231 @p2130 @p4297 @p4295 @p999 @p5260 @p5258 @p31 @p4300 @p4298 @p71 @p5257 @p5255 @p2159 @p4273 @p4271 @p970 @p5284 @p5282 @p30 @p4276 @p4274 @p72 @p5281 @p5279 @p2188 @p4249 @p4247 @p941 @p5308 @p5306 @p29 @p4252 @p4250 @p73 @p5305 @p5303 @p2217 @p4225 @p4223 @p912 @p5332 @p5330 @p28 @p4228 @p4226 @p74 @p5329 @p5327 @p2246 @p4201 @p4199 @p883 @p5356 @p5354 @p27 @p4204 @p4202 @p75 @p5353 @p5351 @p2275 @p4177 @p4175 @p854 @p5380 @p5378 @p26 @p4180 @p4178 @p76 @p5377 @p5375 @p2304 @p4153 @p4151 @p825 @p5404 @p5402 @p25 @p4156 @p4154 @p77 @p5401 @p5399 @p2333 @p4129 @p4127 @p796 @p5428 @p5426 @p24 @p4132 @p4130 @p78 @p5425 @p5423 @p2362 @p4105 @p4103 @p767 @p5452 @p5450 @p23 @p4108 @p4106 @p79 @p5449 @p5447 @p2391 @p4081 @p4079 @p738 @p5476 @p5474 @p22 @p4084 @p4082 @p80 @p5473 @p5471 @p2420 @p4057 @p4055 @p709 @p5500 @p5498 @p21 @p4060 @p4058 @p81 @p5497 @p5495 @p2449 @p4033 @p4031 @p680 @p5524 @p5522 @p20 @p4036 @p4034 @p82 @p5521 @p5519 @p2478 @p4009 @p4007 @p651 @p5548 @p5546 @p19 @p4012 @p4010 @p83 @p5545 @p5543 @p2507 @p3985 @p3983 @p622 @p5572 @p5570 @p18 @p3988 @p3986 @p84 @p5569 @p5567 @p2536 @p3961 @p3959 @p593 @p5596 @p5594 @p17 @p3964 @p3962 @p85 @p5593 @p5591 @p2565 @p3937 @p3935 @p564 @p5620 @p5618 @p16 @p3940 @p3938 @p86 @p5617 @p5615 @p2594 @p3913 @p3911 @p535 @p5644 @p5642 @p15 @p3916 @p3914 @p87 @p5641 @p5639 @p2623 @p3889 @p3887 @p506 @p5668 @p5666 @p14 @p3892 @p3890 @p88 @p5665 @p5663 @p2652 @p3865 @p3863 @p477 @p5692 @p5690 @p13 @p3868 @p3866 @p89 @p5689 @p5687 @p2681 @p3841 @p3839 @p448 @p5716 @p5714 @p12 @p3844 @p3842 @p90 @p5713 @p5711 @p2710 @p3817 @p3815 @p419 @p5740 @p5738 @p11 @p3820 @p3818 @p91 @p5737 @p5735 @p2739 @p3793 @p3791 @p390 @p5764 @p5762 @p10 @p3796 @p3794 @p92 @p5761 @p5759 @p2768 @p3769 @p3767 @p361 @p5788 @p5786 @p9 @p3772 @p3770 @p93 @p5785 @p5783 @p2797 @p3745 @p3743 @p332 @p5812 @p5810 @p8 @p3748 @p3746 @p94 @p5809 @p5807 @p2826 @p3721 @p3719 @p303 @p5836 @p5834 @p7 @p3724 @p3722 @p95 @p5833 @p5831 @p2855 @p3697 @p3695 @p274 @p5860 @p5858 @p6 @p3700 @p3698 @p96 @p5857 @p5855 @p2884 @p3673 @p3671 @p245 @p5884 @p5882 @p5 @p3676 @p3674 @p97 @p5881 @p5879 @p2913 @p3649 @p3647 @p216 @p5908 @p5906 @p4 @p3652 @p3650 @p98 @p5905 @p5903 @p2942 @p3628 @p3626 @p187 @p5902 @p5900 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5899) :args (@t4857 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4164 @t51 @t4161 @t4162 @t1519 @t4143 @t4147 @t1493 @t4158 @t4179 @t50 @t4146 @t4149 @t52 @t4176 @t4177 @t1545 @t4128 @t4132 @t1467 @t4173 @t4194 @t49 @t4131 @t4134 @t53 @t4191 @t4192 @t1571 @t4113 @t4117 @t1441 @t4188 @t4209 @t48 @t4116 @t4119 @t54 @t4206 @t4207 @t1597 @t4098 @t4102 @t1415 @t4203 @t4224 @t47 @t4101 @t4104 @t55 @t4221 @t4222 @t1623 @t4083 @t4087 @t1389 @t4218 @t4239 @t46 @t4086 @t4089 @t56 @t4236 @t4237 @t1649 @t4068 @t4072 @t1363 @t4233 @t4254 @t45 @t4071 @t4074 @t57 @t4251 @t4252 @t1675 @t4053 @t4057 @t1337 @t4248 @t4269 @t44 @t4056 @t4059 @t58 @t4266 @t4267 @t1701 @t4038 @t4042 @t1311 @t4263 @t4284 @t43 @t4041 @t4044 @t59 @t4281 @t4282 @t1727 @t4023 @t4027 @t1285 @t4278 @t4299 @t42 @t4026 @t4029 @t60 @t4296 @t4297 @t1753 @t4008 @t4012 @t1259 @t4293 @t4314 @t41 @t4011 @t4014 @t61 @t4311 @t4312 @t1779 @t3993 @t3997 @t1233 @t4308 @t4329 @t40 @t3996 @t3999 @t62 @t4326 @t4327 @t1805 @t3978 @t3982 @t1207 @t4323 @t4344 @t39 @t3981 @t3984 @t63 @t4341 @t4342 @t1831 @t3963 @t3967 @t1181 @t4338 @t4359 @t38 @t3966 @t3969 @t64 @t4356 @t4357 @t1857 @t3948 @t3952 @t1155 @t4353 @t4374 @t37 @t3951 @t3954 @t65 @t4371 @t4372 @t1883 @t3933 @t3937 @t1129 @t4368 @t4389 @t36 @t3936 @t3939 @t66 @t4386 @t4387 @t1909 @t3918 @t3922 @t1103 @t4383 @t4404 @t35 @t3921 @t3924 @t67 @t4401 @t4402 @t1935 @t3903 @t3907 @t1077 @t4398 @t4419 @t34 @t3906 @t3909 @t68 @t4416 @t4417 @t1961 @t3888 @t3892 @t1051 @t4413 @t4434 @t33 @t3891 @t3894 @t69 @t4431 @t4432 @t1987 @t3873 @t3877 @t1025 @t4428 @t4449 @t32 @t3876 @t3879 @t70 @t4446 @t4447 @t2013 @t3858 @t3862 @t999 @t4443 @t4464 @t31 @t3861 @t3864 @t71 @t4461 @t4462 @t2039 @t3843 @t3847 @t973 @t4458 @t4479 @t30 @t3846 @t3849 @t72 @t4476 @t4477 @t2065 @t3828 @t3832 @t947 @t4473 @t4494 @t29 @t3831 @t3834 @t73 @t4491 @t4492 @t2091 @t3813 @t3817 @t921 @t4488 @t4509 @t28 @t3816 @t3819 @t74 @t4506 @t4507 @t2117 @t3798 @t3802 @t895 @t4503 @t4524 @t27 @t3801 @t3804 @t75 @t4521 @t4522 @t2143 @t3783 @t3787 @t869 @t4518 @t4539 @t26 @t3786 @t3789 @t76 @t4536 @t4537 @t2169 @t3768 @t3772 @t843 @t4533 @t4554 @t25 @t3771 @t3774 @t77 @t4551 @t4552 @t2195 @t3753 @t3757 @t817 @t4548 @t4569 @t24 @t3756 @t3759 @t78 @t4566 @t4567 @t2221 @t3738 @t3742 @t791 @t4563 @t4584 @t23 @t3741 @t3744 @t79 @t4581 @t4582 @t2247 @t3723 @t3727 @t765 @t4578 @t4599 @t22 @t3726 @t3729 @t80 @t4596 @t4597 @t2273 @t3708 @t3712 @t739 @t4593 @t4614 @t21 @t3711 @t3714 @t81 @t4611 @t4612 @t2299 @t3693 @t3697 @t713 @t4608 @t4629 @t20 @t3696 @t3699 @t82 @t4626 @t4627 @t2325 @t3678 @t3682 @t687 @t4623 @t4644 @t19 @t3681 @t3684 @t83 @t4641 @t4642 @t2351 @t3663 @t3667 @t661 @t4638 @t4659 @t18 @t3666 @t3669 @t84 @t4656 @t4657 @t2377 @t3648 @t3652 @t635 @t4653 @t4674 @t17 @t3651 @t3654 @t85 @t4671 @t4672 @t2403 @t3633 @t3637 @t609 @t4668 @t4689 @t16 @t3636 @t3639 @t86 @t4686 @t4687 @t2429 @t3618 @t3622 @t583 @t4683 @t4704 @t15 @t3621 @t3624 @t87 @t4701 @t4702 @t2455 @t3603 @t3607 @t557 @t4698 @t4719 @t14 @t3606 @t3609 @t88 @t4716 @t4717 @t2481 @t3588 @t3592 @t531 @t4713 @t4734 @t13 @t3591 @t3594 @t89 @t4731 @t4732 @t2507 @t3573 @t3577 @t505 @t4728 @t4749 @t12 @t3576 @t3579 @t90 @t4746 @t4747 @t2533 @t3558 @t3562 @t479 @t4743 @t4764 @t11 @t3561 @t3564 @t91 @t4761 @t4762 @t2559 @t3543 @t3547 @t453 @t4758 @t4779 @t10 @t3546 @t3549 @t92 @t4776 @t4777 @t2585 @t3528 @t3532 @t427 @t4773 @t4794 @t9 @t3531 @t3534 @t93 @t4791 @t4792 @t2611 @t3513 @t3517 @t401 @t4788 @t4809 @t8 @t3516 @t3519 @t94 @t4806 @t4807 @t2637 @t3498 @t3502 @t375 @t4803 @t4824 @t7 @t3501 @t3504 @t95 @t4821 @t4822 @t2663 @t3483 @t3487 @t349 @t4818 @t4839 @t6 @t3486 @t3489 @t96 @t4836 @t4837 @t2689 @t3468 @t3472 @t323 @t4833 @t4854 @t5 @t3471 @t3474 @t97 @t4851 @t4852 @t2715 @t3453 @t3457 @t297 @t4848 @t4869 @t4 @t3456 @t3459 @t98 @t4866 @t4867 @t2741 @t3441 @t3444 @t276 @t4863 @t4864 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6215 @t220) % 40.01/40.21 (step @p5911 :rule instantiate :premises (@p110) :args (@t4870)) % 40.01/40.21 (step-pop @p6216 :rule scope :premises (@p5911)) % 40.01/40.21 (step @p5912 :rule process_scope :premises (@p6216) :args (@t4873)) % 40.01/40.21 (step @p5914 :rule implies_elim :premises (@p5912)) % 40.01/40.21 (step @p5915 :rule cnf_or_pos :args (@t4873)) % 40.01/40.21 (step @p5916 :rule reordering :premises (@p5915) :args ((or @t4872 @t4871 (not @t4873)))) % 40.01/40.21 (step @p5917 :rule instantiate :premises (@p112) :args (@t4874)) % 40.01/40.21 (step @p5918 :rule cnf_or_pos :args (@t4875)) % 40.01/40.21 (step @p5919 :rule reordering :premises (@p5918) :args ((or @t4872 @t244 @t2769 (not @t4875)))) % 40.01/40.21 (step @p5920 :rule instantiate :premises (@p108) :args (@t4870)) % 40.01/40.21 (step @p5921 :rule cnf_or_pos :args (@t4877)) % 40.01/40.21 (step @p5922 :rule reordering :premises (@p5921) :args ((or @t2780 @t265 @t264 @t4876 (not @t4877)))) % 40.01/40.21 (step @p5923 :rule chain_m_resolution :premises (@p5922 @p5920 @p2960 @p2958 @p136 @p134 @p5919 @p5917 @p133 @p131 @p130 @p128 @p127 @p125 @p5916 @p5914 @p110) :args ((or @t4872 @t239) @t267 (@list @t4877 @t2780 @t2782 @t248 @t249 @t2769 @t4875 @t245 @t247 @t242 @t243 @t240 @t241 @t4871 @t4873 @t220))) % 40.01/40.21 (step @p5924 :rule instantiate :premises (@p119) :args (@t4874)) % 40.01/40.21 (step @p5925 :rule cnf_or_pos :args (@t4879)) % 40.01/40.21 (step @p5926 :rule reordering :premises (@p5925) :args ((or @t270 @t4872 @t4878 @t3440 (not @t4879)))) % 40.01/40.21 (step @p5927 :rule instantiate :premises (@p120) :args (@t2766)) % 40.01/40.21 (step @p5928 :rule cnf_or_pos :args (@t4882)) % 40.01/40.21 (step @p5929 :rule reordering :premises (@p5928) :args ((or @t4881 @t4880 @t2767 (not @t4882)))) % 40.01/40.21 (step @p5930 :rule instantiate :premises (@p121) :args (@t2765)) % 40.01/40.21 (step @p5931 :rule cnf_or_pos :args (@t4884)) % 40.01/40.21 (step @p5932 :rule reordering :premises (@p5931) :args ((or @t2775 @t4863 @t4883 (not @t4884)))) % 40.01/40.21 (step @p5933 :rule chain_m_resolution :premises (@p4777 @p4775 @p1579 @p4804 @p4802 @p50 @p4780 @p4778 @p51 @p4801 @p4799 @p1608 @p4753 @p4751 @p1550 @p4828 @p4826 @p49 @p4756 @p4754 @p52 @p4825 @p4823 @p1637 @p4729 @p4727 @p1521 @p4852 @p4850 @p48 @p4732 @p4730 @p53 @p4849 @p4847 @p1666 @p4705 @p4703 @p1492 @p4876 @p4874 @p47 @p4708 @p4706 @p54 @p4873 @p4871 @p1695 @p4681 @p4679 @p1463 @p4900 @p4898 @p46 @p4684 @p4682 @p55 @p4897 @p4895 @p1724 @p4657 @p4655 @p1434 @p4924 @p4922 @p45 @p4660 @p4658 @p56 @p4921 @p4919 @p1753 @p4633 @p4631 @p1405 @p4948 @p4946 @p44 @p4636 @p4634 @p57 @p4945 @p4943 @p1782 @p4609 @p4607 @p1376 @p4972 @p4970 @p43 @p4612 @p4610 @p58 @p4969 @p4967 @p1811 @p4585 @p4583 @p1347 @p4996 @p4994 @p42 @p4588 @p4586 @p59 @p4993 @p4991 @p1840 @p4561 @p4559 @p1318 @p5020 @p5018 @p41 @p4564 @p4562 @p60 @p5017 @p5015 @p1869 @p4537 @p4535 @p1289 @p5044 @p5042 @p40 @p4540 @p4538 @p61 @p5041 @p5039 @p1898 @p4513 @p4511 @p1260 @p5068 @p5066 @p39 @p4516 @p4514 @p62 @p5065 @p5063 @p1927 @p4489 @p4487 @p1231 @p5092 @p5090 @p38 @p4492 @p4490 @p63 @p5089 @p5087 @p1956 @p4465 @p4463 @p1202 @p5116 @p5114 @p37 @p4468 @p4466 @p64 @p5113 @p5111 @p1985 @p4441 @p4439 @p1173 @p5140 @p5138 @p36 @p4444 @p4442 @p65 @p5137 @p5135 @p2014 @p4417 @p4415 @p1144 @p5164 @p5162 @p35 @p4420 @p4418 @p66 @p5161 @p5159 @p2043 @p4393 @p4391 @p1115 @p5188 @p5186 @p34 @p4396 @p4394 @p67 @p5185 @p5183 @p2072 @p4369 @p4367 @p1086 @p5212 @p5210 @p33 @p4372 @p4370 @p68 @p5209 @p5207 @p2101 @p4345 @p4343 @p1057 @p5236 @p5234 @p32 @p4348 @p4346 @p69 @p5233 @p5231 @p2130 @p4321 @p4319 @p1028 @p5260 @p5258 @p31 @p4324 @p4322 @p70 @p5257 @p5255 @p2159 @p4297 @p4295 @p999 @p5284 @p5282 @p30 @p4300 @p4298 @p71 @p5281 @p5279 @p2188 @p4273 @p4271 @p970 @p5308 @p5306 @p29 @p4276 @p4274 @p72 @p5305 @p5303 @p2217 @p4249 @p4247 @p941 @p5332 @p5330 @p28 @p4252 @p4250 @p73 @p5329 @p5327 @p2246 @p4225 @p4223 @p912 @p5356 @p5354 @p27 @p4228 @p4226 @p74 @p5353 @p5351 @p2275 @p4201 @p4199 @p883 @p5380 @p5378 @p26 @p4204 @p4202 @p75 @p5377 @p5375 @p2304 @p4177 @p4175 @p854 @p5404 @p5402 @p25 @p4180 @p4178 @p76 @p5401 @p5399 @p2333 @p4153 @p4151 @p825 @p5428 @p5426 @p24 @p4156 @p4154 @p77 @p5425 @p5423 @p2362 @p4129 @p4127 @p796 @p5452 @p5450 @p23 @p4132 @p4130 @p78 @p5449 @p5447 @p2391 @p4105 @p4103 @p767 @p5476 @p5474 @p22 @p4108 @p4106 @p79 @p5473 @p5471 @p2420 @p4081 @p4079 @p738 @p5500 @p5498 @p21 @p4084 @p4082 @p80 @p5497 @p5495 @p2449 @p4057 @p4055 @p709 @p5524 @p5522 @p20 @p4060 @p4058 @p81 @p5521 @p5519 @p2478 @p4033 @p4031 @p680 @p5548 @p5546 @p19 @p4036 @p4034 @p82 @p5545 @p5543 @p2507 @p4009 @p4007 @p651 @p5572 @p5570 @p18 @p4012 @p4010 @p83 @p5569 @p5567 @p2536 @p3985 @p3983 @p622 @p5596 @p5594 @p17 @p3988 @p3986 @p84 @p5593 @p5591 @p2565 @p3961 @p3959 @p593 @p5620 @p5618 @p16 @p3964 @p3962 @p85 @p5617 @p5615 @p2594 @p3937 @p3935 @p564 @p5644 @p5642 @p15 @p3940 @p3938 @p86 @p5641 @p5639 @p2623 @p3913 @p3911 @p535 @p5668 @p5666 @p14 @p3916 @p3914 @p87 @p5665 @p5663 @p2652 @p3889 @p3887 @p506 @p5692 @p5690 @p13 @p3892 @p3890 @p88 @p5689 @p5687 @p2681 @p3865 @p3863 @p477 @p5716 @p5714 @p12 @p3868 @p3866 @p89 @p5713 @p5711 @p2710 @p3841 @p3839 @p448 @p5740 @p5738 @p11 @p3844 @p3842 @p90 @p5737 @p5735 @p2739 @p3817 @p3815 @p419 @p5764 @p5762 @p10 @p3820 @p3818 @p91 @p5761 @p5759 @p2768 @p3793 @p3791 @p390 @p5788 @p5786 @p9 @p3796 @p3794 @p92 @p5785 @p5783 @p2797 @p3769 @p3767 @p361 @p5812 @p5810 @p8 @p3772 @p3770 @p93 @p5809 @p5807 @p2826 @p3745 @p3743 @p332 @p5836 @p5834 @p7 @p3748 @p3746 @p94 @p5833 @p5831 @p2855 @p3721 @p3719 @p303 @p5860 @p5858 @p6 @p3724 @p3722 @p95 @p5857 @p5855 @p2884 @p3697 @p3695 @p274 @p5884 @p5882 @p5 @p3700 @p3698 @p96 @p5881 @p5879 @p2913 @p3673 @p3671 @p245 @p5908 @p5906 @p4 @p3676 @p3674 @p97 @p5905 @p5903 @p2942 @p3649 @p3647 @p216 @p5932 @p5930 @p3 @p3652 @p3650 @p98 @p5929 @p5927 @p2971 @p3628 @p3626 @p187 @p5926 @p5924 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5923) :args (@t4872 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4162 @t1519 @t4158 @t4179 @t50 @t4161 @t4164 @t51 @t4176 @t4177 @t1545 @t4143 @t4147 @t1493 @t4173 @t4194 @t49 @t4146 @t4149 @t52 @t4191 @t4192 @t1571 @t4128 @t4132 @t1467 @t4188 @t4209 @t48 @t4131 @t4134 @t53 @t4206 @t4207 @t1597 @t4113 @t4117 @t1441 @t4203 @t4224 @t47 @t4116 @t4119 @t54 @t4221 @t4222 @t1623 @t4098 @t4102 @t1415 @t4218 @t4239 @t46 @t4101 @t4104 @t55 @t4236 @t4237 @t1649 @t4083 @t4087 @t1389 @t4233 @t4254 @t45 @t4086 @t4089 @t56 @t4251 @t4252 @t1675 @t4068 @t4072 @t1363 @t4248 @t4269 @t44 @t4071 @t4074 @t57 @t4266 @t4267 @t1701 @t4053 @t4057 @t1337 @t4263 @t4284 @t43 @t4056 @t4059 @t58 @t4281 @t4282 @t1727 @t4038 @t4042 @t1311 @t4278 @t4299 @t42 @t4041 @t4044 @t59 @t4296 @t4297 @t1753 @t4023 @t4027 @t1285 @t4293 @t4314 @t41 @t4026 @t4029 @t60 @t4311 @t4312 @t1779 @t4008 @t4012 @t1259 @t4308 @t4329 @t40 @t4011 @t4014 @t61 @t4326 @t4327 @t1805 @t3993 @t3997 @t1233 @t4323 @t4344 @t39 @t3996 @t3999 @t62 @t4341 @t4342 @t1831 @t3978 @t3982 @t1207 @t4338 @t4359 @t38 @t3981 @t3984 @t63 @t4356 @t4357 @t1857 @t3963 @t3967 @t1181 @t4353 @t4374 @t37 @t3966 @t3969 @t64 @t4371 @t4372 @t1883 @t3948 @t3952 @t1155 @t4368 @t4389 @t36 @t3951 @t3954 @t65 @t4386 @t4387 @t1909 @t3933 @t3937 @t1129 @t4383 @t4404 @t35 @t3936 @t3939 @t66 @t4401 @t4402 @t1935 @t3918 @t3922 @t1103 @t4398 @t4419 @t34 @t3921 @t3924 @t67 @t4416 @t4417 @t1961 @t3903 @t3907 @t1077 @t4413 @t4434 @t33 @t3906 @t3909 @t68 @t4431 @t4432 @t1987 @t3888 @t3892 @t1051 @t4428 @t4449 @t32 @t3891 @t3894 @t69 @t4446 @t4447 @t2013 @t3873 @t3877 @t1025 @t4443 @t4464 @t31 @t3876 @t3879 @t70 @t4461 @t4462 @t2039 @t3858 @t3862 @t999 @t4458 @t4479 @t30 @t3861 @t3864 @t71 @t4476 @t4477 @t2065 @t3843 @t3847 @t973 @t4473 @t4494 @t29 @t3846 @t3849 @t72 @t4491 @t4492 @t2091 @t3828 @t3832 @t947 @t4488 @t4509 @t28 @t3831 @t3834 @t73 @t4506 @t4507 @t2117 @t3813 @t3817 @t921 @t4503 @t4524 @t27 @t3816 @t3819 @t74 @t4521 @t4522 @t2143 @t3798 @t3802 @t895 @t4518 @t4539 @t26 @t3801 @t3804 @t75 @t4536 @t4537 @t2169 @t3783 @t3787 @t869 @t4533 @t4554 @t25 @t3786 @t3789 @t76 @t4551 @t4552 @t2195 @t3768 @t3772 @t843 @t4548 @t4569 @t24 @t3771 @t3774 @t77 @t4566 @t4567 @t2221 @t3753 @t3757 @t817 @t4563 @t4584 @t23 @t3756 @t3759 @t78 @t4581 @t4582 @t2247 @t3738 @t3742 @t791 @t4578 @t4599 @t22 @t3741 @t3744 @t79 @t4596 @t4597 @t2273 @t3723 @t3727 @t765 @t4593 @t4614 @t21 @t3726 @t3729 @t80 @t4611 @t4612 @t2299 @t3708 @t3712 @t739 @t4608 @t4629 @t20 @t3711 @t3714 @t81 @t4626 @t4627 @t2325 @t3693 @t3697 @t713 @t4623 @t4644 @t19 @t3696 @t3699 @t82 @t4641 @t4642 @t2351 @t3678 @t3682 @t687 @t4638 @t4659 @t18 @t3681 @t3684 @t83 @t4656 @t4657 @t2377 @t3663 @t3667 @t661 @t4653 @t4674 @t17 @t3666 @t3669 @t84 @t4671 @t4672 @t2403 @t3648 @t3652 @t635 @t4668 @t4689 @t16 @t3651 @t3654 @t85 @t4686 @t4687 @t2429 @t3633 @t3637 @t609 @t4683 @t4704 @t15 @t3636 @t3639 @t86 @t4701 @t4702 @t2455 @t3618 @t3622 @t583 @t4698 @t4719 @t14 @t3621 @t3624 @t87 @t4716 @t4717 @t2481 @t3603 @t3607 @t557 @t4713 @t4734 @t13 @t3606 @t3609 @t88 @t4731 @t4732 @t2507 @t3588 @t3592 @t531 @t4728 @t4749 @t12 @t3591 @t3594 @t89 @t4746 @t4747 @t2533 @t3573 @t3577 @t505 @t4743 @t4764 @t11 @t3576 @t3579 @t90 @t4761 @t4762 @t2559 @t3558 @t3562 @t479 @t4758 @t4779 @t10 @t3561 @t3564 @t91 @t4776 @t4777 @t2585 @t3543 @t3547 @t453 @t4773 @t4794 @t9 @t3546 @t3549 @t92 @t4791 @t4792 @t2611 @t3528 @t3532 @t427 @t4788 @t4809 @t8 @t3531 @t3534 @t93 @t4806 @t4807 @t2637 @t3513 @t3517 @t401 @t4803 @t4824 @t7 @t3516 @t3519 @t94 @t4821 @t4822 @t2663 @t3498 @t3502 @t375 @t4818 @t4839 @t6 @t3501 @t3504 @t95 @t4836 @t4837 @t2689 @t3483 @t3487 @t349 @t4833 @t4854 @t5 @t3486 @t3489 @t96 @t4851 @t4852 @t2715 @t3468 @t3472 @t323 @t4848 @t4869 @t4 @t3471 @t3474 @t97 @t4866 @t4867 @t2741 @t3453 @t3457 @t297 @t4863 @t4884 @t3 @t3456 @t3459 @t98 @t4881 @t4882 @t2767 @t3441 @t3444 @t276 @t4878 @t4879 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (assume-push @p6217 @t220) % 40.01/40.21 (step @p5935 :rule instantiate :premises (@p110) :args (@t4885)) % 40.01/40.21 (step-pop @p6218 :rule scope :premises (@p5935)) % 40.01/40.21 (step @p5936 :rule process_scope :premises (@p6218) :args (@t4888)) % 40.01/40.21 (step @p5938 :rule implies_elim :premises (@p5936)) % 40.01/40.21 (step @p5939 :rule cnf_or_pos :args (@t4888)) % 40.01/40.21 (step @p5940 :rule reordering :premises (@p5939) :args ((or @t4887 @t4886 (not @t4888)))) % 40.01/40.21 (step @p5941 :rule instantiate :premises (@p112) :args (@t4889)) % 40.01/40.21 (step @p5942 :rule cnf_or_pos :args (@t4890)) % 40.01/40.21 (step @p5943 :rule reordering :premises (@p5942) :args ((or @t4887 @t244 @t2795 (not @t4890)))) % 40.01/40.21 (step @p5944 :rule instantiate :premises (@p108) :args (@t4885)) % 40.01/40.21 (step @p5945 :rule cnf_or_pos :args (@t4892)) % 40.01/40.21 (step @p5946 :rule reordering :premises (@p5945) :args ((or @t2806 @t265 @t264 @t4891 (not @t4892)))) % 40.01/40.21 (step @p5947 :rule chain_m_resolution :premises (@p5946 @p5944 @p2989 @p2987 @p136 @p134 @p5943 @p5941 @p133 @p131 @p130 @p128 @p127 @p125 @p5940 @p5938 @p110) :args ((or @t4887 @t239) @t267 (@list @t4892 @t2806 @t2808 @t248 @t249 @t2795 @t4890 @t245 @t247 @t242 @t243 @t240 @t241 @t4886 @t4888 @t220))) % 40.01/40.21 (step @p5948 :rule instantiate :premises (@p119) :args (@t4889)) % 40.01/40.21 (step @p5949 :rule cnf_or_pos :args (@t4894)) % 40.01/40.21 (step @p5950 :rule reordering :premises (@p5949) :args ((or @t270 @t4887 @t4893 @t3440 (not @t4894)))) % 40.01/40.21 (step @p5951 :rule instantiate :premises (@p120) :args (@t2792)) % 40.01/40.21 (step @p5952 :rule cnf_or_pos :args (@t4897)) % 40.01/40.21 (step @p5953 :rule reordering :premises (@p5952) :args ((or @t4896 @t4895 @t2793 (not @t4897)))) % 40.01/40.21 (step @p5954 :rule instantiate :premises (@p121) :args (@t2791)) % 40.01/40.21 (step @p5955 :rule cnf_or_pos :args (@t4899)) % 40.01/40.21 (step @p5956 :rule reordering :premises (@p5955) :args ((or @t2801 @t4878 @t4898 (not @t4899)))) % 40.01/40.21 (step @p5957 :rule chain_m_resolution :premises (@p4804 @p4802 @p50 @p4801 @p4799 @p1608 @p4777 @p4775 @p1579 @p4828 @p4826 @p49 @p4780 @p4778 @p51 @p4825 @p4823 @p1637 @p4753 @p4751 @p1550 @p4852 @p4850 @p48 @p4756 @p4754 @p52 @p4849 @p4847 @p1666 @p4729 @p4727 @p1521 @p4876 @p4874 @p47 @p4732 @p4730 @p53 @p4873 @p4871 @p1695 @p4705 @p4703 @p1492 @p4900 @p4898 @p46 @p4708 @p4706 @p54 @p4897 @p4895 @p1724 @p4681 @p4679 @p1463 @p4924 @p4922 @p45 @p4684 @p4682 @p55 @p4921 @p4919 @p1753 @p4657 @p4655 @p1434 @p4948 @p4946 @p44 @p4660 @p4658 @p56 @p4945 @p4943 @p1782 @p4633 @p4631 @p1405 @p4972 @p4970 @p43 @p4636 @p4634 @p57 @p4969 @p4967 @p1811 @p4609 @p4607 @p1376 @p4996 @p4994 @p42 @p4612 @p4610 @p58 @p4993 @p4991 @p1840 @p4585 @p4583 @p1347 @p5020 @p5018 @p41 @p4588 @p4586 @p59 @p5017 @p5015 @p1869 @p4561 @p4559 @p1318 @p5044 @p5042 @p40 @p4564 @p4562 @p60 @p5041 @p5039 @p1898 @p4537 @p4535 @p1289 @p5068 @p5066 @p39 @p4540 @p4538 @p61 @p5065 @p5063 @p1927 @p4513 @p4511 @p1260 @p5092 @p5090 @p38 @p4516 @p4514 @p62 @p5089 @p5087 @p1956 @p4489 @p4487 @p1231 @p5116 @p5114 @p37 @p4492 @p4490 @p63 @p5113 @p5111 @p1985 @p4465 @p4463 @p1202 @p5140 @p5138 @p36 @p4468 @p4466 @p64 @p5137 @p5135 @p2014 @p4441 @p4439 @p1173 @p5164 @p5162 @p35 @p4444 @p4442 @p65 @p5161 @p5159 @p2043 @p4417 @p4415 @p1144 @p5188 @p5186 @p34 @p4420 @p4418 @p66 @p5185 @p5183 @p2072 @p4393 @p4391 @p1115 @p5212 @p5210 @p33 @p4396 @p4394 @p67 @p5209 @p5207 @p2101 @p4369 @p4367 @p1086 @p5236 @p5234 @p32 @p4372 @p4370 @p68 @p5233 @p5231 @p2130 @p4345 @p4343 @p1057 @p5260 @p5258 @p31 @p4348 @p4346 @p69 @p5257 @p5255 @p2159 @p4321 @p4319 @p1028 @p5284 @p5282 @p30 @p4324 @p4322 @p70 @p5281 @p5279 @p2188 @p4297 @p4295 @p999 @p5308 @p5306 @p29 @p4300 @p4298 @p71 @p5305 @p5303 @p2217 @p4273 @p4271 @p970 @p5332 @p5330 @p28 @p4276 @p4274 @p72 @p5329 @p5327 @p2246 @p4249 @p4247 @p941 @p5356 @p5354 @p27 @p4252 @p4250 @p73 @p5353 @p5351 @p2275 @p4225 @p4223 @p912 @p5380 @p5378 @p26 @p4228 @p4226 @p74 @p5377 @p5375 @p2304 @p4201 @p4199 @p883 @p5404 @p5402 @p25 @p4204 @p4202 @p75 @p5401 @p5399 @p2333 @p4177 @p4175 @p854 @p5428 @p5426 @p24 @p4180 @p4178 @p76 @p5425 @p5423 @p2362 @p4153 @p4151 @p825 @p5452 @p5450 @p23 @p4156 @p4154 @p77 @p5449 @p5447 @p2391 @p4129 @p4127 @p796 @p5476 @p5474 @p22 @p4132 @p4130 @p78 @p5473 @p5471 @p2420 @p4105 @p4103 @p767 @p5500 @p5498 @p21 @p4108 @p4106 @p79 @p5497 @p5495 @p2449 @p4081 @p4079 @p738 @p5524 @p5522 @p20 @p4084 @p4082 @p80 @p5521 @p5519 @p2478 @p4057 @p4055 @p709 @p5548 @p5546 @p19 @p4060 @p4058 @p81 @p5545 @p5543 @p2507 @p4033 @p4031 @p680 @p5572 @p5570 @p18 @p4036 @p4034 @p82 @p5569 @p5567 @p2536 @p4009 @p4007 @p651 @p5596 @p5594 @p17 @p4012 @p4010 @p83 @p5593 @p5591 @p2565 @p3985 @p3983 @p622 @p5620 @p5618 @p16 @p3988 @p3986 @p84 @p5617 @p5615 @p2594 @p3961 @p3959 @p593 @p5644 @p5642 @p15 @p3964 @p3962 @p85 @p5641 @p5639 @p2623 @p3937 @p3935 @p564 @p5668 @p5666 @p14 @p3940 @p3938 @p86 @p5665 @p5663 @p2652 @p3913 @p3911 @p535 @p5692 @p5690 @p13 @p3916 @p3914 @p87 @p5689 @p5687 @p2681 @p3889 @p3887 @p506 @p5716 @p5714 @p12 @p3892 @p3890 @p88 @p5713 @p5711 @p2710 @p3865 @p3863 @p477 @p5740 @p5738 @p11 @p3868 @p3866 @p89 @p5737 @p5735 @p2739 @p3841 @p3839 @p448 @p5764 @p5762 @p10 @p3844 @p3842 @p90 @p5761 @p5759 @p2768 @p3817 @p3815 @p419 @p5788 @p5786 @p9 @p3820 @p3818 @p91 @p5785 @p5783 @p2797 @p3793 @p3791 @p390 @p5812 @p5810 @p8 @p3796 @p3794 @p92 @p5809 @p5807 @p2826 @p3769 @p3767 @p361 @p5836 @p5834 @p7 @p3772 @p3770 @p93 @p5833 @p5831 @p2855 @p3745 @p3743 @p332 @p5860 @p5858 @p6 @p3748 @p3746 @p94 @p5857 @p5855 @p2884 @p3721 @p3719 @p303 @p5884 @p5882 @p5 @p3724 @p3722 @p95 @p5881 @p5879 @p2913 @p3697 @p3695 @p274 @p5908 @p5906 @p4 @p3700 @p3698 @p96 @p5905 @p5903 @p2942 @p3673 @p3671 @p245 @p5932 @p5930 @p3 @p3676 @p3674 @p97 @p5929 @p5927 @p2971 @p3649 @p3647 @p216 @p5956 @p5954 @p2 @p3652 @p3650 @p98 @p5953 @p5951 @p3000 @p3628 @p3626 @p187 @p5950 @p5948 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5947) :args (@t4887 (@list false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true) (@list @t4179 @t50 @t4176 @t4177 @t1545 @t4158 @t4162 @t1519 @t4173 @t4194 @t49 @t4161 @t4164 @t51 @t4191 @t4192 @t1571 @t4143 @t4147 @t1493 @t4188 @t4209 @t48 @t4146 @t4149 @t52 @t4206 @t4207 @t1597 @t4128 @t4132 @t1467 @t4203 @t4224 @t47 @t4131 @t4134 @t53 @t4221 @t4222 @t1623 @t4113 @t4117 @t1441 @t4218 @t4239 @t46 @t4116 @t4119 @t54 @t4236 @t4237 @t1649 @t4098 @t4102 @t1415 @t4233 @t4254 @t45 @t4101 @t4104 @t55 @t4251 @t4252 @t1675 @t4083 @t4087 @t1389 @t4248 @t4269 @t44 @t4086 @t4089 @t56 @t4266 @t4267 @t1701 @t4068 @t4072 @t1363 @t4263 @t4284 @t43 @t4071 @t4074 @t57 @t4281 @t4282 @t1727 @t4053 @t4057 @t1337 @t4278 @t4299 @t42 @t4056 @t4059 @t58 @t4296 @t4297 @t1753 @t4038 @t4042 @t1311 @t4293 @t4314 @t41 @t4041 @t4044 @t59 @t4311 @t4312 @t1779 @t4023 @t4027 @t1285 @t4308 @t4329 @t40 @t4026 @t4029 @t60 @t4326 @t4327 @t1805 @t4008 @t4012 @t1259 @t4323 @t4344 @t39 @t4011 @t4014 @t61 @t4341 @t4342 @t1831 @t3993 @t3997 @t1233 @t4338 @t4359 @t38 @t3996 @t3999 @t62 @t4356 @t4357 @t1857 @t3978 @t3982 @t1207 @t4353 @t4374 @t37 @t3981 @t3984 @t63 @t4371 @t4372 @t1883 @t3963 @t3967 @t1181 @t4368 @t4389 @t36 @t3966 @t3969 @t64 @t4386 @t4387 @t1909 @t3948 @t3952 @t1155 @t4383 @t4404 @t35 @t3951 @t3954 @t65 @t4401 @t4402 @t1935 @t3933 @t3937 @t1129 @t4398 @t4419 @t34 @t3936 @t3939 @t66 @t4416 @t4417 @t1961 @t3918 @t3922 @t1103 @t4413 @t4434 @t33 @t3921 @t3924 @t67 @t4431 @t4432 @t1987 @t3903 @t3907 @t1077 @t4428 @t4449 @t32 @t3906 @t3909 @t68 @t4446 @t4447 @t2013 @t3888 @t3892 @t1051 @t4443 @t4464 @t31 @t3891 @t3894 @t69 @t4461 @t4462 @t2039 @t3873 @t3877 @t1025 @t4458 @t4479 @t30 @t3876 @t3879 @t70 @t4476 @t4477 @t2065 @t3858 @t3862 @t999 @t4473 @t4494 @t29 @t3861 @t3864 @t71 @t4491 @t4492 @t2091 @t3843 @t3847 @t973 @t4488 @t4509 @t28 @t3846 @t3849 @t72 @t4506 @t4507 @t2117 @t3828 @t3832 @t947 @t4503 @t4524 @t27 @t3831 @t3834 @t73 @t4521 @t4522 @t2143 @t3813 @t3817 @t921 @t4518 @t4539 @t26 @t3816 @t3819 @t74 @t4536 @t4537 @t2169 @t3798 @t3802 @t895 @t4533 @t4554 @t25 @t3801 @t3804 @t75 @t4551 @t4552 @t2195 @t3783 @t3787 @t869 @t4548 @t4569 @t24 @t3786 @t3789 @t76 @t4566 @t4567 @t2221 @t3768 @t3772 @t843 @t4563 @t4584 @t23 @t3771 @t3774 @t77 @t4581 @t4582 @t2247 @t3753 @t3757 @t817 @t4578 @t4599 @t22 @t3756 @t3759 @t78 @t4596 @t4597 @t2273 @t3738 @t3742 @t791 @t4593 @t4614 @t21 @t3741 @t3744 @t79 @t4611 @t4612 @t2299 @t3723 @t3727 @t765 @t4608 @t4629 @t20 @t3726 @t3729 @t80 @t4626 @t4627 @t2325 @t3708 @t3712 @t739 @t4623 @t4644 @t19 @t3711 @t3714 @t81 @t4641 @t4642 @t2351 @t3693 @t3697 @t713 @t4638 @t4659 @t18 @t3696 @t3699 @t82 @t4656 @t4657 @t2377 @t3678 @t3682 @t687 @t4653 @t4674 @t17 @t3681 @t3684 @t83 @t4671 @t4672 @t2403 @t3663 @t3667 @t661 @t4668 @t4689 @t16 @t3666 @t3669 @t84 @t4686 @t4687 @t2429 @t3648 @t3652 @t635 @t4683 @t4704 @t15 @t3651 @t3654 @t85 @t4701 @t4702 @t2455 @t3633 @t3637 @t609 @t4698 @t4719 @t14 @t3636 @t3639 @t86 @t4716 @t4717 @t2481 @t3618 @t3622 @t583 @t4713 @t4734 @t13 @t3621 @t3624 @t87 @t4731 @t4732 @t2507 @t3603 @t3607 @t557 @t4728 @t4749 @t12 @t3606 @t3609 @t88 @t4746 @t4747 @t2533 @t3588 @t3592 @t531 @t4743 @t4764 @t11 @t3591 @t3594 @t89 @t4761 @t4762 @t2559 @t3573 @t3577 @t505 @t4758 @t4779 @t10 @t3576 @t3579 @t90 @t4776 @t4777 @t2585 @t3558 @t3562 @t479 @t4773 @t4794 @t9 @t3561 @t3564 @t91 @t4791 @t4792 @t2611 @t3543 @t3547 @t453 @t4788 @t4809 @t8 @t3546 @t3549 @t92 @t4806 @t4807 @t2637 @t3528 @t3532 @t427 @t4803 @t4824 @t7 @t3531 @t3534 @t93 @t4821 @t4822 @t2663 @t3513 @t3517 @t401 @t4818 @t4839 @t6 @t3516 @t3519 @t94 @t4836 @t4837 @t2689 @t3498 @t3502 @t375 @t4833 @t4854 @t5 @t3501 @t3504 @t95 @t4851 @t4852 @t2715 @t3483 @t3487 @t349 @t4848 @t4869 @t4 @t3486 @t3489 @t96 @t4866 @t4867 @t2741 @t3468 @t3472 @t323 @t4863 @t4884 @t3 @t3471 @t3474 @t97 @t4881 @t4882 @t2767 @t3453 @t3457 @t297 @t4878 @t4899 @t2 @t3456 @t3459 @t98 @t4896 @t4897 @t2793 @t3441 @t3444 @t276 @t4893 @t4894 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238))) % 40.01/40.21 (step @p5958 :rule instantiate :premises (@p110) :args (@t4900)) % 40.01/40.21 (step @p5959 :rule cnf_or_pos :args (@t4903)) % 40.01/40.21 (step @p5960 :rule reordering :premises (@p5959) :args ((or @t4902 @t4901 (not @t4903)))) % 40.01/40.21 (step @p5961 :rule instantiate :premises (@p104) :args (@t2818)) % 40.01/40.21 (step @p5962 :rule cnf_or_pos :args (@t4906)) % 40.01/40.21 (step @p5963 :rule reordering :premises (@p5962) :args ((or @t2834 @t4905 (not @t4906)))) % 40.01/40.21 (step @p5964 :rule chain_m_resolution :premises (@p5963 @p105 @p5961) :args (@t4905 @t272 (@list @t211 @t4906))) % 40.01/40.21 (step @p5965 :rule instantiate :premises (@p108) :args (@t4900)) % 40.01/40.21 (step @p5966 :rule cnf_or_pos :args (@t4908)) % 40.01/40.21 (step @p5967 :rule reordering :premises (@p5966) :args ((or @t4904 @t265 @t4907 @t264 (not @t4908)))) % 40.01/40.21 (step @p5968 :rule chain_m_resolution :premises (@p136 @p134 @p5967 @p5965 @p5964 @p133 @p131 @p130 @p128 @p127 @p125) :args ((or @t239 @t4907) (@list false true false true true false false false false false) (@list @t249 @t248 @t4908 @t4904 @t245 @t247 @t242 @t243 @t240 @t241))) % 40.01/40.21 (step @p5969 :rule instantiate :premises (@p119) :args ((@list tptp.s0 tptp.s99))) % 40.01/40.21 (step @p5970 :rule cnf_or_pos :args (@t4910)) % 40.01/40.21 (step @p5971 :rule reordering :premises (@p5970) :args ((or @t270 @t4902 @t3440 @t4909 (not @t4910)))) % 40.01/40.21 (step @p5972 :rule instantiate :premises (@p120) :args (@t2818)) % 40.01/40.21 (step @p5973 :rule cnf_or_pos :args (@t4913)) % 40.01/40.21 (step @p5974 :rule reordering :premises (@p5973) :args ((or @t2819 @t4912 @t4911 (not @t4913)))) % 40.01/40.21 (step @p5975 :rule instantiate :premises (@p121) :args (@t2817)) % 40.01/40.21 (step @p5976 :rule cnf_or_pos :args (@t4915)) % 40.01/40.21 (step @p5977 :rule reordering :premises (@p5976) :args ((or @t2827 @t4893 @t4914 (not @t4915)))) % 40.01/40.21 (step @p5978 :rule chain_m_resolution :premises (@p4801 @p4799 @p1608 @p4828 @p4826 @p49 @p4804 @p4802 @p50 @p4825 @p4823 @p1637 @p4777 @p4775 @p1579 @p4852 @p4850 @p48 @p4780 @p4778 @p51 @p4849 @p4847 @p1666 @p4753 @p4751 @p1550 @p4876 @p4874 @p47 @p4756 @p4754 @p52 @p4873 @p4871 @p1695 @p4729 @p4727 @p1521 @p4900 @p4898 @p46 @p4732 @p4730 @p53 @p4897 @p4895 @p1724 @p4705 @p4703 @p1492 @p4924 @p4922 @p45 @p4708 @p4706 @p54 @p4921 @p4919 @p1753 @p4681 @p4679 @p1463 @p4948 @p4946 @p44 @p4684 @p4682 @p55 @p4945 @p4943 @p1782 @p4657 @p4655 @p1434 @p4972 @p4970 @p43 @p4660 @p4658 @p56 @p4969 @p4967 @p1811 @p4633 @p4631 @p1405 @p4996 @p4994 @p42 @p4636 @p4634 @p57 @p4993 @p4991 @p1840 @p4609 @p4607 @p1376 @p5020 @p5018 @p41 @p4612 @p4610 @p58 @p5017 @p5015 @p1869 @p4585 @p4583 @p1347 @p5044 @p5042 @p40 @p4588 @p4586 @p59 @p5041 @p5039 @p1898 @p4561 @p4559 @p1318 @p5068 @p5066 @p39 @p4564 @p4562 @p60 @p5065 @p5063 @p1927 @p4537 @p4535 @p1289 @p5092 @p5090 @p38 @p4540 @p4538 @p61 @p5089 @p5087 @p1956 @p4513 @p4511 @p1260 @p5116 @p5114 @p37 @p4516 @p4514 @p62 @p5113 @p5111 @p1985 @p4489 @p4487 @p1231 @p5140 @p5138 @p36 @p4492 @p4490 @p63 @p5137 @p5135 @p2014 @p4465 @p4463 @p1202 @p5164 @p5162 @p35 @p4468 @p4466 @p64 @p5161 @p5159 @p2043 @p4441 @p4439 @p1173 @p5188 @p5186 @p34 @p4444 @p4442 @p65 @p5185 @p5183 @p2072 @p4417 @p4415 @p1144 @p5212 @p5210 @p33 @p4420 @p4418 @p66 @p5209 @p5207 @p2101 @p4393 @p4391 @p1115 @p5236 @p5234 @p32 @p4396 @p4394 @p67 @p5233 @p5231 @p2130 @p4369 @p4367 @p1086 @p5260 @p5258 @p31 @p4372 @p4370 @p68 @p5257 @p5255 @p2159 @p4345 @p4343 @p1057 @p5284 @p5282 @p30 @p4348 @p4346 @p69 @p5281 @p5279 @p2188 @p4321 @p4319 @p1028 @p5308 @p5306 @p29 @p4324 @p4322 @p70 @p5305 @p5303 @p2217 @p4297 @p4295 @p999 @p5332 @p5330 @p28 @p4300 @p4298 @p71 @p5329 @p5327 @p2246 @p4273 @p4271 @p970 @p5356 @p5354 @p27 @p4276 @p4274 @p72 @p5353 @p5351 @p2275 @p4249 @p4247 @p941 @p5380 @p5378 @p26 @p4252 @p4250 @p73 @p5377 @p5375 @p2304 @p4225 @p4223 @p912 @p5404 @p5402 @p25 @p4228 @p4226 @p74 @p5401 @p5399 @p2333 @p4201 @p4199 @p883 @p5428 @p5426 @p24 @p4204 @p4202 @p75 @p5425 @p5423 @p2362 @p4177 @p4175 @p854 @p5452 @p5450 @p23 @p4180 @p4178 @p76 @p5449 @p5447 @p2391 @p4153 @p4151 @p825 @p5476 @p5474 @p22 @p4156 @p4154 @p77 @p5473 @p5471 @p2420 @p4129 @p4127 @p796 @p5500 @p5498 @p21 @p4132 @p4130 @p78 @p5497 @p5495 @p2449 @p4105 @p4103 @p767 @p5524 @p5522 @p20 @p4108 @p4106 @p79 @p5521 @p5519 @p2478 @p4081 @p4079 @p738 @p5548 @p5546 @p19 @p4084 @p4082 @p80 @p5545 @p5543 @p2507 @p4057 @p4055 @p709 @p5572 @p5570 @p18 @p4060 @p4058 @p81 @p5569 @p5567 @p2536 @p4033 @p4031 @p680 @p5596 @p5594 @p17 @p4036 @p4034 @p82 @p5593 @p5591 @p2565 @p4009 @p4007 @p651 @p5620 @p5618 @p16 @p4012 @p4010 @p83 @p5617 @p5615 @p2594 @p3985 @p3983 @p622 @p5644 @p5642 @p15 @p3988 @p3986 @p84 @p5641 @p5639 @p2623 @p3961 @p3959 @p593 @p5668 @p5666 @p14 @p3964 @p3962 @p85 @p5665 @p5663 @p2652 @p3937 @p3935 @p564 @p5692 @p5690 @p13 @p3940 @p3938 @p86 @p5689 @p5687 @p2681 @p3913 @p3911 @p535 @p5716 @p5714 @p12 @p3916 @p3914 @p87 @p5713 @p5711 @p2710 @p3889 @p3887 @p506 @p5740 @p5738 @p11 @p3892 @p3890 @p88 @p5737 @p5735 @p2739 @p3865 @p3863 @p477 @p5764 @p5762 @p10 @p3868 @p3866 @p89 @p5761 @p5759 @p2768 @p3841 @p3839 @p448 @p5788 @p5786 @p9 @p3844 @p3842 @p90 @p5785 @p5783 @p2797 @p3817 @p3815 @p419 @p5812 @p5810 @p8 @p3820 @p3818 @p91 @p5809 @p5807 @p2826 @p3793 @p3791 @p390 @p5836 @p5834 @p7 @p3796 @p3794 @p92 @p5833 @p5831 @p2855 @p3769 @p3767 @p361 @p5860 @p5858 @p6 @p3772 @p3770 @p93 @p5857 @p5855 @p2884 @p3745 @p3743 @p332 @p5884 @p5882 @p5 @p3748 @p3746 @p94 @p5881 @p5879 @p2913 @p3721 @p3719 @p303 @p5908 @p5906 @p4 @p3724 @p3722 @p95 @p5905 @p5903 @p2942 @p3697 @p3695 @p274 @p5932 @p5930 @p3 @p3700 @p3698 @p96 @p5929 @p5927 @p2971 @p3673 @p3671 @p245 @p5956 @p5954 @p2 @p3676 @p3674 @p97 @p5953 @p5951 @p3000 @p3649 @p3647 @p216 @p5977 @p5975 @p1 @p3652 @p3650 @p98 @p5974 @p5972 @p3023 @p3628 @p3626 @p187 @p5971 @p5969 @p100 @p3622 @p3620 @p99 @p3619 @p124 @p3617 @p161 @p159 @p158 @p5968 @p5960 @p5958) :args (@t4902 (@list false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false true true false true false false false true false false false false false true false true true false false) (@list @t4177 @t1545 @t4173 @t4194 @t49 @t4176 @t4179 @t50 @t4191 @t4192 @t1571 @t4158 @t4162 @t1519 @t4188 @t4209 @t48 @t4161 @t4164 @t51 @t4206 @t4207 @t1597 @t4143 @t4147 @t1493 @t4203 @t4224 @t47 @t4146 @t4149 @t52 @t4221 @t4222 @t1623 @t4128 @t4132 @t1467 @t4218 @t4239 @t46 @t4131 @t4134 @t53 @t4236 @t4237 @t1649 @t4113 @t4117 @t1441 @t4233 @t4254 @t45 @t4116 @t4119 @t54 @t4251 @t4252 @t1675 @t4098 @t4102 @t1415 @t4248 @t4269 @t44 @t4101 @t4104 @t55 @t4266 @t4267 @t1701 @t4083 @t4087 @t1389 @t4263 @t4284 @t43 @t4086 @t4089 @t56 @t4281 @t4282 @t1727 @t4068 @t4072 @t1363 @t4278 @t4299 @t42 @t4071 @t4074 @t57 @t4296 @t4297 @t1753 @t4053 @t4057 @t1337 @t4293 @t4314 @t41 @t4056 @t4059 @t58 @t4311 @t4312 @t1779 @t4038 @t4042 @t1311 @t4308 @t4329 @t40 @t4041 @t4044 @t59 @t4326 @t4327 @t1805 @t4023 @t4027 @t1285 @t4323 @t4344 @t39 @t4026 @t4029 @t60 @t4341 @t4342 @t1831 @t4008 @t4012 @t1259 @t4338 @t4359 @t38 @t4011 @t4014 @t61 @t4356 @t4357 @t1857 @t3993 @t3997 @t1233 @t4353 @t4374 @t37 @t3996 @t3999 @t62 @t4371 @t4372 @t1883 @t3978 @t3982 @t1207 @t4368 @t4389 @t36 @t3981 @t3984 @t63 @t4386 @t4387 @t1909 @t3963 @t3967 @t1181 @t4383 @t4404 @t35 @t3966 @t3969 @t64 @t4401 @t4402 @t1935 @t3948 @t3952 @t1155 @t4398 @t4419 @t34 @t3951 @t3954 @t65 @t4416 @t4417 @t1961 @t3933 @t3937 @t1129 @t4413 @t4434 @t33 @t3936 @t3939 @t66 @t4431 @t4432 @t1987 @t3918 @t3922 @t1103 @t4428 @t4449 @t32 @t3921 @t3924 @t67 @t4446 @t4447 @t2013 @t3903 @t3907 @t1077 @t4443 @t4464 @t31 @t3906 @t3909 @t68 @t4461 @t4462 @t2039 @t3888 @t3892 @t1051 @t4458 @t4479 @t30 @t3891 @t3894 @t69 @t4476 @t4477 @t2065 @t3873 @t3877 @t1025 @t4473 @t4494 @t29 @t3876 @t3879 @t70 @t4491 @t4492 @t2091 @t3858 @t3862 @t999 @t4488 @t4509 @t28 @t3861 @t3864 @t71 @t4506 @t4507 @t2117 @t3843 @t3847 @t973 @t4503 @t4524 @t27 @t3846 @t3849 @t72 @t4521 @t4522 @t2143 @t3828 @t3832 @t947 @t4518 @t4539 @t26 @t3831 @t3834 @t73 @t4536 @t4537 @t2169 @t3813 @t3817 @t921 @t4533 @t4554 @t25 @t3816 @t3819 @t74 @t4551 @t4552 @t2195 @t3798 @t3802 @t895 @t4548 @t4569 @t24 @t3801 @t3804 @t75 @t4566 @t4567 @t2221 @t3783 @t3787 @t869 @t4563 @t4584 @t23 @t3786 @t3789 @t76 @t4581 @t4582 @t2247 @t3768 @t3772 @t843 @t4578 @t4599 @t22 @t3771 @t3774 @t77 @t4596 @t4597 @t2273 @t3753 @t3757 @t817 @t4593 @t4614 @t21 @t3756 @t3759 @t78 @t4611 @t4612 @t2299 @t3738 @t3742 @t791 @t4608 @t4629 @t20 @t3741 @t3744 @t79 @t4626 @t4627 @t2325 @t3723 @t3727 @t765 @t4623 @t4644 @t19 @t3726 @t3729 @t80 @t4641 @t4642 @t2351 @t3708 @t3712 @t739 @t4638 @t4659 @t18 @t3711 @t3714 @t81 @t4656 @t4657 @t2377 @t3693 @t3697 @t713 @t4653 @t4674 @t17 @t3696 @t3699 @t82 @t4671 @t4672 @t2403 @t3678 @t3682 @t687 @t4668 @t4689 @t16 @t3681 @t3684 @t83 @t4686 @t4687 @t2429 @t3663 @t3667 @t661 @t4683 @t4704 @t15 @t3666 @t3669 @t84 @t4701 @t4702 @t2455 @t3648 @t3652 @t635 @t4698 @t4719 @t14 @t3651 @t3654 @t85 @t4716 @t4717 @t2481 @t3633 @t3637 @t609 @t4713 @t4734 @t13 @t3636 @t3639 @t86 @t4731 @t4732 @t2507 @t3618 @t3622 @t583 @t4728 @t4749 @t12 @t3621 @t3624 @t87 @t4746 @t4747 @t2533 @t3603 @t3607 @t557 @t4743 @t4764 @t11 @t3606 @t3609 @t88 @t4761 @t4762 @t2559 @t3588 @t3592 @t531 @t4758 @t4779 @t10 @t3591 @t3594 @t89 @t4776 @t4777 @t2585 @t3573 @t3577 @t505 @t4773 @t4794 @t9 @t3576 @t3579 @t90 @t4791 @t4792 @t2611 @t3558 @t3562 @t479 @t4788 @t4809 @t8 @t3561 @t3564 @t91 @t4806 @t4807 @t2637 @t3543 @t3547 @t453 @t4803 @t4824 @t7 @t3546 @t3549 @t92 @t4821 @t4822 @t2663 @t3528 @t3532 @t427 @t4818 @t4839 @t6 @t3531 @t3534 @t93 @t4836 @t4837 @t2689 @t3513 @t3517 @t401 @t4833 @t4854 @t5 @t3516 @t3519 @t94 @t4851 @t4852 @t2715 @t3498 @t3502 @t375 @t4848 @t4869 @t4 @t3501 @t3504 @t95 @t4866 @t4867 @t2741 @t3483 @t3487 @t349 @t4863 @t4884 @t3 @t3486 @t3489 @t96 @t4881 @t4882 @t2767 @t3468 @t3472 @t323 @t4878 @t4899 @t2 @t3471 @t3474 @t97 @t4896 @t4897 @t2793 @t3453 @t3457 @t297 @t4893 @t4915 @t1 @t3456 @t3459 @t98 @t4912 @t4913 @t2819 @t3441 @t3444 @t276 @t4909 @t4910 @t100 @t3437 @t3439 @t99 @t3435 @t3436 @t3432 @t273 @t275 @t268 @t238 @t4901 @t4903))) % 40.01/40.21 (step @p5979 :rule quant-miniscope-or :args ((= (forall @t208 @t4918) (or tptp.loop @t4917)))) % 40.01/40.21 (step @p5980 :rule aci_norm :args ((= @t224 @t4918))) % 40.01/40.21 (step @p5981 :rule cong :premises (@p5980) :args (@t225)) % 40.01/40.21 (step @p5982 :rule trans :premises (@p5981 @p5979)) % 40.01/40.21 (step @p5983 :rule eq_resolve :premises (@p113 @p5982)) % 40.01/40.21 (step @p5984 :rule quant-miniscope-or :args ((= (forall @t208 @t4921) (or tptp.loop @t4920)))) % 40.01/40.21 (step @p5985 :rule aci_norm :args ((= @t230 @t4921))) % 40.01/40.21 (step @p5986 :rule cong :premises (@p5985) :args (@t231)) % 40.01/40.21 (step @p5987 :rule trans :premises (@p5986 @p5984)) % 40.01/40.21 (step @p5988 :rule eq_resolve :premises (@p118 @p5987)) % 40.01/40.21 (assume-push @p6219 @t4917) % 40.01/40.21 (step @p5990 :rule instantiate :premises (@p6219) :args (@t237)) % 40.01/40.21 (step-pop @p6220 :rule scope :premises (@p5990)) % 40.01/40.21 (step @p5991 :rule process_scope :premises (@p6220) :args (@t4922)) % 40.01/40.21 (step @p5993 :rule implies_elim :premises (@p5991)) % 40.01/40.21 (assume-push @p6221 @t4920) % 40.01/40.21 (step @p5995 :rule instantiate :premises (@p6221) :args (@t237)) % 40.01/40.21 (step-pop @p6222 :rule scope :premises (@p5995)) % 40.01/40.21 (step @p5996 :rule process_scope :premises (@p6222) :args (@t4923)) % 40.01/40.21 (step @p5998 :rule implies_elim :premises (@p5996)) % 40.01/40.21 (step @p5999 :rule cnf_or_pos :args (@t4922)) % 40.01/40.21 (step @p6000 :rule reordering :premises (@p5999) :args ((or @t270 @t244 (not @t4922)))) % 40.01/40.21 (step @p6001 :rule cnf_or_pos :args (@t4923)) % 40.01/40.21 (step @p6002 :rule reordering :premises (@p6001) :args ((or @t270 @t3440 (not @t4923)))) % 40.01/40.21 (step @p6003 :rule chain_m_resolution :premises (@p3175 @p2277 @p3172 @p2305 @p25 @p3178 @p2276 @p26 @p3169 @p2306 @p3181 @p2248 @p3166 @p2334 @p24 @p3184 @p2247 @p27 @p3163 @p2335 @p3187 @p2219 @p3160 @p2363 @p23 @p3190 @p2218 @p28 @p3157 @p2364 @p3193 @p2190 @p3154 @p2392 @p22 @p3196 @p2189 @p29 @p3151 @p2393 @p3199 @p2161 @p3148 @p2421 @p21 @p3202 @p2160 @p30 @p3145 @p2422 @p3205 @p2132 @p3142 @p2450 @p20 @p3208 @p2131 @p31 @p3139 @p2451 @p3211 @p2103 @p3136 @p2479 @p19 @p3214 @p2102 @p32 @p3133 @p2480 @p3217 @p2074 @p3130 @p2508 @p18 @p3220 @p2073 @p33 @p3127 @p2509 @p3223 @p2045 @p3124 @p2537 @p17 @p3226 @p2044 @p34 @p3121 @p2538 @p3229 @p2016 @p3118 @p2566 @p16 @p3232 @p2015 @p35 @p3115 @p2567 @p3235 @p1987 @p3112 @p2595 @p15 @p3238 @p1986 @p36 @p3109 @p2596 @p3241 @p1958 @p3106 @p2624 @p14 @p3244 @p1957 @p37 @p3103 @p2625 @p3247 @p1929 @p3100 @p2653 @p13 @p3250 @p1928 @p38 @p3097 @p2654 @p3253 @p1900 @p3094 @p2682 @p12 @p3256 @p1899 @p39 @p3091 @p2683 @p3259 @p1871 @p3088 @p2711 @p11 @p3262 @p1870 @p40 @p3085 @p2712 @p3265 @p1842 @p3082 @p2740 @p10 @p3268 @p1841 @p41 @p3079 @p2741 @p3271 @p1813 @p3076 @p2769 @p9 @p3274 @p1812 @p42 @p3073 @p2770 @p3277 @p1784 @p3070 @p2798 @p8 @p3280 @p1783 @p43 @p3067 @p2799 @p3283 @p1755 @p3064 @p2827 @p7 @p3286 @p1754 @p44 @p3061 @p2828 @p3289 @p1726 @p3058 @p2856 @p6 @p3292 @p1725 @p45 @p3055 @p2857 @p3295 @p1697 @p3052 @p2885 @p5 @p3298 @p1696 @p46 @p3049 @p2886 @p3301 @p1668 @p3046 @p2914 @p4 @p3304 @p1667 @p47 @p3043 @p2915 @p3307 @p1639 @p3040 @p2943 @p3 @p3310 @p1638 @p48 @p3037 @p2944 @p3313 @p1610 @p3034 @p2972 @p2 @p3316 @p1609 @p49 @p3031 @p2973 @p3319 @p1581 @p3028 @p3001 @p1 @p3322 @p1580 @p50 @p3025 @p3002 @p123 @p3325 @p1552 @p3008 @p3006 @p3328 @p1551 @p51 @p2976 @p2974 @p3022 @p3020 @p3013 @p3331 @p1523 @p2947 @p2945 @p2986 @p2984 @p2983 @p3334 @p1522 @p52 @p2918 @p2916 @p2957 @p2955 @p2954 @p3337 @p1494 @p2889 @p2887 @p2928 @p2926 @p2925 @p3340 @p1493 @p53 @p2860 @p2858 @p2899 @p2897 @p2896 @p3343 @p1465 @p2831 @p2829 @p2870 @p2868 @p2867 @p3346 @p1464 @p54 @p2802 @p2800 @p2841 @p2839 @p2838 @p3349 @p1436 @p2773 @p2771 @p2812 @p2810 @p2809 @p3352 @p1435 @p55 @p2744 @p2742 @p2783 @p2781 @p2780 @p3355 @p1407 @p2715 @p2713 @p2754 @p2752 @p2751 @p3358 @p1406 @p56 @p2686 @p2684 @p2725 @p2723 @p2722 @p3361 @p1378 @p2657 @p2655 @p2696 @p2694 @p2693 @p3364 @p1377 @p57 @p2628 @p2626 @p2667 @p2665 @p2664 @p3367 @p1349 @p2599 @p2597 @p2638 @p2636 @p2635 @p3370 @p1348 @p58 @p2570 @p2568 @p2609 @p2607 @p2606 @p3373 @p1320 @p2541 @p2539 @p2580 @p2578 @p2577 @p3376 @p1319 @p59 @p2512 @p2510 @p2551 @p2549 @p2548 @p3379 @p1291 @p2483 @p2481 @p2522 @p2520 @p2519 @p3382 @p1290 @p60 @p2454 @p2452 @p2493 @p2491 @p2490 @p3385 @p1262 @p2425 @p2423 @p2464 @p2462 @p2461 @p3388 @p1261 @p61 @p2396 @p2394 @p2435 @p2433 @p2432 @p3391 @p1233 @p2367 @p2365 @p2406 @p2404 @p2403 @p3394 @p1232 @p62 @p2338 @p2336 @p2377 @p2375 @p2374 @p3397 @p1204 @p2309 @p2307 @p2348 @p2346 @p2345 @p3400 @p1203 @p63 @p2280 @p2278 @p2319 @p2317 @p2316 @p3403 @p1175 @p2251 @p2249 @p2290 @p2288 @p2287 @p3406 @p1174 @p64 @p2222 @p2220 @p2261 @p2259 @p2258 @p3409 @p1146 @p2193 @p2191 @p2232 @p2230 @p2229 @p3412 @p1145 @p65 @p2164 @p2162 @p2203 @p2201 @p2200 @p3415 @p1117 @p2135 @p2133 @p2174 @p2172 @p2171 @p3418 @p1116 @p66 @p2106 @p2104 @p2145 @p2143 @p2142 @p3421 @p1088 @p2077 @p2075 @p2116 @p2114 @p2113 @p3424 @p1087 @p67 @p2048 @p2046 @p2087 @p2085 @p2084 @p3427 @p1059 @p2019 @p2017 @p2058 @p2056 @p2055 @p3430 @p1058 @p68 @p1990 @p1988 @p2029 @p2027 @p2026 @p3433 @p1030 @p1961 @p1959 @p2000 @p1998 @p1997 @p3436 @p1029 @p69 @p1932 @p1930 @p1971 @p1969 @p1968 @p3439 @p1001 @p1903 @p1901 @p1942 @p1940 @p1939 @p3442 @p1000 @p70 @p1874 @p1872 @p1913 @p1911 @p1910 @p3445 @p972 @p1845 @p1843 @p1884 @p1882 @p1881 @p3448 @p971 @p71 @p1816 @p1814 @p1855 @p1853 @p1852 @p3451 @p943 @p1787 @p1785 @p1826 @p1824 @p1823 @p3454 @p942 @p72 @p1758 @p1756 @p1797 @p1795 @p1794 @p3457 @p914 @p1729 @p1727 @p1768 @p1766 @p1765 @p3460 @p913 @p73 @p1700 @p1698 @p1739 @p1737 @p1736 @p3463 @p885 @p1671 @p1669 @p1710 @p1708 @p1707 @p3466 @p884 @p74 @p1642 @p1640 @p1681 @p1679 @p1678 @p3469 @p856 @p1613 @p1611 @p1652 @p1650 @p1649 @p3472 @p855 @p75 @p1584 @p1582 @p1623 @p1621 @p1620 @p3475 @p827 @p1555 @p1553 @p1594 @p1592 @p1591 @p3478 @p826 @p76 @p1526 @p1524 @p1565 @p1563 @p1562 @p3481 @p798 @p1497 @p1495 @p1536 @p1534 @p1533 @p3484 @p797 @p77 @p1468 @p1466 @p1507 @p1505 @p1504 @p3487 @p769 @p1439 @p1437 @p1478 @p1476 @p1475 @p3490 @p768 @p78 @p1410 @p1408 @p1449 @p1447 @p1446 @p3493 @p740 @p1381 @p1379 @p1420 @p1418 @p1417 @p3496 @p739 @p79 @p1352 @p1350 @p1391 @p1389 @p1388 @p3499 @p711 @p1323 @p1321 @p1362 @p1360 @p1359 @p3502 @p710 @p80 @p1294 @p1292 @p1333 @p1331 @p1330 @p3505 @p682 @p1265 @p1263 @p1304 @p1302 @p1301 @p3508 @p681 @p81 @p1236 @p1234 @p1275 @p1273 @p1272 @p3511 @p653 @p1207 @p1205 @p1246 @p1244 @p1243 @p3514 @p652 @p82 @p1178 @p1176 @p1217 @p1215 @p1214 @p3517 @p624 @p1149 @p1147 @p1188 @p1186 @p1185 @p3520 @p623 @p83 @p1120 @p1118 @p1159 @p1157 @p1156 @p3523 @p595 @p1091 @p1089 @p1130 @p1128 @p1127 @p3526 @p594 @p84 @p1062 @p1060 @p1101 @p1099 @p1098 @p3529 @p566 @p1033 @p1031 @p1072 @p1070 @p1069 @p3532 @p565 @p85 @p1004 @p1002 @p1043 @p1041 @p1040 @p3535 @p537 @p975 @p973 @p1014 @p1012 @p1011 @p3538 @p536 @p86 @p946 @p944 @p985 @p983 @p982 @p3541 @p508 @p917 @p915 @p956 @p954 @p953 @p3544 @p507 @p87 @p888 @p886 @p927 @p925 @p924 @p3547 @p479 @p859 @p857 @p898 @p896 @p895 @p3550 @p478 @p88 @p830 @p828 @p869 @p867 @p866 @p3553 @p450 @p801 @p799 @p840 @p838 @p837 @p3556 @p449 @p89 @p772 @p770 @p811 @p809 @p808 @p3559 @p421 @p743 @p741 @p782 @p780 @p779 @p3562 @p420 @p90 @p714 @p712 @p753 @p751 @p750 @p3565 @p392 @p685 @p683 @p724 @p722 @p721 @p3568 @p391 @p91 @p656 @p654 @p695 @p693 @p692 @p3571 @p363 @p627 @p625 @p666 @p664 @p663 @p3574 @p362 @p92 @p598 @p596 @p637 @p635 @p634 @p3577 @p334 @p569 @p567 @p608 @p606 @p605 @p3580 @p333 @p93 @p540 @p538 @p579 @p577 @p576 @p3583 @p305 @p511 @p509 @p550 @p548 @p547 @p3586 @p304 @p94 @p482 @p480 @p521 @p519 @p518 @p3589 @p276 @p453 @p451 @p492 @p490 @p489 @p3592 @p275 @p95 @p424 @p422 @p463 @p461 @p460 @p3595 @p247 @p395 @p393 @p434 @p432 @p431 @p3598 @p246 @p96 @p366 @p364 @p405 @p403 @p402 @p3601 @p218 @p337 @p335 @p376 @p374 @p373 @p3604 @p217 @p97 @p308 @p306 @p347 @p345 @p344 @p3607 @p189 @p279 @p277 @p318 @p316 @p315 @p3610 @p188 @p98 @p250 @p248 @p289 @p287 @p286 @p3613 @p163 @p221 @p219 @p260 @p258 @p257 @p3616 @p162 @p99 @p192 @p190 @p231 @p229 @p228 @p3619 @p124 @p166 @p164 @p202 @p200 @p199 @p127 @p125 @p176 @p174 @p173 @p6002 @p100 @p6000 @p100 @p5998 @p5993 @p5988 @p5983) :args (tptp.loop (@list false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false true false false false false false true false true false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false false true false true false false true false true false true false false true false true false false true false true false false false false false) (@list @t2992 @t2988 @t2989 @t25 @t2991 @t2995 @t26 @t2985 @t2986 @t2994 @t2998 @t2982 @t2983 @t24 @t2997 @t3001 @t27 @t2979 @t2980 @t3000 @t3004 @t2976 @t2977 @t23 @t3003 @t3007 @t28 @t2973 @t2974 @t3006 @t3010 @t2970 @t2971 @t22 @t3009 @t3013 @t29 @t2967 @t2968 @t3012 @t3016 @t2964 @t2965 @t21 @t3015 @t3019 @t30 @t2961 @t2962 @t3018 @t3022 @t2958 @t2959 @t20 @t3021 @t3025 @t31 @t2955 @t2956 @t3024 @t3028 @t2952 @t2953 @t19 @t3027 @t3031 @t32 @t2949 @t2950 @t3030 @t3034 @t2946 @t2947 @t18 @t3033 @t3037 @t33 @t2943 @t2944 @t3036 @t3040 @t2940 @t2941 @t17 @t3039 @t3043 @t34 @t2937 @t2938 @t3042 @t3046 @t2934 @t2935 @t16 @t3045 @t3049 @t35 @t2931 @t2932 @t3048 @t3052 @t2928 @t2929 @t15 @t3051 @t3055 @t36 @t2925 @t2926 @t3054 @t3058 @t2922 @t2923 @t14 @t3057 @t3061 @t37 @t2919 @t2920 @t3060 @t3064 @t2916 @t2917 @t13 @t3063 @t3067 @t38 @t2913 @t2914 @t3066 @t3070 @t2910 @t2911 @t12 @t3069 @t3073 @t39 @t2907 @t2908 @t3072 @t3076 @t2904 @t2905 @t11 @t3075 @t3079 @t40 @t2901 @t2902 @t3078 @t3082 @t2898 @t2899 @t10 @t3081 @t3085 @t41 @t2895 @t2896 @t3084 @t3088 @t2892 @t2893 @t9 @t3087 @t3091 @t42 @t2889 @t2890 @t3090 @t3094 @t2886 @t2887 @t8 @t3093 @t3097 @t43 @t2883 @t2884 @t3096 @t3100 @t2880 @t2881 @t7 @t3099 @t3103 @t44 @t2877 @t2878 @t3102 @t3106 @t2874 @t2875 @t6 @t3105 @t3109 @t45 @t2871 @t2872 @t3108 @t3112 @t2868 @t2869 @t5 @t3111 @t3115 @t46 @t2865 @t2866 @t3114 @t3118 @t2862 @t2863 @t4 @t3117 @t3121 @t47 @t2859 @t2860 @t3120 @t3124 @t2856 @t2857 @t3 @t3123 @t3127 @t48 @t2853 @t2854 @t3126 @t3130 @t2850 @t2851 @t2 @t3129 @t3133 @t49 @t2847 @t2848 @t3132 @t3136 @t2843 @t2844 @t1 @t3135 @t3139 @t50 @t2839 @t2840 @t236 @t3138 @t3142 @t2819 @t2824 @t3141 @t3145 @t51 @t2793 @t2796 @t2823 @t2837 @t2826 @t3144 @t3148 @t2767 @t2770 @t2795 @t2805 @t2800 @t3147 @t3151 @t52 @t2741 @t2744 @t2769 @t2779 @t2774 @t3150 @t3154 @t2715 @t2718 @t2743 @t2753 @t2748 @t3153 @t3157 @t53 @t2689 @t2692 @t2717 @t2727 @t2722 @t3156 @t3160 @t2663 @t2666 @t2691 @t2701 @t2696 @t3159 @t3163 @t54 @t2637 @t2640 @t2665 @t2675 @t2670 @t3162 @t3166 @t2611 @t2614 @t2639 @t2649 @t2644 @t3165 @t3169 @t55 @t2585 @t2588 @t2613 @t2623 @t2618 @t3168 @t3172 @t2559 @t2562 @t2587 @t2597 @t2592 @t3171 @t3175 @t56 @t2533 @t2536 @t2561 @t2571 @t2566 @t3174 @t3178 @t2507 @t2510 @t2535 @t2545 @t2540 @t3177 @t3181 @t57 @t2481 @t2484 @t2509 @t2519 @t2514 @t3180 @t3184 @t2455 @t2458 @t2483 @t2493 @t2488 @t3183 @t3187 @t58 @t2429 @t2432 @t2457 @t2467 @t2462 @t3186 @t3190 @t2403 @t2406 @t2431 @t2441 @t2436 @t3189 @t3193 @t59 @t2377 @t2380 @t2405 @t2415 @t2410 @t3192 @t3196 @t2351 @t2354 @t2379 @t2389 @t2384 @t3195 @t3199 @t60 @t2325 @t2328 @t2353 @t2363 @t2358 @t3198 @t3202 @t2299 @t2302 @t2327 @t2337 @t2332 @t3201 @t3205 @t61 @t2273 @t2276 @t2301 @t2311 @t2306 @t3204 @t3208 @t2247 @t2250 @t2275 @t2285 @t2280 @t3207 @t3211 @t62 @t2221 @t2224 @t2249 @t2259 @t2254 @t3210 @t3214 @t2195 @t2198 @t2223 @t2233 @t2228 @t3213 @t3217 @t63 @t2169 @t2172 @t2197 @t2207 @t2202 @t3216 @t3220 @t2143 @t2146 @t2171 @t2181 @t2176 @t3219 @t3223 @t64 @t2117 @t2120 @t2145 @t2155 @t2150 @t3222 @t3226 @t2091 @t2094 @t2119 @t2129 @t2124 @t3225 @t3229 @t65 @t2065 @t2068 @t2093 @t2103 @t2098 @t3228 @t3232 @t2039 @t2042 @t2067 @t2077 @t2072 @t3231 @t3235 @t66 @t2013 @t2016 @t2041 @t2051 @t2046 @t3234 @t3238 @t1987 @t1990 @t2015 @t2025 @t2020 @t3237 @t3241 @t67 @t1961 @t1964 @t1989 @t1999 @t1994 @t3240 @t3244 @t1935 @t1938 @t1963 @t1973 @t1968 @t3243 @t3247 @t68 @t1909 @t1912 @t1937 @t1947 @t1942 @t3246 @t3250 @t1883 @t1886 @t1911 @t1921 @t1916 @t3249 @t3253 @t69 @t1857 @t1860 @t1885 @t1895 @t1890 @t3252 @t3256 @t1831 @t1834 @t1859 @t1869 @t1864 @t3255 @t3259 @t70 @t1805 @t1808 @t1833 @t1843 @t1838 @t3258 @t3262 @t1779 @t1782 @t1807 @t1817 @t1812 @t3261 @t3265 @t71 @t1753 @t1756 @t1781 @t1791 @t1786 @t3264 @t3268 @t1727 @t1730 @t1755 @t1765 @t1760 @t3267 @t3271 @t72 @t1701 @t1704 @t1729 @t1739 @t1734 @t3270 @t3274 @t1675 @t1678 @t1703 @t1713 @t1708 @t3273 @t3277 @t73 @t1649 @t1652 @t1677 @t1687 @t1682 @t3276 @t3280 @t1623 @t1626 @t1651 @t1661 @t1656 @t3279 @t3283 @t74 @t1597 @t1600 @t1625 @t1635 @t1630 @t3282 @t3286 @t1571 @t1574 @t1599 @t1609 @t1604 @t3285 @t3289 @t75 @t1545 @t1548 @t1573 @t1583 @t1578 @t3288 @t3292 @t1519 @t1522 @t1547 @t1557 @t1552 @t3291 @t3295 @t76 @t1493 @t1496 @t1521 @t1531 @t1526 @t3294 @t3298 @t1467 @t1470 @t1495 @t1505 @t1500 @t3297 @t3301 @t77 @t1441 @t1444 @t1469 @t1479 @t1474 @t3300 @t3304 @t1415 @t1418 @t1443 @t1453 @t1448 @t3303 @t3307 @t78 @t1389 @t1392 @t1417 @t1427 @t1422 @t3306 @t3310 @t1363 @t1366 @t1391 @t1401 @t1396 @t3309 @t3313 @t79 @t1337 @t1340 @t1365 @t1375 @t1370 @t3312 @t3316 @t1311 @t1314 @t1339 @t1349 @t1344 @t3315 @t3319 @t80 @t1285 @t1288 @t1313 @t1323 @t1318 @t3318 @t3322 @t1259 @t1262 @t1287 @t1297 @t1292 @t3321 @t3325 @t81 @t1233 @t1236 @t1261 @t1271 @t1266 @t3324 @t3328 @t1207 @t1210 @t1235 @t1245 @t1240 @t3327 @t3331 @t82 @t1181 @t1184 @t1209 @t1219 @t1214 @t3330 @t3334 @t1155 @t1158 @t1183 @t1193 @t1188 @t3333 @t3337 @t83 @t1129 @t1132 @t1157 @t1167 @t1162 @t3336 @t3340 @t1103 @t1106 @t1131 @t1141 @t1136 @t3339 @t3343 @t84 @t1077 @t1080 @t1105 @t1115 @t1110 @t3342 @t3346 @t1051 @t1054 @t1079 @t1089 @t1084 @t3345 @t3349 @t85 @t1025 @t1028 @t1053 @t1063 @t1058 @t3348 @t3352 @t999 @t1002 @t1027 @t1037 @t1032 @t3351 @t3355 @t86 @t973 @t976 @t1001 @t1011 @t1006 @t3354 @t3358 @t947 @t950 @t975 @t985 @t980 @t3357 @t3361 @t87 @t921 @t924 @t949 @t959 @t954 @t3360 @t3364 @t895 @t898 @t923 @t933 @t928 @t3363 @t3367 @t88 @t869 @t872 @t897 @t907 @t902 @t3366 @t3370 @t843 @t846 @t871 @t881 @t876 @t3369 @t3373 @t89 @t817 @t820 @t845 @t855 @t850 @t3372 @t3376 @t791 @t794 @t819 @t829 @t824 @t3375 @t3379 @t90 @t765 @t768 @t793 @t803 @t798 @t3378 @t3382 @t739 @t742 @t767 @t777 @t772 @t3381 @t3385 @t91 @t713 @t716 @t741 @t751 @t746 @t3384 @t3388 @t687 @t690 @t715 @t725 @t720 @t3387 @t3391 @t92 @t661 @t664 @t689 @t699 @t694 @t3390 @t3394 @t635 @t638 @t663 @t673 @t668 @t3393 @t3397 @t93 @t609 @t612 @t637 @t647 @t642 @t3396 @t3400 @t583 @t586 @t611 @t621 @t616 @t3399 @t3403 @t94 @t557 @t560 @t585 @t595 @t590 @t3402 @t3406 @t531 @t534 @t559 @t569 @t564 @t3405 @t3409 @t95 @t505 @t508 @t533 @t543 @t538 @t3408 @t3412 @t479 @t482 @t507 @t517 @t512 @t3411 @t3415 @t96 @t453 @t456 @t481 @t491 @t486 @t3414 @t3418 @t427 @t430 @t455 @t465 @t460 @t3417 @t3421 @t97 @t401 @t404 @t429 @t439 @t434 @t3420 @t3424 @t375 @t378 @t403 @t413 @t408 @t3423 @t3427 @t98 @t349 @t352 @t377 @t387 @t382 @t3426 @t3430 @t323 @t326 @t351 @t361 @t356 @t3429 @t3433 @t99 @t297 @t300 @t325 @t335 @t330 @t3432 @t3436 @t276 @t278 @t299 @t309 @t304 @t238 @t241 @t256 @t285 @t281 @t3435 @t100 @t240 @t100 @t4923 @t4922 @t4920 @t4917))) % 40.01/40.21 (step @p6004 :rule chain_m_resolution :premises (@p102 @p6003 @p5978 @p5957 @p5933 @p5909 @p5885 @p5861 @p5837 @p5813 @p5789 @p5765 @p5741 @p5717 @p5693 @p5669 @p5645 @p5621 @p5597 @p5573 @p5549 @p5525 @p5501 @p5477 @p5453 @p5429 @p5405 @p5381 @p5357 @p5333 @p5309 @p5285 @p5261 @p5237 @p5213 @p5189 @p5165 @p5141 @p5117 @p5093 @p5069 @p5045 @p5021 @p4997 @p4973 @p4949 @p4925 @p4901 @p4877 @p4853 @p4829 @p4805 @p4781 @p4757 @p4733 @p4709 @p4685 @p4661 @p4637 @p4613 @p4589 @p4565 @p4541 @p4517 @p4493 @p4469 @p4445 @p4421 @p4397 @p4373 @p4349 @p4325 @p4301 @p4277 @p4253 @p4229 @p4205 @p4181 @p4157 @p4133 @p4109 @p4085 @p4061 @p4037 @p4013 @p3989 @p3965 @p3941 @p3917 @p3893 @p3869 @p3845 @p3821 @p3797 @p3773 @p3749 @p3725 @p3701 @p3677 @p3653 @p3629) :args (@t106 (@list false true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true true) (@list tptp.loop @t205 @t204 @t203 @t202 @t201 @t200 @t199 @t198 @t197 @t196 @t195 @t194 @t193 @t192 @t191 @t190 @t189 @t188 @t187 @t186 @t185 @t184 @t183 @t182 @t181 @t180 @t179 @t178 @t177 @t176 @t175 @t174 @t173 @t172 @t171 @t170 @t169 @t168 @t167 @t166 @t165 @t164 @t163 @t162 @t161 @t160 @t159 @t158 @t157 @t156 @t155 @t154 @t153 @t152 @t151 @t150 @t149 @t148 @t147 @t146 @t145 @t144 @t143 @t142 @t141 @t140 @t139 @t138 @t137 @t136 @t135 @t134 @t133 @t132 @t131 @t130 @t129 @t128 @t127 @t126 @t125 @t124 @t123 @t122 @t121 @t120 @t119 @t118 @t117 @t116 @t115 @t114 @t113 @t112 @t111 @t110 @t109 @t108 @t107))) % 40.01/40.21 (step @p6005 :rule cnf_or_pos :args (@t4926)) % 40.01/40.21 (step @p6006 :rule reordering :premises (@p6005) :args ((or @t4925 @t4924 (not @t4926)))) % 40.01/40.21 (step @p6007 :rule chain_m_resolution :premises (@p6006 @p6004 @p137) :args (@t4924 @t272 (@list @t106 @t4926))) % 40.01/40.21 (step @p6008 :rule instantiate :premises (@p108) :args (@t250)) % 40.01/40.21 (step @p6009 :rule cnf_or_pos :args (@t4928)) % 40.01/40.21 (step @p6010 :rule reordering :premises (@p6009) :args ((or @t245 @t265 @t264 @t4927 (not @t4928)))) % 40.01/40.21 (step @p6011 :rule chain_m_resolution :premises (@p6010 @p6008 @p6007 @p136 @p134 @p133 @p131 @p130 @p128 @p127 @p125) :args (@t239 (@list false false false false true false false false false false) (@list @t4928 @t4924 @t248 @t249 @t245 @t247 @t242 @t243 @t240 @t241))) % 40.01/40.21 (step @p6012 :rule chain_m_resolution :premises (@p3619 @p3617 @p6011 @p124) :args (@t3435 @t2841 (@list @t3432 @t238 @t3436))) % 40.01/40.21 (step @p6013 :rule chain_m_resolution :premises (@p161 @p158 @p6011 @p159) :args (@t274 (@list true true false) (@list @t268 @t238 @t275))) % 40.01/40.21 (step @p6014 :rule cnf_or_pos :args (@t4929)) % 40.01/40.21 (step @p6015 :rule reordering :premises (@p6014) :args ((or @t270 @t4925 @t273 @t3440 @t4930))) % 40.01/40.21 (step @p6016 :rule chain_m_resolution :premises (@p6015 @p100 @p6004 @p6013 @p6012) :args (@t4930 (@list false false true false) (@list @t100 @t106 @t273 @t3435))) % 40.01/40.21 (assume-push @p6223 @t233) % 40.01/40.21 (step @p6018 :rule instantiate :premises (@p119) :args (@t250)) % 40.01/40.21 (step-pop @p6224 :rule scope :premises (@p6018)) % 40.01/40.21 (step @p6019 :rule process_scope :premises (@p6224) :args (@t4929)) % 40.01/40.21 (step @p6021 :rule implies_elim :premises (@p6019)) % 40.01/40.21 (step @p6022 false :rule chain_m_resolution :premises (@p6021 @p6016 @p119) :args (false (@list true false) (@list @t4929 @t233))) % 40.01/40.21 ) % 40.01/40.21 % SZS output end Proof % 40.01/40.21 % cvc5 exiting %------------------------------------------------------------------------------